Abstract: An organic electroluminescent device having an anode, wherein the anode comprises at least one first layer, the first layer being made of partially reduced graphene oxides.

Abstract: According to the embodiments provided herein, a method for forming a photovoltaic device can include depositing a plurality of semiconductor layers. The plurality of semiconductor layers can include a doped layer that is doped with a group V dopant. The doped layer can include cadmium selenide or cadmium telluride. The method can include annealing the plurality of semiconductor layers to form an absorber layer.

Abstract: A thin-film solar module with a substrate and a layer structure applied thereon that comprises a rear electrode layer, a front electrode layer, and an absorber layer arranged between the back electrode layer and the front electrode layer. Serially connected solar cells are formed in the layer structure by patterning zones, wherein each patterning zone comprises a first patterning line for subdividing at least the rear electrode layer, a second patterning line for subdividing at least the absorber layer, and at least one third patterning line for subdividing at least the front electrode layer. At least one patterning zone has one or more optically transparent zones in a zone region reduced by the first patterning line, which are in each case rear-electrode-layer-free, wherein the one or more optically transparent zones are implemented such that the rear electrode layer is continuous in the zone region.

Abstract: The present disclosure generally relates to semiconductor devices for use in optoelectronic/photonic applications and integrated circuit (IC) chips. More particularly, the present disclosure relates to devices containing photodiodes such as avalanche photodiodes (APDs) and single photon avalanche diodes (SPADs). The present disclosure may provide a device including a substrate, a first well of a first conductivity type in the substrate, a second well of a second conductivity type in the substrate, and a buried layer of the second conductivity type in the substrate. The buried layer may be below the first well and the second well. The buried layer may have a first section and a second section, in which the first section has a larger thickness than the second section.

Abstract: An image sensor device includes a semiconductor substrate, a radiation sensing member, a shallow trench isolation, and a color filter layer. The radiation sensing member is in the semiconductor substrate. An interface between the radiation sensing member and the semiconductor substrate includes a direct band gap material. The shallow trench isolation is in the semiconductor substrate and surrounds the radiation sensing member. The color filter layer covers the radiation sensing member.

Abstract: A display device includes: a base substrate, a transistor disposed on the base substrate, an organic layer disposed on the transistor, a display element layer disposed on the organic layer, and a pixel electrode disposed between the organic layer and the display element layer. The pixel electrode includes a first electrode layer disposed between the organic layer and the display element layer and containing an organic matter derived from the organic layer, and a second electrode layer disposed between the first electrode and the display element layer and not containing the organic matter.

Abstract: A ribbon beam plasma enhanced chemical vapor deposition (PECVD) system comprising a process chamber containing a platen for supporting a substrate, and a plasma source disposed adjacent the process chamber and adapted to produce free radicals in a plasma chamber, the plasma chamber having an aperture associated therewith for allowing a beam of the free radicals to exit the plasma chamber, wherein the process chamber is maintained at a first pressure and the plasma chamber is maintained at a second pressure greater than the first pressure for driving the free radicals from the plasma chamber into the process chamber.

Abstract: The present disclosure provides a solar cell. The solar cell includes a substrate, where the substrate has a front surface and a rear surface, the rear surface includes a textured region and a flat region, a doped surface field is formed in the textured region of the substrate; a tunneling dielectric layer, where the tunneling dielectric layer is located on the flat region; a doped conductive layer, where the doped conductive layer is located on the tunnelling dielectric layer, the doped conductive layer has doping elements, and the doped conductive layer has the same type of the doping elements with the doped surface field; a rear electrode, where a part of a bottom portion of the rear electrode is located in the doped conductive layer and the part of the bottom portion of the rear electrode is in contact with the doped surface field.

Abstract: A radiation detection module according to an embodiment includes an array substrate including multiple photoelectric converters, a scintillator that covers a region in which the multiple photoelectric converters are located and that has larger dimensions than the region in which the multiple photoelectric converters are located when viewed in plan, and a light-absorbing part that is located on the scintillator and is capable of absorbing visible light. The light-absorbing part is located outward of the region in which the multiple photoelectric converters are located when viewed in plan.

Abstract: A method for forming a hole transport layer on a surface of a substrate includes providing M target materials comprising inorganic hole transport materials and forming the hole transport layer on the surface of the substrate using magnetron sputtering. The hold transport layer at least comprises N consecutive sub-layers. M and N are integers and 2?N?M. One of the M target materials is a doped target material further comprising a doping material.

Abstract: The present disclosure relates to a method of forming an integrated chip. The method includes forming a gate stack over a front surface of a substrate. A mask layer is formed over at least a portion of the gate stack and a portion of the front surface. A plurality of dopants are implanted into one or more regions of the substrate that are not covered by the mask layer to form one or more doped isolation features in the substrate. The one or more doped isolation features are formed to have a convex portion at least partially under the gate stack.

Abstract: A display device and a method of manufacturing the same are disclosed. The display device includes a substrate layer and an active layer. The active layer includes a first body portion, a second body portion, and an additional portion. The first body portion is disposed on the first substrate area, the additional portion is disposed on the first body portion, the second body portion is arranged on the second substrate area, and the first body portion and the additional portion are not connected to the second body portion, wherein a band gap of the additional portion is smaller than a band gap of the first body portion and a band gap the second body portion.

Abstract: Structures and methods for manufacturing photovoltaic devices by forming perovskite layers and perovskite precursor layers using vapor transport deposition (VTD) are described.

Abstract: A light detecting device includes: a filter array including filters two-dimensionally arrayed and an image sensor including light detection elements. Each of first and second filters included in the filters includes a first reflective layer, a second reflective layer, and an intermediate layer therebetween and has a resonance structure having resonant modes whose orders are different from each other. A refractive index and/or a thickness of the intermediate layer in the first and second filters is different depending on the filter. A transmission spectrum of each of the first and second filters has local maximum value of transmittance at each of wavelengths included in a wavelength region, and the wavelengths correspond to the resonant modes, respectively. The image sensor is disposed at a position where the image senor receives passing light that passes through the filter array, to detect components in the wavelengths included in the passing light.

Abstract: The present invention relates to a solar cell manufacturing method, a solar cell manufactured thereby, and a substrate for a solar cell. The solar cell manufacturing method involves forming a separating portion for separating a substrate, which is for manufacturing the solar cell, into a plurality of pieces. The solar cell manufacturing method comprises: a step for preparing the substrate; a first substrate etching step for forming a first groove in one surface of the substrate; a second substrate etching step for forming a second groove inside the first groove; and a third substrate etching step for etching the substrate including the second groove, wherein the separating portion includes the first groove and the second groove.

Abstract: The present disclosure relates to an image sensor including a pixel along a substrate. The pixel includes a first semiconductor region having a first doping type. A second semiconductor region is directly over the first semiconductor region. The second semiconductor region has a second doping type opposite the first doping type and meets the first semiconductor region at a p-n junction. A ring-shaped third semiconductor region laterally surrounds the first and second semiconductor regions. The ring-shaped third semiconductor region has the first doping type. A ring-shaped fourth semiconductor region laterally surrounds the ring-shaped third semiconductor region. The ring-shaped fourth semiconductor region has the second doping type. A ring-shaped fifth semiconductor region is directly over the ring-shaped third semiconductor region and has the second doping type.

Abstract: A photodetector includes a substrate, a material layer, a first electrode made of a metal, a core, a second electrode and a light absorption layer made of graphene. The first electrode, the core, and the material layer constitute a hybrid plasmonic waveguide, and the light absorption layer is disposed thereon. Light guided in the hybrid plasmonic waveguide is absorbed by the light absorption layer, photoelectrically converted by the PTE effect, and extracted as an electric signal from the first electrode and the second electrode.

Abstract: The present technology relates to a solid-state imaging device capable of protecting a photoelectric conversion film with a sealing film that has excellent sealing properties and coverage, a method of manufacturing the solid-state imaging device, and an electronic apparatus. A solid-state imaging device includes: a photoelectric conversion film formed on the upper side of a semiconductor substrate; and a sealing film that is formed on the upper layer of the photoelectric conversion film and has a lower etching rate than that of silicon oxide. The present technology can be applied to solid-state imaging devices having a photoelectric conversion film on the upper side of a semiconductor substrate, and the like, for example.

Abstract: A solid-state image sensor includes a plurality of imaging device blocks each including P×Q imaging devices. In an imaging device block, first charge movement controlling electrodes are provided between the imaging devices, and second charge movement controlling electrodes are provided between the imaging device blocks. In the imaging device block, P imaging devices are arrayed along a first direction, and Q imaging devices are arrayed along a second direction. Charge accumulated in a photoelectric conversion layer of the (P?1)th imaging device from the first imaging device along the first direction is transferred to the photoelectric conversion layer of the Pth imaging device and read out together with charge accumulated in the photoelectric conversion layers of the Q Pth imaging devices, under the control of the first charge movement controlling electrodes.

Abstract: A method of forming one-dimensional metal oxide nanostructures includes forming a TiN film on a substrate to provide a TiN-coated substrate; providing an aqueous mixture including hexamethylenetetramine and a metal nitrate, contacting the TiN-coated substrate with the aqueous mixture such that the TiN film on the substrate is in the aqueous mixture, and heating the aqueous mixture at a temperature ranging from about 50° C. to about 100° C. for a period of time ranging from about 60 minutes to about 180 minutes to form the metal oxide nanostructures. The method offers a low-temperature approach for the growth of metal oxide nanostructures. In an embodiment, the metal oxide is zinc oxide (ZnO) and the metal nitrate is zinc nitrate. In an embodiment the substrate is a Si/SiO2 substrate. In an embodiment, the metal oxide nanostructures include one-dimensional nanostructures, such as nanorods.

Abstract: The present disclosure relates to the technical field of solar cells, and relates to a crystalline silicon solar cell and a preparation method thereof, and a photovoltaic assembly. The crystalline silicon solar cell includes a crystalline silicon substrate, a passivation layer that is disposed on the crystalline silicon substrate and that is provided with through holes, a carrier collection layer that is disposed on the passivation layer, and electrodes that contact the carrier collection layer; the carrier collection layer contacts the crystalline silicon substrate by means of the through holes on the passivation layer. In the described crystalline silicon solar cell, through holes are provided on the passivation layer, and the carrier collection layer contacts the crystalline silicon substrate by means of the through holes on the passivation layer.

Abstract: A method for measuring alpha particle emissions may include obtaining a wafer emission rate, wherein the wafer emission rate is measured with a counter. The method may further include covering the wafer with a metal mesh grounded to a cathode of the counter wherein the metal mesh is grounded to the cathode outboard of the wafer and obtaining a mesh and wafer emission rate, wherein the mesh and wafer emission rate is measured with the counter. The method may further include replacing the wafer with a wafer carcass, obtaining a wafer carcass and mesh emission rate, and calculating a wafer carcass emissivity.

Abstract: A display device includes: a base substrate, a transistor disposed on the base substrate, an organic layer disposed on the transistor, a display element layer disposed on the organic layer, and a pixel electrode disposed between the organic layer and the display element layer. The pixel electrode includes a first electrode layer disposed between the organic layer and the display element layer and containing an organic matter derived from the organic layer, and a second electrode layer disposed between the first electrode and the display element layer and not containing the organic matter.

Abstract: To increase the capacity of a charge holding section of a pixel in an imaging device that performs imaging using a global shutter method. An imaging device includes a photoelectric converter, a first charge holding section, an auxiliary charge holding section, a transfer route, and an image signal generator. The first charge holding section is formed near a front surface of a semiconductor substrate. A first charge transfer section transfers charge from the photoelectric converter to the first charge holding section. The auxiliary charge holding section underlies the first charge holding section, and holds a portion of the charges held in the first charge holding section. The transfer route transfers the charge between the first charge holding section and the auxiliary charge holding section. The image signal generator generates an image signal based on the charges held in the first charge holding section and the auxiliary charge holding section.

Abstract: Various embodiments of the present application are directed towards a semiconductor-on-insulator (SOI) DoP image sensor and a method for forming the SOI DoP image sensor. In some embodiments, a semiconductor substrate comprises a floating node and a collector region. A photodetector is in the semiconductor substrate and is defined in part by a collector region. A transfer transistor is over the semiconductor substrate. The collector region and the floating node respectively define source/drain regions of the transfer transistor. A semiconductor mesa is over and spaced from the semiconductor substrate. A readout transistor is on and partially defined by the semiconductor mesa. The semiconductor mesa is between the readout transistor and the semiconductor substrate. A via extends from the floating node to a gate electrode of the readout transistor.

Abstract: A production method of a quantum dot comprising a Group IIIA-VA compound, the quantum dot as prepared, and an electronic device including the same, and the production method includes: supplying a Group VA element precursor including a halide of a Group VA element and a first ligand of a phosphine compound or a first amine compound; and performing a reaction between the Group VA element precursor and a Group IIIA metal precursor in the presence of a reducing agent in an organic reaction medium including a second amine compound.

Abstract: A display device including a beam emitter and a display panel is provided. The beam emitter emits a first beam; the display panel includes a display screen body and a light control layer. The light control layer includes photosensitive devices that outputs a sensing signal according to a sensing result, a control module for controlling turning on and turning off of the photosensitive devices, and a reading module for reading the sensing signal output by the photosensitive devices and determining a projection position of the first beam on the display panel according to the sensing signal.

Abstract: A photovoltaic cell includes a silicon substrate having two opposite main surfaces. A first main surface of the two main surfaces is covered with a passivation layer stack, including a POx- and Al-including-layer covering the first main surface, and a capping layer which covers the POx- and Al-including-layer. A method for manufacturing a photovoltaic cell is also disclosed.

Abstract: A method of forming a photovoltaic product with a plurality of photovoltaic cells is disclosed. The method comprises depositing a stack with first and second electrode layers (12, 16) and a photovoltaic layer (14) arranged in between. The method comprises partitioning the stack. The partitioning includes forming a trench (20) extending through the second electrode layer and the photovoltaic layer to expose the first electrode layer. The stack is first irradiated with a laser beam with a first spotsize and with a first wavelength for which the photovoltaic layer has a relatively high absorption coefficient as compared to that of the second electrode layer. The stack is then irradiated with a second laser beam with a second spotsize, greater than the first spotsize, and with a second wavelength for which the photovoltaic layer has a relatively low absorption coefficient as compared to that of the second electrode layer.

Abstract: The present disclosure describes a detector used in critical dimension scanning electron microscopes (CD-SEM) and review SEM systems. In one embodiment, the detector includes a semiconductor structure having a p-n junction and a hole through which a scanning beam is passed to a target. The detector also includes a top electrode for the p-n junction (e.g., anode or cathode) that provides an active area for detecting electrons or electromagnetic radiation (e.g., backscattering from the target). The top electrode has a doped layer and can also have a buried portion beneath the doped layer to reduce a series resistance of the top electrode without changing the active area. In another embodiment, an isolation structure can be formed in the semiconductor structure near sidewalls of the hole to electrically isolate the active area from the sidewalls. A method for forming the buried portion of the top electrode is also described.

Abstract: A time-of-flight image sensor is disclosed. The time-of-flight image sensor includes an array of pixels. Each pixel of the array of pixels includes a first photogate, a second photogate adjacent the first photogate, an isolation barrier intermediate the first photogate and the second photogate, and an in-pixel ground node intermediate the first photogate and the second photogate.

Abstract: A thin-film solar module with a substrate and a layer structure applied thereon that comprises a rear electrode layer, a front electrode layer, and an absorber layer arranged between the back electrode layer and the front electrode layer. Serially connected solar cells are formed in the layer structure by patterning zones, wherein each patterning zone comprises a first patterning line for subdividing at least the rear electrode layer, a second patterning line for subdividing at least the absorber layer, and at least one third patterning line for subdividing at least the front electrode layer. At least one patterning zone has one or more optically transparent zones in a zone region reduced by the first patterning line, which are in each case rear-electrode-layer-free, wherein the one or more optically transparent zones are implemented such that the rear electrode layer is continuous in the zone region.

Abstract: A sensor may be provided, including a substrate having a first semiconductor layer, a second semiconductor layer, and a buried insulator layer arranged between the first semiconductor layer and the second semiconductor layer. The sensor may further include a photodiode arranged in the first semiconductor layer; and a quenching resistive element electrically connected in series with the photodiode. The quenching resistive element is arranged in the second semiconductor layer, and the quenching resistive element is arranged over the photodiode but separated from the photodiode by the buried insulator layer.

Abstract: An image sensor is provided. The image sensor includes a substrate having a first pixel region and a second pixel region. The image sensor also includes a resonator structure disposed over the substrate. The resonator structure includes a first metal layer over the first pixel region and the second pixel region. The resonator structure also includes a first insulating layer over the first metal layer and the first pixel region. The first insulating layer has a first thickness. The resonator structure further includes a second insulating layer over the first metal layer and the second pixel region. The second insulating layer has a second thickness that is greater than the first thickness. In addition, the resonator structure includes a second metal layer over the first insulating layer and the second insulating layer.

Abstract: A method for integrating a surface-electrode ion trap and a silicon optoelectronic device, and an integrated structure. A silicon structure and a grating are formed on a wafer. A first dielectric layer, a second dielectric layer, a third dielectric layer, and a fourth dielectric layer are sequentially deposited above the wafer. An epitaxy opening is provided in the first dielectric layer to form single-photon avalanche detectors. First contacts vias connecting the detectors, and through silicon vias reaching a back surface of the wafer, are provided in the second dielectric layer and the third dielectric layer, respectively. Electrodes, the second contact vias and the third contact vias are provided in the fourth dielectric layer. The first contact vias are connected to a first electrode via the second contact vias, and the through silicon vias are connected to the first electrode and a second electrode via the third contact vias.

Abstract: A multijunction solar cell including a metamorphic layer, and particularly the design and specification of the composition, lattice constant, and band gaps of various layers above the metamorphic layer in order to achieve reduction in “bowing” of the semiconductor wafer caused by the lattice mismatch of layers associated with the metamorphic layer.

Abstract: An apparatus includes a first semiconductor region of a first conductivity type configured to collect a signal charge, and a connection region of a second conductivity type configured to feed a predetermined potential to a well including a second semiconductor region of the second conductivity type at a depth to which the connection region extends, a third semiconductor region of the second conductivity type at a position deeper than the connection region and the second semiconductor region, and a fourth semiconductor region between the second semiconductor region and the third semiconductor region, wherein a dopant for use in forming a semiconductor region of the first conductivity type is injected in the fourth semiconductor region, and a main carrier of the fourth semiconductor region is a carrier of the same conductivity type as a majority carrier of a semiconductor region of the second conductivity type.

Abstract: The present disclosure relates to a vehicle body part of a motor vehicle having at least one frame component and at least one trim part which is arranged thereon, wherein the trim part has at least one cutout which is closed off in an essentially airtight and watertight fashion and has at least one solar cell which is arranged therein and has the purpose of generating electrical energy, and wherein the outer side of the trim part has, at least in a region adjacent to the at least one solar cell, an outer shape which is curved three-dimensionally and which is provided for forming a part of the external contour of the motor vehicle in the installed position on said motor vehicle. Furthermore, the present disclosure relates to a method for producing a vehicle body part.

Abstract: The embodiments of the present disclosure describe a stressed Ge PD and fabrications techniques for making the same. In one embodiment, a stressor material is deposited underneath an already formed Ge PD. To do so, wafer bonding can be used to bond the wafer containing the Ge PD to a second, handler wafer. Doing so provides support to remove the substrate of the wafer so that a stressor material (e.g., silicon nitride, diamond-like carbon, or silicon-germanium) can be disposed underneath the Ge PD. The stress material induces a stress or strain in the crystal lattice of the Ge which changes its bandgap and improves its responsivity.

Abstract: An X-ray detector includes a first circuit with an NPN-type bipolar transistor and a second circuit configured to compare a voltage at a terminal of the NPN-type bipolar transistor with a reference value substantially equal to a value of the terminal voltage which would occur when the first circuit has been exposed to a threshold quantity of X-rays.

Abstract: A semiconductor light-receiving element includes a substrate; a light-receiving mesa portion, formed on top of the substrate, including a first semiconductor layer of a first conductivity type, an absorption layer, and a second semiconductor layer of a second conductivity type; a light-receiving portion electrode, formed above the light-receiving mesa portion, connected to the first semiconductor layer; a pad electrode formed on top of the substrate; and a bridge electrode, placed so that an insulating gap is interposed between the bridge electrode and the second semiconductor layer, configured to connect the light-receiving portion electrode and the pad electrode on top of the substrate, the bridge electrode being formed in a layer separate from layers of the light-receiving portion electrode and the pad electrode.

Abstract: A method for producing a radiation window includes patterning a photo resist structure onto a double-sided silicon wafer, plasma etching the silicon wafer to create an etched silicon wafer having a silicon supporting structure etched upon a first side of the double-sided silicon wafer, applying a silicon nitride thin film to the etched silicon wafer, patterning a photo resist structure and plasma etching a second side of the double-sided silicon wafer to create an initial window in the silicon nitride thin film, and wet etching the second side of the double-sided silicon wafer to release the silicon nitride thin film and supporting structure from the portion of the double-sided silicon wafer defined by the initial window.

Abstract: Described herein are methods for forming e-textiles, wherein the methods include printing a particle-free conductive ink on a textile substrate, and curing the textile substrate to produce a conductive pattern thereon. The printing may include inkjet printing and may produce a printed pattern which exhibits an ink bleed of less than 0.5 mm, such as less than 0.2 mm. During printing, the textile substrate may be heated to a temperature of 30° C. to 90° C. before and during the printing process. The fabric substrate may be cured using heat and/or light to produce a conductive pattern having a sheet resistance of less than 10?/?, or even less than 1?/?.

Abstract: An example sensor includes a PCB mounted in an internal chamber of housing, wherein the PCB comprises calibration electrical contact points; a sealing grommet mounted in the internal chamber, wherein the sealing grommet comprises an axial hole aligned with the calibration electrical contact points, thereby providing access to the calibration electrical contact points of the PCB; a grommet plug disposed in the axial hole of the sealing grommet; a sensing element disposed in the housing and electrically-coupled to the PCB via an electrical connection; an encapsulant sealing material deposited on the sealing grommet and the grommet plug; and an external cable connected to the PCB and extending through the sealing grommet and through the encapsulant sealing material.

Abstract: Various articles and devices can be manufactured to take advantage of a what is believed to be a novel thermodynamic cycle in which spontaneity is due to an intrinsic entropy equilibration. The novel thermodynamic cycle exploits the quantum phase transition between quantum thermalization and quantum localization. Preferred devices include a phonovoltaic cell, a rectifier and a conductor for use in an integrated circuit.

Abstract: The light extraction device, the detection equipment and the operation method thereof are provided. The light extraction device includes at least one light splitting unit, each of the at least one light splitting unit includes a color separation grating, configured to separate light incident on the color separation grating into a plurality of light beams that are collimated and propagated in different directions and have different colors; a first lens, disposed corresponding to the color separation grating and configured to converge the plurality of light beams; and a first pinhole, located on a side of the first lens away from the color separation grating and correspondingly arranged with the first lens. The first lens is configured to converge a light beam having a preset color in the plurality of light beams to the first pinhole and allow the light beam having the preset color to exit.

Abstract: A display device, including a pixel array substrate and a sensor element substrate, is provided. The sensor element substrate overlaps the pixel array substrate, and includes a substrate, a switch element, and a photosensitive element. The switch element is located on the substrate. The photosensitive element is electrically connected to the switch element, and includes a transparent electrode, a sensing layer, a metal electrode, and a barrier layer. The sensing layer is located on the transparent electrode. The metal electrode is located on the sensing layer, and covers a first sidewall of the sensing layer. The barrier layer covers a first sidewall of the transparent electrode. The barrier layer is located between the metal electrode and the sensing layer, or between the transparent electrode and the sensing layer.

Abstract: Image sensors are provided. The image sensors may include a plurality of unit pixels and a color filter array on the plurality of unit pixels. The color filter array may include a color filter unit including four color filters that are arranged in a two-by-two array, and the color filter unit may include two yellow color filters, a cyan color filter, and one of a red color filter or a green color filter.

Abstract: A method and system for doping semiconductor materials using microwave exposure. In some embodiments, the surface of a semiconductor substrate coated with a layer of dopant material is exposed to a beam of microwave radiation, with the frequency of the microwave radiation chosen to coincide with a microwave absorption resonance of the dopant. A gyrotron is a preferred source of monochromatic microwaves capable of delivering the appropriate the power density. Under this microwave exposure, the dopant heats up and diffuses into the semiconductor. Since only the dopant is selectively excited, the atoms of the crystal lattice remain cooler. Additional cooling can be provided by a flow of cooling gas onto the surface. When the electric field of the microwave exposure is high enough to overcome the potential barrier of interstitial diffusion within the crystal, the dopants migrate to vacancies in the crystal lattice, and the semiconductor material becomes activated.

Abstract: Disclosed herein is a method comprising: forming a doped region of a semiconductor substrate by doping a surface of the semiconductor substrate with dopants; driving the dopants into the semiconductor substrate by annealing the semiconductor substrate; controlling doping profile of the doped region by repeating doping and annealing the semiconductor substrate; forming a first electrode on the semiconductor substrate, wherein the first electrode is in electrical contact with the doped region; forming an outer electrode arranged around the first electrode, wherein the outer electrode is electrically insulated from the first electrode.