Abstract: A semiconductor-on-insulator (e.g., silicon-on-insulator) structure having superior radio frequency device performance, and a method of preparing such a structure, is provided by utilizing a single crystal silicon handle wafer sliced from a float zone grown single crystal silicon ingot.

Abstract: Techniques are provided to fabricate embedded insulating layers within an active semiconductor layer of substrate to reduce leakage between field-effect transistor devices and the semiconductor substrate. For example, an epitaxial semiconductor layer is formed on a surface of a semiconductor substrate. An ion implantation process is performed to form an embedded insulation layer within the semiconductor substrate below the epitaxial semiconductor layer. A nanosheet field-effect transistor device is formed over the embedded insulation layer. The nanosheet field-effect transistor device includes active nanosheet channel layers, source/drain layers, and a high-k dielectric/metal gate structure formed around the active nanosheet channel layers. The process of forming the nanosheet field-effect transistor device includes removing the epitaxial semiconductor layer to release the active nanosheet channel layers.

Abstract: In a method of forming a pattern of a semiconductor device, a first mask layer and an anti-reflective coating layer may be sequentially formed on a substrate. A photoresist layer may be formed on the anti-reflective coating layer. The photoresist layer may be exposed and developed to form a first preliminary photoresist pattern. A first ion beam etching process may be performed on the first preliminary photoresist pattern to form a second preliminary photoresist pattern. A second ion beam etching process may be performed on the second preliminary photoresist pattern to form a photoresist pattern. A second incident angle of an ion beam in the second ion beam etching process may be greater than a first incident angle of an ion beam in the first ion beam etching process. The anti-reflective coating layer and the first mask layer may be etched using the photoresist pattern as an etching mask to form a mask structure.

Abstract: A method of directly growing graphene of a graphene-layered structure, the method including ion-implanting at least one ion of a nitrogen ion and an oxygen ion on a surface of a silicon carbide (SiC) thin film to form an ion implantation layer in the SiC thin film; and heat treating the SiC thin film with the ion implantation layer formed therein to graphenize a SiC surface layer existing on the ion implantation layer.

Abstract: A transistor including an oxide semiconductor with favorable electric characteristics and a manufacturing method thereof are provided. A semiconductor device includes a transistor. The transistor includes an oxide semiconductor film over a base insulating film, a gate electrode overlapping with the oxide semiconductor film with a gate insulating film interposed therebetween, and a pair of electrodes in contact with the oxide semiconductor film and serving as a source electrode and a drain electrode. The base insulating film includes a first oxide insulating film partly in contact with the oxide semiconductor film and a second oxide insulating film in the periphery of the first oxide insulating film. An end portion of the oxide semiconductor film which crosses the channel width direction of the transistor is located over the first oxide insulating film.

Abstract: The process for the production of at least one silicon-based nanoelement (4), in particular a nanowire, comprises the following stages: providing a substrate comprising, at the surface, a first layer (1) comprising electrically doped silicon; forming, on the first layer (1), a second layer (2) based on silicon oxide with carbon atoms (3) dispersed in the said second layer (2); and exposing the first and second layers (1, 2) to an oxidizing atmosphere, so as to oxidize at least a first section (1a) of the first layer (1) at the interface of the said first layer (1) with the second layer (2) and to form the said at least one nanoelement (4) at the said first section (1a).

Abstract: A method for fabricating a semiconductor structure so as to have reduced junction leakage is disclosed. The method includes providing substitutional boron in a semiconductor substrate. The method includes preparing the substrate using a pre-amorphization implant and a carbon implant followed by a recrystallization step and a separate defect repair/activation step. Boron is introduced to the pre-amorphized region preferably by ion implantation.

Abstract: A method of forming a gate oxide layer is disclosed, which introduces a rapid laser annealing process, performed on the surface of the gate SiON layer, prior to a high-temperature annealing process performed on the gate SiON layer. This enables the method of the invention to remove the intrinsic oxide layer, protect the doped nitrogen atoms from the adverse influence of organic absorption, and lead to the formation of an amorphized surface layer which is able to prevent nitrogen atoms located around the surface from escaping by volatilization and nitrogen atoms beneath the surface from diffusing towards the SiO2/Si boundary. Therefore, the gate SiON layer formed by the method of the invention can ensure a high and stable nitrogen content, thus achieving the objective to obtain a gate SiON layer with a more precisely trimmed dielectric constant and hence improve the electrical properties of the semiconductor device being fabricated.

Abstract: Some embodiments include methods of forming isolation structures. A semiconductor base may be provided to have a crystalline semiconductor material projection between a pair of openings. SOD material (such as, for example, polysilazane) may be flowed within said openings to fill the openings. After the openings are filled with the SOD material, one or more dopant species may be implanted into the projection to amorphize the crystalline semiconductor material within an upper portion of said projection. The SOD material may then be annealed at a temperature of at least about 400° C. to form isolation structures. Some embodiments include semiconductor constructions that include a semiconductor material base having a projection between a pair of openings. The projection may have an upper region over a lower region, with the upper region being at least 75% amorphous, and with the lower region being entirely crystalline.

Abstract: A plasma processing method is provided. The plasma processing method includes using the after-glow of a pulsed power plasma to perform conformal processing. During the afterglow, the equipotential field lines follow the contour of the workpiece surface, allowing ions to be introduced in a variety of incident angles, especially to non-planar surfaces. In another aspect of the disclosure, the platen may be biased positively during the plasma afterglow to attract negative ions toward the workpiece. Various conformal processing steps, such as implantation, etching and deposition may be performed.

Abstract: This invention generally relates to an epitaxial silicon semiconductor wafer with increased thermal conductivity to transfer heat away from a device layer, while also having resistance to common failure mechanisms, such as latch-up failures and radiation event failures. The semiconductor wafer comprises a lightly-doped device layer, a highly-doped protective layer, and a lightly-doped substrate. The invention is also directed to a process for forming such an epitaxial silicon wafer.

Abstract: An angled gas cluster ion beam (“GCIB”) and methods for using the same are disclosed. Gas clusters are ionized to create a gas cluster beam directed towards a semiconductor wafer. The semiconductor wafer is positioned so that it intercepts the gas cluster beam at an angle that is non-perpendicular to the beam, so that the gas cluster ions in the beam react with structures on the semiconductor wafer asymmetrically, allowing for asymmetrical deposition on or etching of material thereon. According to one embodiment, GCIB is used to form asymmetric spacers having different materials, different thicknesses, or both.

Abstract: New photoresists are provided that comprise preferably as distinct components: a resin, a photoactive component and a phenolic component Preferred photoresists of the invention are can be useful for ion implant lithography protocols.

Abstract: The present invention discloses a method for replacing chlorine atoms on a film layer. More particularly, sufficient replacement ions for replacing the chlorine atoms are formed in a plasma process by reducing a volume ratio of a gas in a gas mixture (i.e. the film layer may be etched with the ions formed by dissociation of the gas) and dissociation of the gas mixture further decreases the etching reaction to the film layer in a process for replacing the chlorine atoms. In comparison to a conventional process by pure oxygen, the present invention can improve the prior art re-etching problem to avoid affecting an electric property of a thin film transistor, also has an advantage of manufacturing time reduction for an increased production yield.

Abstract: The present invention discloses a method for manufacturing a semiconductor device, comprising: forming an insulating isolation layer on a substrate; forming an insulating isolation layer trench in the insulating isolation layer; forming an active region layer in the insulating isolation layer trench; forming a semiconductor device structure in and above the active region layer; characterized in that the carrier mobility of the active region layer is higher than that of the substrate. Said active region is formed of a material different from that of the substrate, the carrier mobility in the channel region is enhanced, thereby the device response speed is improved and the device performance is enhanced. Unlike the existing STI manufacturing process, for the present invention, an STI is formed first, and then filling is performed to form an active region, thus avoiding the problem of generation of holes in STI, and improving the device reliability.

Abstract: A method of patterning a substrate, comprises patterning a photoresist layer disposed on the substrate using imprint lithography and etching exposed portions of a hard mask layer disposed between the patterned photoresist layer and the substrate. The method may also comprise implanting ions into a magnetic layer in the substrate while the etched hard mask layer is disposed thereon.

Abstract: A method of selective deposition on silicon substrates having regions of bare silicon and regions of oxide formed thereon. The method includes placing the substrate on a wafer support inside a processing chamber, introducing a carbon-containing gas into the reactor, applying a bias to the substrate, generating a plasma from the hydrocarbon gas, implanting carbon ions into the regions of oxide on the substrate by a plasma doping process, and depositing a carbon-containing film on the bare silicon regions.

Abstract: The present invention relates to a developable bottom antireflective coating (BARC) composition and a pattern forming method using the BARC composition. The BARC composition includes a first polymer having a first carboxylic acid moiety, a hydroxy-containing alicyclic moiety, and a first chromophore moiety; a second polymer having a second carboxylic acid moiety, a hydroxy-containing acyclic moiety, and a second chromophore moiety; a crosslinking agent; and a radiation sensitive acid generator. The first and second chromophore moieties each absorb light at a wavelength from 100 nm to 400 nm. In the patterning forming method, a photoresist layer is formed over a BARC layer of the BARC composition. After exposure, unexposed regions of the photoresist layer and the BARC layer are selectively removed by a developer to form a patterned structure in the photoresist layer. The BARC composition and the pattern forming method are especially useful for implanting levels.

Abstract: A method of producing a layer of cavities in a structure comprises at least one substrate formed from a material that can be oxidized or nitrided, the method comprising the following steps: implanting ions into the substrate in order to form an implanted ion concentration zone at a predetermined mean depth; heat treating the implanted substrate to form a layer of cavities at the implanted ion concentration zone; and forming an insulating layer in the substrate by thermochemical treatment from one surface of the substrate, the insulating layer that is formed extending at least partially into the layer of cavities.

Abstract: A method of forming gate dielectric material includes forming a silicon oxide gate layer over a substrate. The silicon oxide gate layer is treated with a first ozone-containing gas. After treating the silicon oxide gate layer, a high dielectric constant (high-k) gate dielectric layer is formed over the treated silicon oxide gate layer.

Abstract: Systems and methods for detecting watermark formations on semiconductor wafers are described. In one embodiment, a method comprises providing a semiconductor wafer having at least one watermark sensitive region fabricated thereon, subjecting the wafer to a wet processing step, enhancing a susceptibility to detection of at least one watermark formation created on the at least one watermark sensitive region, and detecting the at least one watermark formation. In another embodiment, a method comprises growing a first oxide layer on a surface of a semiconductor wafer, patterning a watermark sensitive structure on the first oxide layer, depositing a silicon layer over the first oxide layer, doping a region of the silicon layer over the watermark sensitive structure with an impurity to create a watermark sensitive region that is prone to retaining watermark formations as result of a wet processing step, and growing a second oxide layer over the silicon layer.

Abstract: Placing a conductive member between a plasma chamber in a remote plasma reactor and a substrate to shield the substrate from irradiation of undesirable electromagnetic radiation, ions or electrons. The conductive member blocks the electromagnetic radiation, neutralizes ions and absorbs the electrons. Radicals generated in the plasma chambers flows to the substrate despite the placement of the conductive member. In this way, the substrate is exposed to the radicals whereas damages to the substrate due to electromagnetic radiations, ions or electrons are reduced or removed.

Abstract: According to one embodiment, a semiconductor manufacturing apparatus, which forms a metal film, and which has the following parts: a processing chamber that carries out the processing of a substrate set inside it, a gas feeding part that feeds the feed gas of the metal film and a plasma generating gas into the processing chamber, a plasma generating part that generates the plasma of the plasma generating gas, and a bias generating part that causes the ions generated by the plasma generating part to impact on the substrate.

Abstract: A method of forming a multi-component dielectric layer on the surface of a substrate by atomic layer deposition includes injecting a cocktail source of a plurality of sources at least having a cyclopentadienyl ligand, wherein the cocktail source is adsorbed on a surface of a substrate by injecting the cocktail source, performing a first purge process to remove a non-adsorbed portion of the cocktail source, injecting a reactant to react with the adsorbed cocktail source, wherein a multi-component layer is formed by the reaction between the reactant and the absorbed cocktail source, and performing a second purge process to remove reaction byproducts and an unreacted portion of the reactant.

Abstract: A method for manufacturing a high quality optical semiconductor device includes: (a) preparing a growth substrate; (b) forming a semiconductor layer on the growth substrate; (c) forming a metal support made of copper on the semiconductor layer by plating; (d) separating the growth substrate from the semiconductor layer to remove the growth substrate; and (e) carrying out a thermal treatment in order to even density distributions of crystal grains and voids in the copper forming the metal support.

Abstract: A method for amorphizing a layer on a substrate is described. In one embodiment, the method includes treating the substrate with a first gas cluster ion beam (GCIB) using a first beam energy selected to yield an amorphous sub-layer within the substrate of a desired thickness, which produces a first interfacial roughness of an amorphous-crystal interface between the amorphous sub-layer and a crystalline sub-layer of the substrate. The method further includes treating the substrate with a second GCIB using a second beam energy, less than the first beam energy, to reduce the first interfacial roughness of the amorphous-crystal interface to a second interfacial roughness.

Abstract: Methods of implanting boron-containing ions using fluorinated boron-containing dopant species that are more readily cleaved than boron trifluoride. A method of manufacturing a semiconductor device including implanting boron-containing ions using fluorinated boron-containing dopant species that are more readily cleaved than boron trifluoride. Also disclosed are a system for supplying a boron hydride precursor, and methods of forming a boron hydride precursor and methods for supplying a boron hydride precursor. In one implementation of the invention, the boron hydride precursors are generated for cluster boron implantation, for manufacturing semiconductor products such as integrated circuitry.

Abstract: A system and method for forming a mechanically strengthened low-k dielectric film on a substrate includes using either spin-on-dielectric (SOD) techniques, or chemical vapor deposition (CVD) techniques to form a low-k dielectric film on the substrate. An upper surface of the low-k dielectric film is then treated in order to increase the film's mechanical strength, or reduce its dielectric constant.

Abstract: Disclosed are methods of operation to grow, modify, deposit, or dope a layer upon a substrate using a multi-nozzle and skimmer assembly for introducing a process gas mixture, or multiple process gases mixtures, in a gas cluster ion beam (GCIB) system. Also disclosed is a method of forming a shallow trench isolation (STI) structure on a substrate, for example, an SiO2 STI structure, using a multiple nozzle system with two separate gas supplies, for example providing a silicon-containing gas and an oxygen-containing gas.

Abstract: Some embodiments include methods of forming isolation structures. A semiconductor base may be provided to have a crystalline semiconductor material projection between a pair of openings. SOD material (such as, for example, polysilazane) may be flowed within said openings to fill the openings. After the openings are filled with the SOD material, one or more dopant species may be implanted into the projection to amorphize the crystalline semiconductor material within an upper portion of said projection. The SOD material may then be annealed at a temperature of at least about 400° C. to form isolation structures. Some embodiments include semiconductor constructions that include a semiconductor material base having a projection between a pair of openings. The projection may have an upper region over a lower region, with the upper region being at least 75% amorphous, and with the lower region being entirely crystalline.

Abstract: Methods of fabricating an oxide layer on a semiconductor substrate are provided herein. The oxide layer may be formed over an entire structure disposed on the substrate, or selectively formed on a non-metal containing layer with little or no oxidation of an exposed metal-containing layer. The methods disclosed herein may be performed in a variety of process chambers, including but not limited to decoupled plasma oxidation chambers, rapid and/or remote plasma oxidation chambers, and/or plasma immersion ion implantation chambers. In some embodiments, a method may include providing a substrate comprising a metal-containing layer and non-metal containing layer; and forming an oxide layer on an exposed surface of the non-metal containing layer by exposing the substrate to a plasma formed from a process gas comprising a hydrogen-containing gas, an oxygen-containing gas, and at least one of a supplemental oxygen-containing gas or a nitrogen-containing gas.

Abstract: Embodiments of methods for improving electrical leakage performance and minimizing electromigration in semiconductor devices are generally described herein. Other embodiments may be described and claimed.

Abstract: A small amount of oxygen is ion-implanted in a wafer surface layer, and then heat treatment is performed so as to form an incomplete implanted oxide film in the surface layer. Thereby, wafer cost is reduced; a pit is prevented from forming in a surface of an epitaxial film; and a slip is prevented from forming in an external peripheral portion of a wafer.

Abstract: A semiconductor device, an integrated circuit, and method for fabricating the same are disclosed. The semiconductor device includes a gate stack formed on an active region of a silicon-on-insulator substrate. A gate spacer is formed over the gate stack. A source region that includes embedded silicon germanium is formed within the semiconductor layer. A drain region that includes embedded silicon germanium is formed within the semiconductor layer. The source region includes an angled implantation region that extends into the embedded silicon germanium of the source region, and is asymmetric relative to the drain region.

Abstract: A method for creating an extremely thin semiconductor-on-insulator (ETSOI) layer having a uniform thickness includes: measuring a thickness of a semiconductor-on-insulator (SOI) layer at a plurality of locations; determining a removal thickness at each of the plurality of locations; and implanting ions at the plurality of locations. The implanting is dynamically based on the removal thickness at each of the plurality of locations. The method further includes oxidizing the SOI layer to form an oxide layer, and removing the oxide layer.

Abstract: The porosity of a diamond film may be increased and its dielectric constant lowered by exposing a film containing sp3 hybridization to ion implantation. The implantation produces a greater concentration of sp2 hybridizations. The sp2 hybridizations may then be selectively etched, for example, using atomic hydrogen plasma to increase the porosity of the film. A series of layers may be deposited and successively treated in the same fashion to build up a composite, porous diamond film.

Abstract: A method of processing to a substrate while minimizing cost and manufacturing time is disclosed. The implantation of the source and drain regions of a semiconductor device are performed at low temperatures, such as below 273° K. This low temperature implant reduces the structural damage caused by the impacting ions. Subsequently, the implanted substrate is activated using faster forms of annealing. By performing the implant at low temperatures, the damage to the substrate is reduced, thereby allowing a fast anneal to be used to activate the dopants, while eliminating the majority of the defects and damage. Fast annealing is less expensive than conventional furnace annealing, and can achieve higher throughput at lower costs.

Abstract: A method for manufacturing a SiC semiconductor device includes: forming an impurity layer in a SiC layer; and forming an oxide film on the SiC layer. The forming the impurity layer includes: implanting an impurity in the SiC layer; applying a cap layer on the SiC layer; annealing the cap layer to be transformed a carbon layer; annealing the SiC layer to activate the impurity; and removing the carbon layer. The annealing the SiC layer includes: increasing a temperature of the SiC layer from a second temperature to a first temperature within a first time duration; and decreasing the temperature of the SiC layer from the first temperature to the second temperature within a second time duration. The first temperature is equal to or higher than 1800° C., and the second temperature is lower than 1800° C. The first and second time durations are small.

Abstract: Crystallization-inducing metal elements are introduced onto an amorphous silicon thin film. A first, low-temperature, heat-treatment induces nucleation of metal-induced crystallization (MIC), resulting in the formation of small polycrystalline silicon “islands”. A metal-gettering layer is formed on the resulting partially crystallized thin film. A second, low-temperature, heat-treatment completes the MIC process, whilst gettering metal elements from the partially crystallized thin film. The process results in the desired polycrystalline silicon thin film.

Abstract: This invention generally relates to an epitaxial silicon semiconductor wafer with increased thermal conductivity to transfer heat away from a device layer, while also having resistance to common failure mechanisms, such as latch-up failures and radiation event failures. The semiconductor wafer comprises a lightly-doped device layer, a highly-doped protective layer, and a lightly-doped substrate. The invention is also directed to a process for forming such an epitaxial silicon wafer.

Abstract: A method of producing a layer of cavities in a structure comprises at least one substrate formed from a material that can be oxidized or nitrided, the method comprising the following steps: implanting ions into the substrate in order to form an implanted ion concentration zone at a predetermined mean depth; heat treating the implanted substrate to form a layer of cavities at the implanted ion concentration zone; and forming an insulating layer in the substrate by thermochemical treatment from one surface of the substrate, the insulating layer that is formed extending at least partially into the layer of cavities.

Abstract: Methods for manufacturing a semiconductor device include forming a seed layer containing a silicon material on a substrate. An amorphous silicon layer containing amorphous silicon material is formed on the seed layer. The amorphous silicon layer is doped with an impurity. A laser beam is irradiated onto the amorphous silicon layer to produce a phase change of the amorphous silicon layer and change the amorphous silicon layer into a single-crystal silicon layer based on the seed layer.

Abstract: A plasma processing method is provided. The plasma processing method includes using the after-glow of a pulsed power plasma to perform conformal processing. During the afterglow, the equipotential field lines follow the contour of the workpiece surface, allowing ions to be introduced in a variety of incident angles, especially to non-planar surfaces. In another aspect of the disclosure, the platen may be biased positively during the plasma afterglow to attract negative ions toward the workpiece. Various conformal processing steps, such as implantation, etching and deposition may be performed.

Abstract: A method includes forming ionic clusters of carbon-containing molecules, which molecules have carbon-carbon sp2 bonds, and accelerating the clusters. A surface of a substrate is irradiated with the clusters. A material is formed on the surface using the carbon from the molecules. The material includes carbon and may optionally include hydrogen. The material may include graphene. The material may form a monolayer. The molecules may include one or more material selected from the group consisting of graphene, carbon allotropes, ethylene, and hydrocarbon molecules containing ethylenic moieties. A fused region may be formed in the substrate as an interface between the substrate and the material. The clusters may have diameters of at least 20 nanometers and may be accelerated to an energy of at least 0.5 keV.

Abstract: Ions are implanted into a silicon donor body, defining a cleave plane. A first surface of the donor body is affixed to a receiver element, and a lamina is exfoliated at the cleave plane, creating a second surface of the lamina. There is damaged silicon at the second surface, which will compromise the efficiency of a photovoltaic cell formed from the lamina. A selective etchant, having an etch rate which is positively correlated with the concentration of structural defects in silicon, is used to remove the damaged silicon at the second surface, while removing very little of the relatively undamaged lamina.

Abstract: Embodiments of methods for improving electrical leakage performance and minimizing electromigration in semiconductor devices are generally described herein. Other embodiments may be described and claimed.

Abstract: The method for forming wavelike coherent nanostructures by irradiating a surface of a material by a homogeneous flow of ions is disclosed. The rate of coherency is increased by applying preliminary preprocessing steps.

Abstract: A method of producing an anti-reflection and/or passivation coating for semiconductor devices is provided. The method includes: providing a semiconductor device precursor 30 having a surface to be provided with the anti-reflection and/or passivation coating; treating the surface with ions; and depositing a hydrogen containing anti-reflection and/or passivation coating onto the treated surface.

Abstract: The invention concerns a method for forming a growth mask on the surface of an initial crystalline substrate, comprising the following steps: formation of a layer of second material on one of the faces of the initial substrate of first material, formation of a pattern in the thickness of the layer of second material so as to expose the zones of said face of the initial substrate, said zones forming growth windows on the initial substrate, the method being characterized in that the formation of the pattern is obtained by ion implantation carried out in the surface layer of the initial substrate underlying the layer of second material, the implantation conditions being such that they cause, directly or after a heat treatment, on said face of the initial substrate, the appearance of exfoliated zones of first material leading to the localized removal of the zones of second material covering the exfoliated zones of first material, thereby locally exposing the initial substrate and forming growth windows on

Abstract: In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, a method to manufacture a semiconductor structure includes forming a cavity in a substrate. A portion of the substrate is doped, or a doped material is deposited over a portion of the substrate. At least a portion of the doped substrate or at least a portion of the doped material is converted to a dielectric material to enclose the cavity. The forming of the cavity may occur before or after the doping of the substrate or the depositing of the doped material. Other embodiments are described and claimed.