Abstract: A substrate supporting plate that may prevent deposition on a rear surface of a substrate and may easily unload the substrate. The substrate supporting plate may include a substrate mounting portion and a peripheral portion surrounding the substrate mounting portion. An edge portion of a top surface of the substrate mounting portion may be anodized. A central portion of the top surface of the substrate mounting portion may not be anodized.

Abstract: A technique capable of coping with change in the environment for each of the substrate placing surfaces is provided. According to one aspect thereof, there is provided a method of manufacturing a semiconductor device, including: (a) supplying a gas to a process vessel through branch pipes while substrates are placed on substrate placing surfaces arranged in the process vessel, respectively; (b) detecting at least one among: information of a component corresponding to each of the substrate placing surfaces; and an amount of the gas supplied to each of the branch pipes; (c) determining a state level of each of the substrate placing surfaces based on the detected information; and (d) selecting a substrate placing surface among the substrate placing surfaces to which a substrate subsequently loaded into the process vessel is to be transferred next according to the state level of each of the substrate placing surfaces.

Abstract: A plasma processing method of processing a substrate with plasma in a plasma processing apparatus. The plasma processing apparatus includes: a chamber configured to accommodate a substrate; an upper electrode structure forming an upper portion of the chamber and including a temperature-controlled plate, an electrode plate disposed below the temperature-controlled plate, and an electrostatic attractor, the electrostatic attractor including a contact surface, an attraction surface, a first electrode, and a second electrode; a power supply configured to apply a voltage to the first and second electrodes; and a temperature obtaining portion configured to acquire a temperature distribution of the electrode plate.

Abstract: A method of manufacturing a semiconductor device includes forming a first dielectric layer over a substrate, forming a metal layer in the first dielectric layer, forming an etch stop layer on a surface of the first dielectric layer and the metal layer, removing portions of the metal layer and the etch stop layer to form a recess in the metal layer, and forming a tungsten plug in the recess. The recess is spaced apart from a bottom surface of the etch stop layer.

Abstract: A system and methods of forming a dielectric material within a trench are described herein. In an embodiment of the method, the method includes introducing a first precursor into a trench of a dielectric layer, such that portions of the first precursor react with the dielectric layer and attach on sidewalls of the trench. The method further includes partially etching portions of the first precursor on the sidewalls of the trench to expose upper portions of the sidewalls of the trench. The method further includes introducing a second precursor into the trench, such that portions of the second precursor react with the remaining portions of the first precursor to form the dielectric material at the bottom of the trench.

Abstract: The present disclosure provides a magazine supporting equipment for supporting a magazine with multiple input ports. The magazine supporting equipment comprises a contact plate, a first sidewall plate, and a second sidewall plate. The contact plate is in contact with the magazine. The first sidewall plate extends vertically from one end of the contact plate. The second sidewall plate parallel is to the first sidewall plate and extends vertically from one end to the other end of the contact plate. The first sidewall plate extends along at least a part of a first sidewall of the magazine. The second sidewall plate extends along at least a part of a second sidewall of the magazine. The first sidewall plate and the second sidewall plate include control openings through which gas flows in and out.

Abstract: In an active gas generation apparatus of the present invention, an auxiliary conductive film provided on a first electrode dielectric film is provided to overlap part of an active gas flow path in plan view, and the auxiliary conductive film is set to the ground potential. An active gas auxiliary member provided on a second electrode dielectric film is provided to fill part of the active gas flow path between a discharge space and a gas ejection hole in a dielectric space between the first and second electrode dielectric films in order to limit to an active gas flow gap.

Abstract: A method of making a semiconductor manufacturing apparatus member includes a step of preparing an aluminum base having an alumite layer having a porous columnar structure at an upper surface thereof. The alumite layer is an anodic oxidation film, and a Young's modulus of the alumite layer is between 90 GPa and 120 GPa. The method also includes a step of forming a particle-resistant layer on the alumite layer by aerosol deposition, in which an aerosol containing fine particles of a brittle material dispersed in a gas is ejected from a nozzle to impact against a surface of the alumite layer, wherein the particle-resistant layer includes a polycrystalline ceramic; and wherein, when the resulting semiconductor manufacturing apparatus member is exposed to a plasma in a reference plasma resistance test, the particle-resistant layer has an arithmetic average height Sa of 0.060 or less after the reference plasma test is completed.

Abstract: The present invention provides an imprinting method, which includes the steps of: adding a soluble material to a master mold; solidifying the soluble material to form a soluble mold having a mold pattern; adhering a taking device to the soluble mold to separate the soluble mold from the master mold; placing the soluble mold on a polymer layer of a workpiece for imprint; applying a high temperature and a pressure to the soluble mold to allow the polymer layer having an imprint pattern corresponding to the mold pattern and being solidified, and to remove the taking device from the soluble mold; and providing a solvent to dissolve the soluble mold to obtain an imprint workpiece having the imprint pattern.

Abstract: An integrated circuit device includes a lower electrode, an upper electrode, and a dielectric layer structure between the lower electrode and the upper electrode, the dielectric layer structure including a first surface facing the lower electrode and a second surface facing the upper electrode. The dielectric layer structure includes a first dielectric layer including a first dielectric material and a plurality of grains extending from the first surface to the second surface and a second dielectric layer including a second dielectric material and surrounding a portion of a sidewall of each of the plurality of grains of the first dielectric layer in a level lower than the second surface. The second dielectric material includes a material having bandgap energy which is higher than bandgap energy of the first dielectric material.

Abstract: A micro-nano channel structure, a method for manufacturing the micro-nano channel structure, a sensor, a method for manufacturing the sensor, and a microfluidic device are provided by the embodiments of the present disclosure. The micro-nano channel structure includes: a base substrate; a base layer, on the base substrate and including a plurality of protrusions; and a channel wall layer, on a side of the plurality of the protrusions away from the base substrate, and the channel wall layer has a micro-nano channel; a recessed portion is provided between adjacent protrusions of the plurality of the protrusions, and an orthographic projection of the micro-nano channel on the base substrate is located within an orthographic projection of the recessed portion on the base substrate.

Abstract: According to one aspect of the technique, there is provided a method of manufacturing a semiconductor device, including: (a) forming a first oxide layer by modifying a surface of a substrate at a first temperature with a plasma of a first oxygen-containing gas; and (b) forming a second oxide layer thicker than the first oxide layer by heating the substrate to a second temperature higher than the first temperature and modifying the surface of the substrate, on which the first oxide layer is formed, with a plasma of a second oxygen-containing gas.

Abstract: A semiconductor device includes a gate structure on a substrate, an offset spacer adjacent to the gate structure, a main spacer around the offset spacer, a source/drain region adjacent to two sides of the main spacer, a contact etch stop layer (CESL) adjacent to the main spacer, and an interlayer dielectric (ILD) layer around the CESL. Preferably, a dielectric constant of the offset spacer is higher than a dielectric constant of the main spacer.

Abstract: Systems and methods for depositing materials on a substrate via OVJP are provided. A float table and grippers are used to move and position the substrate relative to one or more OVJP print bars to reduce the chance of damaging or compromising the substrate or prior depositions.

Abstract: A method and composition for producing a porous low k dielectric film via chemical vapor deposition is provided. In one aspect, the method comprises the steps of: providing a substrate within a reaction chamber; introducing into the reaction chamber gaseous reagents including at least one structure-forming precursor comprising a alkoxysilacyclic or acyloxysilacyclic compound with or without a porogen; applying energy to the gaseous reagents in the reaction chamber to induce reaction of the gaseous reagents to deposit a preliminary film on the substrate, wherein the preliminary film contains the porogen, and the preliminary film is deposited; and removing from the preliminary film at least a portion of the porogen contained therein and provide the film with pores and a dielectric constant of 3.2 or less. In certain embodiments, the structure-forming precursor further comprises a hardening additive.

Abstract: The present disclosure relates to a system for laser processing of a ceramic electrolyte material. The system may include a controller, a laser responsive to the controller for generating a beam, and a beam forming subsystem. The beam forming subsystem controls a parameter of the beam generated by the laser. The beam forming subsystem further controls the beam to provide a laser fluence sufficient to produce densification of the ceramic electrolyte material.

Abstract: The present invention relates to a method for measuring the ion nonextensive parameter of plasma includes the following steps: describe the plasma with nonextensive statistical mechanics, obtain the equation describing the relationship between the geodesic acoustic mode frequency and the ion acoustic speed of plasma; collect the measurement data of the geodesic acoustic mode frequencies and plasma temperature in the device where the plasma is to be measured; the obtained equation describing the relationship between the geodesic acoustic mode frequency and the ion acoustic speed of plasma is used to linearly fit the collected measured data of the geodesic acoustic mode frequency and the plasma temperature in the device where the plasma is to be measured to obtain the slope value; based on the derived equation and the obtained slope values, and combining with the safety factor of the device where the plasma is to be measured, the ion nonextensive parameter is solved numerically.

Abstract: A plasma processing apparatus or a plasma processing method that processes a wafer to be processed, which is placed on a surface of a sample stage arranged in a processing chamber inside a vacuum container, using a plasma formed in the processing chamber, the apparatus or method including processing the wafer by adjusting a first high-frequency power to be supplied to a first electrode arranged inside the sample stage and a second high-frequency power to be supplied, via a resonant circuit, to a second electrode which is arranged in an inner side of a ring-shaped member made of a dielectric arranged on an outer peripheral side of a surface of the sample stage on which the wafer is placed, during the processing.

Abstract: An avalanche photodiode with a diffused junction and the method for its fabrication are disclosed. The method comprising forming, on a substrate, a first high-doped region and a low-doped region; performing selective area growth (SAG) with in-situ etchant on the low-doped region to grow a SAG structure; and diffusing through the SAG structure to form a second high-doped region in the low-doped region.

Abstract: Thin film transistor structures and processes are disclosed that include stacked nanowire bodies to mitigate undesirable short channel effects, which can occur as gate lengths scale down to sub-100 nanometer (nm) dimensions, and to reduce external contact resistance. In an example embodiment, the disclosed structures employ a gate-all-around architecture, in which the gate stack (including a high-k dielectric layer) wraps around each of the stacked channel region nanowires (or nanoribbons) to provide improved electrostatic control. The resulting increased gate surface contact area also provides improved conduction. Additionally, these thin film structures can be stacked with relatively small spacing (e.g., 1 to 20 nm) between nanowire bodies to increase integrated circuit transistor density. In some embodiments, the nanowire body may have a thickness in the range of 1 to 20 nm and a length in the range of 5 to 100 nm.

Abstract: A resist material dispensing system includes a resist supply and a resist filter connected to the resist supply downstream from the resist supply. The resist material dispensing system includes a resist tank structure connected to the resist filter downstream from the resist filter and a resist pump device connected to the resist tank structure downstream from the resist tank structure. The resist tank structure is vertically arranged so that a resist material flows in a continuous downward flow from where the resist material enters the resist tank structure until the resist material exits the resist tank structure.

Abstract: Aspects of the present disclosure relate generally to isolator devices, components thereof, and methods associated therewith for substrate processing chambers. In one implementation, a substrate processing chamber includes an isolator ring disposed between a pedestal and a pumping liner. The isolator ring includes a first surface that faces the pedestal, the first surface being disposed at a gap from an outer circumferential surface of the pedestal. The isolator ring also includes a second surface that faces the pumping liner and a protrusion that protrudes from the first surface of the isolator ring and towards the outer circumferential surface of the pedestal. The protrusion defines a necked portion of the gap between the pedestal and the isolator ring.

Abstract: Exemplary methods of processing a semiconductor substrate may include forming a layer of dielectric material on the semiconductor substrate. The methods may include performing an edge exclusion removal of the layer of dielectric material. The methods may include forming a mask material on the semiconductor substrate. The mask material may contact the dielectric material at an edge region of the semiconductor substrate. The methods may include patterning an opening in the mask material overlying a first surface of the semiconductor substrate. The methods may include etching one or more trenches through the semiconductor substrate.

Abstract: A method includes arranging a substrate in a processing chamber, and exposing the substrate to a gas mixture including a first metal precursor gas and a second metal precursor gas to deposit a first metal precursor and a second metal precursor onto the substrate at the same time. The method further includes purging the processing chamber, supplying a reactant common to both the first metal precursor and the second metal precursor to form a layer of an alloy on the substrate, and purging the processing chamber.

Abstract: The present disclosure relates to glass articles, a method of making the glass articles, and uses of the glass articles. The glass article has a UV-transmittance of more than 90% at 350 nm and at 500 nm and a total amount of Si2, B2O3 and Al2O3 of at least 75 mol %. The article is preferably used in the fields of biotechnology, MEMS, CIS, MEMS-like pressure sensor, display, micro array, electronic devices, microfluidics, semiconductor, high precision equipment, camera imaging, display technologies, sensor/semicon, electronic devices, home appliance, diagnostic product, and/or medical device.

Abstract: Methods and apparatuses for forming an encapsulation bilayer over a chalcogenide material on a semiconductor substrate are provided. Methods involve forming a bilayer including a barrier layer directly on chalcogenide material deposited using pulsed plasma plasma-enhanced chemical vapor deposition (PP-PECVD) and an encapsulation layer over the barrier layer deposited using plasma-enhanced atomic layer deposition (PEALD). In various embodiments, the barrier layer is formed using a halogen-free silicon precursor and the encapsulation layer deposited by PEALD is formed using a halogen-containing silicon precursor and a hydrogen-free nitrogen-containing reactant.

Abstract: A plasma processing apparatus includes a cooling plate having a fixing surface to which an upper electrode is fixed, the cooling plate having, on the fixing surface, an electrostatic chuck configured to attract the upper electrode by an attraction force generated by an applied voltage; a power supply configured to apply the voltage to the electrostatic chuck; and a power supply controller configured to control the power supply such that an absolute value of the voltage applied to the electrostatic chuck is increased based on a degree of consumption of the upper electrode.

Abstract: Exemplary semiconductor processing chambers may include a gasbox. The chambers may include a substrate support. The chambers may include a blocker plate positioned between the gasbox and the substrate support. The blocker plate may define a plurality of apertures through the plate. The chambers may include a faceplate positioned between the blocker plate and substrate support. The faceplate may be characterized by a first surface facing the blocker plate and a second surface opposite the first surface. The second surface of the faceplate and the substrate support may at least partially define a processing region within the semiconductor processing chamber. The faceplate may be characterized by a central axis, and the faceplate may define a plurality of apertures through the faceplate. The faceplate may define a plurality of recesses extending about and radially outward of the plurality of apertures.

Abstract: The present disclosure provides a new wet atomic layer etch (ALE) process for etching ruthenium. More specifically, the present disclosure provides various embodiments of methods that utilize new etch chemistries for etching ruthenium in a wet ALE process. Unlike conventional etch processes for ruthenium, the wet ALE process described herein for etching ruthenium is metal-free, cost-effective and improves surface roughness during etching.

Abstract: According to one embodiment, a silicon-containing product forming apparatus includes a reaction chamber, an emission path, a process liquid tank, a supplier, and a flow path switcher. The emission path emits an emission material from the reaction chamber. The supplier includes a supply line configured to supply a process liquid to the emission path from the process liquid tank, and a byproduct generated by reaction is treated in the emission path by the supplied process liquid. The flow path switcher switches the communication state of the emission path with each of the reaction chamber and the supply line of the supplier.

Abstract: Susceptor assemblies, reactors and systems including the assemblies, and methods of using the assemblies, reactors, and systems are disclosed. Exemplary susceptor assemblies include two or more sections that can be moved relative to each other to allow rapid changes in a substrate temperature. The movement of the two or more sections can additionally or alternatively be used to manipulate conductance of gas flow through a reactor.

Abstract: A substrate transfer system includes an atmospheric substrate transfer module, a vacuum substrate transfer module, and a load lock module disposed on a side surface of the atmospheric substrate transfer module and disposed on an upper surface or a lower surface of the vacuum substrate transfer module. The load lock module includes a container having a first substrate transfer opening and a second substrate transfer opening, a first gate configured to open or close the first substrate transfer opening, a second gate configured to open or close the second substrate transfer opening, and a substrate actuator configured to vertically move a substrate through the second substrate transfer opening between a first position in the container and a second position in the vacuum substrate transfer module.

Abstract: Methods for controlling the formation of oxygen containing thin films, such as silicon oxycarbide (SiOC) and silicon oxycarbonitride (SiOCN) thin films, on a substrate in a reaction space are provided. The methods can include at least one plasma enhanced atomic layer deposition (PEALD) cycle including alternately and sequentially contacting the substrate with a silicon precursor that comprises oxygen and a second reactant that does not include oxygen. In some embodiments the plasma power can be selected from a range to achieve a desired step coverage or wet etch rate ratio (WERR) for films deposited on three dimensional features.

Abstract: Some embodiments include ferroelectric assemblies. Some embodiments include a capacitor which has ferroelectric insulative material between a first electrode and a second electrode. The capacitor also has a metal oxide between the second electrode and the ferroelectric insulative material. The metal oxide has a thickness of less than or equal to about 30 ?. Some embodiments include a method of forming an assembly. A first capacitor electrode is formed over a semiconductor-containing base. Ferroelectric insulative material is formed over the first electrode. A metal-containing material is formed over the ferroelectric insulative material. The metal-containing material is oxidized to form a metal oxide from the metal-containing material. A second electrode is formed over the metal oxide.

Abstract: A method of depositing silicon carbide on a preform to form a ceramic matrix composite comprises placing the preform into a reaction vessel, removing air from the reaction vessel and backfilling the reaction vessel with an inert gas to an operating pressure. The reaction vessel and the preform are heated to an operating temperature. A carrier gas and precursor materials are heated to a preheat temperature outside of the reaction vessel. The carrier gas and the precursor materials are introduced to the reaction vessel in a specified ratio. Off gasses, the precursor materials that are unspent, and the carrier gas are removed from the reaction vessel to maintain the specified ratio of the precursor materials in the reaction vessel.

Abstract: Methods for forming a transition metal material on a substrate and thermal processing such metal containing material in a cluster processing system are provided. In one embodiment, a method for a device structure for semiconductor devices includes forming a two-dimensional transition metal dichalcogenide layer on a substrate in a first processing chamber disposed in a cluster processing system, thermally treating the two-dimensional transition metal dichalcogenide layer to form a treated metal layer in a second processing chamber disposed in the cluster processing system, and forming a capping layer on the treated metal layer in a third processing chamber disposed in the cluster processing system.

Abstract: Provided is a placing table configured to place a workpiece thereon. The placing table includes: an electrostatic chuck configured to attract the workpiece; a support member configured to support a focus ring; and a metal base having a first region configured to support the electrostatic chuck and a second region configured to support the support member, the second region surrounding the first region. The support member includes: an intermediate layer formed of a ceramic sintered compact and supported on the second region via an adhesive; a thermally sprayed ceramic layer formed on the intermediate layer by a thermal spraying method; and a heater electrode provided within the thermally sprayed ceramic layer. The heater electrode is formed by the thermal spraying method.

Abstract: A control method of a plasma processing apparatus including a first electrode that places a workpiece thereon includes supplying a bias power to the first electrode, and supplying a source power having a frequency higher than that of the bias power into a plasma processing space. The source power has a first state and a second state. The control method further includes a first control process of alternately applying the first state and the second state of the source power in synchronization with a signal synchronized with a cycle of a radio frequency of the bias power, or a phase within one cycle of a reference electrical state that represents any one of a voltage, current, and electromagnetic field measured in a power feeding system of the bias power.

Abstract: A control method of a plasma processing apparatus including a first electrode that places a workpiece thereon includes supplying a bias power to the first electrode, and supplying a source power having a frequency higher than that of the bias power into a plasma processing space. The source power has a first state and a second state. The control method further includes a first control process of alternately applying the first state and the second state of the source power in synchronization with a signal synchronized with a cycle of a radio frequency of the bias power, or a phase within one cycle of a reference electrical state that represents any one of a voltage, current, and electromagnetic field measured in a power feeding system of the bias power.

Abstract: Disclosed herein is an apparatus that includes a memory, a processor, and a rectangular waveguide coupled to the memory and the processor so that the memory and the processor communicate with each other via the rectangular waveguide.

Abstract: The present disclosure relates to an element pickup device, a method for manufacturing the same and a method for using the same. The element pickup device includes: a first substrate and a second substrate oppositely disposed; a spacing part located between the first substrate and the second substrate, wherein the spacing part is spaced apart from each other to define a flow channel for liquid; and an element pickup part including an opening located in the second substrate and in communication with the flow channel.

Abstract: A system and method for generating a radio frequency (RF) waveform are described. The method includes defining a train of on-off pulses separated by an off state having no on-off pulses. The method further includes applying a multi-level pulse waveform that adjusts a magnitude of each of the on-off pulses to generate an RF waveform. The method includes sending the RF waveform to an electrode.

Abstract: A stacked monolithic multijunction solar cell, which includes a first subcell having a p-n junction with an emitter layer and a base layer, the thickness of the emitter layer being less than the thickness of the base layer at least by a factor of ten, and the first subcell comprising a substrate having a semiconductor material from the groups III and V or a substrate from the group IV, and which further includes a second subcell arranged on the first subcell and a third subcell arranged on the second subcell, the two subcells each including an emitter layer and a base layer, and a tunnel diode and a back side field layer each being formed between the subcells, the thickness of the emitter layer being greater than the thickness of the base layer in each case between the second subcell and in the third subcell.

Abstract: Embodiments of the present disclosure generally relate to methods of depositing carbon film layers greater than 3,000 ? in thickness over a substrate and surface of a lid of a chamber using dual frequency, top, sidewall and bottom sources. The method includes introducing a gas to a processing volume of a chamber. A first radiofrequency (RF) power is provided having a first frequency of about 40 MHz or greater to a lid of the chamber. A second RF power is provided having a second frequency to a bias electrode disposed in a substrate support within the processing volume. The second frequency is about 10 MHz to about 40 MHz. An additional third RF power is provided having lower frequency of about 400 kHz to about 2 MHz to the bias electrode.

Abstract: Embodiments of the present disclosure provide a reaction gas supply system and a control method. The reaction gas supply system includes a plurality of precursor containers and a plurality of supply regulator devices. The precursor container is connected to at least one of the reaction chambers. The plurality of precursor containers include at least a pair of precursor containers of an arbitrary combination. A supply regulator device is arranged between each pair of precursor containers. The supply regulator device is configured to connect the corresponding pair of precursor containers. With the reaction gas supply system and the control method of the present disclosure, the reaction gas may be ensured to be supplied stably, the utilization rate of the precursor may be increased, and the production efficiency and the product quality may be increased.

Abstract: There is provided a method of filling one or more gaps by providing the substrate in a reaction chamber and introducing a first reactant to the substrate with a first dose, thereby forming no more than about one monolayer by the first reactant on a first area; introducing a second reactant to the substrate with a second dose, thereby forming no more than about one monolayer by the second reactant on a second area of the surface, wherein the first and the second areas overlap in an overlap area where the first and second reactants react and leave an initially unreacted area where the first and the second areas do not overlap; and, introducing a third reactant to the substrate with a third dose, the third reactant reacting with the first or second reactant remaining on the initially unreacted area.

Abstract: An apparatus for growing semiconductor wafers, in particular of silicon carbide, wherein a chamber houses a collection container and a support or susceptor arranged over the container. The support is formed by a frame surrounding an opening accommodating a plurality of arms and a seat. The frame has a first a second surface, opposite to each other, with the first surface of the frame facing the support. The arms are formed by cantilever bars extending from the frame into the opening, having a maximum height smaller than the frame, and having at the top a resting edge. The resting edges of the arms define a resting surface that is at a lower level than the second surface of the frame. The seat has a bottom formed by the resting surface.

Abstract: Semiconductor processing systems according to embodiments of the present technology may include a chamber body having sidewalls and a base. The chamber body may define an internal volume. The systems may include a substrate support assembly having a shaft and a platen coupled with the shaft along a first surface of the platen. The semiconductor processing systems may include a cover plate positioned on the platen of the substrate support assembly along a second surface of the platen opposite the first surface. The cover plate may include a flange extending about an exterior region of the cover plate. The flange may be in direct contact with the platen. The cover plate may include an upper wall vertically offset from the flange. An interior volume may be defined between the upper wall and the platen of the substrate support assembly.

Abstract: Methods for depositing ultrathin films by atomic layer deposition with reduced wafer-to-wafer variation are provided. Methods involve exposing the substrate to soak gases including one or more gases used during a plasma exposure operation of an atomic layer deposition cycle prior to the first atomic layer deposition cycle to heat the substrate to the deposition temperature.

Abstract: A method of synthesizing aerogels and cross-linked aerogels are described that incorporate freeze-drying in lieu of super-critical solvent drying. Advantages over supercritical drying include a reduction in hazard risks posed by drying at supercritical conditions as well as the ability to up-scale the process to accommodate large pieces of material without introducing risk. In addition, inexpensive and more sophisticated mold technologies, which are not impervious to super-critical conditions, can be used to produce aerogel materials according to the freeze-drying method of the invention. This introduces a level of freedom never before available for the production of aerogel components.