Abstract: Provided are a method for manufacturing a single-crystal semiconductor layer. The method of manufacturing the single crystalline semiconductor layer includes performing a unit cycle multiple times, wherein the unit cycle includes a metal precursor pressurized dosing operation in which a metal precursor is adsorbed on a surface of a single crystalline substrate by supplying the metal precursor onto the single crystalline substrate while an outlet of a chamber in which the single crystalline substrate is loaded is closed such that a reaction pressure in the chamber is increased; a metal precursor purge operation; a reactive gas supplying operation in which a reactive gas is supplied into the chamber to cause a reaction of the reactive gas with the metal precursor adsorbed on the single crystalline substrate after the metal precursor purge operation; and a reactive gas purge operation.

Abstract: A method includes forming an interfacial layer over a substrate; forming a quasi-antiferroelectric (QAFE) layer over the interfacial layer, in which forming the QAFE layer comprises performing an atomic layer deposition (ALD) cycle, and the ALD cycle includes performing a first sub-cycle for X time(s), in which the first sub-cycle comprises providing a Zr-containing precursor; performing a second sub-cycle for Y time(s), in which the second sub-cycle comprises providing a Hf-containing precursor; and performing a third sub-cycle for Z time(s), in which the third sub-cycle comprises providing a Zr-containing precursor, and in which X+Z is at least three times Y; and forming a gate electrode over the QAFE layer.

Abstract: The invention provides a RRAM structure, which includes a substrate, a high voltage transistor, and a RRAM cell. The high voltage transistor includes a drift region, a gate structure, a source region, a drain region, and an isolation structure. The drift region is located in the substrate. The gate structure is located on the substrate and on a portion of the drift region. The source region and the drain region are located in the substrate on two sides of the gate structure. The drain region is located in the drift region. The isolation structure is located in the drift region and between the gate structure and the drain region. The RRAM cell includes a first electrode, a resistive switching layer, and a second electrode sequentially located on the drain region. The RRAM cell is electrically connected to the high voltage transistor.

Abstract: A deposition method of forming silicon oxide films collectively on a plurality of substrates in a processing container performs a plurality of execution cycles each of which includes: supplying a silicon material gas containing an organoamino-functionalized oligosiloxane compound into the processing container; and supplying an oxidizing gas into the processing container adjusted to a pressure of 1 Torr to 10 Torr (133 Pa to 1333 Pa).

Abstract: A high electron mobility transistor (HEMT) includes a GaN epi-layer, a first passivation layer, a source electrode metal, a drain electrode metal, a gate electrode metal, and a field plate. The first passivation layer is deposited on the GaN epi-layer. The source electrode metal, the drain electrode metal, and the gate electrode are recessed into the first passivation layer and deposited on the GaN epi-layer. The source electrode metal has a source field plate with a source field plate length Lsf. The drain electrode metal has a drain field plate with a drain field plate length Ldf, wherein Ldf>Lsf. The gate electrode is situated between the source electrode metal and the drain electrode metal. The field plate is situated between the gate electrode and the drain electrode metal.

Abstract: Embodiments of the present disclosure generally relate to protective coatings on an aerospace component and methods for depositing the protective coatings. The protective coating can be anti-coking coatings to reduce or suppress coke formation when the aerospace component is heated in the presence of a fuel. In one or more embodiments, a method for depositing the protective coating on an aerospace component includes exposing the aerospace component to a cleaning process to produce a cleaned surface on the aerospace component and sequentially exposing the aerospace component to a precursor and a reactant to form a protective coating on the cleaned surface of the aerospace component by an atomic layer deposition (ALD) process. The aerospace component can be one or more of a fuel nozzle, a combustor liner, a combustor shield, a heat exchanger, a fuel line, a fuel valve, or any combination thereof.

Abstract: Described herein are conformal films and methods for forming a conformal metal or metalloid doped silicon nitride dielectric film wherein the conformal metal is zirconium, hafnium, titanium, tantalum, or tungsten. A method includes providing a substrate in a reactor; introducing into the reactor an at least one metal precursor which reacts; purging the reactor with a purge gas; introducing into the reactor an organoaminosilane precursors to react on at least a portion of the surface of the substrate to provide a chemisorbed layer; introducing a plasma comprising nitrogen and an inert gas into the reactor to react with at least a portion of the chemisorbed layer and provide at least one reactive site wherein the plasma is generated; and optionally purge the reactor with an inert gas; and the steps are repeated until a desired thickness of the conformal metal nitride film is obtained.

Abstract: Provided are a logic switching device and a method of manufacturing the same. The logic switching device may include a domain switching layer adjacent to a gate electrode. The domain switching layer may include a ferroelectric material region and an anti-ferroelectric material region. The domain switching layer may be a non-memory element. The logic switching device may include a channel, a source and a drain both connected to the channel, the gate electrode arranged to face the channel, and the domain switching layer provided between the channel and the gate electrode.

Abstract: When a gas supplied to a gas injection unit is switched from a first processing gas to a second processing gas, a controller of a gas supply system performs control to open a first supply on/off valve connected to the gas injection unit and provided in a first gas supply line for supplying the first processing gas and a second exhaust on/off valve provided in a first gas exhaust line branched from the first gas supply line, close a second supply on/off valve connected to the gas injection unit and provided in a second gas supply line for supplying the second processing gas and a first exhaust on/off valve provided in a second gas exhaust line branched from the second gas supply line; and then open the second supply on/off valve and the first exhaust on/off valve and close the first supply on/off valve and the second exhaust on/off valve.

Abstract: Various aspects of a light extraction substrate, an organic light emitting device, and methods of fabrication are provided. A light extraction substrate of an organic light-emitting device includes a light-scattering layer disposed on a base substrate and contains a first material, and a number of holes (hole diameters ranging from 350 nm to 450 nm) extending between the first surface and the second surface. A planarization layer (thickness not greater than 200 nm) is disposed on the light-scattering layer and contains a second material.

Abstract: A capacitor and a DRAM device, the capacitor including a lower electrode; a dielectric layer structure on the lower electrode, the dielectric layer structure including a first zirconium oxide layer, a hafnium oxide layer, and a second zirconium oxide layer sequentially stacked; and an upper electrode on the dielectric layer structure, wherein the hafnium oxide layer has a tetragonal crystal phase or an orthorhombic crystal phase.

Abstract: Methods for forming a doped metal oxide film on a substrate by cyclical deposition are provided. In some embodiments, methods may include contacting the substrate with a first reactant comprising a metal halide source, contacting the substrate with a second reactant comprising a hydrogenated source and contacting the substrate with a third reactant comprising an oxide source. In some embodiments, related semiconductor device structures may include a doped metal oxide film formed by cyclical deposition processes.

Abstract: Chalcogen silane precursors are described. Methods for depositing a silicon nitride (SixNy) film on a substrate are described. The substrate is exposed to the chalcogen silane and a reactant to deposit the silicon nitride (SixNy) film. The exposures can be sequential or simultaneous. The chalcogen silane may be substantially free of halogen. The chalcogen may be selected from the group consisting of sulfur (S), selenium (Se), and tellurium (Te).

Abstract: A semiconductor device and a method of manufacturing the semiconductor device are included. The method of manufacturing the semiconductor device includes forming a hafnium oxide layer on a substrate and crystallizing the hafnium oxide layer by using a hafnium cobalt oxide layer as a seed layer. According to the method of manufacturing the semiconductor device, a thin-film hafnium oxide layer may be easily crystallized.

Abstract: Embodiments described and discussed herein provide methods for selectively depositing a metal oxides on a substrate. In one or more embodiments, methods for forming a metal oxide material includes positioning a substrate within a processing chamber, where the substrate has passivated and non-passivated surfaces, exposing the substrate to a first metal alkoxide precursor to selectively deposit a first metal oxide layer on or over the non-passivated surface, and exposing the substrate to a second metal alkoxide precursor to selectively deposit a second metal oxide layer on the first metal oxide layer. The method also includes sequentially repeating exposing the substrate to the first and second metal alkoxide precursors to produce a laminate film containing alternating layers of the first and second metal oxide layers. Each of the first and second metal alkoxide precursors contain different types of metals which are selected from titanium, zirconium, hafnium, aluminum, or lanthanum.

Abstract: A control method for an autonomous vehicle is used in an autonomous vehicle including an engine, and a controller that controls an operation of the engine. In the control method, required driving force is set in accordance with an intervehicular distance between an own vehicle and a preceding vehicle when there is the preceding vehicle in front of the own vehicle. Also, when there is the preceding vehicle, a behavior of the preceding vehicle is predicted from a situation in front of the preceding vehicle. Further, when there is the preceding vehicle, sailing stop is executed based on the required driving force and the predicted behavior of the preceding vehicle. The sailing stop causes the engine to stop automatically while the own vehicle is traveling at vehicle speed equal to or higher than given vehicle speed.

Abstract: A film forming method includes forming a film by sequentially performing operations for each of a plurality of kinds of reaction gases, the operations being of storing the reaction gas in a storage part to raise a pressure in the storage part to a first pressure and then discharging the reaction gas into the process vessel, while continuously supplying the counter gas, and purging by repeating multiple times operations of storing a purge gas in the storage part provided in the reaction gas supply passage to raise the pressure in the storage part to a second pressure higher than the first pressure, and discharging the purge gas into the process vessel. A flow rate of the counter gas supplied into the process vessel in the purging is smaller than a flow rate of the counter gas supplied into the process vessel in the forming the film.

Abstract: A method used in forming an electronic device comprising conductive material and ferroelectric material comprises forming a composite stack comprising multiple metal oxide-comprising insulator materials. At least one of the metal oxide-comprising insulator materials is between and directly against non-ferroelectric insulating materials. The multiple metal oxide-comprising insulator materials are of different composition from that of immediately-adjacent of the non-ferroelectric insulating materials. The composite stack is subjected to a temperature of at least 200° C. After the subjecting, the composite stack comprises multiple ferroelectric metal oxide-comprising insulator materials at least one of which is between and directly against non-ferroelectric insulating materials. After the subjecting, the composite stack is ferroelectric. Conductive material is formed and that is adjacent the composite stack. Devices are also disclosed.

Abstract: An embodiment is a method including forming an opening in a mask layer, the opening exposing a conductive feature below the mask layer, forming a conductive material in the opening using an electroless deposition process, the conductive material forming a conductive via, removing the mask layer, forming a conformal barrier layer on a top surface and sidewalls of the conductive via, forming a dielectric layer over the conformal barrier layer and the conductive via, removing the conformal barrier layer from the top surface of the conductive via, and forming a conductive line over and electrically coupled to the conductive via.

Abstract: Disclosed herein are metal filament memory cells, and related devices and techniques. In some embodiments, a memory cell may include: a transistor having a source/drain region; and a metal filament memory device including an active metal and an electrolyte; wherein the electrolyte is coupled between the active metal and the source/drain region when the transistor is an n-type metal oxide semiconductor (NMOS) transistor, and the active metal is coupled between the electrolyte and the source/drain region when the transistor is a p-type metal oxide semiconductor (PMOS) transistor.

Abstract: A process for forming a lithium-metal-carbon film on a lithium metal structure. A metal-ligand complex is exposed to the metal ligand, such as for 5-30 seconds in a chemical vapor transfer reactor at a temperature of 100-180° C.

Abstract: Methods and apparatus for filling a high aspect ratio feature such as a via with ruthenium including: contacting a ruthenium liner with a ruthenium precursor within a high aspect ratio feature such as a via, wherein the ruthenium liner has a top surface within a high aspect ratio feature such as a via, and wherein the top surface comprises a halogen material such as iodine or bromine. Embodiments also relate to selective deposition of ruthenium within a high-aspect ratio feature such as a via.

Abstract: Processing methods may be performed to produce semiconductor structures that may include a high-k dielectric material. The methods may include forming a silicon layer over a semiconductor substrate. The semiconductor substrate may include silicon germanium. The methods may include oxidizing a portion of the silicon layer to form a sacrificial oxide while maintaining a portion of the silicon layer in contact with the semiconductor substrate. The methods may include removing the sacrificial oxide. The methods may include oxidizing the portion of the silicon layer in contact with the semiconductor substrate to form an oxygen-containing material. The methods may include forming a high-k dielectric material overlying the oxygen-containing material.

Abstract: When a gas supplied to a gas injection unit is switched from a first processing gas to a second processing gas, a controller of a gas supply system performs control to open a first supply on/off valve connected to the gas injection unit and provided in a first gas supply line for supplying the first processing gas and a second exhaust on/off valve provided in a first gas exhaust line branched from the first gas supply line, close a second supply on/off valve connected to the gas injection unit and provided in a second gas supply line for supplying the second processing gas and a first exhaust on/off valve provided in a second gas exhaust line branched from the second gas supply line; and then open the second supply on/off valve and the first exhaust on/off valve and close the first supply on/off valve and the second exhaust on/off valve.

Abstract: A capacitor comprising a solid electrolytic capacitor element that contains a sintered porous anode body, a dielectric film that is formed by sequential vapor deposition and overlies the anode body, and a solid electrolyte that overlies the dielectric film is provided. A method for forming a solid electrolytic capacitor element is also provided.

Abstract: Embodiments of the present invention are directed to forming a sub-stoichiometric metal-oxide film using a modified atomic layer deposition (ALD) process. In a non-limiting embodiment of the invention, a first precursor and a second precursor are selected. The first precursor can include a metal and a first ligand. The second precursor can include the same metal and a second ligand. A substrate can be exposed to the first precursor during a first pulse of an ALD cycle. The substrate can be exposed to the second precursor during a second pulse of the ALD cycle. The second pulse can occur directly after the first pulse without an intervening thermal oxidant. The substrate can be exposed to the thermal oxidant during a third pulse of the ALD cycle.

Abstract: Cross bar array devices and methods of forming the same include first electrodes arranged adjacent to each other and extending in a first direction. Second electrodes are arranged transversely to the first electrodes. An electrolyte layer is disposed between the first electrodes and the second electrodes, the electrolyte layer comprising a nitridated dielectric material.

Abstract: Methods are provided for preparing TiO2 nanofiltration membranes for water purification are provided. The method can include supplying a titanium precursor gas into a reaction chamber, where the titanium precursor gas reacts with a base support of an anodic aluminum oxide, and the base support of an anodic aluminum oxide has a surface defining a plurality of pores therein. The reaction chamber can then be evacuated to remove any unreacted titanium precursor gas, and an alkoxide precursor gas can be supplied into a reaction chamber such that the alkoxide precursor gas reacts to with the titanium on the base support to form a hybrid titanium alkoxide. Thereafter, the base support cab be heated to remove the organic component to leave titanium oxide on the surface of the base support.

Abstract: An exemplary system may include a chamber configured to contain a semiconductor substrate in a processing region of the chamber. The system may include a first remote plasma unit fluidly coupled with a first access of the chamber and configured to deliver a first precursor into the chamber through the first access. The system may still further include a second remote plasma unit fluidly coupled with a second access of the chamber and configured to deliver a second precursor into the chamber through the second access. The first and second access may be fluidly coupled with a mixing region of the chamber that is separate from and fluidly coupled with the processing region of the chamber. The mixing region may be configured to allow the first and second precursors to interact with each other externally from the processing region of the chamber.

Abstract: Techniques are disclosed for passivation of transistor channel region interfaces. In some cases, the transistor channel region interfaces to be passivated include the interface between the semiconductor channel and the gate dielectric and/or the interface between the sub-channel semiconductor material and isolation material. For example, an aluminum oxide (also referred to as alumina) layer may be used to passivate channel/gate interfaces where the channel material includes silicon germanium, germanium, or a III-V material. The techniques can be used to reduce the interface trap density at the channel/gate interface and the techniques can also be used to passivate the channel/gate interface in both gate first and gate last process flows. The techniques may also include an additional passivation layer at the sub-channel/isolation interface to, for example, avoid incurring additional parasitic capacitance penalty.

Abstract: A raw material for forming a thin film that includes a compound represented by General Formula (1) below. In the formula, R1 represents a linear or branched alkyl group having 2 to 4 carbon atoms; R2 to R5 each independently represent a linear or branched alkyl group having 1 to 4 carbon atoms; A represents an alkanediyl group having 1 to 4 carbon atoms; and M represents titanium, zirconium or hafnium. Provided that when M represents zirconium, A represents an alkanediyl group having 3 or 4 carbon atoms. When M represents titanium or hafnium, it is preferred that A represents an alkanediyl group having 2 or 3 carbon atoms. When M represents zirconium, it is preferred that A represent an alkanediyl group having 3 carbon atoms.

Abstract: A conductive fill is provided in an opening of an interconnect layer. A seed layer is formed, a portion of which is then oxidized. The oxygen is removed in a treatment process and the surface of the de-oxidized seed layer is hydrolyzed to form a hydroxyl sublayer and moisturized. The conductive fill is formed over the hydroxyl sublayer.

Abstract: A process of depositing zirconium oxide (ZrO2) layers possessing dual properties of anti-reflection and passivation of silicon surfaces, including passivation of n-type and p-type silicon substrates. To grow a ZrO2 anti-reflection passivation layer, a precursor layer of zirconium oxide is spun on a silicon surface then dried, pyrolyzed and fired at suitable contact firing conditions, avoiding additional deposition. Thermal annealing in a hydrogen environment improves passivation quality of ZrO2 layer to a level 3-4 times higher than that of fired films alone. ZrO2 dielectric passivation layers exhibit improved passivation quality after illumination due to photo-enhanced passivation and higher passivation quality at higher thermal budget suitable for screen printed metal contact firing, unlike standard PECVD deposited passivation layers. The method is adaptable for fabrication of silicon solar cells and other structures utilizing passivated layers.

Abstract: A semiconductor device includes a metal layer, an insulating layer disposed above the metal layer, and a multi-layer diffusion barrier disposed on the metal layer between the metal layer and the insulating layer. The multi-layer diffusion barrier includes a first material layer including a metallic nitride and a second material layer including a metallic oxide.

Abstract: A method of cleaning a process chamber includes following steps. A plurality of process films and a plurality of non-process films are alternately formed on an interior surface of the process chamber. A cleaning operation is performed to remove the plurality of process films and the plurality of non-process films from the interior surface of the process chamber.

Abstract: A capacitor includes a first electrode and a second electrode spaced apart from each other, a dielectric layer disposed between the first electrode and the second electrode, and a seed layer disposed between the first electrode and the dielectric layer. The dielectric layer includes a dielectric material having a tetragonal crystal structure. The seed layer includes a seed material that satisfies at least one of a lattice constant condition or a bond length condition.

Abstract: A thermal treatment apparatus performs a thermal treatment on a metal-containing film formed on a substrate. The thermal treatment apparatus includes a treatment chamber that houses the substrate; a thermal treatment plate that is provided inside the treatment chamber and mounts the substrate thereon; and a moisture supply unit that supplies moisture to the metal-containing film. At the time of the thermal treatment, moisture is supplied to the metal-containing film of the substrate on the thermal treatment plate and an atmosphere in the treatment chamber is exhausted from a central portion of the treatment chamber.

Abstract: Described herein are articles, systems and methods where a plasma resistant coating is deposited onto a surface of a chamber component using an atomic layer deposition (ALD) process. The plasma resistant coating has a stress relief layer and a layer comprising a solid solution of Y2O3—ZrO2 and uniformly covers features, such as those having an aspect ratio of about 3:1 to about 300:1.

Abstract: Atomic layer deposition processes for forming germanium oxide thin films are provided. In some embodiments the ALD processes can include the following: contacting the substrate with a vapor phase tetravalent Ge precursor such that at most a molecular monolayer of the Ge precursor is formed on the substrate surface; removing excess Ge precursor and reaction by products, if any; contacting the substrate with a vapor phase oxygen precursor that reacts with the Ge precursor on the substrate surface; removing excess oxygen precursor and any gaseous by-products, and repeating the contacting and removing steps until a germanium oxide thin film of the desired thickness has been formed.

Abstract: A reflective display includes a first substrate and a second substrate arranged oppositely, a first electrode provided on the first substrate, a transparent dielectric layer arranged on the side of the first substrate opposite to the second substrate, a second electrode provided on the second substrate, and immiscible electrostriction light-absorbing material and transparent liquid filled between the first substrate and the second substrate. The light incident into the reflective display can be totally reflected on the side of the transparent liquid next to the first substrate; the electrostriction light-absorbing material deforms under action of an electric field formed by the first electrode and the second electrode, which enables a spreading area of the side of the transparent liquid next to the first substrate change.

Abstract: The present invention relates to a vapor deposition compound which serves to deposit a thin film through vapor deposition. More particularly, the present invention relates to vapor deposition zirconium, titanium, and hafnium precursors which are applicable to atomic layer deposition (ALD) or chemical vapor deposition (CVD) and which have low viscosity, excellent thermal stability, and fast self-saturation, and a method of preparing the same.

Abstract: A capacitor includes a first electrode and a second electrode spaced apart from each other, a dielectric layer disposed between the first electrode and the second electrode, and a seed layer disposed between the first electrode and the dielectric layer. The dielectric layer includes a dielectric material having a tetragonal crystal structure. The seed layer includes a seed material that satisfies at least one of a lattice constant condition or a bond length condition.

Abstract: Certain embodiments herein relate to methods of increasing a reaction chamber batch size. A portion of a batch of wafers is processed within the chamber. The processing results in at least some off-target deposition of material on interior surfaces of the reaction chamber. A mid-batch chamber processing is conducted to stabilize the off-target deposition materials accumulated on the chamber interior surfaces. Another portion of the batch of wafers is processed within the chamber. In various embodiments, processing of the chamber (e.g., mid-batch) and subsequent portion of the batch of wafers is repeated until processing of all wafers is complete. Batch size refers to the number of wafers that may be processed in the reaction chamber between chamber clean cycles. Chamber interior surfaces are seasoned prior to batch processing. Seasoning of the chamber interior surfaces involves applying a coating of the same material that may be used for deposition on the wafers during processing of the same.

Abstract: Disclosed is a substrate processing method including gas injection including a source material containing silicon towards substrates received in a reaction chamber, depositing the source material on the substrates by generating plasma including oxygen radicals so as to form deposition films, and executing surface treatment of the deposition films by injecting plasma gas including oxygen radicals.

Abstract: A multilayer ceramic capacitor includes a ceramic body, an active layer, dielectric layers being interposed between first internal electrodes and second internal electrodes, an upper cover layer, a lower cover layer, a first external electrode and a second external electrode covering first and second ends of the ceramic body, and the multilayer ceramic capacitor comprising a plurality of internal electrodes disposed within the lower cover layer, when a distance of a longitudinal margin portion from a boundary of a ceramic body of the plurality of internal electrodes disposed in the lower cover layer to an overlapping area is indicated as G, and widths of an upper band portion and a lower band portion of an external electrode disposed in an upper surface and a lower surface at the boundary of the ceramic body are indicated as E1 and E2, G is greater than E1 and G is greater than E2.

Abstract: Methods for depositing a contact metal layer in contact structures of a semiconductor device are provided. In one embodiment, a method for depositing a contact metal layer for forming a contact structure in a semiconductor device is provided. The method comprises performing a cyclic metal deposition process to deposit a contact metal layer on a substrate and annealing the contact metal layer disposed on the substrate. The cyclic metal deposition process comprises exposing the substrate to a deposition precursor gas mixture to deposit a portion of the contact metal layer on the substrate, exposing the portion of the contact metal layer to a plasma treatment process, and repeating the exposing the substrate to a deposition precursor gas mixture and exposing the portion of the contact metal layer to a plasma treatment process until a predetermined thickness of the contact metal layer is achieved.

Abstract: Described are methods of depositing a metal film by chemical reaction on a substrate. The method comprises: exposing the substrate to flows of a first reactant gas comprising a group 2 metal and a second reactant gas comprising a halide to form a first layer containing a metal halide on the substrate; exposing the substrate to a third reactant gas comprising an oxidant to form a second layer containing a metal peroxide or metal hydroxide on the substrate during; exposing the substrate to heat or a plasma to convert the metal peroxide or metal hydroxide to metal oxide. The method may be repeated to form the metal oxide film absent any metal carbonate impurity.

Abstract: A method of forming a gate stack that includes treating a semiconductor substrate with a wet etch chemistry to clean a surface of the semiconductor substrate and form an oxide containing interfacial layer, and converting the oxide containing interfacial layer to a binary alloy oxide based interlayer using a plasma deposition sequence including alternating a metal gas precursor and a nitrogen and/or hydrogen containing plasma. The method of forming the gate stack may further include forming a high-k dielectric layer atop the binary alloy oxide based interlayer.

Abstract: A method of reducing defects in epitaxially grown III-V semiconductor material comprising: epitaxially growing a III-V semiconductor on a substrate; patterning and removing portions of the III-V semiconductor to form openings; depositing thermally stable material in the openings; depositing a capping layer over the semiconductor material and thermally stable material to form a substantially enclosed semiconductor; and annealing the substantially enclosed semiconductor.

Abstract: This disclosure relates to a method for dissolving a silicon dioxide layer in a structure, including, from the back surface thereof to the front surface thereof, a supporting substrate, the silicon dioxide layer and a semiconductor layer, the dissolution method being implemented in a furnace in which structures are supported on a support, the dissolution method resulting in the diffusion of oxygen atoms included in the silicon dioxide layer through the semiconductor layer and generating volatile products, and the furnace including traps suitable for reacting with the volatile products, so as to reduce the concentration gradient of the volatile products parallel to the front surface of at least one structure.