Insulative Material Is Compound Of Refractory Group Metal (i.e., Titanium (ti), Zirconium (zr), Hafnium (hf), Vanadium (v), Niobium (nb), Tantalum (ta), Chromium (cr), Molybdenum (mo), Tungsten (w), Or Alloy Thereof) Patents (Class 438/785)
  • Patent number: 8247855
    Abstract: A ferroelectric device employs ferroelectric electrodes as local interconnect(s). One or more circuit features are formed within or on a semiconductor body. A first dielectric layer is formed over the semiconductor body. Lower contacts are formed within the first dielectric layer. A bottom electrode is formed over the first dielectric layer and on the lower contacts. A ferroelectric layer is formed on the bottom electrode. A top electrode is formed on the ferroelectric layer. A second dielectric layer is formed over the first dielectric layer. Upper contacts are formed within the second dielectric layer and in contact with the top electrode. Conductive features are formed on the upper contacts.
    Type: Grant
    Filed: September 12, 2006
    Date of Patent: August 21, 2012
    Assignee: Texas Instruments Incorporated
    Inventor: Scott R. Summerfelt
  • Publication number: 20120208375
    Abstract: In a semiconductor device formed on a silicon surface which has a substantial (110) crystal plane orientation, the silicon surface is flattened so that an arithmetical mean deviation of surface Ra is not greater than 0.15 nm, preferably, 0.09 nm, which enables to manufacture an n-MOS transistor of a high mobility. Such a flattened silicon surface is obtained by repeating a deposition process of a self-sacrifice oxide film in an oxygen radical atmosphere and a removing process of the self-sacrifice oxide film, by cleaning the silicon surface in deaerated H2O or a low OH density atmosphere, or by strongly terminating the silicon surface by hydrogen or heavy hydrogen. The deposition process of the self-sacrifice oxide film may be carried out by isotropic oxidation.
    Type: Application
    Filed: April 23, 2012
    Publication date: August 16, 2012
    Inventors: Tadahiro Ohmi, Shigetoshi Sugawa, Akinobu Teramoto, Hiroshi Akahori, Keiichi Nii
  • Publication number: 20120202357
    Abstract: Methods for preparing a substrate for a subsequent film formation process are described. Methods for preparing a substrate for a subsequent film formation process, without immersion in an aqueous solution, are also described. A process is described that includes disposing a substrate into a process chamber, the substrate having a thermal oxide surface with substantially no reactive surface terminations. The thermal oxide surface is exposed to a partial pressure of water above the saturated vapor pressure at a temperature of the substrate to convert the dense thermal oxide with substantially no reactive surface terminations to a surface with hydroxyl surface terminations. This can occur in the presence of a Lewis base such as ammonia.
    Type: Application
    Filed: July 27, 2011
    Publication date: August 9, 2012
    Applicant: Applied Materials, Inc.
    Inventors: Tatsuya E. Sato, David Thompson, Jeffrey W. Anthis, Vladimir Zubkov, Steven Verhaverbeke, Roman Gouk, Maitreyee Mahajani, Patricia M. Liu, Malcolm J. Bevan
  • Publication number: 20120202358
    Abstract: Graded dielectric layers and methods of fabricating such dielectric layers provide dielectrics in a variety of electronic structures for use in a wide range of electronic devices and systems. In an embodiment, a dielectric layer is graded with respect to a doping profile across the dielectric layer. In an embodiment, a dielectric layer is graded with respect to a crystalline structure profile across the dielectric layer. In an embodiment, a dielectric layer is formed by atomic layer deposition incorporating sequencing techniques to generate a doped dielectric material.
    Type: Application
    Filed: February 3, 2012
    Publication date: August 9, 2012
    Inventors: Dan Gealy, Vishwanath Bhat, Cancheepuram V. Srividya, M. Noel Rocklein
  • Publication number: 20120202356
    Abstract: Methods of forming rutile titanium dioxide. The method comprises exposing a transition metal (such as V, Cr, W, Mn, Ru, Os, Rh, Ir, Pt, Ge, Sn, or Pb) to oxygen gas (O2) to oxidize the transition metal. Rutile titanium dioxide is formed over the oxidized transition metal. The rutile titanium dioxide is formed by atomic layer deposition by introducing a gaseous titanium halide precursor and water to the oxidized transition metal. Methods of forming semiconductor structures having rutile titanium dioxide are also disclosed.
    Type: Application
    Filed: February 7, 2011
    Publication date: August 9, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Tsai-Yu Huang, Vishwanath Bhat, Vassil Antonov, Chris Carlson
  • Patent number: 8237216
    Abstract: Lanthanum-metal oxide dielectrics and methods of fabricating such dielectrics provide an insulating layer in a variety of structures for use in a wide range of electronic devices and systems. In an embodiment, a lanthanum-metal oxide dielectric is formed using a trisethylcyclopentadionatolanthanum precursor and/or a trisdipyvaloylmethanatolanthanum precursor. Additional apparatus, systems, and methods are disclosed.
    Type: Grant
    Filed: October 29, 2010
    Date of Patent: August 7, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Publication number: 20120196449
    Abstract: A zirconium precursor selected from among compounds of Formulae (I), (II) and (III): wherein: M is Zr, Hf or Ti; R1 is hydrogen or C1-C5 alkyl; each of R2, R? and R? is independently selected from C1-C5 alkyl; and n has a value of 0, 1, 2, 3 or 4. Compounds of such formulae are useful in vapor deposition processes such as atomic layer deposition, to form corresponding metal-containing films, e.g., high k dielectric zirconium films in the fabrication of DRAM memory cells.
    Type: Application
    Filed: January 27, 2012
    Publication date: August 2, 2012
    Applicant: ADVANCED TECHNOLOGY MATERIALS, INC.
    Inventors: Chongying Xu, Thomas M. Cameron, William Hunks
  • Publication number: 20120178266
    Abstract: Compositions and methods for forming titanium-containing thin films are provided. The compositions comprise at least one precursor selected from the group consisting of (methylcyclopentadienyl)Ti(NMe2)3, (ethylcyclopentadienyl)Ti(NMe2)3, (isopropylcyclopentadienyl)Ti(NMe2)3, (methylcyclopentadienyl)Ti(NEt2)3, (methylcyclopentadienyl)Ti(NMeEt)3, (ethylcyclopentadienyl)Ti(NMeEt)3 and (methylcyclopentadienyl)Ti(OMe)3; and at least one liquification co-factor other than the at least one precursor; wherein the at least one liquification co-factor is present in amount sufficient to co-act with the at least one precursor, and in combination with the at least one precursor, forms a liquid composition.
    Type: Application
    Filed: July 19, 2010
    Publication date: July 12, 2012
    Applicant: SIGMA-AIDRICH CO. LLC
    Inventors: Peter Nicholas Heys, Rajesh Odedra, Andrew Kingsley
  • Publication number: 20120175751
    Abstract: Disclosed are group IV metal-containing precursors and their use in the deposition of group IV metal-containing films{nitride, oxide and metal) at high process temperature. The use of cyclopentadienyl and imido ligands linked to the metal center secures thermal stability, allowing a large deposition temperature window, and low impurity contamination. The group IV metal (titanium, zirconium, hafnium)-containing fvm depositions may be carried out by thermal and/or plasma-enhanced CVD, ALD, and pulse CVD.
    Type: Application
    Filed: July 14, 2010
    Publication date: July 12, 2012
    Inventors: Julien Gatineau, Changhee Ko
  • Patent number: 8216377
    Abstract: A method and apparatus are presented for reducing halide-based contamination within deposited titanium-based thin films. Halide adsorbing materials are utilized within the deposition chamber to remove halides, such as chlorine and chlorides, during the deposition process so that contamination of the titanium-based film is minimized. A method for regenerating the halide adsorbing material is also provided.
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: July 10, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Garo J. Derderian, Cem Basceri, Donald L. Westmoreland
  • Patent number: 8211812
    Abstract: One inventive aspect relates to a method for fabricating a high-k dielectric layer. The method comprises depositing onto a substrate a layer of a high-k dielectric material having a first thickness. The high-k dielectric material has a bulk density value and the first thickness is so that the high-k dielectric layer has a density of at least the bulk density value of the high-k dielectric material minus about 10%. The method further comprises thinning the high-k dielectric layer to a second thickness. Another inventive aspect relates to a semiconductor device comprising a high-k dielectric layer as fabricated by the method.
    Type: Grant
    Filed: April 16, 2008
    Date of Patent: July 3, 2012
    Assignee: IMEC
    Inventors: Lars-Ake Ragnarsson, Paul Zimmerman, Kazuhiko Yamamoto, Tom Schram, Wim Deweerd, David Brunco, Stefan De Gendt, Wilfried Vandervorst
  • Patent number: 8208241
    Abstract: Methods of forming an oxide are disclosed and include contacting a ruthenium-containing material with a tantalum-containing precursor and contacting the ruthenium-containing material with a vapor that includes water and optionally molecular hydrogen (H2). Articles including a first crystalline tantalum pentoxide and a second crystalline tantalum pentoxide on at least a portion of the first crystalline tantalum pentoxide, wherein the first tantalum pentoxide has a crystallographic orientation that is different than the crystallographic orientation of the second crystalline tantalum pentoxide, are also disclosed.
    Type: Grant
    Filed: June 4, 2008
    Date of Patent: June 26, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Vishwanath Bhat, Vassil Antonov
  • Patent number: 8202808
    Abstract: Embodiments of the current invention include methods of forming a strontium titanate (SrTiO3) film using atomic layer deposition (ALD). More particularly, the method includes forming a plurality of titanium oxide (TiO2) unit films using ALD and forming a plurality of strontium oxide (SrO) unit films using ALD. The combined thickness of the TiO2 and SrO unit films is less than approximately 5 angstroms. The TiO2 and SrO units films are then annealed to form a strontium titanate layer.
    Type: Grant
    Filed: June 3, 2010
    Date of Patent: June 19, 2012
    Assignee: Intermolecular, Inc.
    Inventors: Laura M. Matz, Xiangxin Rui, Xinjian Lei, Sunil Shanker, Moo-Sung Kim, Iain Buchanan
  • Patent number: 8203176
    Abstract: To make it possible to significantly suppress the leakage current in a semiconductor device having a capacitor structure using a dielectric film. There is provided a composite oxide dielectric which is mainly composed of Zr, Al and O, and which has a composition ratio of Zr and Al in a range of (1?x):x where 0.01?x?0.15, and has a crystal structure. When the dielectric is set to have the Al composition in the above described range and is crystallized, the relative dielectric constant of the dielectric can be significantly increased. When the dielectric is used as a dielectric film of a capacitor of a semiconductor device, the leakage current of the capacitor can be significantly reduced.
    Type: Grant
    Filed: February 4, 2008
    Date of Patent: June 19, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Takashi Nakagawa, Toru Tatsumi, Nobuyuki Ikarashi, Makiko Oshida
  • Publication number: 20120146196
    Abstract: A semiconductor device includes a dielectric layer in which zirconium, hafnium, and a IV group element are mixed. A method for fabricating a capacitor includes forming a bottom electrode, forming the dielectric layer and forming a top electrode over the dielectric layer.
    Type: Application
    Filed: September 13, 2011
    Publication date: June 14, 2012
    Inventors: Kee-Jeung LEE, Kwon Hong, Kyung-Woong Park, Ji-Hoon Ahn
  • Patent number: 8198199
    Abstract: There are disclosed an epitaxial film, comprising: heating an Si substrate provided with an SiO2 layer with a film thickness of 1.0 nm or more to 10 nm or less on a surface of the substrate; and forming on the SiO2 layer by use of a metal target represented by the following composition formula: yA(1?y)B??(1), in which A is one or more elements selected from the group consisting of rare earth elements including Y and Sc, B is Zr, and y is a numeric value of 0.03 or more to 0.20 or less, the epitaxial film represented by the following composition formula: xA2O3?(1?x)BO2??(2), in which A and B are respectively same elements as A and B of the composition formula (1), and x is a numeric value of 0.010 or more to 0.035 or less.
    Type: Grant
    Filed: March 5, 2008
    Date of Patent: June 12, 2012
    Assignees: Canon Kabushiki Kaisha, Tokyo Institute of Technology
    Inventors: Jumpei Hayashi, Takanori Matsuda, Tetsuro Fukui, Hiroshi Funakubo
  • Patent number: 8198166
    Abstract: A spacer structure in sophisticated semiconductor devices is formed on the basis of a high-k dielectric material, which provides superior etch resistivity compared to conventionally used silicon dioxide liners. Consequently, a reduced thickness of the etch stop material may nevertheless provide superior etch resistivity, thereby reducing negative effects, such as dopant loss in the drain and source extension regions, creating a pronounced surface topography and the like, as are typically associated with conventional spacer material systems.
    Type: Grant
    Filed: July 27, 2010
    Date of Patent: June 12, 2012
    Assignee: GlobalFoundries, Inc.
    Inventors: Thorsten Kammler, Ralf Richter, Markus Lenski, Gunter Grasshoff
  • Patent number: 8198168
    Abstract: According to the invention, a Ti film is formed on a substrate and is annealed at the temperatures of 350° C.-400° C. under oxidative environment, so that a TiO2 film having a rutile crystal structure is formed. Since the TiO2 film having a rutile crystal structure has a high dielectric constant, it is useful for a capacitive insulating film for a capacitor.
    Type: Grant
    Filed: April 1, 2010
    Date of Patent: June 12, 2012
    Assignee: Elpida Memory, Inc.
    Inventor: Masami Tanioku
  • Patent number: 8193083
    Abstract: A method of manufacturing a semiconductor device of the present invention includes a first step of forming a metal oxide film containing at least one or more kinds of elements selected from the group consisting of hafnium, yttrium, lanthanum, aluminium, zirconium, strontium, titanium, barium, tantalum, niobium, on a substrate having a metal thin film formed on the surface, at a first temperature allowing no oxidization of the metal thin film to occur, and allowing the metal oxide film to be set in an amorphous state; and a second step of forming a metal oxide film containing at least one or more kinds of elements selected from the group consisting of hafnium, yttrium, lanthanum, aluminium, zirconium, strontium, titanium, barium, tantalum, niobium on the metal oxide film formed in the first step, up to a target film thickness, at a second temperature exceeding the first temperature.
    Type: Grant
    Filed: September 4, 2008
    Date of Patent: June 5, 2012
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Sadayoshi Horii, Yoshinori Imai, Mika Karasawa
  • Patent number: 8187973
    Abstract: A method for manufacturing a semiconductor device which includes: alternately supplying a silicon source and an oxidant to deposit a silicon oxide film on a surface of a semiconductor substrate, wherein the silicon source is supplied under a supply condition where an adsorption amount of molecules of the silicon source on the semiconductor substrate is increased without causing an adsorption saturation of the molecules of the silicon source on the semiconductor substrate, and wherein the oxidant is supplied under a supply condition where impurities remain in the molecules of the silicon source adsorbed on the semiconductor substrate.
    Type: Grant
    Filed: March 16, 2009
    Date of Patent: May 29, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsuyuki Sekine, Kazuhei Yoshinaga
  • Publication number: 20120122320
    Abstract: Provided are methods for re-incorporating carbon into low-k films after processes which result in depletion of carbon from the films. Additionally, methods for replenished depleted carbon and capping with tantalum nitride are also described.
    Type: Application
    Filed: November 15, 2011
    Publication date: May 17, 2012
    Applicant: Applied Materials, Inc.
    Inventors: Annamalai Lakshmanan, Zhenjiang Cui, Mehul Naik, See-Eng Phan, Jennifer Shan, Paul F. Ma
  • Publication number: 20120108078
    Abstract: It is made possible to provide a semiconductor device and a method for manufacturing the semiconductor device that have the highest possible permittivity and can be produced at low production costs. A method for manufacturing a semiconductor device, includes: forming an amorphous film containing (HfzZr1?z)xSi1?xO2?y (0.81?x?0.99, 0.04?y?0.25, 0?z?1) on a semiconductor substrate, the ranges of composition ratios x, y, and z being values measured by XPS; and transforming the amorphous film into an insulating film containing (HfzZr1?z)xSi1?xO2 as tetragonal crystals, by performing annealing at 750° C. or higher on the amorphous film in an atmosphere containing oxygen.
    Type: Application
    Filed: January 12, 2012
    Publication date: May 3, 2012
    Applicant: Kabushiki Kalsha Toshiba
    Inventors: Tsunehiro INO, Yasushi NAKASAKI
  • Patent number: 8169079
    Abstract: A copper interconnection structure includes an insulating layer, an interconnection body including copper in an opening provided on the insulating layer and a barrier layer including a metal element and copper, formed between the insulating layer and the interconnection body. An atomic concentration of the metal element in the barrier layer is accumulated toward an outer surface of the barrier layer facing the insulating layer, and an atomic concentration of copper in the barrier layer is accumulated toward an inner surface of the barrier layer facing the interconnection body. The inner surface of the barrier layer comprises copper surface orientation of {111} and {200}, and an intensity of X-ray diffraction peak from the inner surface of the barrier layer is stronger for the {111} peak than for the {200} peak.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: May 1, 2012
    Assignee: Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Akihiro Shibatomi
  • Patent number: 8168547
    Abstract: The transistor characteristics of a MIS transistor provided with a gate insulating film formed to contain oxide with a relative dielectric constant higher than that of silicon oxide are improved. After a high dielectric layer made of hafnium oxide is formed on a main surface of a semiconductor substrate, the main surface of the semiconductor substrate is heat-treated in a non-oxidation atmosphere. Next, an oxygen supplying layer made of hafnium oxide deposited by ALD and having a thickness smaller than that of the high dielectric layer is formed on the high dielectric layer, and a cap layer made of tantalum nitride is formed. Thereafter, the main surface of the semiconductor substrate is heat-treated.
    Type: Grant
    Filed: April 1, 2010
    Date of Patent: May 1, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Toshihide Nabatame
  • Patent number: 8168502
    Abstract: Electronic apparatus and methods of forming the electronic apparatus include a tantalum silicon oxynitride film on a substrate for use in a variety of electronic systems. The tantalum silicon oxynitride film may be structured as one or more monolayers. The tantalum silicon oxynitride film may be formed using a monolayer or partial monolayer sequencing process. Metal electrodes may be disposed on a dielectric containing a tantalum silicon oxynitride film.
    Type: Grant
    Filed: August 12, 2010
    Date of Patent: May 1, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Leonard Forbes, Kie Y. Ahn, Arup Bhattacharyya
  • Publication number: 20120091541
    Abstract: The present invention relates to a mixed metal oxide of formula SrM1-xTixO3 wherein x is 0>x>1 and M is Hf or Zr, such as a strontium-hafnium-titanium oxide orstrontium-zirconium-titanium oxide, and to a functional device comprising the mixed metal oxide.
    Type: Application
    Filed: April 7, 2010
    Publication date: April 19, 2012
    Applicant: The University of Liverpool
    Inventors: Matthew Suchomel, Matthew Rosseinsky, Hongjun Niu, Paul Raymond Chalker, Lei Yan
  • Publication number: 20120088373
    Abstract: A dielectric containing a titanium silicon oxide film and a method of fabricating such a dielectric provide a dielectric for use in a variety of electronic devices. Embodiments may include a dielectric containing a titanium silicon oxide film arranged as one or more monolayers. Embodiments may include structures for capacitors, transistors, memory devices, and electronic systems with dielectrics containing a titanium silicon oxide film, and methods for forming such structures.
    Type: Application
    Filed: December 12, 2011
    Publication date: April 12, 2012
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Patent number: 8148274
    Abstract: A method for manufacturing a semiconductor device includes heating a substrate having an insulation film thereon to a first substrate temperature so that oxidizing species are emitted from the insulating film, the insulating film having a recessed portion formed in a surface thereof, forming a metal film on the insulating film at a second substrate temperature lower than the first substrate temperature, and oxidizing at least part of the metal film with oxidizing species remaining in the insulating film.
    Type: Grant
    Filed: January 24, 2008
    Date of Patent: April 3, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Junichi Wada, Atsuko Sakata, Seiichi Omoto, Masaaki Hatano, Soichi Yamashita, Kazuyuki Higashi, Naofumi Nakamura, Masaki Yamada, Kazuya Kinoshita, Tomio Katata, Masahiko Hasunuma
  • Patent number: 8148275
    Abstract: A method for forming dielectric films including metal nitride silicate on a silicon substrate, comprises a first step of depositing a film containing metal and silicon on a silicon substrate in a non-oxidizing atmosphere using a sputtering method; a second step of forming a film containing nitrogen, metal and silicon by nitriding the film containing metal and silicon; and a third step of forming a metal nitride silicate film by oxidizing the film containing nitrogen, metal and silicon.
    Type: Grant
    Filed: December 18, 2008
    Date of Patent: April 3, 2012
    Assignees: Canon Kabushiki Kaisha, Canon Anelva Corporation
    Inventors: Yusuke Fukuchi, Naomu Kitano
  • Patent number: 8148765
    Abstract: A resistive memory device includes a first electrode, a resistive oxidation structure and a second electrode. The resistive oxidation structure has sets of oxidation layers stacked on the first electrode. Each set is made up of a first metal oxide layer and a second metal oxide layer which is disposed on and is thinner than the first metal oxide layer. The first metal oxidation layer of the first one of the sets of oxidation layers contacts an upper surface of the first electrode. The second electrode is formed on the resistive oxidation structure. The resistance of the oxidation structure can be changed by an electric field.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: April 3, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Jun Shim, Han-Sin Lee, In-Gyu Baek, Jinshi Zhao, Eun-Kyung Yim
  • Publication number: 20120045903
    Abstract: Provided is a method of forming a tantalum oxide-based film having good step coverage while controlling an oxygen concentration in the film. The method includes forming a tantalum nitride layer on a substrate by supplying a source gas including a tantalum and a nitriding agent into a process chamber wherein the substrate is accommodated under a condition where a chemical vapor deposition (CVD) reaction is caused; oxidizing the tantalum nitride layer by supplying an oxidizing agent into the process chamber under a condition where an oxidation reaction of the tantalum nitride layer by the oxidizing agent is unsaturated; and forming on the substrate a conductive tantalum oxynitride film wherein an oxygen is stoichiometrically insufficient with respect to the tantalum and a nitrogen by alternately repeating forming the tantalum nitride layer on the substrate and oxidizing the tantalum nitride layer a plurality of times.
    Type: Application
    Filed: August 19, 2011
    Publication date: February 23, 2012
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Kazuhiro HARADA, Hideharu ITATANI
  • Patent number: 8114789
    Abstract: A method of forming a material on a substrate is disclosed. In one embodiment, the method includes forming a tantalum nitride layer on a substrate disposed in a plasma process chamber by sequentially exposing the substrate to a tantalum precursor and a nitrogen precursor, followed by reducing a nitrogen concentration of the tantalum nitride layer by exposing the substrate to a plasma annealing process. A metal-containing layer is subsequently deposited on the tantalum nitride layer.
    Type: Grant
    Filed: July 29, 2010
    Date of Patent: February 14, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Sean M. Seutter, Michael X. Yang, Ming Xi
  • Publication number: 20120034793
    Abstract: A wafer serving as a target substrate to be processed is loaded into a chamber, and an inside of the chamber is maintained under a vacuum level. Then, a TiN film is formed on the wafer by alternately supplying TiCl4 gas and MMH gas into the chamber while heating the wafer. NH3 gas is supplied in conjunction with the supply of the hydrazine compound gas.
    Type: Application
    Filed: September 23, 2011
    Publication date: February 9, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Kensaku Narushima, Akinobu Kakimoto, Takanobu Hotta
  • Patent number: 8110469
    Abstract: Graded dielectric layers and methods of fabricating such dielectric layers provide dielectrics in a variety of electronic structures for use in a wide range of electronic devices and systems. In an embodiment, a dielectric layer is graded with respect to a doping profile across the dielectric layer. In an embodiment, a dielectric layer is graded with respect to a crystalline structure profile across the dielectric layer. In an embodiment, a dielectric layer is formed by atomic layer deposition incorporating sequencing techniques to generate a doped dielectric material.
    Type: Grant
    Filed: August 30, 2005
    Date of Patent: February 7, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Dan Gealy, Vishwanath Bhat, Cancheepuram V. Srividya, M. Noel Rocklein
  • Publication number: 20120028478
    Abstract: Metal silicates or phosphates are deposited on a heated substrate by the reaction of vapors of alkoxysilanols or alkylphosphates along with reactive metal amides, alkyls or alkoxides. For example, vapors of tris(tert-butoxy)silanol react with vapors of tetrakis(ethylmethylamido)hafnium to deposit hafnium silicate on surfaces heated to 300° C. The product film has a very uniform stoichiometry throughout the reactor. Similarly, vapors of diisopropylphosphate react with vapors of lithium bis(ethyldimethylsilyl)amide to deposit lithium phosphate films on substrates heated to 250° C. Supplying the vapors in alternating pulses produces these same compositions with a very uniform distribution of thickness and excellent step coverage.
    Type: Application
    Filed: March 19, 2009
    Publication date: February 2, 2012
    Applicant: President and Fellows of Harvard College
    Inventors: Roy G. Gordon, Jill Becker, Dennis Hausmann, Seigi Suh
  • Publication number: 20120028810
    Abstract: Method of depositing a layer of oxide of at least one metal element on a curved surface of a textured metal substrate, said method comprising the following steps: (1) a layer of a precursor of at least one oxide of a metal is deposited using an organic solution of at least one precursor of said metal, this solution preferably having a viscosity, measured at the temperature of the method, of between 1 mPa s and 20 mPa s, and even more preferentially between 2 mPa s and 10 mPa s. (2) said layer of oxide precursor is left to dry, (3) heat treatment is carried out in order to pyrolyse said oxide precursor and to form the oxide, at least part of said heat treatment being carried out under a flow of reducing gas, said reducing gas preferably having a flow rate greater than 0.005 cm/s, preferentially between 0.012 cm/s and 0.1 cm/s, and even more preferentially between 0.04 cm/s and 0.08 cm/s.
    Type: Application
    Filed: December 18, 2009
    Publication date: February 2, 2012
    Inventors: Philippe Odier, Stéphanie Morlens, Cyril Millon, Sarah Petil, Tristan Caroff, Carmen Jimenez, Jean-Louis Soubeyroux, Arnaud Allais, Mark Rikel
  • Publication number: 20120021612
    Abstract: A method for manufacturing a dielectric film having a high dielectric constant is provided. The method is a method for forming, on a substrate, a dielectric film including a metal oxide containing O and elements A and B, wherein the element A comprises Hf or a mixture of Hf and Zr and the element B comprises Al or Si, which includes the steps of: forming a metal oxide having an amorphous structure which has a molar ratio between element A and element B, B/(A+B) of 0.02?(B/(A+B))?0.095 and a molar ratio between element A and O, O/A of 1.0<(O/A)<2.0; and annealing the metal oxide having the amorphous structure at 700° C. or more to form a metal oxide containing a crystal phase with a cubic crystal content of 80% or more.
    Type: Application
    Filed: February 26, 2010
    Publication date: January 26, 2012
    Applicant: C/O CANON ANELVA CORPORATION
    Inventors: Takashi Nakagawa, Naomu Kitano, Toru Tatsumi
  • Patent number: 8088659
    Abstract: High dielectric films of mixed transition metal oxides of titanium and tungsten, or titanium and tantalum, are formed by sequential chemical vapor deposition (CVD) of the respective nitrides and annealing in the presence of oxygen to densify and oxidize the nitrides. The resulting film is useful as a capacitative cell and resists oxygen diffusion to the underlying material, has high capacitance and low current leakage.
    Type: Grant
    Filed: April 28, 2010
    Date of Patent: January 3, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Jiong-Ping Lu, Ming-Jang Hwang
  • Patent number: 8084370
    Abstract: Electronic apparatus and methods may include a hafnium tantalum oxynitride film on a substrate for use in a variety of electronic systems. The hafnium tantalum oxynitride film may be structured as one or more monolayers. The hafnium tantalum oxynitride film may be formed using atomic layer deposition. Metal electrodes may be disposed on a dielectric containing a hafnium tantalum oxynitride film.
    Type: Grant
    Filed: October 19, 2009
    Date of Patent: December 27, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Leonard Forbes, Kie Y. Ahn, Arup Bhattacharyya
  • Publication number: 20110308603
    Abstract: A method of passivating a silicon surface is disclosed. In one aspect, the method includes cleaning the silicon surface by subjecting the silicon surface to a sequence of steps wherein the final step is a chemical oxidation step resulting in a hydrophilic silicon surface. The method may also include drying the cleaned silicon surface using an advanced drying technique, and/or depositing an oxide layer on the silicon surface.
    Type: Application
    Filed: June 17, 2011
    Publication date: December 22, 2011
    Applicants: Katholieke Universiteit Leuven, IMEC
    Inventors: Bart Vermang, Aude Rothschild, Twan Bearda
  • Publication number: 20110298028
    Abstract: Embodiments of a dielectric layer containing a hafnium tantalum titanium oxide film structured as one or more monolayers include the dielectric layer disposed in an integrated circuit. Embodiments of methods of fabricating such a dielectric layer provide a dielectric layer for use in a variety of electronic devices. An embodiment may include forming hafnium tantalum titanium oxide film using a monolayer or partial monolayer sequencing process such as atomic layer deposition.
    Type: Application
    Filed: August 12, 2011
    Publication date: December 8, 2011
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Publication number: 20110300721
    Abstract: There is disclosed a method of forming crystalline tantalum pentoxide on a ruthenium-containing material having an oxygen-containing surface wherein the oxygen-containing surface is contacted with a treating composition, such as water, to remove at least some oxygen. Crystalline tantalum pentoxide is formed on at least a portion of the surface having reduced oxygen content.
    Type: Application
    Filed: August 16, 2011
    Publication date: December 8, 2011
    Applicant: Micron Technology, Inc.
    Inventors: Vishwanath Bhat, Rishikesh Krishnan, Daniel Gealy
  • Publication number: 20110300720
    Abstract: A plasma processing chamber particularly useful for pre-treating low-k dielectric films and refractory metal films subject to oxidation prior to deposition of other layers. A remote plasma source (RPS) excites a processing gas into a plasma and delivers it through a supply tube to a manifold in back of a showerhead faceplate. The chamber is configured for oxidizing and reducing plasmas in the same or different processes when oxygen and hydrogen are selectively supplied to the RPS. The supply tube and showerhead may be formed of dielectric oxides which may be passivated by a water vapor plasma from the remote plasma source. In one novel process, a protective hydroxide coating is formed on refractory metals by alternating neutral plasmas of hydrogen and oxygen.
    Type: Application
    Filed: August 15, 2011
    Publication date: December 8, 2011
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Xinyu Fu, Jick M. Yu
  • Patent number: 8071447
    Abstract: A semiconductor device manufacturing method includes removing an insulating film on a semiconductor substrate by etching and subsequently oxidizing a surface of the substrate by using a liquid oxidation agent without exposing this surface to an atmosphere, thereby forming a first insulating film containing an oxide of a constituent element of the substrate on the surface of the substrate; forming a second insulating film containing an aluminum oxide on the first insulating film; forming a third insulating film containing a rare earth oxide on the second insulating film; forming a high-k insulating film on the third insulating film; introducing nitrogen into the high-k insulating film to thereby make it a fourth insulating film; and conducting heat treatment to change the first through third insulating films into an insulating film made of a mixture containing aluminum, a rare earth element, the constituent element of the substrate, and oxygen.
    Type: Grant
    Filed: February 11, 2010
    Date of Patent: December 6, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Seiji Inumiya, Tomonori Aoyama
  • Patent number: 8067794
    Abstract: Electronic apparatus and methods of forming the electronic apparatus include a HfSiON film on a substrate for use in a variety of electronic systems. The HfSiON film may be structured as one or more monolayers. Electrodes to a dielectric containing a HfSiON may be structured as one or more monolayers of titanium nitride, tantalum, or combinations of titanium nitride and tantalum.
    Type: Grant
    Filed: May 3, 2010
    Date of Patent: November 29, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Patent number: 8062440
    Abstract: A hafnium alloy target containing either or both of Zr and Ti in a gross amount of 100 wtppm-10 wt % in Hf, wherein the average crystal grain size is 1-100 ?m, the impurities of Fe, Cr and Ni are respectively 1 wtppm or less, and the habit plane ratio of the plane {002} and three planes {103}, {014} and {015} lying within 35° from {002} is 55% or greater, and the variation in the total sum of the intensity ratios of these four planes depending on locations is 20% or less. As a result, obtained is a hafnium alloy target having favorable deposition property and deposition speed, which generates few particles, and which is suitable for forming a high dielectric gate insulation film such as HfO or HfON film, and the manufacturing method thereof.
    Type: Grant
    Filed: September 4, 2008
    Date of Patent: November 22, 2011
    Assignee: JX Nippon Mining & Metals Corporation
    Inventors: Takeo Okabe, Shuichi Irumata, Yasuhiro Yamakoshi, Hirohito Miyashita, Ryo Suzuki
  • Patent number: 8062943
    Abstract: A capacitor with zirconium oxide and a method for fabricating the same are provided. The method includes: forming a storage node; forming a multi-layered dielectric structure on the storage node, the multi-layered dielectric structure including a zirconium oxide (ZrO2) layer and an aluminum oxide (Al2O3) layer; and forming a plate electrode on the multi-layered dielectric structure.
    Type: Grant
    Filed: August 24, 2009
    Date of Patent: November 22, 2011
    Assignee: Hynix Semiconductor
    Inventor: Kee-jeung Lee
  • Publication number: 20110281442
    Abstract: Methods and apparatus for forming nitrogen-containing layers are provided herein. In some embodiments, a method of forming a nitrogen-containing layer may include placing a substrate having a first layer disposed thereon on a substrate support of a process chamber; heating the substrate to a temperature of at least about 250 degrees Celsius; and exposing the first layer to a radio frequency (RF) plasma formed from a process gas consisting essentially of ammonia (NH3) and an inert gas while maintaining the process chamber at a pressure of about 10 mTorr to about 40 mTorr to transform at least an upper portion of the first layer into a nitrogen-containing layer.
    Type: Application
    Filed: July 27, 2011
    Publication date: November 17, 2011
    Inventors: Malcolm J. Bevan, Johanes Swenberg, Son T. Nguyen, Wei Liu, Jose Antonio Marin, Jian Li
  • Publication number: 20110275166
    Abstract: The present invention relates to a process and system for depositing a thin film onto a substrate. One aspect of the invention is depositing a thin film metal oxide layer using atomic layer deposition (ALD).
    Type: Application
    Filed: May 6, 2011
    Publication date: November 10, 2011
    Inventors: Eric J. Shero, Petri I. Raisanen, Sung-Hoon Jung, Chang-Gong Wang
  • Patent number: 8053311
    Abstract: The present invention provides a dielectric film having a high permittivity and a high heat resistance. An embodiment of the present invention is a dielectric film (103) including a composite oxynitride containing an element A made of Hf, an element B made of Al or Si, and N and O, wherein mole fractions of the element A, the element B, and N expressed as B/(A+B+N) range from 0.015 to 0.095 and N/(A+B+N) equals or exceeds 0.045, and has a crystalline structure.
    Type: Grant
    Filed: September 10, 2010
    Date of Patent: November 8, 2011
    Assignee: Canon Anelva Corporation
    Inventors: Takashi Nakagawa, Naomu Kitano, Toru Tatsumi