Abstract: A woven fabric with a photovoltaic power generation portion performs photovoltaic power generation by light, such as, e.g., solar light, and has flexibility. The woven fabric is composed of warp yarns and weft yarns. The woven fabric includes at least one functional yarn with a photovoltaic power generation portion as a weft yarn. The functional yarn with a photovoltaic power generation portion includes a photovoltaic power generation portion, a positive electrode conductive wire material connected to a positive electrode of the photovoltaic power generation portion, and a negative electrode conductive wire material connected to a negative electrode of the photovoltaic power generation portion. At least two warp yarns are conductive yarns. One of the conductive yarn is in electric contact with the positive electrode conductive wire material. The other warp yarn is in electric contact with the negative electrode conductive wire material.

Abstract: A method for bonding two silicon substrates and a corresponding system of two silicon substrates. The method includes: providing first and second silicon substrates; depositing a first bonding layer of pure aluminum or of aluminum-copper having a copper component between 0.1 and 5% on a first bonding surface of the first silicon substrate; depositing a second bonding layer of germanium above the first bonding surface or above a second bonding surface of the second silicon substrate; subsequently joining the first and second silicon substrates, so that the first and the second bonding surfaces lie opposite each other; and implementing a thermal treatment step to form an eutectic bonding layer of aluminum-germanium or containing aluminum-germanium as the main component, between the first silicon substrate and the second silicon substrate, spikes which contain aluminum as a minimum and extend into the first silicon substrate, forming at least on the first bonding surface.

Abstract: A solid-state image capturing device including: a substrate; a substrate voltage source which applies a first potential to the substrate during a light reception period and applies a second potential to the substrate during a non-light reception period; and a plurality of pixels which each includes a light receiver which is formed on a front surface of the substrate and generates signal charges in accordance with received light, a storage capacitor which is formed adjacent to the light receiver and accumulates and stores signal charges generated by the light receiver, dark-current suppressors which are formed in the light receiver and the storage capacitor, an electronic shutter adjusting layer which is formed in an area facing the light receiver in the substrate and distant from the storage capacitor and which adjusts potential distribution, and a floating diffusion portion to which the signal charges accumulated in the storage capacitor are transmitted.

Abstract: Embodiments of the invention relate to substrates comprising a base wafer, an insulating layer and a top semiconductor layer, wherein the insulating layer comprises at least a zone wherein a density of charges is in absolute value higher than 1010 charges/cm2. The invention also relates to processes for making such substrates.

Abstract: A photo detector and related fabricating method are disclosed. The photo detector includes a substrate, a first patterned semiconductor layer, a dielectric layer, a patterned conductive layer, an inter-layer dielectric, a second patterned semiconductor layer, two first electrodes disposed on the inter-layer dielectric and two second electrodes disposed on portions of the second semiconductor layer. The first patterned semiconductor layer having a first doping region and a second doping region is disposed on a transistor region. The dielectric layer is disposed to cover the substrate and the first semiconductor layer. The patterned conductive layer is disposed on the dielectric layer. The inter-layer dielectric having at least two openings adapted to expose the first doping region and the second doping region is disposed to cover the dielectric layer. The second patterned semiconductor layer is disposed on a photosensitive region.

Abstract: A stratified photodiode for high resolution CMOS image sensors implemented with STI technology is provided. The photodiode includes a semi-conductive layer of a first conductivity type, multiple doping regions of a second conductivity type, multiple doping regions of the first conductivity type, and a pinning layer. The multiple doping regions of the second conductivity type are formed to different depths in the semi-conductive layer. The multiple doping regions of the first conductivity type are disposed between the multiple doping regions of the second conductivity type and form multiple junction capacitances without full depletion. In particular, the stratified doping arrangement allows the photodiode to have a small size, high charge storage capacity, low dark current, and low operation voltages.

Abstract: An image sensor is described in which the imaging pixels have reduced noise by blocking nitridation in selected areas. In one example, a method includes forming a first and second gate oxide layer over a substrate, forming a layer of photoresist over the first gate oxide layer, applying nitridation to the photoresist and the second gate oxide layer such that the first gate oxide layer is protected from the nitridation by the photoresist, and forming a polysilicon gate over the first and second gate oxide layers.

Abstract: A solid-state image capturing device includes: a substrate; a substrate voltage source which applies a first potential to the substrate during a light reception period and applies a second potential to the substrate during a non-light reception period; and a plurality of pixels which each includes a light receiver which is formed on a front surface of the substrate and generates signal charges in accordance with received light, a storage capacitor which is formed adjacent to the light receiver and accumulates and stores signal charges generated by the light receiver, dark-current suppressors which are formed in the light receiver and the storage capacitor, an electronic shutter adjusting layer which is formed in an area facing the light receiver in the substrate and distant from the storage capacitor and which adjusts potential distribution, and a floating diffusion portion to which the signal charges accumulated in the storage capacitor are transmitted.

Abstract: An organic electroluminescent element includes an electron-transport layer composed of a heterocyclic compound, a negative electrode composed of a metal material, and a transition-metal-complex layer arranged between the electron-transport layer and the negative electrode.

Abstract: A method of manufacturing a crystalline silicon solar cell, subsequently including: providing a crystalline silicon substrate having a first side and a second side opposite the first side; pre-diffusing Phosphorus into a first side of the substrate to render a Phosphorus diffused layer having an initial depth; blocking the first side of the substrate; exposing a second side of the substrate to a Boron diffusion source; heating the substrate for a certain period of time and to a certain temperature so as to diffuse Boron into the second side of the substrate and to simultaneously diffuse the Phosphorus further into the substrate.

Abstract: Disclosed herein is a solid-state image pickup device, including a pixel, the pixel including: a light receiving section; a charge transfer path; a transfer electrode; a readout gate section; and a readout electrode.

Abstract: A method for manufacturing a semiconductor apparatus includes the first step of forming a silicon oxide film including a main portion on a second portion and a sub portion between a first portion and a silicon nitride film, the second step of forming a first conductivity type impurity region under the silicon oxide film, and the third step of forming a semiconductor element including a second conductivity type impurity region having an opposite conductivity to the first conductivity type impurity region in the first portion. In the second step, angled ion implantation is performed into a region under the sub portion at an implantation angle using the silicon nitride film as a mask.

Abstract: A method of manufacturing a backside illuminated image sensor includes providing a start material that has a layer of semiconductor material on a substrate. The layer of semiconductor material has a first face and a second, backside, face. The layer of semiconductor material is processed to form semiconductor devices in the layer adjacent the first face. At least a part of the substrate is removed to leave an exposed face. A passivation layer is formed on the exposed face, the passivation layer having negative fixed charges. The passivation layer can be Al2O3 (Sapphire). The passivation layer can have a thickness less than 5 ?m, advantageously less than 1 ?m, and more advantageously in the range 1 nm-150 nm. Another layer, or layers, can be provided on the passivation layer, including: an anti-reflective layer, a layer to improve passivation, a layer including a color filter pattern, a layer comprising a microlens.

Abstract: An image sensor includes a semiconductor layer that filters light of different wavelengths. For example, the semiconductor layer absorbs photons of shorter wavelengths and passes more photons of longer wavelengths such that the longer wavelength photons often pass through without being absorbed. An imaging pixel having a photodiode is formed near a front side of the semiconductor layer. A dopant layer is formed below the photodiode near a back side of the semiconductor layer. A mirror that primarily reflects photons of longer visible wavelengths is disposed on the back side of the semiconductor layer.

Abstract: There is provided a solid-state imaging element having a light receiving part generating charges by light irradiation, and a source/drain region of a transistor, both formed in a semiconductor layer. The solid-state imaging element includes a non-silicided region including the light receiving part, in which surfaces of the source/drain region and a gate electrode of the transistor are not silicided; and a silicided region in which the surfaces of the source/drain region and the gate electrode of the transistor are silicided. The non-silicided region has a sidewall formed on a side surface of the gate electrode of the transistor, a hydrogen supply film formed to cover the semiconductor layer, the gate electrode, and the sidewall, and a salicide block film formed on the hydrogen supply film to prevent silicidation. The silicided region has a sidewall formed on the side surface of the gate electrode of the transistor.

Abstract: Producing a solid-state imaging device by (1) forming a structure including (a) a substrate having a first impurity with a first concentration, (b) a first conductive type Si layer and (c) a first conductive type impurity layer stacked on one another in that order, the first conductive type Si layer being formed on the substrate, the first conductive type impurity layer being formed in a boundary region including a boundary of the substrate and the Si layer, and a part of the substrate facing the boundary and a part of the first conductive type Si layer facing the boundary having a second impurity; and (2) forming in the Si layer a second conductive type region capable of storing in the Si layer a charge generated by a photoelectric conversion; and forming an interconnection layer on the Si layer.

Abstract: A solid-state imaging device includes a photoelectric conversion unit, a transistor, and an element separation region separating the photoelectric conversion unit and the transistor. The photoelectric conversion unit and the transistor constitute a pixel. The element separation region is formed of a semiconductor region of a conductivity type opposite to that of a source region and a drain region of the transistor. A part of a gate electrode of the transistor protrudes toward the element separation region side beyond an active region of the transistor. An insulating film having a thickness substantially the same as that of a gate insulating film of the gate electrode of the transistor is formed on the element separation region continuing from a part thereof under the gate electrode of the transistor to a part thereof continuing from the part under the gate electrode of the transistor.

Abstract: A method of manufacturing an image sensor is provided. In this method, a photoelectric conversion unit may be formed within a semiconductor substrate, wherein the semiconductor substrate includes an active pixel region and an optical black region. An annealing layer may be formed on the active pixel region and the optical black region and etched so that the annealing layer covers at least a portion of the optical black region. A wiring pattern may be formed on the annealing layer. A light-blocking pattern may be formed on the wiring pattern so as to cover the entire photoelectric conversion unit of the optical black region, thereby blocking light from being incident upon the optical black region.

Abstract: Devices and methods for forming self-aligned charge storage regions are disclosed. In one embodiment, a method for manufacturing a semiconductor device comprises forming a layer of a nitride film stacked between two oxide films on a semiconductor substrate, and forming a gate electrode on the layer of the nitride film stacked between the two oxide films. In addition, the method comprises removing side portions of the nitride film such that a central portion of the nitride film below a center portion of the gate electrode remains, oxidizing the central portion of the nitride film, and forming charge storage layers in the side portions of the nitride film, where the charge storage layers are separated by the central portion of the nitride film.

Abstract: A display substrate includes a thin-film transistor (TFT) layer, a color filter layer and a pixel electrode formed on a substrate. The TFT layer includes a gate line, a data line electrically insulated from the gate line and extending in a direction different from the gate line, a TFT electrically connected to the gate line and the data line, and a storage electrode formed from the same layer as the gate line in each pixel. The color filter layer includes a storage hole extending to a portion of the TFT layer corresponding to the storage electrode. The storage hole has a horizontal cross-sectional area greater than the storage electrode, wherein the horizontal cross-sectional area is measured in a plane parallel to the substrate. The pixel electrode is formed on the color filter layer and in the storage hole to form a storage capacitor with the storage electrode.

Abstract: A two dimensional time delay integration CMOS image sensor having a plurality of pinned photodiodes, each pinned photodiode collects a charge when light strikes the pinned photodiode, a plurality of electrodes separating the plurality of pinned photodiodes, the plurality of electrodes are configured for two dimensional charge transport between two adjacent pinned photodiodes, and a plurality of readout nodes connected to the plurality of pinned photodiodes via address lines.

Abstract: Producing a solid-state imaging device by (1) forming a structure including (a) a substrate having a first impurity with a first concentration, (b) a first conductive type Si layer and (c) a first conductive type impurity layer stacked on one another in that order, the first conductive type Si layer being formed on the substrate, the first conductive type impurity layer being formed in a boundary region including a boundary of the substrate and the Si layer, and a part of the substrate facing the boundary and a part of the first conductive type Si layer facing the boundary having a second impurity; and (2) forming in the Si layer a second conductive type region capable of storing in the Si layer a charge generated by a photoelectric conversion; and forming an interconnection layer on the Si layer.

Abstract: Photovoltaic materials and methods of photovoltaic cell fabrication provide a photovoltaic cell in the form of a fiber. These fibers may be formed into a flexible fabric or textile.

Abstract: Disclosed herein is a solid-state image pickup element, including: a semiconductor layer in which a photodiode for carrying out photoelectric conversion is formed; a first film containing negative fixed charges and formed on the semiconductor layer in a region in which at least the photodiode is formed by utilizing either an atomic layer deposition method or a metal organic chemical vapor deposition method; a second film containing the negative fixed charges and formed on the first film containing therein the negative fixed charges by utilizing a physical vapor deposition method; and a third film containing the negative fixed charges and formed on the second film containing therein the negative fixed charges by utilizing either the atomic layer deposition method or the metal organic chemical vapor deposition method.

Abstract: An integrated circuit structure comprises a bottom dielectric layer on a substrate, a middle dielectric layer, and a top dielectric layer. The middle dielectric layer has a top surface and a bottom surface, and comprises a plurality of materials. Respective concentration profiles for at least two of the plurality of materials between the top and bottom surfaces are non-uniform and arranged to induce a variation in energy gap between the top and bottom surfaces. The variation in energy gap establishes an electric field between the top and bottom surfaces tending to oppose charge motion toward at least one of the top and bottom surfaces and prevent resultant charge leakage.

Abstract: A solid state imaging device having a light sensing section that performs photoelectric conversion of incident light includes: an insulating layer formed on a light receiving surface of the light sensing section; a layer having negative electric charges formed on the insulating layer; and a hole accumulation layer formed on the light receiving surface of the light sensing section.

Abstract: A deep implanted region of a first conductivity type located below a transistor array of a pixel sensor cell and adjacent a doped region of a second conductivity type of a photodiode of the pixel sensor cell is disclosed. The deep implanted region reduces surface leakage and dark current and increases the capacitance of the photodiode by acting as a reflective barrier to photo-generated charge in the doped region of the second conductivity type of the photodiode. The deep implanted region also provides improved charge transfer from the charge collection region of the photodiode to a floating diffusion region adjacent the gate of the transfer transistor.

Abstract: An image sensor includes an increase portion for impact-ionizing and increasing signal charges, a charge increasing electrode for applying a voltage increasing the signal charges to the increase portion and an insulating film provided between the charge increasing electrode and the increase portion, wherein the insulating film includes a first insulating film made of a thermal oxide film and a second insulating film made of an oxide film, formed on the first insulating film.

Abstract: Embodiments relate to a method of manufacturing a CMOS image sensor in which, when a buried photodiode is formed, a p-type impurity region may be formed simultaneously with a p-type LDD region in the photo diode region. Additionally, a p-type impurity region may be formed under side wall spacers, which may reduce leakage current of the photodiode.

Abstract: An image sensor is disclosed where individual photo diodes of the respective unit cells separated by an element isolating layer are physically integrated into a single large scale pixel formed widely on a semiconductor substrate so as to hold the pixels in common. A pixel separation pattern is additionally formed on a portion of the large scale photo diode formed so as to electrically separate them. An optimization of the light receiving area of the photo diode, a minimization of the intrusion area of an element isolating layer, and so on are achieved, so that the photo diode recovers an area occupied by an intrusion of the element isolating layer, thus maximizing the light receiving area in an optimal scale and easily preventing electrical impacts between the respective unit cells.

Abstract: A deep implanted region of a first conductivity type located below a transistor array of a pixel sensor cell and adjacent a doped region of a second conductivity type of a photodiode of the pixel sensor cell is disclosed. The deep implanted region reduces surface leakage and dark current and increases the capacitance of the photodiode by acting as a reflective barrier to photo-generated charge in the doped region of the second conductivity type of the photodiode. The deep implanted region also provides improved charge transfer from the charge collection region of the photodiode to a floating diffusion region adjacent the gate of the transfer transistor.

Abstract: A split gate memory cell has a select gate, a control gate, and a charge storage structure. The select gate includes a first portion located over the control gate and a second portion not located over the control gate. In one example, the first portion of the select gate has a sidewall aligned with a sidewall of the control gate and aligned with a sidewall of the charge storage structure. In one example, the control gate has a p-type conductivity. In one example, the gate can be programmed by a hot carrier injection operation and can be erased by a tunneling operation.

Abstract: A method for fabricating a semiconductor structure having selective dopant regions in a semiconductor substrate having trenches formed therein I disclosed. In one embodiment, by a dopant source of an auxiliary structure, parts of the semiconductor structure which lie within the trenches are doped by means of a drive-in. In one embodiment, the semiconductor structure is patterned in planar regions outside the trenches and selectively doped by an implantation process.

Abstract: The invention concerns a capacitive junction including a region adapted to be traversed by an electromagnetic wave, and a dielectric layer interposed between two semiconductor material layers. The dielectric layer has a reduced thickness at the region, that is a thickness at the region less than its thickness at a contact of the junction. Such a junction is for instance used to form a modulator. The invention also concerns a method for making such a junction.

Abstract: A solid-state image pickup device includes an element isolation insulating film electrically isolating pixels on the surface of a well region; a first isolation diffusion layer electrically isolating the pixels under the element isolation insulating film; and a second isolation diffusion layer electrically isolating the pixels under the first isolation diffusion layer, wherein a charge accumulation region is disposed in the well region surrounded by the first and second isolation diffusion layers, the inner peripheral part of the first isolation diffusion layer forms a projecting region, an impurity having a conductivity type of the first isolation diffusion layer and an impurity having a conductivity type of the charge accumulation region are mixed in the projecting region, and a part of the charge accumulation region between the charge accumulation region and the second isolation diffusion layer is abutted or close to the second isolation diffusion layer under the projecting region.

Abstract: An imager having a photodiode with a shallow doping profile with respect to the top surface of a substrate is disclosed. An imager with a graded pinned surface layer, self-aligned to a gate stack is provided. A photodiode with a shallow doping profile with respect to the top surface of a substrate and a graded pinned surface layer, self-aligned to a gate stack is provided. These photodiodes exhibit reduced image lag, transfer gate leakage, and photodiode dark current generation.

Abstract: An integrated circuit is provided that includes a substrate incorporating a semiconductor photodiode device having a p-n junction. The photodiode device includes at least one capacitive trench buried in the substrate and connected in parallel with the junction. In a preferred embodiment, the substrate is formed from silicon, and the capacitive trench includes an internal doped silicon region partially enveloped by an insulating wall that laterally separates the internal region from the substrate. Also provided is a method for fabricating an integrated circuit including a substrate that incorporates a semiconductor photodiode device having a p-n junction.

Abstract: A method for manufacturing a vertical Schottky diode with a guard ring on a lightly-doped N-type silicon carbide layer, including forming a P-type epitaxial layer on the N-type layer; implanting N-type dopants in areas of the P-type epitaxial layer to neutralize in these areas, across the entire thickness of the epitaxial layer, the P-type dopants to form N-type regions, of dopant concentration lower than that of the epitaxial layer, and delimiting a P-type guard ring; forming on the external periphery of the component an insulating layer partially covering the guard ring; and forming a Schottky contact with the N-type region internal to the guard ring.

Abstract: The semiconductor industry seeks to replace traditional volatile memory devices with improved non-volatile memory devices. The increased demand for a significantly advanced, efficient, and non-volatile data retention technique has driven the development of integrated magnetic memory structures. In one aspect, the present teachings relate to magnetic memory structure fabrication techniques in a high density configuration that includes an efficient means for programming high density magnetic memory structures.

Abstract: A liquid crystal display device includes an upper plate, a lower plate, and a liquid crystal. A sealant is formed along edges of the upper and lower plates to join the upper plate with the lower plate, and a protrusion separates the sealant from a picture displaying area at an inner portion of the upper and lower plates. The liquid crystal injected into the picture displaying area.

Abstract: The invention relates to an economical and precise method for the production and configuration of an organic field-effect transistor (OFET) whereby the solubility of at least one functional polymer of an OFET is utilized to such a degree, that the functional polymer is deposited on the OFET, or a substrate, by means of a conventional printing process as for a color.

Abstract: A plasma ashing apparatus for removing organic matter from a substrate including a low k dielectric, comprising a first gas source; a plasma generating component in fluid communication with the first gas source; a process chamber in fluid communication with the plasma generating component; an exhaust conduit in fluid communication with the process chamber; wherein the exhaust conduit comprises an inlet for a second gas source and an afterburner assembly coupled to the exhaust conduit, wherein the inlet is disposed intermediate to the process chamber and an afterburner assembly, and wherein the afterburner assembly comprises means for generating a plasma within the exhaust conduit with or without introduction of a gas from the second gas source; and an optical emission spectroscopy device coupled to the exhaust conduit comprising collection optics focused within a plasma discharge region of the afterburner assembly.

Abstract: High quality epitaxial layers of monocrystalline perovskite materials (18) can be grown overlying monocrystalline substrates (12) such as gallium arsenide wafers by forming a metal template layer (16) on the monocrystalline substrate. The structure includes a metal-containing layer (16) to mitigate unwanted oxidation of underlying layers and a low-temperature seed layer (19) that prevents degradation of an epitaxial layer (14) during growth of the perovskite layer (18).

Abstract: A CMOS imager having an epitaxial layer formed below pixel sensor cells is disclosed. An epitaxial layer is formed between a semiconductor substrate and a photosensitive region to improve the cross-talk between pixel cells. The thickness of the epitaxial layer is optimized so that the collection of signal carriers by the photosensitive region is maximized.

Abstract: A solar cell has an active structure including a paint voltage source having a first paint layer structure comprising p-type pigment particles dispersed in a first-layer binder, and a second paint layer structure comprising n-type pigment particles dispersed in a second-layer binder. The second paint layer structure is in electrical contact with the first paint layer structure. The active structure further includes an electrically conductive contact structure having a first electrically conductive contact to the first paint layer structure, and a second electrically conductive contact to the second paint layer structure. At least one of the first electrically conductive contact and the second electrically conductive contact permits light to pass therethrough to the paint voltage source. A capacitive paint layer may be included to store electrical charge produced by the active structure. The active structure may be affixed to a support.

Abstract: In a sensor having a membrane structure, a sensor chip (silicon substrate) is provided with a through hole that is open on both upper and lower surfaces of the silicon substrate. A sensor element having a membrane structure is formed on the upper surface of the silicon substrate to close the through hole on the upper surface. The lower surface of the silicon substrate is bonded to a stem through adhesive to define a communication passage through which an inside and an outside of the through hole communicate with each other. Accordingly, the sensor can exhibit high reliability.

Abstract: A electroless plating method re-metallizes aluminum bond pads so that the re-metallized bond pads include layers of aluminum, zinc, nickel, and gold. The re-metallized bond pads are wire-bondable and solder wettable, and therefore can be flip-chip bonded. Applications include the realization of hybrid smart pixel arrays for optical interconnections, where an optical transmitter and optical detector are flip-chip bonded directly to respective CMOS driver chips.

Abstract: A semiconductor device structure for storing charge has a silicon nitride layer, in which a plurality of nanoclusters are sandwiched between oxide layers. The nanoclusters and the silicon nitride make up a storage region, which is particularly useful in non-volatile memories. The nanoclusters provide a repository for holes or electrons that jump from trap to trap in the silicon nitride when the silicon nitride is heated. This results in much of the charge, which would normally leak off from the silicon nitride at high temperatures, remaining in the storage region due to trapping in the nanoclusters. The silicon nitride layer with nanoclusters therein is formed by depositing a silicon nitride layer, then nanoclusters, and then another silicon nitride layer or by depositing a silicon-rich silicon nitride layer and subsequent heating to cause it to transform to a regular silicon nitride layer with silicon nanoclusters therein.

Abstract: A microcavity apparatus and systems for maintaining microcavity spacing over a macroscopic area. An application of this invention is a microscale generator. This microscale generator includes a first element for receiving energy; a second element, opposite the first element for transferring energy; at least one panel on either of the first element or the second element, the panel facing the other element; a device for controlling the distance between the at least one panel and the facing element to form a predetermined, sub-micron gap between the panel and the facing element for increasing energy transfer to the element for receiving; and a device, responsive to the energy transfer, for generating electricity.

Abstract: A CMOS image sensor according to the present invention has a low-voltage photodiode which is fully depleted at a bias of 1.2-4.5V. The photodiode comprises: a P-epi layer; a field oxide layer dividing the P-epi layer into a field region and an active region; a N− region formed within the P-epi layer, wherein the first impurity region is apart from the isolation layer; and a P0 region of the conductive type formed beneath a surface of the P-epi layer and on the N− region, wherein a width of the P0 region is wider than that of the N− region so that a portion of the P0 region is formed on the P-epi layer, whereby the P0 region has the same potential as the P-epi layer.