Cleaning Of Reaction Chamber Patents (Class 438/905)
  • Patent number: 8236596
    Abstract: Multi-zone, solar cell diffusion furnaces having a plurality of radiant element (SiC) or/and high intensity IR lamp heated process zones, including baffle, ramp-up, firing, soaking and cooling zone(s). The transport of solar cell wafers, e.g., silicon, selenium, germanium or gallium-based solar cell wafers, through the furnace is implemented by use of an ultra low-mass, wafer transport system comprising laterally spaced shielded metal bands or chains carrying non-rotating alumina tubes suspended on wires between them. The wafers rest on raised circumferential standoffs spaced laterally along the alumina tubes, which reduces contamination. The bands or chains are driven synchronously at ultra-low tension by a pin drive roller or sprocket at either the inlet or outlet end of the furnace, with appropriate tensioning systems disposed in the return path. The high intensity IR flux rapidly photo-radiation conditions the wafers so that diffusion occurs >3× faster than conventional high-mass thermal furnaces.
    Type: Grant
    Filed: August 19, 2011
    Date of Patent: August 7, 2012
    Assignee: TP Solar, Inc.
    Inventors: Richard W. Parks, Luis Alejandro Rey Garcia, Peter M. Ragay
  • Patent number: 8236109
    Abstract: A method for cleaning a component in a substrate processing apparatus including a processing chamber, foreign materials being attached to the component, at least a part of the component being exposed inside the processing chamber, and the substrate processing apparatus being adapted to load and unload a foreign material adsorbing member into and from the processing chamber. The method includes loading the foreign material adsorbing member into the processing chamber; generating a plasma nearer the component than the foreign material adsorbing member; extinguishing the plasma; and unloading the foreign material adsorbing member from the processing chamber, wherein the generation and the extinguishment of the plasma are repeated alternately and the foreign material adsorbing member has a positive potential at least during the extinguishment of the plasma.
    Type: Grant
    Filed: December 16, 2009
    Date of Patent: August 7, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Tsuyoshi Moriya, Akitaka Shimizu
  • Patent number: 8232123
    Abstract: An organic light emitting device and a manufacturing method thereof, including a first signal line and a second signal line intersecting each other on an insulating substrate, a switching thin film transistor connected to the first signal line and the second signal line, a driving thin film transistor connected to the switching thin film transistor, and a light emitting diode (“LD”) connected to the driving thin film transistor. The driving thin film transistor includes a driving control electrode and a driving semiconductor overlapping the driving control electrode, crystallized silicon having a doped region and a non-doped region, a driving gate insulating layer disposed between the driving control electrode and the driving semiconductor, and a driving input electrode and a driving output electrode opposite to each other on the driving semiconductor, wherein the interface between the driving gate insulating layer and the driving semiconductor includes nitrogen gas.
    Type: Grant
    Filed: April 16, 2009
    Date of Patent: July 31, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyu-Sik Cho, Byoung-Seong Jeong, Joon-Hoo Choi, Jong-Moo Huh
  • Patent number: 8097088
    Abstract: Methods for processing substrates in dual chamber processing systems comprising first and second process chambers that share resources may include performing a first internal chamber clean in each of the first process chamber and the second process chamber; and subsequently processing a substrate in one of the first process chamber or the second process chamber by: providing a substrate to one of the first process chamber or the second process chamber; providing a process gas to the first process chamber and the second process chamber; forming a plasma in only the one of the first process chamber or the second process chamber having the substrate contained therein; and providing an inert gas to the first process chamber and the second process chamber via one or more channels formed in a surface of respective substrate supports disposed in the first process chamber and the second process chamber while processing the substrate.
    Type: Grant
    Filed: April 18, 2011
    Date of Patent: January 17, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Eu Jin Lim, Adauto Diaz, Jr., Benjamin Schwarz, James P. Cruse, Charles Hardy
  • Patent number: 8080109
    Abstract: A method for using a film formation apparatus for a semiconductor process includes setting an idling state where a reaction chamber of the film formation apparatus accommodates no product target substrate therein, and then, performing a purging process of removing a contaminant present in an inner surface of the reaction chamber by causing radicals to act on the inner surface of the reaction chamber. The radicals are generated by activating a purging process gas containing oxygen and hydrogen as elements.
    Type: Grant
    Filed: May 2, 2008
    Date of Patent: December 20, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Mitsuhiro Okada, Satoshi Takagi, Ryou Son, Masahiko Tomita, Yamato Tonegawa, Toshiharu Nishimura
  • Patent number: 8071483
    Abstract: In a manufacturing process of a semiconductor device by forming a structure film on a substrate in a reaction chamber of a manufacturing apparatus, cleaning inside the reaction chamber is performed. That is, a precoat film made of a silicon nitride film containing boron is deposited on an inner wall of the reaction chamber, a silicon nitride film not containing boron is formed as the structure film on the substrate in the reaction chamber, and the inner wall of the reaction chamber is dry etched to be cleaned. At this time, the dry etching is terminated after boron is detected in a gas exhausted from the reaction chamber.
    Type: Grant
    Filed: September 22, 2009
    Date of Patent: December 6, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenichiro Toratani, Takashi Nakao, Ichiro Mizushima
  • Patent number: 8057603
    Abstract: A method of cleaning a substrate processing chamber that enables formation of an oxide film on a surface of a processing chamber inside component to be prevented. A substrate processing chamber 11 has therein a processing space S into which a wafer W is transferred and carries out reactive ion etching on the wafer W in the processing space S. The substrate processing chamber 11 has an upper electrode plate 38 that comprises silicon and a lower surface of which is exposed to the processing space S. A dry cleaning is carried out on the upper electrode plate 38 using oxygen radicals produced from oxygen gas introduced into the processing space S. An oxide removal processing is carried out on the upper electrode plate 38 using fluorine ions and fluorine radicals produced from carbon tetrafluoride gas introduced into the processing space S.
    Type: Grant
    Filed: February 5, 2007
    Date of Patent: November 15, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Masanobu Honda, Yutaka Matsui
  • Patent number: 8053338
    Abstract: In a plasma CVD apparatus, unnecessary discharge such as arc discharge is prevented, the amount of particles due to peeling of films attached to a reaction chamber is reduced, and the percentage of a time contributing to production in hours of operation of the apparatus is increased while enlargement of the apparatus and easy workability are maintained. The plasma CVD apparatus is configured such that in a conductive reaction chamber 104 with a power source 113, a vacuum exhausting means 118, and a reaction gas introduction pipe 114, plasma 115 is generated in a space surrounded by an electrode 111, a substrate holder 112, and an insulator 120.
    Type: Grant
    Filed: April 2, 2009
    Date of Patent: November 8, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Mitsunori Sakama, Hisashi Abe, Hiroshi Uehara, Mika Ishiwata
  • Patent number: 8053274
    Abstract: According to an embodiment, the present invention provide a method for fabricating a copper indium diselenide semiconductor film using a self cleaning furnace. The method includes transferring a plurality of substrates into a furnace, the furnace comprising a processing region and at least one end cap region disengageably coupled to the processing region, each of the plurality of substrates provided in a vertical orientation with respect to a direction of gravity, the plurality of substrates being defined by a number N, where N is greater than 5, each of the substrates having a copper and indium composite structure.
    Type: Grant
    Filed: September 28, 2009
    Date of Patent: November 8, 2011
    Assignee: Stion Corporation
    Inventor: Robert D. Wieting
  • Patent number: 8048327
    Abstract: In a plasma processing apparatus for processing an object to be processed by generating plasma in a processing chamber: a first electrode is arranged in the processing chamber and a second electrode is arranged to face the first electrode in the processing chamber; a first and a second power systems include a first and a second power supplies for supplying a first and a second powers to the first and the second electrodes, respectively; and a control unit controls both or either one of the first and the second power systems so as to apply a preprocessing voltage to the second electrode for a time period before plasma processing is performed on the object.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: November 1, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Akira Koshiishi, Masatoshi Kitano
  • Patent number: 8039374
    Abstract: Techniques for low temperature ion implantation are provided to improve throughput. Specifically, the pressure of the backside gas may temporarily, continually or continuously increase before the starting of the implant process, such that the wafer may be quickly cooled down from room temperature to be essentially equal to the prescribed implant temperature. Further, after the vacuum venting process, the wafer may wait an extra time in the load lock chamber before the wafer is moved out the ion implanter, in order to allow the wafer temperature to reach a higher temperature quickly for minimizing water condensation on the wafer surface. Furthermore, to accurately monitor the wafer temperature during a period of changing wafer temperature, a non-contact type temperature measuring device may be used to monitor wafer temperature in a real time manner with minimized condensation.
    Type: Grant
    Filed: March 19, 2010
    Date of Patent: October 18, 2011
    Assignee: Advanced Ion Beam Technology, Inc.
    Inventors: John D. Pollock, Zhimin Wan, Erik Collart
  • Patent number: 8034183
    Abstract: In a RLSA microwave plasma processing apparatus that radiates microwave from a microwave generator into a chamber by using a planer antenna (Radial Line Slot Antenna) having many slots formed according to a certain pattern, the chamber contaminated with Na or the like is cleaned by using a cleaning gas containing H2 and O2.
    Type: Grant
    Filed: January 23, 2006
    Date of Patent: October 11, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Shingo Furui, Takashi Kobayashi, Junichi Kitagawa
  • Patent number: 8025739
    Abstract: In a dry cleaning process, breakage of a gas supply pipe can be prevented, and maintenance efficiency can be increased. There is provided a method of manufacturing a semiconductor device, comprising: (a) loading a substrate into a process chamber; (b) forming a silicon film or a silicon compound film on the substrate loaded in the process chamber by supplying a raw-material gas to a gas supply pipe disposed in the process chamber to introduce the raw-material gas into the process chamber; (c) unloading the substrate from the process chamber; (d) heating an inside of the process chamber after unloading the substrate to generate a crack in a thin film formed inside the process chamber; (e) decreasing an inside temperature of the process chamber after carrying out the step (d) with the substrate unloaded from the process chamber; and (f) introducing a cleaning gas into the process chamber by supplying the cleaning gas to the gas supply pipe after the step (e) with the substrate unloaded from the process chamber.
    Type: Grant
    Filed: October 1, 2009
    Date of Patent: September 27, 2011
    Assignee: Hitachi Kokusai Electric, Inc.
    Inventors: Kiyohisa Ishibashi, Yasuhiro Inokuchi, Atsushi Moriya, Yoshiaki Hashiba
  • Patent number: 8025736
    Abstract: Semiconductor device fabrication equipment performs a PEOX (physical enhanced oxidation) process, and includes a remote plasma generator for cleaning a process chamber of the equipment. After a PEOX process has been preformed, a purging gas is supplied into the process chamber to purge the process chamber, and the remote plasma generator produces plasma using a first cleaning gas. Accordingly, a reactor of the remote plasma generator is cleaned by the first cleaning gas plasma. Subsequently, the purging gas is supplied to purge the process chamber, and the remote plasma generator produces plasma using a second cleaning gas to remove the first cleaning gas plasma from the remote plasma generator and the process chamber. Finally, full flush operations are performed to remove any gases remaining in the process chamber.
    Type: Grant
    Filed: November 20, 2007
    Date of Patent: September 27, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyoung-Hwan Chin, Kyoung-In Kim, Hak-Su Jung, Kyoung-Min An
  • Patent number: 8021565
    Abstract: A surface treatment method includes: removing a fluorocarbon-containing reaction product from a surface of a workpiece by oxygen gas plasma processing. The workpiece includes a plurality of layers. The fluorocarbon-containing reaction product is deposited by successively etching the layers of the workpiece. The method further includes after removing the reaction product, removing an oxide-containing reaction product from the surface of the workpiece using hydrogen fluoride gas.
    Type: Grant
    Filed: March 24, 2008
    Date of Patent: September 20, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsuaki Aoki, Naoya Hayamizu, Kei Hattori, Yukihiro Oka, Hidemi Kanetaka, Makoto Hasegawa
  • Patent number: 8002947
    Abstract: A plasma treatment apparatus has a reaction vessel (11) provided with a top electrode (13) and a bottom electrode (14), and the first electrode is supplied with a VHF band high frequency power from a VHF band high frequency power source (32), while the bottom electrode on which a substrate (12) is loaded and is moved by a vertical movement mechanism. The plasma treatment system has a controller (36) which, at the time of a cleaning process after forming a film on the substrate (12), controls a vertical movement mechanism to move the bottom electrode to narrow the gap between the top electrode and bottom electrode and form a narrow space and starts cleaning by a predetermined high density plasma in that narrow space. In the cleaning process, step cleaning is performed. Due to this, the efficiency of utilization of the cleaning gas is increased, the amount of exhaust gas is cut, and the cleaning speed is raised. Further, the amount of the process gas used is cut and the process cost is reduced.
    Type: Grant
    Filed: November 3, 2008
    Date of Patent: August 23, 2011
    Assignees: Sanyo Electric Co., Ltd., Renesas Electronics Corporation, Ulvac, Inc., Hitachi Kokusai Electric, Inc., Tokyo Electron Limited, Kanto Denka Kogyo Co., Ltd., Canon Anelva Corproation, Panasonic Corporation
    Inventors: Yoichiro Numasawa, Yoshimi Watabe
  • Patent number: 7993705
    Abstract: A method for using a film formation apparatus includes performing film formation of a product film selected from the group consisting of a silicon nitride film and a silicon oxynitride film on a target substrate within a reaction chamber of the film formation apparatus; and unloading the target substrate from the reaction chamber. Thereafter, the method includes first heating an inner surface of the reaction chamber at a post process temperature while supplying a post process gas for nitridation into the reaction chamber, thereby performing nitridation of a by-product film deposited on the inner surface of the reaction chamber; then rapidly cooling the inner surface of the reaction chamber, thereby cracking the by-product film by a thermal stress; and then forcibly exhausting gas from inside the reaction chamber to carry the by-product film, thus peeled off from the inner surface.
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: August 9, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Nobutake Nodera, Kazuhide Hasebe, Kazuya Yamamoto
  • Patent number: 7993938
    Abstract: A method of forming a highly doped layer of AlGaN, is practiced by first removing contaminants from a MBE machine. Wafers are then outgassed in the machine at very low pressures. A nitride is then formed on the wafer and an AlN layer is grown. The highly doped GaAlN layer is then formed having electron densities beyond 1×1020 cm?3 at Al mole fractions up to 65% are obtained. These levels of doping application of n-type bulk, and n/p tunnel injection to short wavelength UV emitters. Some applications include light emitting diodes having wavelengths between approximately 254 and 290 nm for use in fluorescent light bulbs, hazardous materials detection, water purification and other decontamination environments. Lasers formed using the highly doped layers are useful in high-density storage applications or telecommunications applications. In yet a further embodiment, a transistor is formed utilizing the highly doped layer as a channel.
    Type: Grant
    Filed: January 27, 2009
    Date of Patent: August 9, 2011
    Assignee: Cornell Research Foundation, Inc.
    Inventors: William J. Schaff, Jeonghyun Hwang
  • Patent number: 7989365
    Abstract: Methods of seasoning a remote plasma system are described. The methods include the steps of flowing a silicon-containing precursor into a remote plasma region to deposit a silicon containing film on an interior surface of the remote plasma system. The methods reduce reactions with the seasoned walls during deposition processes, resulting in improved deposition rate, improved deposition uniformity and reduced defectivity during subsequent deposition.
    Type: Grant
    Filed: August 18, 2009
    Date of Patent: August 2, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Soonam Park, Soo Jeon, Toan Q. Tran, Jang-Gyoo Yang, Qiwei Liang, Dmitry Lubomirsky
  • Patent number: 7964516
    Abstract: A method for using a film formation apparatus includes, in order to inhibit metal contamination: performing a cleaning process using a cleaning gas on an inner wall of a process container and a surface of a holder with no productive target objects held thereon; and then, performing a coating process of forming a silicon nitride film by alternately supplying a silicon source gas and a nitriding gas to cover with the silicon nitride film the inner wall of the process container and the surface of the holder with no productive target objects held thereon.
    Type: Grant
    Filed: March 10, 2009
    Date of Patent: June 21, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Mitsuhiro Okada, Yamato Tonegawa
  • Patent number: 7955991
    Abstract: Disclosed is a producing method of a semiconductor device, comprising: loading a substrate into a reaction furnace; forming a film on the substrate in the reaction furnace; unloading the substrate from the reaction furnace after the film has been formed; and forcibly cooling an interior of the reaction furnace in a state where the substrate does not exist in the reaction furnace after the substrate has been unloaded.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: June 7, 2011
    Assignee: Hitachi Kokussai Electric Inc.
    Inventors: Kenichi Suzaki, Jie Wang
  • Patent number: 7931752
    Abstract: A method for cleaning a semiconductor equipment is provided. First, a first cleaning step is performed to the process chamber. The first cleaning step includes conducting a cleaning gas into the process chamber via a short processing gas injector for generating a plasma of the cleaning gas in the process chamber. Then, a cleaning step is performed to a long cleaning gas injector. The cleaning step performed to the long cleaning gas injector includes conducting the cleaning gas into the process chamber via the long processing gas injector. Then, a second cleaning step is performed to the process chamber. The second cleaning step includes conducting the plasma of the cleaning gas into the process chamber via the short processing gas injector.
    Type: Grant
    Filed: January 6, 2009
    Date of Patent: April 26, 2011
    Assignee: United Microelectronics Corp.
    Inventors: Chong-Tat Lee, Jui-Lin Tang, Chee-Thim Loh, Kok-Poh Chong
  • Patent number: 7928014
    Abstract: A method for manufacturing a semiconductor device includes: mounting a wafer having an exposed silicon nitride film, on an electrode received in a plasma chamber; dry-cleaning the chamber to remove reaction products accumulated on the wall and ceiling of the chamber, anisotropic-etching the silicon nitride film and an underlying silicon film for patterning; and removing the wafer from the chamber. The method repeats the treatment for a number of semiconductor wafers.
    Type: Grant
    Filed: June 19, 2007
    Date of Patent: April 19, 2011
    Assignee: Elpida Memory, Inc.
    Inventor: Satoshi Ogino
  • Patent number: 7857880
    Abstract: A semiconductor manufacturing process facility requiring use therein of air exhaust for its operation, such facility including clean room and gray room components, with the clean room having at least one semiconductor manufacturing tool therein, and wherein air exhaust is flowed through a region of the clean room. The facility includes an air exhaust treatment apparatus arranged to (i) receive air exhaust after flow thereof through said region of said clean room, (ii) produce a treated air exhaust, and (iii) recirculate the treated air exhaust to an ambient air environment in the facility, e.g., to the gray room of the facility.
    Type: Grant
    Filed: February 3, 2009
    Date of Patent: December 28, 2010
    Assignee: Advanced Technology Materials, Inc.
    Inventors: W. Karl Olander, Joseph D. Sweeney, Luping Wang
  • Patent number: 7842619
    Abstract: A plasma processing method includes etching an insulating film of a sample to be processed using plasma generated from etching gas, supplying a large flow of inert gas from above the sample while having the sample mounted on a sample mounting stage, supplying deposit removal gas to only an area near a side wall of a processing chamber, and controlling a plasma density distribution to thereby vary a plasma density at a center area of the processing chamber and a plasma density at an area near the side wall of the processing chamber so as to perform a deposited film removing process for removing the film deposited on the side wall of the processing chamber.
    Type: Grant
    Filed: September 2, 2008
    Date of Patent: November 30, 2010
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Masatoshi Miyake, Kenji Maeda, Kenetsu Yokogawa, Masaru Izawa
  • Patent number: 7833358
    Abstract: A semiconductor processing chamber is cleaned by introducing a cleaning gas into a processing chamber, striking a plasma in a remote plasma source that is in communication with the processing chamber, measuring the impedance of the plasma, vaporizing a ruthenium containing deposit on a surface of the processing chamber to form a ruthenium containing gas mixture, and flowing the gas mixture through an analyzer and into an exhaust collection assembly. The measurement of the impedance of the plasma in combination with the ruthenium concentration provides an accurate indication of chamber cleanliness.
    Type: Grant
    Filed: April 7, 2006
    Date of Patent: November 16, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Schubert S. Chu, Frederick C. Wu, Christophe Marcadal, Seshadri Ganguli, Dien-Yeh Wu, Kavita Shah, Paul Ma
  • Patent number: 7829475
    Abstract: The present invention relates to control of copper contamination to semiconductor substrates upon operation of a heat treatment apparatus which is a semiconductor manufacturing apparatus and which is constructed with quartz products having been contaminated with copper when machined. The quartz product is placed in a heating atmosphere on the stage where it is not still used for a heat treatment for semiconductor substrates. Baking gases including a hydrogen chloride gas and a gas for enhancing activity of the hydrogen chloride gas, for example, an oxygen gas, are then supplied to the quartz product. Consequently, the copper concentration in the region from the surface to the 30 ?m depth of the quartz product can be controlled below 20 ppb, preferably below 3 ppb. The baking process may be carried out before or after assembling the quartz product into the heat treatment apparatus.
    Type: Grant
    Filed: June 20, 2007
    Date of Patent: November 9, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Katsuhiko Anbai, Masayuki Oikawa, Tetsuya Shibata, Yuichi Tani
  • Patent number: 7824499
    Abstract: The present invention provides a method for in-situ cleaning of walls of a reaction chamber, e.g. reactive ion etching chamber, to remove contamination, e.g. copper comprising contamination from the walls. The method comprises converting the contamination, e.g. copper comprising contamination into a halide compound, e.g. copper halide compound and exposing the halide compound, e.g. copper halide compound to a photon comprising ambient, thereby initiating formation of volatile halide products, e.g. volatile copper halide products. The method furthermore comprises removing the volatile halide products, e.g. volatile copper halide products from the reaction chamber to avoid saturation of the volatile halide products, e.g. volatile copper halide products in the reaction chamber in order to avoid re-deposition of the volatile halide products, e.g. volatile copper halide products to the walls of the reaction chamber.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: November 2, 2010
    Assignees: IMEC, Katholieke Universiteit Leuven
    Inventor: Dries Dictus
  • Patent number: 7816272
    Abstract: A process of cleaning a semiconductor manufacturing system, and a method of manufacturing a semiconductor device. The cleaning process includes, for example, positioning a ceramic cover on the electrostatic chuck in tight contact with the chuck, and feeding a fluoride-based cleaning gas into a chamber. After the cleaning process, a process of forming a semiconductor film (deposition process) is performed. It is possible to prevent fluorine degasification from a substrate-supporting electrode (electrostatic chuck) during the deposition process. A semiconductor film can be formed without causing a temperature drop near the substrate. This prevents irregular film thickness, defective etching, film flaking, etc.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: October 19, 2010
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Hiroomi Tsutae
  • Patent number: 7790583
    Abstract: One embodiment of the present invention is a method for cleaning an electron beam treatment apparatus that includes: (a) generating an electron beam that energizes a cleaning gas in a chamber of the electron beam treatment apparatus; (b) monitoring an electron beam current; (c) adjusting a pressure of the cleaning gas to maintain the electron beam current at a substantially constant value; and (d) stopping when a predetermined condition has been reached.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: September 7, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Alexandros T. Demos, Khaled A. Elsheref, Josphine J. Chang, Hichem M'saad
  • Patent number: 7767584
    Abstract: A method for providing substantially similar chamber condition before each wafer process operation in a semiconductor process chamber is provided. The method allows for prevention of transport of particle and metal contamination from chamber surfaces to the processed wafer. The method initiates with depositing a silicon containing layer over an inner surface of an empty semiconductor process chamber. Then, a wafer is introduced into the semiconductor process chamber after depositing the silicon containing layer. Next, a process operation is performed on the wafer. The process operation deposits a residue on the silicon containing layer. Next, an in-situ cleaning process is initiated upon completion of the processing operation and removal of the wafer.
    Type: Grant
    Filed: March 9, 2007
    Date of Patent: August 3, 2010
    Assignee: Lam Research Corporation
    Inventors: Harmeet Singh, Saurabh J. Ullal, Shibu Gangadharan
  • Patent number: 7763320
    Abstract: The purpose of the invention is to provide a film formation apparatus capable of forming an EL layer with a high purity and a high density, and a cleaning method. The invention is a formation of an EL layer with a high density by heating a substrate 10 by a heating means for heating a substrate, decreasing the pressure of a film formation chamber with a pressure decreasing means (a vacuum pump such as a turbo-molecular pump, a dry pump, or a cryopump) connected to the film formation chamber to 5×10?3 Torr (0.665 Pa) or lower, preferably 1×10?3 Torr (0.133 Pa) or lower, and carrying out film formation by depositing organic compound materials from deposition sources. In the film formation chamber, cleaning of deposition masks is carried out by plasma.
    Type: Grant
    Filed: September 21, 2007
    Date of Patent: July 27, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masakazu Murakami
  • Patent number: 7754609
    Abstract: The cleaning of silicon carbide materials on a large-scale is described. Certain silicon carbide materials in the form of wafer-lift pins, wafer-rings and/or wafer-showerheads are cleaned by using a combination of two of more of the following steps, comprising: high temperature oxidation, scrubbing, ultrasonic assisted etching in an aqueous acid solution, ultrasonication in deionized water, immersion in an aqueous acid solution, and high temperature baking. The silicon carbide materials may either be sintered or formed by chemical vapor deposition.
    Type: Grant
    Filed: October 28, 2003
    Date of Patent: July 13, 2010
    Assignee: Applied Materials, Inc.
    Inventor: Samantha S. H. Tan
  • Patent number: 7744769
    Abstract: The invention relates to a gas for removing deposits by a gas-solid reaction. This gas includes a hypofluorite that is defined as being a compound having at least one OF group in the molecule. Various deposits can be removed by the gas, and the gas can easily be made unharmful on the global environment after the removal of the deposits, due to the use of a hypofluorite. The gas may be a cleaning gas for cleaning, for example, the inside of an apparatus for producing semiconductor devices. This cleaning gas comprises 1-100 volume % of the hypofluorite. Alternatively, the gas of the invention may be an etching gas for removing an unwanted portion of a film deposited on a substrate. The unwanted portion can be removed by this etching gas as precisely as originally designed, due to the use of a hypofluorite. The invention further relates to a method for removing a deposit by the gas.
    Type: Grant
    Filed: October 6, 2006
    Date of Patent: June 29, 2010
    Assignee: Central Glass Company, Limited
    Inventors: Isamu Mouri, Tetsuya Tamura, Mitsuya Ohashi
  • Patent number: 7737005
    Abstract: A cleaning process is performed on the surface of a nickel silicide film serving as an underlayer. Then, a Ti film is formed to have a film thickness of not less than 2 nm but less than 10 nm by CVD using a Ti compound gas. Then, the Ti film is nitrided. Then, a TiN film is formed on the Ti film thus nitrided, by CVD using a Ti compound gas and a gas containing N and H.
    Type: Grant
    Filed: April 8, 2005
    Date of Patent: June 15, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Kunihiro Tada, Kensaku Narushima, Satoshi Wakabayashi
  • Patent number: 7727780
    Abstract: A semiconductor manufacturing apparatus and substrate processing method includes a step of acquiring a measurement value based on a first detecting and a second detecting section and determining a first difference of measurement values between the first detecting section and the second detecting section, comparing between a previously stored second difference between measurement values concerning the first detecting section and the second detecting section, calculating a correction value for a pressure in a cooling-gas passage provided between a process chamber and a heating device depending upon the first difference when the first difference is different from the second difference, and correcting the pressure value based on the pressure correction value, and a step of processing the substrate by flowing a cooling gas through the cooling-gas passage while heating the process chamber, and placing the heating device and the cooling device under a control section depending upon a pressure value corrected.
    Type: Grant
    Filed: January 23, 2008
    Date of Patent: June 1, 2010
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Masashi Sugishita, Masaaki Ueno, Akira Hayashida
  • Patent number: 7727296
    Abstract: A collecting unit is disposed on an exhaust passage of a semiconductor processing apparatus to collect by-products contained in an exhaust gas. The collecting unit includes a trap body detachably disposed inside a casing and configured to collect a part of the by-products. The trap body includes fins arrayed in a flow direction of the exhaust gas and having a surface on which a part of the by-products is deposited and trapped. The collecting unit further includes a receiving mechanism disposed inside the casing and configured to receive a part of the by-products that peels off from the trap body or an inner surface of the casing to prevent this part from being deposited on a bottom of the casing. The receiving mechanism is configured to allow a part of the by-products held thereon to be in contact with a cleaning gas from above and from below.
    Type: Grant
    Filed: October 5, 2007
    Date of Patent: June 1, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Yukio Tojo, Naotaka Noro, Yoshiyuki Fujita, Yuji Ito
  • Patent number: 7723218
    Abstract: In a plasma CVD apparatus, unnecessary discharge such as arc discharge is prevented, the amount of particles due to peeling of films attached to a reaction chamber is reduced, and the percentage of a time contributing to production in hours of operation of the apparatus is increased while enlargement of the apparatus and easy workability are maintained. The plasma CVD apparatus is configured such that in a conductive reaction chamber 104 with a power source 113, a vacuum exhausting means 118, and a reaction gas introduction pipe 114, plasma 115 is generated in a space surrounded by an electrode 111, a substrate holder 112, and an insulator 120.
    Type: Grant
    Filed: April 11, 2005
    Date of Patent: May 25, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Mitsunori Sakama, Hisashi Abe, Hiroshi Uehara, Mika Ishiwata
  • Patent number: 7709398
    Abstract: The invention relates to a method and device for depositing at least one layer, particularly a semiconductor layer, onto at least one substrate, which is situated inside a process chamber of a reactor while being supported by a substrate holder. The layer is comprised of at least two material components provided in a fixed stoichiometric ratio, which are each introduced into the reactor in the form of a first and a second reaction gas, and a portion of the decomposition products form the layer, whereby the supply of the first reaction gas, which has a low thermal activation energy, determines the growth rate of the layer, and the second reaction gas, which has a high thermal activation energy, is supplied in excess and is preconditioned, in particular, by an independent supply of energy. The first reaction gas flows in a direction toward the substrate holder through a multitude of openings, which are distributed over a surface of a gas inlet element, said surface being located opposite the substrate holder.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: May 4, 2010
    Assignee: Aixtron AG
    Inventors: Gerhard Karl Strauch, Johannes Kaeppeler, Markus Reinhold, Bernd Schulte
  • Patent number: 7699935
    Abstract: A method and apparatus for cleaning a process chamber are provided. In one embodiment, a process chamber is provided that includes a remote plasma source and a process chamber having at least two processing regions. Each processing region includes a substrate support assembly disposed in the processing region, a gas distribution system configured to provide gas into the processing region above the substrate support assembly, and a gas passage configured to provide gas into the processing region below the substrate support assembly. A first gas conduit is configured to flow a cleaning agent from the remote plasma source through the gas distribution assembly in each processing region while a second gas conduit is configured to divert a portion of the cleaning agent from the first gas conduit to the gas passage of each processing region.
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: April 20, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Ramprakash Sankarakrishnan, Dale DuBois, Ganesh Balasubramanian, Karthik Janakiraman, Juan Carlos Rocha-Alvarez, Thomas Nowak, Visweswaren Sivaramakrishnan, Hichem M'Saad
  • Patent number: 7691277
    Abstract: The main surface of a quartz component is divided by an offset into a first region having a larger height around an inner perimeter and a second region adjacent to the outer perimeter of the first region. Repeated restoration of a damaged component by forming a bulge on the first region and machining the bulge to make a flat surface while maintaining the offset enables long term use of the component.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: April 6, 2010
    Assignee: Kawasaki Microelectronics, Inc.
    Inventors: Katsunori Suzuki, Kenji Nakamura
  • Patent number: 7682841
    Abstract: A method for manufacturing an integrated circuit having a magnetic tunnel junction device is disclosed. The method includes depositing a bottom pinning structure above the bottom conductive structure. A first ferromagnetic structure is deposited above the bottom pinning structure in a chamber. A tunnel barrier structure is deposited above the first ferromagnetic layer structure in the chamber, and a second ferromagnetic structure is deposited above the tunnel barrier structure of the magnetic tunnel junction device in another chamber.
    Type: Grant
    Filed: May 2, 2007
    Date of Patent: March 23, 2010
    Assignees: Qimonda AG, Altis Semiconductor, SNC.
    Inventors: Faiz Dahmani, Gill Yong Lee
  • Patent number: 7651955
    Abstract: Embodiments of the invention generally provide a method for depositing films or layers using a UV source during a photoexcitation process. The films are deposited on a substrate and usually contain a material, such as silicon (e.g., epitaxy, crystalline, microcrystalline, polysilicon, or amorphous), silicon oxide, silicon nitride, silicon oxynitride, or other silicon-containing materials. The photoexcitation process may expose the substrate and/or gases to an energy beam or flux prior to, during, or subsequent a deposition process. Therefore, the photoexcitation process may be used to pre-treat or post-treat the substrate or material, to deposit the silicon-containing material, and to enhance chamber cleaning processes.
    Type: Grant
    Filed: June 20, 2006
    Date of Patent: January 26, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Joseph M. Ranish, Kaushal K. Singh
  • Patent number: 7648576
    Abstract: After cleaning the front and back sides of a silicon wafer with a liquid SC-1 and liquid SC-2, the front and back sides of the silicon wafer are cleaned with an HF solution to be water-repellent surfaces. Following that, an epitaxial layer of silicon is formed on the front side. Consequently, there can be reduced stacking faults after formation of the epitaxial layer and occurrence of cloud on the back side. Alternatively, the front and back sides of a silicon wafer are cleaned with the liquid SC-1 and liquid SC-2, and then the back side of the silicon wafer is cleaned with an HF solution to be a water-repellent surface while the front side is cleaned with purified water to be a hydrophilic surf ace. Following that, an epitaxial layer of silicon is formed on the front side. Consequently, there can be reduced mounds on the front side and occurrence of cloud on the back side.
    Type: Grant
    Filed: December 10, 2004
    Date of Patent: January 19, 2010
    Assignee: SUMCO Corporation
    Inventors: Yasuo Fukuda, Makoto Takemura, Koichi Okuda
  • Patent number: 7615163
    Abstract: A method of using a film formation apparatus for a semiconductor process includes processing by a cleaning gas a by-product film deposited on an inner surface of a reaction chamber of the film formation apparatus. This step is arranged to supply the cleaning gas into the reaction chamber, and set an interior of the reaction chamber at a first temperature and a first pressure. The by-product film mainly contains a high-dielectric-constant material. The cleaning gas contains chlorine without containing fluorine. The first temperature and the first pressure are set to activate chlorine in the cleaning gas.
    Type: Grant
    Filed: December 21, 2005
    Date of Patent: November 10, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Akitake Tamura, Shigeru Nakajima, Tetsushi Ozaki
  • Patent number: 7588036
    Abstract: A process for removing unwanted deposition build-up from one or more interior surfaces of a substrate processing chamber. According to one embodiment the process comprises performing a substrate processing operation on the substrate within the substrate processing chamber and then transferring the substrate out of the substrate processing chamber; flowing a first etchant gas into a remote plasma source, forming reactive species from the etchant gas and transporting the reactive species into the substrate processing chamber to remove a first portion of the unwanted deposition build-up; and thereafter, flowing a second etchant gas into the substrate processing chamber and forming a plasma within the substrate processing chamber from the second gas in order to remove a second portion of the unwanted deposition build-up.
    Type: Grant
    Filed: July 1, 2002
    Date of Patent: September 15, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Zhenjiang Cui, Michael S. Cox, Canfeng Lai, Paddy Krishnaraj
  • Patent number: 7585686
    Abstract: A method of a single wafer wet/dry cleaning apparatus comprising: a transfer chamber having a wafer handler contained therein; a first single wafer wet cleaning chamber directly coupled to the transfer chamber; and a first single wafer ashing chamber directly coupled to the transfer chamber.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: September 8, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Steven Verhaverbeke, J Kelly Truman, Christopher T Lane, Sasson R Somekh
  • Patent number: 7581550
    Abstract: A method of cleaning a reaction chamber using a substrate having a metal catalyst thereon is disclosed. The method includes preparing a substrate having a catalyst layer to activate a cleaning gas. The substrate is introduced into the reaction chamber. Next, a cleaning gas is introduced into the reaction chamber. Contaminations in the reaction chamber are exhausted. The substrate having a metal catalyst layer is also disclosed.
    Type: Grant
    Filed: February 1, 2005
    Date of Patent: September 1, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seok-Jun Won, Weon-Hong Kim, Min-Woo Song
  • Patent number: 7579261
    Abstract: A multiplicity of silicon wafers polished at least on their front sides are provided and successively coated individually in an epitaxy reactor by a procedure whereby one of the wafers is placed on a susceptor in the epitaxy reactor, is pretreated under a hydrogen atmosphere at a first hydrogen flow rate, and with addition of an etching medium to the hydrogen atmosphere at a reduced hydrogen flow rate in a second step, is subsequently coated epitaxially on its polished front side, and removed from the reactor. An etching treatment of the susceptor follows a specific number of epitaxial coatings. Silicon wafers produced thereby have a global flatness value GBIR of 0.07-0.3 ?m relative to an edge exclusion of 2 mm.
    Type: Grant
    Filed: September 15, 2006
    Date of Patent: August 25, 2009
    Assignee: Siltronic AG
    Inventors: Reinhard Schauer, Norbert Werner
  • Patent number: 7576018
    Abstract: A method is provided to cause deformation of a substrate during processing of the substrate.
    Type: Grant
    Filed: March 12, 2007
    Date of Patent: August 18, 2009
    Assignee: Tokyo Electron Limited
    Inventor: Merritt Funk