Abstract: A process for fabricating an integrated semiconductor device with a low dielectric constant material and an integrated semiconductor device with the low dielectric constant material interposed between two conductors is disclosed. The low dielectric constant material has a dielectric constant of less than about 2.8. The low dielectric constant material is a porous glass material with an average pore size of less than about 10 nm. The low dielectric constant material is formed on a semiconductor substrate with circuit lines thereover by combining an uncured and unmodified glass resin with an amphiphilic block copolymer. The amphiphilic block copolymer is miscible in the uncured glass resin. The mixture is applied onto the semiconductor substrate and the glass resin is cured. The glass resin is further processed to decompose or otherwise remove residual block copolymer from the cured glass resin.

Abstract: A post-etch treatment for enhancing and stabilizing the photoluminescence (PL) from a porous silicon (PS) substrate is outlined. The method includes treating the PS substrate with an aqueous hydrochloric acid solution and then treating the PS substrate with an alcohol. Alternatively, the post-etch method of enhancing and stabilizing the PL from a PS substrate includes treating the PS substrate with an aqueous hydrochloric acid and alcohol solution. Further, the PL of the PS substrate can be enhanced by treating the PS substrate with dye. Furthermore, the PS substrate can be metallized to form a PS substrate with resistances ranging from 20 to 1000 ohms.

Abstract: In a method of manufacturing a semiconductor device, semiconductor circuit elements or wiring patterns are formed on a semiconductor substrate. then, a porous semiconductor oxide film is formed as an interlayer insulating film on the semiconductor substrate including the semiconductor circuit elements or wiring patterns by oxidizing semiconductor substance in a mixture gas containing an oxygen gas in a chamber.

Abstract: A technique for forming a film of crystalline material, preferably silicon. The technique creates a sandwich structure with a weakened region at a selected depth underneath the surface. The weakened region is a layer of porous silicon with high porosity. The high porosity enclosed layer is formed by (1) forming a porous silicon layer with low porosity on surface of the substrate, (2) epitaxial growth of a non-porous layer over the low-porous layer (3) increasing of porosity of the low-porous layer making the said layer hi-porous, (4) cleaving the semiconductor substrate at said high porous layer. The porosity of the buried low-porous layer is increased by hydrogenation techniques, for example, by processing in hydrogen plasma. The process is preferentially used to produce silicon-on-insulator wafers.

Abstract: The present invention relates to low dielectric materials essential for a semiconductor having high density and high performance of the next generation, particularly to a process for preparing a porous interlayer insulating film having low dielectric constant containing pores with a size of a few nanometers or less. The present invention provides a process for preparing a porous wiring interlayer insulating film having very low dielectric constant for a semiconductor device comprising the steps of a) preparing a mixed complex of pore-forming organic molecules and a matrix resin, b) coating the mixed complex on a substrate, and c) heating the mixed complex to remove the organic molecules therefrom, thereby forming pores inside the complex.

Abstract: A method of reducing the thickness of a silicon substrate made superficially porous in particular in certain areas on one side. A back of the silicon substrate facing a porous front is made porous over the entire area and the produced porous material is subsequently removed in such a way that the remaining thickness of the substrate, at least in the area where the porous material has been removed from the back, corresponds to a predetermined reduced thickness compared to the original thickness of the substrate. The proposed method is particularly suited for the manufacture of a thermally operating sensor on the basis of technology using porous silicon, of a temperature sensor, a mass flow sensor, an air quality sensor, or a gas sensor.

Abstract: The semiconductor component is fabricated on the basis of a semiconductor body with a first and a second surface. A multiplicity of pores are formed in the semiconductor body. The pores extend into the semiconductor body proceeding from the first surface and ending below the second surface. The electrical conductivity of the semiconductor body, that is of the component, is increased in the region of the pores. The corresponding semiconductor component has connection contacts on the first and second surfaces.

Abstract: An optical silicon-based detector with a porous filter layer that has a laterally modifiable filter effect, comprising a plurality of integrated photosensitive cells. The invention also relates to a method for the production of an optical detector by creating an insulating layer on the porous filter layer and by providing active filter surfaces.

Abstract: The separation method of a semiconductor layer according to the present invention comprises separating a semiconductor layer and a semiconductor substrate at a separation layer formed therebetween, wherein a face of the semiconductor layer at the side opposite to the separation layer and/or a face of the semiconductor substrate at the side opposite to the separation layer are held by utilizing an ice layer, whereby it is unnecessary to use an adhesive as holding means and at the same time it is possible to easily and uniformly separate them.

Abstract: A method for the manufacture, formation, and removal of porous layers in a semiconductor substrate having at least a surface acting as a cathode. The method comprises applying a solution comprising negative Fluorine (F−) ions between the surface of the semiconductor substrate and an anode. The method further comprises applying a predetermined current between the anode and the cathode. The method further comprises maintaining the predetermined current at substantially the same current value for a sufficient amount of time to obtain a low porosity layer at said surface. A high porosity layer positioned under the low porosity layer is also obtained by the method of the invention.

Abstract: A multiplicity of components form a photodiode array on a substrate. Each of the components consists of a transistor of the p-n-p type with the outermost p-doped layer being transformed into an optical filter by control of the anodic etching operation utilizing transistor characteristics of the respective transistor. The result can provide red, blue and green filters in a color camera.

Abstract: An epitaxial growth layer, an oxide film, and a passivation film are formed on a silicon substrate. Except for an opening formed on a part of the passivation film, the upper surface of the passivation film is covered with a metal protective film made of tungsten (W). With the silicon substrate immersed in a high-concentration hydrofluoric aqueous solution, anodization is performed with the silicon substrate as an anode and the metal protective film as a counter electrode.

Abstract: Provided is a memory device formed using quantum devices and a method for manufacturing the same. A memory device comprises a substrate; a source region and a drain region formed in the substrate so as to be separated from each other by a predetermined interval; a memory cell which is formed on the surface of the substrate to connect the source region and the drain region, and has a plurality of nano-sized quantum dots filled with material for storing electrons; and a control gate which is formed on the memory cell and controls the number of electrons stored in the memory cell. It is possible to embody a highly efficient and highly integrated memory device by providing a memory device having nano-sized quantum dots and a method for manufacturing the same.

Abstract: A method for fabricating a strained Si based layer, devices manufactured in this layer, and electronic systems comprising such layers and devices are disclosed. The method comprises the steps of growing epitaxially a SiGe layer on a substrate, and creating a varying Ge concentration in this SiGe layer. The Ge concentration in the SiGe layer includes a unique Ge overshoot zone, where the Ge concentration is abruptly and significantly increased. The Si based layer is epitaxially deposited onto the SiGe layer, whereby is becomes tensilely strained. It is also disclosed that the strained Si based layer, typically Si or SiGe, can be transferred to a different bulk substrate, or to an insulator.

Abstract: To cause a crack at a fixed position in a separation layer, a method of separating a composite member includes the steps of forming a separation layer inside a composite member, forming inside the separation layer a stress riser layer in which an in-plane stress has concentratedly been produced to an extent that does not cause separation by the in-plane stress, and enlarging the in-plane stress to cause a crack in the stress riser layer, thereby separating the composite member.

Abstract: Methods of fabricating highly conductive regions in semiconductor substrates for radio frequency applications are used to fabricate two structures: (1) a first structure includes porous Si (silicon) regions extending throughout the thickness of an Si substrate that allows for the subsequent formation of metallized posts and metallized moats in the porous regions; and (2) a second structure includes staggered deep V-grooves or trenches etched into an Si substrate, or some other semiconductor substrate, from the front and/or the back of the substrate, wherein these V-grooves and trenches are filled or coated with metal to form the metallized moats.

Abstract: Porous dielectric materials having low dielectric constants useful in electronic component manufacture are disclosed along with methods of preparing the porous dielectric materials. Also disclosed are methods of forming integrated circuits containing such porous dielectric materials.

Abstract: A process for producing an adhered SOI substrate without causing cracking and peeling of a single-crystal silicon thin film. The process consists of selectively forming a porous silicon layer in a single-crystal semiconductor substrate, adding hydrogen into the single-crystal semiconductor substrate to form a hydrogen-added layer, adhering the single-crystal semiconductor substrate to a supporting substrate, separating the single-crystal semiconductor substrate at the hydrogen-added layer by thermal annealing, performing thermal annealing again to stabilize the adhering interface, and selectively removing the porous silicon layer to give single-crystal silicon layer divided into islands.

Abstract: A post-etch treatment for enhancing and stabilizing the photoluminescence (PL) from a porous silicon (PS) substrate is outlined. The method includes treating the PS substrate with an aqueous hydrochloric acid solution and then treating the PS substrate with an alcohol. Alternatively, the post-etch method of enhancing and stabilizing the PL from a PS substrate includes treating the PS substrate with an aqueous hydrochloric acid and alcohol solution. Further, the PL of the PS substrate can be enhanced by treating the PS substrate with a dye. Furthermore, the PS substrate can be metallized to form a PS substrate with resistances ranging from 20 to 1000 ohms.

Abstract: In one aspect, the invention encompasses a method of forming an insulating material around a conductive component. A first material is chemical vapor deposited over and around a conductive component. Cavities are formed within the first material. After the cavities are formed, at least some of the first material is transformed into an insulative second material. In another aspect, the invention encompasses a method of forming an insulating material. Polysilicon is deposited proximate a substrate. A porosity of the polysilicon is increased. After the porosity is increased, at least some of the polysilicon is transformed into silicon dioxide.

Abstract: Before a semiconductor substrate and a base substrate is directly bonded to one another, in a protective film removing step, a contamination protective film formed on the semiconductor substrate to protect it from contamination during an ion implanting step is removed. Consequently, even when flatness of the contamination protective film is degraded during the ion implanting step or even when contaminants remain in a segregated state in the vicinity of the surface of the contamination protective film, the state of the bonding between the semiconductor substrate and the base substrate after the bonding step can be made uniform over the entire area of the bonding. As a result, a high-quality semiconductor substrate can be manufactured at low cost.

Abstract: A method for forming an interlayer insulating film is disclosed. This method comprises the steps of: forming an underlying insulating film on an object to be formed; and forming a porous SiO2 film on said underlying insulating film by a Chemical Vapor Deposition that employs a source gas containing TEOS (tetraethoxy silane) and O3 where the O3 is contained in the source gas with first concentration that is lower than concentration necessary for oxidizing the TEOS. Alternative method for forming an interlayer insulating film is also disclosed. This method comprises the step of: forming an underlying insulating film on an object to be formed; performing Cl (chlorine) plasma treatment for the underlying insulating film; and forming a porous SiO2 film on the underlying insulating film by a Chemical Vapor Deposition that employs a source gas containing TEOS (tetraethoxy silane) and O3.

Abstract: A nanoporous dielectric film useful for the production of semiconductor devices, integrated circuits and the like, is provided, together with processes for producing these improved films. The films are produced by a process that includes (a) preparing a silicon-based, precursor composition including a porogen, (b) coating a substrate with the silicon-based precursor to form a film, (c) aging or condensing the film in the presence of water, (d) heating the gelled film at a temperature and for a duration effective to remove substantially all of said porogen, and wherein the applied precursor composition is substantially aged or condensed in the presence of water in liquid or vapor form, without the application of external heat or exposure to external catalyst.

Abstract: A method for manufacturing an integrated circuit structure is disclosed. The method includes providing a layer of porous silicon, and epitaxially growing a high resistivity layer on the layer of porous silicon. Devices are then formed on the high resistivity layer to produce the integrated circuit structure. The integrated circuit structure is attached to a silica substrate, such that the silica substrate is coupled to the devices. Further, surface contacts are provided on the structure. The layer of porous silicon is then removed.

Abstract: A single electron transistor using porous silicon, which is fabricated by applying porous silicon having a size of several tens of nanometers obtained by electrochemically etching silicon, and a fabrication method thereof, are provided. In the single electron transistor using porous silicon, silicon pores, each of which has a diameter of 5 nm or less, are fabricated by electrochemically etching a silicon on insulator (SOI) substrate having silicon dioxide (SiO2) in its lower portion using an HF-based solution, and serve as islands of a single electron transistor. Also, a source and a drain are formed of silicon on which metal is deposited or silicon doped with impurities. Hence, formation of islands and tunnel barriers is easy, mass production is possible, and the sizes of islands can be controlled by oxidation, so that single electron transistors capable of operating at room temperature can be easily fabricated.

Abstract: A porous, low-k dielectric film that has good mechanical properties as well as a method of fabricating the film and the use of the film as a dielectric layer between metal wiring features are provided. The porous, low-k dielectric film includes a first phase of monodispersed pores having a diameter of from about 1 to about 10 nm that are substantially uniformly spaced apart and are essentially located on sites of a three-dimensional periodic lattice; and a second phase which is solid surrounding the first phase. Specifically, the second phase of the film includes (i) an ordered element that is composed of nanoparticles having a diameter of from about 1 to about 10 nm that are substantially uniformly spaced apart and are essentially arranged on sites of a three-dimensional periodic lattice, and (ii) a disordered element comprised of a dielectric material having a dielectric constant of about 2.8 or less.

Abstract: An optoelectronic material, device applications, and methods for manufacturing the optoelectronic material are provided to make it possible to obtain stable characteristics without deterioration of luminescence over time in the atmosphere. The optoelectronic material is composed of a porous silicon the surface of which is nitrided to form a silicon nitride layer thereon. This allows a stable electroluminescence to be obtained, without oxidation of the surface of the porous silicon.

Abstract: A water solution of lead nitrate is infiltrated into a substrate made of a porous material, and liquid drops of a water solution of sodium sulfide, which is charged into a ink cartridge of a minute nozzle, are sprayed onto the substrate from the minute nozzle. The lead component from the lead nitrate water solution and the sulfur component from the sodium sulfide water solution are synthesized directly on the substrate, and thus, a thin film made of lead sulfide is formed on the substrate.

Abstract: A semiconductor device having a silicon-on-insulator (SOI) structure includes a lower silicon substrate and an upper silicon pattern electrically insulated from the lower silicon pattern by an isolating insulation layer buried by a reverse T-type hole formed in the lower silicon substrate. A gate insulation layer and a gate electrode are formed over the upper silicon pattern, and source/drain regions are formed in the upper silicon pattern centered around the gate electrode. Also, a channel region is disposed between the source/drain region. A silicon layer or a porous silicon layer is formed under the channel region for electrically connecting the lower silicon substrate and the upper silicon pattern. A body contact, which is the same as that of a general semiconductor device, is thus allowed without a special change in the design of the semiconductor device.

Abstract: A low-k dielectric layer (104) is treated with a dry-wet (D-W) or dry-wet-dry (D-W-D) process to improve patterning Resist poisoning occurs due to an interaction between low-k films (104), such as OSG, and DUV resist (130). The D-W or D-W-D treatment is performed to either pretreat a low-k dielectric (104) before forming the pattern (130) or during a rework of the pattern (130).

Abstract: A method and apparatus for producing buried ground planes in a silicon substrate for use in system modules is disclosed. Conductor patterns are printed on the surface of the silicon substrate. Pores are created in the printed conductor patterns by a chemical anodization process. The pores are then filled with a conductive metal, such as tungsten, molybdenum, or copper by a selective deposition process to produce a low impedance ground buried in the substrate.

Abstract: An object of this invention is to provide a substrate processing method capable of satisfactorily performing in etching in the step of removing a porous silicon layer by etching.

Abstract: The present invention provides a method of manufacturing a semiconductor device, particularly a solar cell, which is capable of forming a desired electrode pattern by a simple process at low cost. In the method, p-type semiconductor layers are formed on a silicon substrate, and a n-type semiconductor layer is formed on the p-type semiconductor layers, and partially removed in a predetermined pattern by laser abrasion to expose the p-type semiconductor layers, thereby forming an electrode pattern.

Abstract: A method for improving the moisture absorption of porous low dielectric film in an interconnect structure is disclosed. The porous low-k dielectric layer such as porous hydrosilsesquioxane (porous HSQ) or porous methyl silsesquioxane (porous MSQ) is spun-on the etching stop layer. After plasma process, the porous low dielectric film has a plurality of dangling bonds. Then, the wafer is placed in the supplementary instrument with hydrophobic reactive solution. Next, the hydrophobic protection film is formed on surface and sidewall of porous low-k dielectric film to improve the moisture absorption of porous low-k dielectric film and the leakage current is reduced in subsequently processes.

Abstract: A method for treating a film of material, which can be defined on a substrate, e.g., silicon. The method includes providing a substrate comprising a cleaved surface, which had a porous silicon layer thereon. The substrate may have a distribution of hydrogen bearing particles defined from the cleaved surface to a region underlying said cleaved surface. The method also includes increasing a temperature of the cleaved surface to greater than about 1,000 Degrees Celsius while maintaining the cleaved surface in a etchant bearing environment to reduce a surface roughness value by about fifty percent and greater. Preferably, the value can be reduced by about eighty or ninety percent and greater, depending upon the embodiment.

Abstract: A first p-type silicon layer (3) is formed as a buried layer in a p-type single crystal silicon substrate (2), and an n-type silicon layer (4) is formed on the upper side of the silicon substrate (2). A second p-type silicon layer (5) for forming an opening is defined in the n-type silicon layer (4), and a metal protecting film (14) is formed on the upper side of the n-type silicon layer (4). An electrode layer (18) is formed on the rear side of the silicon substrate (2) via an oxide film (17). The electrode layer (18) and the silicon substrate (2) are electrically connected to each other via a connecting opening (17a) at portions aligned with the first p-type silicon layer (3). After a positive terminal and a negative terminal of a DC power source (V) are connected to the electrode layer (18) and to a counter electrode (11) respectively, a voltage is applied between the electrode layer (18) and the counter electrode (11) to carry out anodization.

Abstract: A semiconductor device comprises a silicon region (1) of the first conductivity type, a porous silicon layer (2) formed inside the silicon region (1) as a buried layer and a source region (3a) and a drain region (4a) of the second conductivity type different from the first conductivity type selectively formed in an upper surface of the silicon region (1). Bottom surfaces of the source region (3a) and the drain region (4a) are located adjacently above an upper surface of the porous silicon layer (2). As a result, depletion layers (8) in pn junctions between the silicon region (1) and the bottom surfaces of the source region (3a) and the drain region (4a) reach the inside of the porous silicon layer (2). With this structure, a semiconductor device which achieves a faster operation and lower power consumption while ensuring stability in operation of a MOSFET and a method of manufacturing the same are provided.

Abstract: The invention encompasses methods of forming insulating materials proximate conductive elements. In one aspect, the invention includes a method of forming an insulating material proximate a substrate comprising: a) chemical vapor depositing a first material proximate a substrate; b) forming cavities within the first material; and c) after forming cavities within the first material, transforming at least some of the first material into an insulative second material. In another aspect, the invention includes a method of forming an insulating material proximate a substrate comprising: a) forming porous polysilicon proximate a substrate; and b) transforming at least some of the porous polysilicon into porous silicon dioxide.

Abstract: The invention is a method of fabricating electrically passive components or optical elements on top or underneath of an integrated circuit by using a porous substrate that is locally filled with electrically conducting, light emitting, insulating or optically diffracting materials. The invention is directed to a method of fabricating electrically passive components like inductors, capacitors, interconnects and resistors or optical elements like light emitters, waveguides, optical switches of filters on top or underneath of an integrated circuit by using porous material layer that is locally filled with electrically conducting, light emitting, insulating or optically diffracting materials. In the illustrated embodiment the fabrication of voluminous, solenoid-type inductive elements in a porous insulating material by standard back- and front-side-lithography and contacting these two layers by electroplating micro-vias through the pores is described.

Abstract: A method for fabricating an insulator on a semiconductor substrate such that the insulator has a low dielectric constant. A first interconnect and a second interconnect are configured on a semiconductor substrate. A conductive silicon is formed between the first interconnect and the second interconnect. The conductive silicon is anodically etched in a hydrofluoric-acid-containing electrolyte to convert the conductive silicon into porous silicon. The porous silicon is subsequently oxidized to form porous silicon oxide. With a dielectric constant of between 1.1 and 4, the porous silicon oxide has a lower dielectric constant than customary silicon oxide with 4.

Abstract: Techniques of shallow trench isolation and devices produced therefrom. The techniques of shallow trench isolation utilize foamed polymers, cured aerogels or air gaps as the insulation medium. Such techniques facilitate lower dielectric constants than the standard silicon dioxide due to the cells of gaseous components inherent in foamed polymers, cured aerogels or air gaps. Lower dielectric constants reduce capacitive coupling concerns and thus permit higher device density in an integrated circuit device.

Abstract: A process for producing an adhered SOI substrate without causing cracking and peeling of a single-crystal silicon thin film. The process consists of selectively forming a porous silicon layer in a single-crystal semiconductor substrate, adding hydrogen into the single-crystal semiconductor substrate to form a hydrogen-added layer, adhering the single-crystal semiconductor substrate to a supporting substrate, separating the single-crystal semiconductor substrate at the hydrogen-added layer by thermal annealing, performing thermal annealing again to stabilize the adhering interface, and selectively removing the porous silicon layer to give single-crystal silicon layer divided into islands.

Abstract: A post-etch treatment for enhancing and stabilizing the photoluminescence (PL) from a porous silicon (PS) substrate is outlined. The method includes treating the PS substrate with an aqueous hydrochloric acid solution and then treating the PS substrate with an alcohol. Alternatively, the post-etch method of enhancing and stabilizing the PL from a PS substrate includes treating the PS substrate with an aqueous hydrochloric acid and alcohol solution. Further, the PL of the PS substrate can be enhanced by treating the PS substrate with a dye. Furthermore, the PS substrate can be metallized to form a PS substrate with resistances ranging from 20 to 1000 ohms.

Abstract: A semiconductor device comprises a silicon region (1) of the first conductivity type, a porous silicon layer (2) formed inside the silicon region (1) as a buried layer and a source region (3a) and a drain region (4a) of the second conductivity type different from the first conductivity type selectively formed in an upper surface of the silicon region (1). Bottom surfaces of the source region (3a) and the drain region (4a) are located adjacently above an upper surface of the porous silicon layer (2). As a result, depletion layers (8) in pn junctions between the silicon region (1) and the bottom surfaces of the source region (3a) and the drain region (4a) reach the inside of the porous silicon layer (2). With this structure, a semiconductor device which achieves a faster operation and lower power consumption while ensuring stability in operation of a MOSFET and a method of manufacturing the same are provided.

Abstract: Certain embodiments of the present invention relate to a semiconductor device that has a pad section having an excellent coherency with an interlayer dielectric layer, and a method for manufacturing the same. A semiconductor device 1000 has a pad layer 30A formed over an interlayer dielectric layer 20. The interlayer dielectric layer 20 includes at least a first silicon oxide layer 20b that is formed by a polycondensation reaction of a silicon compound and hydrogen peroxide, and a second silicon oxide layer 20c formed over the first silicon oxide layer and containing an impurity. The pad section 30A includes a wetting layer 32, an alloy layer 34 and a metal wiring layer 37.

Abstract: An improved dielectric material having pores formed therein and a method for forming the material are disclosed. The material is formed of a polymer. Pores within the polymer are formed by forming solid organic particles within the polymer and eventually vaporizing the particles to form pores within the polymer.

Abstract: A process for producing an adhered SOI substrate without causing cracking and peeling of a single-crystal silicon thin film. The process consists of selectively forming a porous silicon layer in a single-crystal semiconductor substrate, adding hydrogen into the single-crystal semiconductor substrate to form a hydrogen-added layer, adhering the single-crystal semiconductor substrate to a supporting substrate, separating the single-crystal semiconductor substrate at the hydrogen-added layer by thermal annealing, performing thermal annealing again to stabilize the adhering interface, and selectively removing the porous silicon layer to give single-crystal silicon layer divided into islands.

Abstract: A porous silicon dioxide insulator having a low relative dielectric constant of about 2.0 or less is formed from a silicon carbide base layer. Initially, at least one layer of silicon carbide is deposited on a semiconductor substrate. The silicon carbide layer is then etched to form a porous silicon carbide layer, which is oxidized to produce the final porous silicon dioxide layer.

Abstract: In one aspect, the invention encompasses a method of forming an insulating material around a conductive component. A first material is chemical vapor deposited over and around a conductive component. Cavities are formed within the first material. After the cavities are formed, at least some of the first material is transformed into an insulative second material. In another aspect, the invention encompasses a method of forming an insulating material. Polysilicon is deposited proximate a substrate. A porosity of the polysilicon is increased. After the porosity is increased, at least some of the polysilicon is transformed into silicon dioxide.

Abstract: A semiconductor substrate, a thin film semiconductor device, a manufacturing method thereof and an anodizing apparatus which can reduce the manufacturing cost and save the resources are provided. According to this invention, a semiconductor thin film is formed through a separation layer of a porous semiconductor on a substrate body of sapphire; the semiconductor thin film is separated from the porosity layer and used for a thin film semiconductor device; and the substrate body from which the semiconductor thin film is separated is used again after the separation layer attached thereto is removed by etching. Since sapphire has high strength, high rigidity, high resistance to wearing, high heat resistance, high abrasion resistance and high chemicals resistance, no deterioration and no damage occur even when the substrate body is repetitively used. Thus, the recycle frequency can be increased, and the reduction of the manufacturing cost and the saving of the resources can be promoted.