Electrode Shaping Patents (Class 445/49)
  • Patent number: 6921311
    Abstract: A method of constructing a flexible panel display using gold as a conductive element and a matrix of carbon fibers as emitters is presented. The invention provides a novel defined pixel width of three emitter fibers per cell wherein each cell is positioned within three emulsion layers of suspended nano-crystals stack positioned vertically atop one-another. Each of these respective layers is excited by a single carbon fiber. In the preferred embodiment, fiber length ends from each cell are positioned at the mid-point of each respective polymer layer thickness and produce one of red, green, or blue colors required to complete the image formation.
    Type: Grant
    Filed: June 18, 2004
    Date of Patent: July 26, 2005
    Inventor: Alan D. Ellis
  • Patent number: 6914372
    Abstract: Disclosed are an electron-emitting element having a large operating current at a low operating voltage and excellent operation stability, and an electron source, an image display device and the like utilizing such an electron-emitting element, and further a method of fabricating such an element with few process steps at low cost. A cold cathode member is configured utilizing hybrid particle of a first particle serving to emit electrons into the space and a second particle being in the vicinity of the first particle and serving to control the position of the first particle. In this configuration, it is preferable that the first particle have a higher electron emission efficiency than the second particle and that the second particle be conductive.
    Type: Grant
    Filed: October 12, 2000
    Date of Patent: July 5, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koji Akiyama, Tetsuya Shiratori, Hideo Kurokawa, Toru Kawase
  • Patent number: 6902458
    Abstract: An emitter has an electron supply layer and a silicon-based dielectric layer formed on the electron supply layer. The silicon-based dielectric layer is preferably less than about 500 Angstroms. Optionally, an insulator layer is formed on the electron supply layer and has openings defined within which the silicon-based dielectric layer is formed. A cathode layer is formed on the silicon-based dielectric layer to provide a surface for energy emissions of electrons and/or photons. Preferably, the emitter is subjected to an annealing process thereby increasing the supply of electrons tunneled from the electron supply layer to the cathode layer.
    Type: Grant
    Filed: January 12, 2004
    Date of Patent: June 7, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Zhizhang Chen, Michael David Bic, Ronald L. Enck, Michael J. Regan, Thomas Novet, Paul J. Benning
  • Patent number: 6864485
    Abstract: In accordance with one specific embodiment of the present invention, the ion optics for use with an ion source have a plurality of electrically conductive grids that are mutually spaced apart and have mutually aligned respective pluralities of apertures through which ions may be accelerated and wherein each grid has an integral peripheral portion. A plurality of moment means are applied to a circumferentially distributed plurality of locations on the peripheral portion of each grid, which is initially flat, thereby establishing an annular segment of a cone as the approximate shape for that peripheral portion and a segment of a sphere as the approximate dished shape for the grid as a whole. The plurality of grids have conformal shapes in that the direction of deformation and the approximate spherical radii are the same.
    Type: Grant
    Filed: December 4, 2001
    Date of Patent: March 8, 2005
    Assignee: Kaufman & Robinson, Inc.
    Inventors: James R. Kahn, Rhonda J. Parker, Harold R. Kaufman, Cheryl A. Phillips
  • Patent number: 6840835
    Abstract: A masking layer (405) is provided on selected areas of an electrode structure that is at least partly performed, to define masked areas and unmasked areas (emitter cells 410). A first constituent with particles (408) and a second constituent (409) are then applied to the emitter cells (410), and the particles (408) are selectively directed towards the bottoms of the emitter cells (410)—e.g. by electrophoresis. The masking layer (405) is then removed from the masked areas, together with any stray quantities of the first and second constituents (408, 409) on the masking layer (405). The first and second constituents (408, 409) are then processed (e.g. by curing) to create broad area field electron emission sites in desired locations of the electrode structure.
    Type: Grant
    Filed: August 21, 2000
    Date of Patent: January 11, 2005
    Assignee: Printable Field Emitters Limited
    Inventor: Richard Allan Tuck
  • Patent number: 6838297
    Abstract: The invention provides a nanostructure including an anodized film including nanoholes. The anodized film is formed on a substrate having a surface including at least one material selected from the group consisting of semiconductors, noble metals, Mn, Fe, Co, Ni, Cu and carbon. The nanoholes are cut completely through the anodized film from the surface of the anodized film to the surface of the substrate. The nanoholes have a first diameter at the surface of the anodized film and a second diameter at the surface of the substrate. The nanoholes are characterized in that either a constriction exists at a location between the surface of the anodized film and the surface of the substrate, or the second diameter is greater than the first diameter.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: January 4, 2005
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tatsuya Iwasaki, Tohru Den
  • Publication number: 20040263044
    Abstract: Disclosed is a carbon-based composite particle for an electron emission source comprising: a particle of a material selected from the group consisting of metals, oxides, and ceramic materials; and a carbon-based material such as a carbon nanotube which is partially buried inside of the particle and which partially protrudes from the surface of the particle.
    Type: Application
    Filed: April 8, 2004
    Publication date: December 30, 2004
    Inventors: Tae-Ill Yoon, Jong-Woon Moon, Sung-Hee Cho, Sung-Kee Kang, Hun-Young Kim, Hyun-Jung Lee
  • Patent number: 6835112
    Abstract: An electroluminescent lamp (EL lamp) is formed by stacking a light-transmitting electrode-layer, an adhesive synthetic resin layer, a luminescent layer formed of the synthetic resin layer with phosphor particles fixed uniformly, a dielectric layer and a back electrode-layer on a transparent substrate sequentially. By this structure, a uniform EL lamp having improved brightness can be produced. A method for manufacturing the EL lamp includes following steps for fixing the phosphor particles in the synthetic resin layer uniformly. (1) sinking the phosphor particles in the synthetic resin layer by heating and pressing, after spraying the phosphor particles. (2) blowing the phosphor particles to the synthetic resin layer with heated air. As a result, the phosphor particles are uniformly fixed in the synthetic resin layer having uniform thickness.
    Type: Grant
    Filed: March 12, 2002
    Date of Patent: December 28, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koji Tanabe, Akito Kawasumi, Shinji Okuma, Yosuke Chikahisa, Naohiro Nishioka
  • Publication number: 20040259456
    Abstract: Phosphor layers are formed on the inner surface of a face plate. An electron source device that emits electrons to excite the phosphor layers is provided on the inner surface of a base plate. The electron source device comprises an alumina substrate that has a number of small through holes. Electron-emitting material is buried in the through holes. A reference electrode is formed on the lower surface of the alumina substrate and contacts the electron-emitting material. A gate electrode is formed on the upper surface of the substrate and insulated from the electron-emitting material. The gate electrode is configured to concentrate an electron field of the electron-emitting material by virtue of an voltage applied between the reference electrode and the gate electrode, thereby to cause the electron-emitting material to emit electrons toward the phosphor layers.
    Type: Application
    Filed: November 18, 2003
    Publication date: December 23, 2004
    Inventors: Takeo Ito, Sadao Miki, Kazuo Sakai
  • Patent number: 6830496
    Abstract: A light emitting diode device comprises a copper substrate having multiple light emitting regions, multiple dies and encapsulation. Each light emitting region has a die pad and at least one electrode connected together and encapsulant covering the light emitting region. The dies are respectively mounted on the die pads and are wire bonded to the corresponding electrode or electrodes. A step defining a gap is applied to the substrate to form multiple light emitting regions, and each light emitting region has a die pad and electrodes. Therefore, the present invention can simplify the steps for fabricating die pad and electrodes to increase the production rate of LED devices or LED display modules.
    Type: Grant
    Filed: January 22, 2003
    Date of Patent: December 14, 2004
    Assignee: Kaylu Industrial Corporation
    Inventors: Ting-Hao Lin, Li-Wei Kuo, Ching-Lin Chang
  • Patent number: 6827624
    Abstract: The first basic structure of the electron emission element of the present invention includes at least two electrodes disposed in a horizontal direction at a predetermined interval, and a plurality of electron emission portions made of a particle or an aggregate of the particles dispersively disposed between the electrodes. On the other hand, the second basic structure of the electron emission element of the present invention includes at least two electrodes disposed at a predetermined interval, a conductive layer disposed between the electrodes so as to be electrically connected thereto, and a plurality of electron emission portions made of a particle or an aggregate of the particles dispersively disposed on the surface of the conductive layer between the electrodes.
    Type: Grant
    Filed: July 15, 2002
    Date of Patent: December 7, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideo Kurokawa, Tetsuya Shiratori, Toshifumi Sato, Masahiro Deguchi, Makoto Kitabatake
  • Patent number: 6827619
    Abstract: In an electron emitting device, an electron source and an image forming apparatus making use of it, and producing methods of them, an organic film is present on a pair of conductive films forming the electron emitting device. This organic film is placed in an area on the conductive films. This prevents occurrence of leak paths between the conductive films, which used to occur because of change of the organic film on the substrate into a conductor where the organic film existed on the substrate outside the area of the conductive films, and prevents decrease in electron emission efficiency.
    Type: Grant
    Filed: September 25, 2002
    Date of Patent: December 7, 2004
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hitoshi Oda, Takashi Iwaki
  • Patent number: 6812480
    Abstract: A field emission display device and a method of fabricating the same are provided. The field emission display device includes a substrate, a transparent cathode layer, an insulation layer, a gate electrode, a resistance layer, and carbon nanotubes. The transparent cathode layer is deposited on the substrate. The insulation layer is formed on the cathode layer and has a well exposing the cathode layer. The gate electrode is formed on the insulation layer and has an opening corresponding to the well. The resistance layer is formed to surround the surface of the gate electrode and the inner walls of the opening and the well so as to block ultraviolet rays. The carbon nanotube field emitting source is positioned on the exposed cathode layer. An alignment error between the gate electrode and the cathode is removed, and carbon nanotube paste is prevented from remaining during development, thereby preventing current leakage and short circuit between the electrodes and diode emission.
    Type: Grant
    Filed: January 22, 2003
    Date of Patent: November 2, 2004
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Hang-woo Lee, Sang-jin Lee, Shang-hyeun Park
  • Patent number: 6812634
    Abstract: A graphite nanofiber material herein provided has a cylindrical structure in which graphene sheets each having an ice-cream cone-like shape whose tip is cut off are put in layers through catalytic metal particles; or a structure in which small pieces of graphene sheets having a shape adapted for the facial shape of a catalytic metal particle are put on top of each other through the catalytic metal particles. The catalytic metal comprises Fe, Co or an alloy including at least one of these metals. The material can be used for producing an electron-emitting source, a display element, which is designed in such a manner that only a desired portion of a luminous body emits light, a negative electrode carbonaceous material for batteries and a lithium ion secondary battery. The electron-emitting source (a cold cathode ray source) has a high electron emission density and an ability of emitting electrons at a low electric field, which have never or less been attained by the carbon nanotube.
    Type: Grant
    Filed: February 5, 2001
    Date of Patent: November 2, 2004
    Assignee: Nihon Shinku Gijutsu Kabushiki Kaisha
    Inventors: Hirohiko Murakami, Masaaki Hirakawa, Chiaki Tanaka
  • Publication number: 20040214502
    Abstract: To manufacture an electromagnetic-wave shielding and light transmitting plate having a conductive pattern of which line width is narrow and open area ratio is high, a negative pattern 2 composed of dots is printed on a transparent film 1 having a high affinity for a plated layer of a conductive material by using a transparent resin having a low affinity for the plated layer and a backside coating layer 3 is formed by printing a transparent resin on the entire back surface of the transparent film 1. Then, a conductive material layer is formed by electroless plating to cover the film exposed surface not covered by the negative pattern 2 of the film 1, thereby forming the conductive pattern 4. After that, the blackening treatment is conducted, thereby obtaining the electromagnetic-wave shielding and light transmitting plate.
    Type: Application
    Filed: May 19, 2004
    Publication date: October 28, 2004
    Applicant: BRIDGESTONE CORPORATION
    Inventors: Hidefumi Kotsubo, Yasuhiro Morimura, Itsuo Tanuma
  • Publication number: 20040214503
    Abstract: To manufacture an electromagnetic-wave shielding and light transmitting plate having a conductive pattern of which line width is narrow and open area ratio is high, a resin pattern 2 is printed on a transparent film 1 having a low affinity for a plated layer by using a resin having a high affinity for the plated layer. Then, a conductive material layer is formed by electroless plating on the resin pattern 2 of the film 1, thereby forming the conductive pattern 3. After that, the blackening treatment is conducted, thereby obtaining the electromagnetic-wave shielding and light transmitting plate.
    Type: Application
    Filed: May 20, 2004
    Publication date: October 28, 2004
    Applicant: BRIDGESTONE CORPORATION
    Inventors: Hidefumi Kotsubo, Yasuhiro Morimura, Itsuo Tanuma
  • Publication number: 20040192151
    Abstract: In a method for manufacturing carbon fibers by means of a thermal CVD method through catalysts, the method capable of obtaining a uniform film thickness regardless of a growth position and a growth area on a substrate is provided. The substrate on which a catalyst layer is formed is disposed in a reaction container. An atmosphere in the reaction container is set to be a reduced pressure atmosphere including a carbon containing gas having a partial pressure of 10 Pa or less, and the substrate is heated in the atmosphere to grow carbon fibers on the catalyst layer.
    Type: Application
    Filed: March 18, 2004
    Publication date: September 30, 2004
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Takeo Tsukamoto, Shinichi Kawate, Kazunari Oyama, Takahiro Sato, Shin Kitamura, Kazuya Miyazaki, Takashi Iwaki, Akira Shimazu
  • Patent number: 6796870
    Abstract: A field emission type cold cathode device comprises a substrate, and a metal plating layer formed on the substrate, the metal plating layer contains at least one carbon structure selected from a group of fullerenes and carbon nanotubes, the carbon structure is stuck out from the metal plating layer and a part of the carbon structure is buried in the metal plating layer.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: September 28, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masayuki Nakamoto
  • Patent number: 6791246
    Abstract: A method for manufacturing spark plugs with central and body electrode(s) armed with noble metal inserts, in which the tip of a central electrode which is pyramid or conic shaped with a base diameter (d), is liquefied by being pressed against a noble metal ball with diameter (d) that is mounted in the face of a welding electrode under a defined welding contact pressure and defined welding parameters. The liquefied material of the central electrode tip partially flows around the noble metal ball, and the welding electrode is separated from the central electrode after the liquefied material of the central electrode tip has solidified with noble metal ball embedded therein.
    Type: Grant
    Filed: October 9, 2002
    Date of Patent: September 14, 2004
    Assignee: Beru AG
    Inventor: Werner Niessner
  • Patent number: 6790113
    Abstract: This invention relates to a method and apparatus for making a spark plug, in particular, for making a high-performance spark plug having a center electrode having a firing end made of Pt, Ir, Rh, Pd, Re, Os, Ru or alloy thereof, with its firing end diameter of about 0.3-1.0 mm. One of the embodiments provides a method comprising the steps of: extending a metal strip from an end of the metal shell; positioning a spacer above a firing end of the center electrode; preliminarily bending the metal strip toward the spacer so as to form an arc portion in the metal strip; and then precisely forming a gap-distance between the metal strip and the firing end of the center electrode by applying a force to the metal strip.
    Type: Grant
    Filed: January 29, 2002
    Date of Patent: September 14, 2004
    Assignee: NGK Spark Plug Co., Ltd.
    Inventor: Shigeo Fujita
  • Patent number: 6780075
    Abstract: A method of fabricating a nano-tube that enables shortly cutting off the nano-tube without deteriorating the same and that when the nano-tube is used as the emitter can provide an improved flat-ability of the surface of the emitter, a method of manufacturing a field-emission type cold cathode that can provide an improved flat-ability of the surface of the emitter and that resultantly can cause an emission of a uniform, stable high-emission electric current, and a method of manufacturing a display device that includes a method of fabricating a nano-tube and/or a method of manufacturing a field-emission type cold cathode. The method of fabricating a nano-tube according to the present invention includes the step of radiating ions into a nano-tube and the step of oxidizing the nano-tube.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: August 24, 2004
    Assignee: NEC Corporation
    Inventors: Akihiko Okamoto, Fuminori Itoh
  • Publication number: 20040147050
    Abstract: An emitter includes an electron supply layer, a dielectric layer on the electron supply layer defining an emission area, and a filled zeolite emission layer within the defined emission area and in contact with the electron supply layer. The filled zeolite emission layer holds a semiconductor material within the cage of the zeolite.
    Type: Application
    Filed: January 15, 2004
    Publication date: July 29, 2004
    Inventors: Thomas Novet, David M. Schut
  • Patent number: 6733355
    Abstract: The present invention provides a method for manufacturing a triode field emission display (FED) that can accommodate a large screen size and that has holes that are minutely and uniformly formed.
    Type: Grant
    Filed: September 20, 2002
    Date of Patent: May 11, 2004
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Seong-Yeon Hwang, Sang-Jin Lee, Jong-Min Kim
  • Patent number: 6729928
    Abstract: A method and structure are provided for simultaneously fabricating polysilicon cones for a field emitter and a porous insulating oxide layer for supporting a gate material. The porous insulating oxide is fabricated by first making the polysilicon porous in the field regions by an anodic etch and then oxidation. This is a fully self-aligned process and only one masking is used. Shaping of the gate material in close proximity to the top of the cone is achieved by a lift-off technique and requires no special deposition techniques like depositions at a grazing incidence to improve the emitter.
    Type: Grant
    Filed: January 22, 2002
    Date of Patent: May 4, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Leonard Forbes, Kie Y. Ahn
  • Patent number: 6705915
    Abstract: A process for assembling a cathode for electron gun comprising a body of emissive material, a cup into which the body of emissive material is inserted, a substantially cylindrical metal skirt, the said process comprising the following successive steps: insertion of the cup into one of the open ends of the metal skirt, welding of the cup to the skirt, crimping of the body/cup/skirt assembly by lateral squeezing at the level of the weld zone in such a way as to cause an indent-like deformation of the lateral face of the body.
    Type: Grant
    Filed: June 18, 2002
    Date of Patent: March 16, 2004
    Assignee: Thomson Licensing S.A.
    Inventors: Jean-Luc Ricaud, Jean-Claude Pruvost, Francois Nizery, Jean Remy Adamski
  • Patent number: 6702637
    Abstract: The present invention relates to a method of forming a small gap using CMP and a method for manufacturing a lateral FED. In the present invention, a small gap is determined by the thickness of an oxide film, and so uniform small gaps of about 100 Å that have been impossible to attain with the art of prior lithography can be formed with repeatability. Prior lateral field emission devices have the problem of repeatability in forming a gap for field emission because they are fabricated by means of a thermal stress method or an electrical stress method. But if the method of forming a small gap according to the present invention is used to fabricate a lateral FED, a FED can be made that has low voltage drive and high current drive characteristics and uniform field emission characteristics.
    Type: Grant
    Filed: January 25, 2002
    Date of Patent: March 9, 2004
    Assignee: Korea Advanced Institute for Science and Technology
    Inventors: Choon-Sup Lee, Jae-Duk Lee, Chul-Hi Han
  • Patent number: 6692327
    Abstract: An electron emission element includes a substrate, a cathode electrode formed on the substrate, an anode electrode disposed so as to be opposed to the cathode electrode, an electron emission member disposed on the cathode electrode, a control electrode disposed between the cathode electrode and the anode electrode, and an insulating layer. The electron emission member includes a first member having a hole and a second member filling the hole, wherein the second member is more likely to emit electrons than the first member.
    Type: Grant
    Filed: January 11, 2000
    Date of Patent: February 17, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahiro Deguchi, Makoto Kitabatake, Kanji Imai, Tomohiro Sekiguchi, Hideo Kurokawa, Keisuke Koga, Tetsuya Shiratori, Toru Kawase
  • Patent number: 6672926
    Abstract: A method of fabricating an emitter of a field emission display. A mixture of metal and silver paste with glass material is screen printed on a substrate as a silver electrode. The metal is selected from a hard solder alloy such as Al/Si alloy containing tin, zinc, aluminum or other low melting point metal. Alternatively, the metal and the silver paste with the glass material are separately screen printed on the substrate. The metal is selected from tin, zinc, aluminum, or an alloy with a low melting point such as aluminum/silicon alloy. A carbon nano-tube layer is formed on the silver electrode by coating the carbon nano-tube material with the electric arc. Alternately a catalyst layer can be formed on the silver electrode prior to the formation of the carbon nano-tube layer. A metal layer such as nickel and copper is formed on the carbon nano-tube layer to prevent the carbon nano-tube layer from absorbing gas.
    Type: Grant
    Filed: December 19, 2001
    Date of Patent: January 6, 2004
    Assignee: Delta Optoelectronics, Inc.
    Inventors: Wen-Tsang Liu, Yui-Shin Fran, Lai-Cheng Chen
  • Patent number: 6672925
    Abstract: A vacuum microelectronic device (10,40) emits electrons (37) from surfaces of nanotube emitters (17, 18). Extracting electrons from the surface of each nanotube emitter (17) results is a small voltage variation between each emitter utilized in the device (10, 40). Consequently, the vacuum microelectronic device (10,40) has a more controllable turn-on voltage and a consistent current density from each nanotube emitter (17,18).
    Type: Grant
    Filed: August 17, 2001
    Date of Patent: January 6, 2004
    Assignee: Motorola, Inc.
    Inventors: Albert Alec Talin, James E. Jaskie, Bernard F. Coll
  • Patent number: 6649431
    Abstract: Systems and methods are described for carbon tips with expanded bases. A method includes producing an expanded based carbon containing tip including: fabricating a carbon containing expanded base on a substrate; and then fabricating a carbon containing fiber on the expanded base. An apparatus includes a carbon containing expanded base coupled to a substrate; and a carbon containing fiber coupled to said carbon containing expanded base.
    Type: Grant
    Filed: February 27, 2001
    Date of Patent: November 18, 2003
    Assignee: UT. Battelle, LLC
    Inventors: Vladimir I. Merkulov, Douglas H. Lowndes, Michael A. Guillorn, Michael L. Simpson
  • Patent number: 6648712
    Abstract: A triode-type field emission device includes an insulating substrate; a cathode formed on the insulating substrate; a field emitter aligned on the cathode, wherein the field emitter includes a plurality of emitter tips and each emitter tip has the diameter of nanometers; an insulating layer positioned around the field emitter for electrically isolating the field emitter; and a gate electrode formed on the insulating layer, wherein the gate electrode is closed to an upper portion of the field emitter. Therefore, the triode-type field emission device may be operable in a low voltage.
    Type: Grant
    Filed: October 2, 2002
    Date of Patent: November 18, 2003
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sung-Yool Choi, Mun-Cheol Paek, Kyoung-Ik Cho, Jeen Hur, Gi-Pyung Han
  • Patent number: 6632693
    Abstract: A method for fabricating row lines over a field emission array employs only two mask steps to define row lines and pixel openings. A layer of conductive material is disposed over a substantially planarized surface of a grid of semiconductive material and a layer of passivation material is disposed over the layer of conductive material. Row lines and pixel openings may be formed through the passivation and conductive layers by use of a first mask. The row lines may be further defined by using a second mask to remove semiconductive material of the grid. Alternatively, a first mask may be used to fully define row lines from the layers of passivation, conductive, and semiconductive material, while a second mask may be used to define pixel openings through the layers of passivation and conductive material. Field emission arrays fabricated by such methods are also disclosed.
    Type: Grant
    Filed: May 29, 2002
    Date of Patent: October 14, 2003
    Assignee: Micron Technology, Inc.
    Inventor: Ammar Derraa
  • Patent number: 6630772
    Abstract: The invention provides improved devices containing adherent carbon nanotube films, in particular electron field emitter structures containing such films. Previously, attaining even moderate adherence of powdery or mat-like nanotubes to a substrate was difficult, because of the perfect fullerene structure of nanotubes, which tend to exhibit no dangling bonds or defect sites where chemical bonding to the substrate is able to occur. The invention overcomes these problems, and provides a strongly adherent nanotube film, by a variety of fabrication processes.
    Type: Grant
    Filed: April 22, 1999
    Date of Patent: October 7, 2003
    Assignees: Agere Systems Inc., University of North Carolina
    Inventors: Christopher Andrew Bower, Otto Zhou, Wei Zhu
  • Patent number: 6614169
    Abstract: Disclosed is a display device with improved brightness achieved by increasing electron emission efficiency of a thin film cathode. Phosphors are irradiated with electrons emitted to a vacuum through a flat thin film which is thinner than 5 nm and is disposed so as to face the phosphors. A top electrode for emitting the electrons is formed by stacking thin films of Ir, Pt, and Au, and performing a heat treatment so as to reconstruct the top electrode to have a structure in which thick island parts and a flat thin film part mixedly exist.
    Type: Grant
    Filed: February 26, 2001
    Date of Patent: September 2, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Toshiaki Kusunoki, Mutsumi Suzuki, Masakazu Sagawa
  • Publication number: 20030162467
    Abstract: In manufacturing surface conduction electron-emitting devices, a polymer thin film is arranged to connect a pair of electrodes and then transformed into a low resistivity film (carbon film) by irradiating the polymer film with an energy beam. The energy beam irradiation is scanned over the polymer films plural times so that heat due to the energy beam irradiation does not affect other members which constitute the device and also the processing time for carbonization of polymer film is reduced.
    Type: Application
    Filed: February 20, 2003
    Publication date: August 28, 2003
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Akira Shimazu, Hironobu Mizuno
  • Patent number: 6595821
    Abstract: A high-quality and high-reliability rotary anode target for X-ray tubes, of which the mechanical strength at high temperatures is increased and which is applicable not only to low-speed rotation (at least 3,000 rpm) but also even to high-speed rotation at high temperatures, and also a method for producing it. The rotary anode has a two-layered structure to be formed by laminating an Mo alloy substrate that comprises from 0.2% by weight to 1.5% by weight of TiC with the balance of substantially Mo, and an X-ray generating layer of a W—Re alloy that overlies the substrate.
    Type: Grant
    Filed: April 20, 2001
    Date of Patent: July 22, 2003
    Assignee: Tokyo Tungsten Co., Ltd.
    Inventors: Masayuki Itoh, Koji Asahi, Mitsuo Osada, Yoshinari Amano, Tomohiro Takida
  • Patent number: 6554673
    Abstract: A method for fabricating an electron emitter. This emitter structure may be used to form individual emitters or arrays of emitters. The method is comprised of implanting energetic ions into a diamond lattice to form cones or other continuous regions of damaged diamond. These regions are more electrically conducting than the surrounding diamond lattice, and have locally sharp tips at or near the point of entry of the ion into the diamond. The tips may then also be additionally coated with a layer of a wide band-gap semiconductor. An electrically conducting material may also be placed in proximity to the tips to generate an electric field sufficient to extract electrons from the conducting tips into either the region above the surface, or into the wide band-gap semiconductor layer in contact with the tips.
    Type: Grant
    Filed: July 31, 2001
    Date of Patent: April 29, 2003
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Pehr Pehrsson, James Butler
  • Patent number: 6506090
    Abstract: A display panel such as a plasma display panel is provided in which an electromagnetic-wave shielding material is integrated whereby electromagnetic-wave shielding efficiency is imparted to a display panel itself. A transparent film 2 having a conductive pattern 3 is bonded to a front surface of a plasma display panel 20 by transparent adhesives 4A. The conductive pattern 3 is in a mesh form having a line width of 50 &mgr;m or less and an open area ratio of 75% or more and is formed by vapor plating or liquid phase plating. To form a conductive pattern, dots 12 are printed on a transparent film 11 by using material which is soluble in solvent such as water. Then, a conductive material layer 13 is formed so as to cover over all the dots 12 and exposed portions of the transparent film 11. The film 11 is cleaned by the solvent such as water. By the cleaning process, the soluble dots 12 are dissolved and the conductive material on the dots 13 are also removed from the film 11.
    Type: Grant
    Filed: November 29, 2001
    Date of Patent: January 14, 2003
    Assignee: Bridgestone Corporation
    Inventors: Hidefumi Kotsubo, Yasuhiro Morimura, Itsuo Tanuma
  • Patent number: 6440763
    Abstract: The present invention discloses a new field emitter cell and array consisting of groups of nanofilaments forming emitter cathodes. Control gates are microprocessed to be integrally formed with groups of nanofilament emitter cathodes on a substrate. Groups of nanofilaments are grown directly on the substrate material. As a result, the control gates and groups of nanofilaments are self-aligned with one another.
    Type: Grant
    Filed: March 22, 2001
    Date of Patent: August 27, 2002
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: David S. Y. Hsu
  • Publication number: 20020093278
    Abstract: A method of forming an extraction grid for field emitter tip structures is described. A conductive layer is deposited over an insulative layer formed over the field emitter tip structures. The conductive layer is milled using ion milling. Owing to topographical differences along an exposed surface of the conductive layer, ions strike the exposed surface at various angles of incidence. As etch rate from ion milling is dependent at least in part upon angle of incidence, a selectivity based on varying topography of the exposed surface (“topographic selectivity”) results in non-uniform removal of material thereof. In particular, portions of the conductive layer in near proximity to the field emitter tip structures are removed faster than portions of the conductive layer between emitter tip structures. Thus, portions of the insulative layer in near proximity to the field emitter tip structures may be exposed while leaving intervening portions of the conductive layer for forming the extraction grid.
    Type: Application
    Filed: February 8, 2002
    Publication date: July 18, 2002
    Applicant: Micron Technology, Inc.
    Inventors: David H. Wells, Ji Ung Lee, Aaron R. Wilson
  • Patent number: 6406927
    Abstract: A method for fabricating row lines over a field emission array employs only two mask steps to define row lines and pixel openings. A layer of conductive material is disposed over a substantially planarized surface of a grid of semiconductive material and a layer of passivation material is disposed over the layer of conductive material. Row lines and pixel openings may be formed through the passivation and conductive layers by use of a first mask. The row lines may be further defined by using a second mask to remove semiconductive material of the grid. Alternatively, a first mask may be used to fully define row lines from the layers of passivation, conductive, and semiconductive material, while a second mask may be used to define pixel openings through the layers of passivation and conductive material. Field emission arrays fabricated by such methods are also disclosed.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: June 18, 2002
    Assignee: Micron Technology, Inc.
    Inventor: Ammar Derraa
  • Patent number: 6406926
    Abstract: A vacuum microelectronic device (10,40) is formed by applying a first conductor (13,14) to a substrate (11) and utilizing the first conductor (13,14) to expose a dielectric material (18) and a second conductive material (19) from a back surface of the substrate (11). A second conductor (29) and a dielectric (28) are formed from the second conductive material (19) and the dielectric material (18), respectively. This method self-aligns the dielectric (28) and the second conductor (29) with the first conductor (13,14). Electron emitters (31,33) of the vacuum microelectronic device (10,40) are formed on the first conductor (13,14).
    Type: Grant
    Filed: August 15, 2001
    Date of Patent: June 18, 2002
    Assignee: Motorola, Inc.
    Inventors: Shawn M. O'Rourke, Ravichandran Subrahmanyan
  • Patent number: 6391670
    Abstract: A method of forming an extraction grid for field emitter tip structures is described. A conductive layer is deposited over an insulative layer formed over the field emitter tip structures. The conductive layer is milled using ion milling. Owing to topographical differences along an exposed surface of the conductive layer, ions strike the exposed surface at various angles of incidence. As etch rate from ion milling is dependent at least in part upon angle of incidence, a selectivity based on varying topography of the exposed surface (“topographic selectivity”) results in non-uniform removal of material thereof. In particular, portions of the conductive layer in near proximity to the field emitter tip structures are removed faster than portions of the conductive layer between emitter tip structures. Thus, portions of the insulative layer in near proximity to the field emitter tip structures may be exposed while leaving intervening portions of the conductive layer for forming the extraction grid.
    Type: Grant
    Filed: April 29, 1999
    Date of Patent: May 21, 2002
    Assignee: Micron Technology, Inc.
    Inventors: David H. Wells, Ji Ung Lee, Aaron R. Wilson
  • Patent number: 6387718
    Abstract: A method for fabricating field emission arrays employs a single mask to define emitter tips, their corresponding resistors, and, optionally, conductive lines. One or more material layers from which the emitter tips and resistors will be defined are formed over and laterally adjacent substantially parallel conductive lines. The exposed surface of the layer or layers of emitter tip and resistor material or materials may be planarized. The emitter tips and underlying resistors are then defined. Substantially longitudinal center portions of the conductive lines may be exposed between adjacent lines of emitter tips, with at least a lateral edge portion of each conductive line being shielded by material that remains following the formation of the emitter tips and resistors. The exposed portions of the conductive lines may be removed in order to define conductive traces. Field emission arrays and display devices fabricated by such methods are also disclosed.
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: May 14, 2002
    Assignee: Micron Technology, Inc.
    Inventor: Ammar Derraa
  • Patent number: 6387717
    Abstract: The present invention relates to field emitters and methods of fabricating the same wherein the field emission tips of the field emitters are formed by utilization of a facet etch. An etch mask is patterned on a conductive substrate in the locations desired for subsequently formed field emission tips. The conductive substrate is then anisotropically etched to translate the shape of the mask into the conductive substrate which forms a vertical column from the conductive substrate. The etch mask is then removed and the vertical column is facet etched to form the field emission tip. Low work function materials may also be incorporated into the field emission tips to improve field emission tip performance by depositing a layer of low work function material on the conductive substrate prior to patterning the etch mask.
    Type: Grant
    Filed: April 26, 2000
    Date of Patent: May 14, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Guy T. Blalock, Sanh D. Tang, Zhaohui Huang
  • Patent number: 6355402
    Abstract: Electrodes in a plasma display panel are manufactured by (A) forming a pattern for electrodes on a substrate to be wider than a desired pattern, (B) coating photoresist on the electrode pattern, (C) disposing a photomask having the desired pattern on the photoresist and exposing the photoresist, and (D) forming electrodes having the desired pattern by developing and baking the exposed electrode pattern by using the photomask. Thus, the cost for a material for electrodes can be reduced, and short circuiting between the electrodes and the edge curl phenomenon can be prevented.
    Type: Grant
    Filed: November 15, 2000
    Date of Patent: March 12, 2002
    Assignee: Samsung SDI Co., Ltd.
    Inventor: Sung-il Ahn
  • Patent number: 6350628
    Abstract: A method of fabricating a field emission device is disclosed. A conductive layer is etched back by means of a reactive ion etching (RIE) process to form a chimney-shaped structure of diode-type or triode-type to serve as a field emitter. The field emission device of the present invention can be manufactured at a temperature of below 400° C., without complicated techniques or equipment, and is suitable for application in flat panel displays having large area.
    Type: Grant
    Filed: January 13, 2000
    Date of Patent: February 26, 2002
    Assignee: National Science Council
    Inventors: Huang-Chung Cheng, Wei Kai Hong, Fu Gow Tarntair
  • Patent number: 6338661
    Abstract: A spark plug derives an extended lifetime because a large plurality of sharp edges are provided on the center electrode, the ground electrode, or both to enhance spark propagation. In a first embodiment, the ground electrode has a conventional cantilever shape, but the center electrode extends into coplanar relation to a distal surface of the electrode so that sparks propagate from the cylindrical side walls of the center electrode. In variations of the first embodiment, the number of cantilevered ground electrodes is increased, with the ground electrodes being circumferentially and equidistantly spaced about the center electrode. In another embodiment, the ground electrode has an annular configuration and includes a cylindrical annular wall spaced radially outwardly of the cylindrical sidewall of the center electrode, in concentric relation to the center electrode.
    Type: Grant
    Filed: August 25, 2000
    Date of Patent: January 15, 2002
    Inventor: Paul Rossi
  • Patent number: 6319082
    Abstract: The present invention provides an electron emission device production method for producing an electron emission device exhibiting a preferable electron emission characteristic with a low voltage and an emitter electrode of a highly accurate configuration at a highly accurate position. A conductive layer is formed via an insulation layer on a cathode electrode. A first opening is formed in this conductive layer and a second opening is formed to communicate with the first opening so as to expose the cathode electrode. An emitter electrode is formed on the cathode electrode exposed from the second opening. On the conductive layer, a porous layer having a plurality of holes in the film thickness direction is formed so as to be used as a mask when forming the first opening in the conductive layer.
    Type: Grant
    Filed: February 8, 1999
    Date of Patent: November 20, 2001
    Assignee: Sony Corporation
    Inventors: Takashi Hirano, Masami Okita
  • Patent number: 6274881
    Abstract: In an electron emission element having an emitter section for emitting electrons, the emitter section includes, on a first conductive electrode, a structure in which at least a first semiconductor layer, a second semiconductor layer, an insulating layer and a second conductive electrode are deposited sequentially; and the first and second semiconductor layers include at least one of carbon, silicon and germanium as a main component, and the first semiconductor layer includes at least one type of atoms among carbon atom, oxygen atoms and nitrogen atoms which is different from the main component.
    Type: Grant
    Filed: June 17, 1999
    Date of Patent: August 14, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koji Akiyama, Hideo Kurokawa