Utilizing Shield (mask Or Stencil) Patents (Class 451/29)
  • Patent number: 7914362
    Abstract: Embodiments of the present invention pertain to a evaluating the quality of a lapping plate. In one embodiment, information that indicates the quality of a lapping plate is received while the lapping plate is being used to lap a slider, and the information is used to evaluate the quality of the lapping plate while the lapping plate is being used to lap the slider.
    Type: Grant
    Filed: November 30, 2005
    Date of Patent: March 29, 2011
    Assignee: Hitachi Global Storage Technologies, Netherlands B.V.
    Inventors: Richard Dale Bunch, Linden James Crawforth, Eduardo Padilla, Xiao Z. Wu
  • Publication number: 20100288729
    Abstract: Methods for manufacturing a microstructure, wherein use is made of a powder blasting and/or etching and a single mask layer with openings and structures of varying dimensions, wherein the mask layer at least at one given point in time has been wholly worn away within at least one region by mask erosion while the microstructure is not yet wholly realized. Use can be made of a combination of ‘vertical’ erosion, i.e. parallel to the thickness direction and ‘horizontal’ erosion, i.e. perpendicularly of the thickness direction, of the mask layer. The horizontal mask erosion occurs at the edges of the mask structure.
    Type: Application
    Filed: October 3, 2008
    Publication date: November 18, 2010
    Applicant: MICRONIT MICROFLUIDICS B.V.
    Inventors: Ronny Van'T Oever, Marko Theodoor Blom, Johannes Oonk
  • Publication number: 20100269593
    Abstract: A process for producing a reference body (10) provided with a slot (17) as a test crack for the nondestructive testing of materials can be used flexibly and includes the following steps: a) a reference body (10) and a mask (11) provided with a slot pattern (12) are provided; b) the mask (11) is applied to the reference body (10); c) material is removed from the reference body (10) through the mask (11) with an abrasive water jet (16); and d) the mask (11) is taken off the reference body (10).
    Type: Application
    Filed: April 6, 2010
    Publication date: October 28, 2010
    Inventors: Roland Richard Moser, Philipp Roth
  • Patent number: 7722446
    Abstract: In accordance with the foregoing objects and advantages, the present invention provides a fabrication device that may be used during the grinding operation of the fabrication process. The fabrication device comprises a socket plate that includes a plurality of cavities formed therein that correspond in position and number to the solder (or other conductive material) bumps formed on the front surface of a product wafer.
    Type: Grant
    Filed: October 17, 2006
    Date of Patent: May 25, 2010
    Assignee: International Business Machines Corporation
    Inventors: Timothy C Krywanczyk, Edmund J Sprogis
  • Publication number: 20100056025
    Abstract: A rotary file includes: (a) a body having first and second ends, and an outer surface comprising at least one cutting edge; (b) a shank extending from the first end of the body which is adapted to be mounted in a rotary tool; and (c) a pilot extending from the second end of the body, the pilot defining an annular peripheral surface with an arcuate cross-section.
    Type: Application
    Filed: August 31, 2008
    Publication date: March 4, 2010
    Applicant: General Electric Company
    Inventors: Richard E. Dubell, Timothy L. Manning
  • Patent number: 7662020
    Abstract: This method for manufacturing a surface-coated cutting insert includes clamping and holding a surface-coated cutting insert with a pair of rotary shafts which are rotatable around an axis, and jetting an abrasive fluid to the surface of the surface-coated cutting insert using at least one blasting gun while rotating the surface-coated cutting insert, thereby, conducting wet blasting.
    Type: Grant
    Filed: June 6, 2008
    Date of Patent: February 16, 2010
    Assignee: Mitsubishi Materials Corporation
    Inventors: Yoshikazu Okada, Takushi Saeki, Hiroshi Ohmori
  • Patent number: 7632168
    Abstract: A positioning member is used to position the movable jaw to the sliding groove of the adjustable wrench and the adjustable wrench together with the positioning member are applied by vibrate grinding technology so as to make the outer surface of the movable jaw to be a mirror surface and the rod of the movable jaw is kept as the surface condition after being machine. The tolerance between the rod and the sliding groove is controlled within expected range.
    Type: Grant
    Filed: October 17, 2008
    Date of Patent: December 15, 2009
    Assignee: Proxene Tools Co., Ltd.
    Inventor: Arthur Wu
  • Publication number: 20090258577
    Abstract: The present invention provides a method for trimming molds of automotive metal sheets, which comprise a top mold and a bottom mold. The top mold has a concave mold surface, and the bottom mold has a corresponding convex mold surface. The method comprises: 1. Use the top mold as the base mold, and smear dye on the top mold; 2. Close the bottom mold to the top mold; and 3. Polish the mold surface of the bottom mold. Thereby, the processing method according to the prior art is broken through, and an ergonomic trimming operation is hence provided. Accordingly, the trimming process is simplified, and the labor hours are reduced. Beside, the accuracy of trimmed molds is improved and the subsequent mold-clamping process can be omitted. Thereby, the exterior quality of the metal sheets can be enhanced while reducing substantial labor hours, and economic benefits for manufacturing molds of metal sheets for an automotive body can be achieved.
    Type: Application
    Filed: December 12, 2008
    Publication date: October 15, 2009
    Inventor: Yuan-Kun TSENG
  • Patent number: 7393263
    Abstract: This method for manufacturing a surface-coated cutting insert includes clamping and holding a surface-coated cutting insert with a pair of rotary shafts which are rotatable around an axis, and jetting an abrasive fluid to the surface of the surface-coated cutting insert using at least one blasting gun while rotating the surface-coated cutting insert, thereby, conducting wet blasting.
    Type: Grant
    Filed: November 30, 2006
    Date of Patent: July 1, 2008
    Assignee: Mitsubishi Materials Corporation
    Inventors: Yoshikazu Okada, Takushi Saeki, Hiroshi Ohmori
  • Publication number: 20080123343
    Abstract: A light source device includes a solid light emitting element 1 having a reflection film on the back side, first and second reflection surfaces 2, 3 opposing each other in parallel and substantially perpendicular to a front surface of the solid light emitting element 1 and a third reflection surface 4 substantially perpendicular to the first and second reflection surfaces 2, 3 and opposing the front surface of the solid light emitting element 1. The third reflection surface 4 is inclined to the front surface of the solid light emitting element 1. The reflection film of the element 1, the first, second and third reflection surfaces 2, 3, 4 do constitute a closed polyhedron having an emission opening 5 smaller than a light emitting surface of the element 1. Light emitted from the element 1 is emitted to an outside through the emission opening 5.
    Type: Application
    Filed: June 22, 2007
    Publication date: May 29, 2008
    Inventors: Tatsuru Kobayashi, Ryosuke Nakagoshi, Ryusaku Takahashi, Isamu Nakayama, Takayuki Kashiwagi, Eiji Kubo, Naoya Okamoto
  • Publication number: 20080125014
    Abstract: The invention is directed to large LCD image masks having a final flatness of less than 40 nm and a method of making such LCD image masks by utilizing subaperture deterministic grinding/lapping/polishing. In one preferred embodiment the final flatness is <20 ?m. In another the final flatness is <10 nm. The LCD image masks have a length and width that are each, independently of the other, greater than 400 mm and a thickness that is less than 20 mm. In at least one preferred embodiment the ICD image masks have a length and width that are each, independently, greater than 100 mm and the thickness is <15 mm. The glass LCD image masks can be of any glass materials suitable for LCD image masks. The method of the invention can be used with all such glasses. Exemplary LCD image mask glasses include fused silica, high purity fused silica and silica-titania containing 5-10 wt. % titania.
    Type: Application
    Filed: November 29, 2006
    Publication date: May 29, 2008
    Inventors: William Rogers Rosch, Robert Sabia
  • Patent number: 7367869
    Abstract: A method of masking includes adhering a removable pressure sensitive adhesive to a masking surface to cover the masking surface and blasting the adhesive and an adjacent target surface with abrasive blast media to remove material forming the target surface wherein the adhesive protects against removal of material forming the masking surface. The blasting media does not abrade the adhesive. The adhesive may be applied in molten form or at room temperature by separating the adhesive from a flexible release liner. The adhesive may be removed by simply peeling the adhesive from the masking surface, leaving the masking surface essentially free of residue. Due to the adhesive characteristics throughout the adhesive, some blast media adheres to the adhesive and forms a barrier layer which repels additional blast media. The adhesive may also be used to adhere a masking device over the masking surface to cover large areas easily.
    Type: Grant
    Filed: May 2, 2006
    Date of Patent: May 6, 2008
    Assignee: U.S. Technology Corporation
    Inventors: Raymond F. Williams, Casey Williams
  • Patent number: 7316786
    Abstract: A method is provided that includes a main laminate making step of forming a plurality of main magnetic poles onto a substrate, covering each magnetic pole with a first protective film, and forming onto the first protective film a stopper film provided with openings at respective parts opposing the main magnetic poles. Each opening is wider than a planar width of a corresponding main magnetic pole, so as to make a main laminate. The method includes a main polishing step of polishing the first protective film and main magnetic poles through the openings of the stopper film in the main laminate by a CMP method. In the main laminate making step, the openings in the stopper film is provided with a width distribution.
    Type: Grant
    Filed: November 30, 2005
    Date of Patent: January 8, 2008
    Assignee: TDK Corporation
    Inventor: Akifumi Kamijima
  • Patent number: 7251887
    Abstract: A tool for limiting a cut on an impeller having a shaft and vane is provided. The tool includes a shield member having a sidewall, a top, and an inner cavity. The tool also includes a first cut opening extending through the hub sidewall to the shield member inner cavity, the shield member configured to matingly receive the impeller shaft into the shield member inner cavity and position at least a portion of the impeller shaft proximate the at least one cut opening to expose the portion of the impeller shaft for grinding.
    Type: Grant
    Filed: December 4, 2003
    Date of Patent: August 7, 2007
    Assignee: Honeywell International, Inc.
    Inventors: Thomas J. Tench, Jr., William J. Clayton, Nguyen X. Nghiem
  • Patent number: 7246427
    Abstract: Biasing schemes used for CIP GMR devices were previously thought to be impractical for CPP devices due to current shunting by the abutted hard magnets. In the present invention the CPP stripe is a narrow conductor directly above the free layer. The resistivity of the latter is made to be relatively high so the sensing current diverges very little as it passes through it. This makes it possible to use abutted hard magnets for longitudinal bias with virtually no loss of sensing current due to shunting by the magnets.
    Type: Grant
    Filed: February 3, 2004
    Date of Patent: July 24, 2007
    Assignee: Headway Technologies, Inc.
    Inventors: Yimin Guo, Li-Yan Zhu
  • Patent number: 7237321
    Abstract: A method is described which uses a CMP resistant metal layer to replace the upper dielectric layer in the track width definition phase of a TMR or CPP spin valve magnetic head. The metal which is selected to be resistant to the CMP process can be rhodium (Rh), platinum (Pt), chromium (Cr), vanadium (V), etc. The additional CMP resistance of the refill layer structure provides a much larger processing window which results in higher yields. A CPP head according to the invention has a metal layer according to the invention above the hard bias structures on the sides of the sensor which define the track width.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: July 3, 2007
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Marie-Claire Cyrille, Frederick Hayes Dill, Jui-Lung Li
  • Patent number: 7223154
    Abstract: Methods and apparatuses for planarizing a microelectronic substrate. In one aspect of the invention, a first portion of an energy-sensitive, non-sacrificial planarizing pad material is exposed to a selected energy without exposing a second portion of the material to the selected energy source. The planarizing pad material is exposed to a solvent to remove material from one of the first or second portions of the planarizing pad material at a faster rate than removing material from the other of the first and second portions. The process forms a plurality of recesses directly in the surface of the planarizing pad which are configured to support a planarizing liquid proximate to the surface of the planarizing pad material during planarization of the microelectronic substrate. Alternatively, the process can form a mold having protrusions that are pressed into the planarizing pad to define the recesses in the pad.
    Type: Grant
    Filed: April 28, 2006
    Date of Patent: May 29, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Stephen J. Kramer, Michael J. Joslyn
  • Patent number: 7192334
    Abstract: A method for making a light-emitting display device having a substrate with light-emitting layers on a surface of the substrate and constituting pixels, light emission from the pixels being electrically controlled, and having barriers delimiting at least one side of each respective pixel. A mask pattern is formed on a surface of the substrate, corresponding to the pattern of the barriers to be formed, and the surface is sprayed with sandblasting particles to form grooves having a depth corresponding to a height of the barriers and irregularities producing light scattering on the side walls and bottoms of the grooves, a difference between a maximum height and a minimum height of the irregularities being at least 0.4 mm.
    Type: Grant
    Filed: September 16, 2005
    Date of Patent: March 20, 2007
    Assignee: Fuji Photo Film Co., Ltf.
    Inventors: Yasunobu Hashimoto, Yoshiho Seo, Naoki Itokawa, Motonari Kifune, Yasushi Ohkawa
  • Patent number: 7169022
    Abstract: A method and apparatus for creating a groove in the surface of a collector ring for use in an electrical device. The method and apparatus can be used to create a new groove in the surface of a collector ring having none, or can be used to enhance or re-form an existing groove in the surface of a collector ring. In some embodiments, the groove in the surface of the collector ring is created using a cutting tool that has a cutting action that functions independently from the motion of the collector ring. In other embodiments, a masking material is positioned over a portion of the surface of the collector ring to create a masked portion and an exposed portion of the surface of the collector ring. A groove is then created in the exposed portion of the surface of the collector ring. The masking material is then removed from the surface of the collector ring.
    Type: Grant
    Filed: September 8, 2003
    Date of Patent: January 30, 2007
    Assignee: Cutsforth Products, Inc.
    Inventor: David L. Cutsforth
  • Patent number: 7121925
    Abstract: A method for dividing a semiconductor wafer into chips according to the present invention is a method for dividing a semiconductor wafer into a large number of semiconductor chips, the semiconductor wafer having a semiconductor layer formed on a substrate. A first method includes the step of forming a blast-resistant mask on a surface of the semiconductor wafer, the blast-resistant mask having a pattern for leaving a grid-like exposed portion as it is and the step of blasting a fine particular blast material to thereby form dividing grooves reaching a predetermined depth of the substrate in the grid-like exposed portion.
    Type: Grant
    Filed: March 14, 2001
    Date of Patent: October 17, 2006
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Masaki Hashimura, Takao Sato, Koichi Ota
  • Patent number: 7108584
    Abstract: The method and apparatus manufacture a liquid drop ejecting head. The method and apparatus blast particles on a substrate having on an upper layer a patterned mask layer made of an organic material and on a lower layer a driver circuit for ejecting a liquid drop to thereby perform an etching process on parts of the substrate exposed from the mask layer. The etching process is performed in an ionic atmosphere ionized with a polarity opposite to a charged polarity generated in the substrate when the substrate is subjected to etching.
    Type: Grant
    Filed: September 26, 2002
    Date of Patent: September 19, 2006
    Assignee: Fuji Photo Film Co., Ltd.
    Inventor: Ryoichi Yamamoto
  • Patent number: 7094130
    Abstract: A method is described which uses a CMP slurry with an abrasive of spherical particles to lift-off photoresist used in the patterning of the sensor for a magnetic transducer. The spherical particles, preferably less than 0.015 microns, are preferably silica, alumina, titania or zirconia with colloidal silica being preferred. An alternative method of fabricating a CPP sensor structure according to the invention deposits a dielectric or CMP resistant metal over the hard bias structure. The CMP-resistant metal is preferably selected from the group consisting of rhodium, chromium, vanadium and platinum. A CMP resistant mask deposited over the dielectric or CMP-resistant metal can include an optional adhesion layer such as tantalum followed by a DLC layer. The CMP-assisted lift-off of the photoresist and the excess materials is executed at this point. The photoresist used to protect the selected area of the sensor structure is lifted-off using the slurry.
    Type: Grant
    Filed: September 9, 2005
    Date of Patent: August 22, 2006
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Marie-Claire Cyrille, Frederick Hayes Dill, Jui-Lung Li
  • Patent number: 7063596
    Abstract: Material is removed from objects to be marked or machined by applying tools having cutouts arranged in a pattern on the objects, filling the cutouts with abrasive particles, pouring a molten metal over the tools to solidify as a backing, and then ultrasonically vibrating the backing to propel the abrasive particles through the cutouts to transfer the pattern to the objects.
    Type: Grant
    Filed: June 9, 2003
    Date of Patent: June 20, 2006
    Inventor: David Benderly
  • Patent number: 7039488
    Abstract: A method of determining remaining film thickness in polishing process provides a technology for controlling a polishing amount of CMP in a device isolating process with satisfactory accuracy regardless of the ratio between the area of each of device forming regions and that of each of trench regions, the type of abrasive, etc.
    Type: Grant
    Filed: February 2, 2004
    Date of Patent: May 2, 2006
    Assignee: OKI Electric Industry Co., Ltd.
    Inventor: Kazuhiko Asakawa
  • Patent number: 6974366
    Abstract: A garment image abrasion system and method for abrading an image into a garment is disclosed. The garment image abrasion system includes a template member having a template surface in the shape of an image desired to be abraded into a garment. In the disclosed method, the template member is placed under the fabric of the garment and an abrading tool is used to apply pressure between the abrading tool and the template surface to abrade the fabric.
    Type: Grant
    Filed: December 13, 2002
    Date of Patent: December 13, 2005
    Inventor: Larry Johnson
  • Patent number: 6949004
    Abstract: A manufacturing process for reducing magnetic spacing loss in a magnetic recording head. The recession of the transducer relative to the substrate at the air bearing surface is decreased by applying a coating of sacrificial material such as diamond-like carbon to the upper surfaces of the substrate, the transducer, and the encapsulation material such as alumina prior to final kiss lapping. The recession due to the alumina being softer than the substrate is greatly reduced since the DLC is kiss-lapped.
    Type: Grant
    Filed: May 6, 2003
    Date of Patent: September 27, 2005
    Assignee: Maxtor Corporation
    Inventors: Chris Broussalian, Kim Brandt
  • Patent number: 6908363
    Abstract: A method for polishing targeted areas of an IOL while leaving other areas unpolished such as sharp posterior edges designed to inhibit PCO. In the preferred embodiment, the polishing method utilizes a stream of polishing agent directed at the IOL which is mounted to a holder during the polishing operation. In this manner, only the targeted areas of the IOL polished while the other areas remain unpolished and sharp as intended. The method is suitable for in-line automated IOL manufacturing.
    Type: Grant
    Filed: June 27, 2002
    Date of Patent: June 21, 2005
    Assignee: Bausch & Lomb Incorporated
    Inventor: George F. Green
  • Patent number: 6905966
    Abstract: A method for estimating relative remaining film thickness distribution (CMP pattern ratio distribution) among sparse and dense active regions after CMP on the basis of the layout of a mask pattern in a one-chip mask region. In each mask pattern, a reduced region is created by removing an area of a predetermined width from the mask pattern along the edge of the mask pattern. Then, the one-chip mask region is segmentalized into predetermined regions to create a plurality of segmentalized regions. On each of the segmentalized regions, the area ratio of all reduced regions occupying a region that includes a segmentalized region at a fixed position and has the same size and shape as those of the foregoing one-chip mask region is acquired. Based on the acquired area ratio, the distribution of remaining film thickness of a surface protection film in the one-chip mask region, i.e., the CMP pattern ratio, is acquired.
    Type: Grant
    Filed: July 28, 2003
    Date of Patent: June 14, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Takeshi Morita
  • Patent number: 6893330
    Abstract: A cutting tool having a crystalline tip is pressed with a uniform pressure against the outboard surface of a vehicle wheel as the wheel is rotated. The smoothed wheel surface is then chrome plated to provide a cosmetic finish to the wheel face.
    Type: Grant
    Filed: January 14, 2004
    Date of Patent: May 17, 2005
    Assignee: Hayes Lemmerz International, Inc.
    Inventors: Geoffrey L. Gatton, Richard T. Guernsey
  • Patent number: 6893326
    Abstract: An indium tin oxide (ITO) coating is selectively removed from a substrate by printing a mask on the coated surface of the substrate to cover those regions of the surface on which the ITO is to remain. The substrate is then abraded to remove the ITO from the unmasked regions of the surface and the mask is removed with a solvent. The method provides quick and accurate removal of ITO without the use of acids or lasers.
    Type: Grant
    Filed: August 22, 2001
    Date of Patent: May 17, 2005
    Assignee: Cambridge Consultants Limited
    Inventor: Frank Tyldesly
  • Patent number: 6878630
    Abstract: A method of manufacturing a wafer. The surface of a wafer for which a lapping process is completed is exposed to a caustic etch process so that the etch rate against the surface of the wafer ranges from about 0.3 to about 0.7 ?m/min using an etchant containing from about 42 to about 48% KOH and from about 52 to about 58% H2O. Then, a wafer back side polishing process is controlled in order to prevent a sliding phenomenon without a drop in a chucking voltage. Therefore, a lift-off or peeling phenomenon of a subsequently deposited film is reduced and local variations in the etch rate is also reduced.
    Type: Grant
    Filed: September 10, 2002
    Date of Patent: April 12, 2005
    Assignee: Hynix Semiconductor Inc.
    Inventors: Chull Won Bang, In Cheol Kim, Dong Won Back
  • Patent number: 6866561
    Abstract: A method and apparatus for producing a highly attractive, decorative baseball bat. The apparatus of the invention enables the manufacture of decorative baseball bats that exhibit a wide variety of attractive designs. More particularly, the apparatus includes a uniquely configured, inexpensive masking member that can be slipped over the barrel of the bat so as to make selective portions of the baseball bat during the sandblasting step of the method of the invention.
    Type: Grant
    Filed: April 1, 2003
    Date of Patent: March 15, 2005
    Assignee: Anodizing Industries, Inc.
    Inventor: Edward Andrews
  • Patent number: 6855026
    Abstract: A partition is formed by the process including a step for providing a sheet-like partition material that covers a display area and outside thereof on the surface of the substrate, a step for providing a mask for patterning that covers the display area and the outside thereof, so that a pattern of the portion arranged outside of the display area of the mask is a grid-like pattern, a step for patterning the partition material covered partially with the mask by a sandblasting process, and a step for baking the partition material after the patterning.
    Type: Grant
    Filed: October 8, 2003
    Date of Patent: February 15, 2005
    Assignees: Fujitsu Limited, Fujitsu Hitachi Plasma Display Limited
    Inventors: Akihiro Fujinaga, Kazunori Ishizuka, Tatsutoshi Kanae, Kazuhide Iwasaki, Toshiyuki Nanto, Yoshimi Kawanami, Masayuki Shibata, Yasuhiko Kunii, Tadayoshi Kosaka, Osamu Toyoda, Yoshimi Shirakawa
  • Patent number: 6848972
    Abstract: A surface micromachining process for a resin mold including a layer of a resin as a material of the resin mold, which layer has a product's surface forming plane, and a back surface reinforcing member for reinforcing the resin layer. The product's surface forming plane is micromachined by means of at least two masking/blasting treatments. The treatments comprise a primary blasting step of sticking a first mask sheet having a specific window on the product's surface forming plane and blasting blast particles to the product's surface forming plane via the first mask sheet, and a secondary blasting step of peeling the first mask sheet, sticking a second mask sheet different from the first mask sheet on the product's surface forming plane, and blasting blast particles to the product's surface forming plane via the second mask sheet.
    Type: Grant
    Filed: August 22, 2002
    Date of Patent: February 1, 2005
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Hiroshi Shirakawa, Kenji Hosoya
  • Publication number: 20040248503
    Abstract: Material is removed from objects to be marked or machined by applying tools having cutouts arranged in a pattern on the objects, filling the cutouts with abrasive particles, pouring a molten metal over the tools to solidify as a backing, and then ultrasonically vibrating the backing to propel the abrasive particles through the cutouts to transfer the pattern to the objects.
    Type: Application
    Filed: June 9, 2003
    Publication date: December 9, 2004
    Inventor: David Benderly
  • Publication number: 20040180608
    Abstract: A method for reducing noise in a lapping guide. Selected portions of a Giant magnetoresistive device wafer are masked, thereby defining masked and unmasked regions of the wafer in which the unmasked regions include lapping guides. The wafer is bombarded with ions such that a Giant magnetoresistive effect of the unmasked regions is reduced.
    Type: Application
    Filed: February 28, 2003
    Publication date: September 16, 2004
    Applicant: INTERNATIONAL BUSINESS MACHINES
    Inventors: Mark A. Church, Wipul Pemsiri Jayasekara, Howard Gordon Zolla
  • Patent number: 6776690
    Abstract: A process for fabricating sliders with one or more sacrificial structures (extensions) that facilitate lapping to create the air-bearing surface (ABS) is described. Prior to separating individual sliders from a wafer, a mask of material that is not removable by deep reactive ion etching (DRIE) is patterned on the surface of the sliders. The mask outlines a sacrificial extension around portions of the magnetic transducer elements that are nearest the predetermined plane which will become the ABS. The sacrificial extension makes the surface of the slider which will be lapped non-planar. The sacrificial extension extends below the predetermined ABS plane. When the sliders are individually separated by DRIE, the shape of the mask including the sacrificial extension is projected down into and along the slider body. In one embodiment, additional guide rails are disposed along the outer edges of the slider to facilitate maintaining slider symmetry during the lapping process.
    Type: Grant
    Filed: August 19, 2002
    Date of Patent: August 17, 2004
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Richard D. Bunch, Jeffrey S. Lille, Huey-Ming Tzeng
  • Patent number: 6776917
    Abstract: The method for controlling the depth of polishing during a CMP process involves the deposition of a polishing stop layer at an appropriate point in the device fabrication process. The stop layer is comprised of a substance that is substantially more resistant to polishing with a particular polishing slurry that is utilized in the CMP process than a polishable material layer. Preferred stop layer materials of the present invention are tantalum and diamond-like carbon (DLC), and the polishable layer may consist of alumina. In one embodiment of the present invention the stop layer is deposited directly onto the top surface of components to be protected during the CMP process. A polishable layer is thereafter deposited upon the stop layer, and the CMP polishing step removes the polishable material layer down to the portions of the stop layer that are deposited upon the top surfaces of the components. The stop layer is thereafter removed from the top surface of the components.
    Type: Grant
    Filed: January 3, 2001
    Date of Patent: August 17, 2004
    Assignee: International Business Machines Corporation
    Inventors: Richard Hsiao, Son Van Nguyen, Thao Pham, Eugene Zhao
  • Patent number: 6772748
    Abstract: A method of forming a stone inlay in an abrasion-sensitive substrate, such as wood, by forming a depression in the substrate, mounting stone on a damping material capable of absorbing the abrasive energy applied to the stone in reducing the dimensions of the stone to fit the depression, cutting the inlay to size and inserting it into the substrate. The cut inlay/damping material composite may be sold separately as an article of manufacture.
    Type: Grant
    Filed: September 5, 2002
    Date of Patent: August 10, 2004
    Inventor: Sean Cleary
  • Publication number: 20040152397
    Abstract: A method of CMP planarizing a silicon dioxide layer on a silicon nitride in the semiconductor die is disclosed. A wafer has a plurality substantially identical semiconductor dies defined on the wafer. Each of the dies is separated from one another by a scribe line. A layer of silicon nitride is formed on the planar surface of the wafer where the silicon nitride has a top surface which is substantially parallel to the planar surface. A layer of silicon dioxide is deposited on the top surface with the silicon dioxide varying in height above the top surface. A mask is formed across the wafer, including on the scribe line, where the mask has a plurality of locations with each location having a differing density of gap-to-pillar ratio, which is proportional to the height of the silicon dioxide above the top surface. The silicon dioxide is anisotropically etched through each gap of the mask across the entire wafer where each gap is etched by the same amount in the height direction.
    Type: Application
    Filed: January 21, 2004
    Publication date: August 5, 2004
    Applicant: Silicon Storage Technology, Inc.
    Inventors: Amitay Levi, Gian Sharma
  • Patent number: 6761616
    Abstract: In planarization process with CMP method for a work surface having very small protrusions and depressions thereon at a semiconductor process, a polishing method is provided which achieves high flatness by selectively polishing and removing the protrusions. Relating to the planarization process such as CMP processing or an aspheric lens polishing process, the polishing method is performed by forming aggregation trace of particles on the work surface by irradiating laser light. More specifically, a region where the laser light to be irradiated is the depressions adjacent to the protrusions and forms the aggregation trace of particles within the depression, thereby controlling the amount of removal material at a fine region to allow selective polishing of the protrusions.
    Type: Grant
    Filed: March 19, 2003
    Date of Patent: July 13, 2004
    Assignee: Sony Corporation
    Inventors: Keiichi Kimura, Takashi Miyoshi
  • Patent number: 6757973
    Abstract: A method for forming a throughhole in an ink-jet print head of a bubble-jet system includes the steps of: forming a bubble-generator which is adjacent to a throughhole-forming region on one side of a substrate, and which includes a heater; forming a first mask layer for covering portions excluding the throughhole-forming region on a first side of the substrate; forming a second mask layer for covering portions excluding the throughhole-forming region on a second side of the substrate; forming a first well with a predetermined depth on the throughhole-forming region of the substrate not covered by the first mask layer by spraying sand under high pressure and at a high speed onto the first side of the substrate; forming a second well corresponding to the first well on the throughhole-forming region of the substrate not covered by the second mask layer by spraying sand under high pressure and at a high speed onto the second side of the substrate; forming a throughhole by overlap of the first well and the second
    Type: Grant
    Filed: April 13, 2001
    Date of Patent: July 6, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Lae-soo Park
  • Patent number: 6733367
    Abstract: The invention shows a workpiece template and a number of additional elements for forming wafers of varying thicknesses=. The template is formed of a main disk including a plurality of cavities extending through a main plate with either a frictionless material or a backing plate forming the cavity base. The template shows additional elements to aid in the lapping/polishing abrasive fluid movement in the form of spiraling channels moving across the top surface of the template. The channels can extend through the template cavity walls. Also shown are the improvement previously stated applied to a template having notched gear-like teeth for another type of lapping/polishing machine.
    Type: Grant
    Filed: January 18, 2002
    Date of Patent: May 11, 2004
    Inventor: Phuong Van Nguyen
  • Publication number: 20040087250
    Abstract: Methods and apparatuses for planarizing a microelectronic substrate. In one aspect of the invention, a first portion of an energy-sensitive, non-sacrificial planarizing pad material is exposed to a selected energy without exposing a second portion of the material to the selected energy source. The planarizing pad material is exposed to a solvent to remove material from one of the first or second portions of the planarizing pad material at a faster rate than removing material from the other of the first and second portions. The process forms a plurality of recesses directly in the surface of the planarizing pad which are configured to support a planarizing liquid proximate to the surface of the planarizing pad material during planarization of the microelectronic substrate. Alternatively, the process can form a mold having protrusions that are pressed into the planarizing pad to define the recesses in the pad.
    Type: Application
    Filed: July 15, 2003
    Publication date: May 6, 2004
    Inventors: Stephen J. Kramer, Michael J. Joslyn
  • Patent number: 6729939
    Abstract: A method for removable attachment of a mask to an IOL to protect a sharp peripheral edge of the IOL optic during polishing.
    Type: Grant
    Filed: December 17, 2001
    Date of Patent: May 4, 2004
    Assignee: Bausch & Lomb Incorporated
    Inventor: Richard J. Wrue
  • Patent number: 6726533
    Abstract: In a method for polishing leads of a semiconductor package, a plurality of semiconductor packages is arranged in a certain manner. Then, the leads are automatically polished. The semiconductor packages may be masked to expose at least a part of the leads to be polished.
    Type: Grant
    Filed: November 28, 2001
    Date of Patent: April 27, 2004
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Takeyuki Sato
  • Publication number: 20040033763
    Abstract: A process for fabricating sliders with one or more sacrificial structures (extensions) that facilitate lapping to create the air-bearing surface (ABS) is described. Prior to separating individual sliders from a wafer, a mask of material that is not removable by deep reactive ion etching (DRIE) is patterned on the surface of the sliders. The mask outlines a sacrificial extension around portions of the magnetic transducer elements that are nearest the predetermined plane which will become the ABS. The sacrificial extension makes the surface of the slider which will be lapped non-planar. The sacrificial extension extends below the predetermined ABS plane. When the sliders are individually separated by DRIE, the shape of the mask including the sacrificial extension is projected down into and along the slider body. In one embodiment, additional guide rails are disposed along the outer edges of the slider to facilitate maintaining slider symmetry during the lapping process.
    Type: Application
    Filed: August 19, 2002
    Publication date: February 19, 2004
    Inventors: Richard D. Bunch, Jeffrey S. Lille, Huey-Ming Tzeng
  • Patent number: 6685538
    Abstract: A machine for machining a volume, in particular an inlay, by automatic duplicating, includes an abrasive disc having a rotatable drive, a support for a blank of the volume, the disc and the blank being rotatable, a rotatable duplicator support a touch-sensing probe capable of being urged into contact with the duplicator outer surface, there being relative displacement between the blank support and the disc and between the duplicator support and the touch-sensing probe so as to enable the disc and the touch-sensing probe to remain permanently in contact with the blank and the duplicator, and a mobile carriage having at least two degrees of freedom on which are mounted the support for the blank and for the duplicator, the carriage commanding and controlling the drive of the rotatable disc and the duplicator support.
    Type: Grant
    Filed: August 14, 2001
    Date of Patent: February 3, 2004
    Inventor: Pierre Farre
  • Publication number: 20040014397
    Abstract: An indium tin oxide (ITO) coating is selectively removed from a substrate by printing a mask on the coated surface of the substrate to cover those regions of the surface on which the ITO is to remain. The substrate is then abraded to remove the ITO from the unmasked regions of the surface and the mask is removed with a solvent. The method provides quick and accurate removal of ITO without the use of acids or lasers.
    Type: Application
    Filed: August 15, 2003
    Publication date: January 22, 2004
    Inventor: Frank Tyldesley
  • Patent number: 6675472
    Abstract: A process for forming a burrless castellation for a plastic chip carrier comprising forming one or more through holes in a substrate, plating the through holes with a metal to a thickness ranging from about 2 microns to about 6 microns, routing slots along the line extending through the through holes to produce half cylinder-shaped side-contact surfaces, and plating the half cylinder-shaped side-contact surfaces to a thickness in the range of 15 to 25 microns.
    Type: Grant
    Filed: April 13, 2000
    Date of Patent: January 13, 2004
    Assignee: Unicap Electronics Industrial Corporation
    Inventors: Edward Huang, Jonny Ma, Scott Chen, Paul Wu