Abstract: Systems and methods for providing flexible time masks for transmission in a wireless communication system are disclosed. In some embodiments, a method of operation of a node in a wireless communication system comprises providing, to a wireless device, an indication of a position of a transient period during a time mask, where the position of the transient period is adapted to a clear channel assessment period at the wireless device or the position of the transient period is such that the transient period occurs at least partially during a clear channel assessment period. The time mask defines an OFF period during which a transmitter of the wireless device is to be off, an ON period during which the transmitter of the wireless device is to be on, and the transient period. The transient period is a period during which the transmitter of the wireless device is to ramp-up or ramp-down.

Abstract: A system and method is disclosed for determining a particular vehicle state based on a UWB signal received at a plurality of receiving nodes. A plurality of channel-impulse responses (CIRs) may be computed from the UWB signal received from the plurality of receiving nodes. A plurality of peak-based features based on a selected position and amplitude may be extracted from the plurality of CIRs. A plurality of correlation-based features may be generated by correlating the plurality of CIRs to a corpus of reference CIRs relating to a plurality of vehicle states. A plurality of maximum likelihood vehicle matrices may be generated by correlating the plurality of CIRs to the corpus of reference CIRs relating to the plurality of vehicle states. The vehicle state may then be determined by processing the plurality of peak-based features and correlation-based features using the machine learning classification algorithm.

Abstract: A method and apparatus for input matching of a passive mixer are disclosed. The passive mixer includes a differential transistor pair including a first transistor and a second transistor, a first inductor having one end connected to the first transistor and another end connected to a ground, a second inductor having one end connected to the second transistor and another end connected to a ground, and a third inductor having one end for receiving a radio frequency (RF) signal and another end connected to a ground.

Abstract: Embodiments include methods and/or procedures for a user equipment (UE) to activate a secondary cell (SCell) for operating with the UE's primary serving cell (PSC). Embodiments include determining a receiver activity rate for the UE. Embodiments also include receiving, from the PSC, an activation request identifying the SCell. Embodiments also include activating the SCell based on the receiver activity rate. Other embodiments include complementary methods and/or procedures performed by a network node arranged to communicate with one or more UEs via a PSC and at least one selectively activated SCell. Other embodiments include UEs and network nodes configured to perform operations corresponding to various ones of the methods and/or procedures, as well as computer-readable media embodying such operations.

Abstract: An apparatus and method are provided. The apparatus includes a phase locked loop (PLL) configured to generate a reference signal; a sub-sampling PLL (SS-PLL) connected to the PLL and configured to sub-sample the reference signal; and a first pre-charge circuit connected to a sampling device of the SS-PLL and configured to facilitate frequency locking of the SS-PLL.

Abstract: A network communication device includes an input port configured to receive a downstream signal from a network, a first output port in communication with the input port and configured to receive a first reduced-power version of the signal received at the input port, one or more second output ports, and a converting circuit configured to receive a second reduced-power version of the signal received at the input port, down-convert a high-frequency portion thereof, and produce a down-converted signal. The one or more second output ports receive at least a portion of the down-converted signal.

Abstract: The apparatus relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long-Term Evolution (LTE). The disclosure relates to an apparatus including an electronic circuit for amplifying a signal. The apparatus includes a transceiver including an amplification circuit, and at least one processor coupled to the transceiver. The amplification circuit includes a first path to generate a first current corresponding to a voltage of an input signal, a second path to generate a second current corresponding to a voltage of the input signal, a separation unit to control each of the first current and the second current, a current mirror to generate a third current corresponding to the first current, and a folding unit to generate an output signal on the basis of the second current and the third current.

Abstract: An electronic device may include a harmonic rejection mixer with a delay line, mixer array, and load. The delay line may generate LO phases. Each mixer in the array may have a first input that receives an LO phase and a second input coupled to an input switch and the first input of the next mixer circuit through an inter-mixer switch. The load may include a set of switches. In a transmit mode, the input switches and set of switches may be closed while the inter-mixer switches are open. In a self-calibration mode, the input switches and set of switches may be open while the inter-mixer switches are closed. A controller may sweep through phase codes for the programmable delay line while storing a digital output from the load. The controller may calibrate the phase code based on the digital output.

Abstract: Spectral components of waves having one or more properties other than phase and amplitude that vary monotonically with time at a receiver, and provide retardations or lags in the variation in proportion to the times or distances traveled from the sources of the waves to the receiver. The lags concern the property values at departure from a source and are absent in its proximity. Orthogonality of the lags to modulated information makes them useful for ranging and for separation or isolation of signals by their source distances. Lags in frequencies and wavelengths permit multiplication of capacities of physical channels. Constancy of the lagging wavelengths along the entire path from a source to the receiver enables reception through channels or media unusable at the source wavelengths, as well as imaging at wavelengths different from the illumination.

Abstract: A balanced filter includes an unbalanced terminal, an unbalanced-side inductor, a first balanced terminal, a second balanced terminal, a balanced-side inductor, a power supply line, and a matching network. The unbalanced-side inductor is provided between the unbalanced terminal and a ground. The balanced-side inductor is provided between the first balanced terminal and the second balanced terminal and couples to the unbalanced-side inductor via an electromagnetic field. The power supply line includes a first end connected to a middle portion of the balanced-side inductor and a second end connected to a direct-current power supply. The matching network matches a first impedance between the first balanced terminal and the second end of the power supply line to a second impedance between the second balanced terminal and the second end of the power supply line.

Abstract: An apparatus and a method for sampling a signal in a wireless communication system that employs a time division duplex (TDD) scheme are provided. According to various embodiments of the present disclosure, a method for a base station being operated in a wireless communication system that employs TDD comprises the steps of: determining a switching section for controlling a conversion mode of a sampling rate conversion circuit based on a timing advance (TA) value with respect to a signal transmitted by a terminal; generating a switching signal within the switching section; changing the conversion mode from a first mode to second mode in response to the switching signal; and changing a sampling rate of a transmission signal or reception signal based on the second mode.

Abstract: A unit cell for a resistive mixer includes a plurality of active devices arranged in series, wherein each of said plurality of active devices having a different output conductance. A resistive mixer includes a plurality of active devices connected in series with one another to form a unit cell.

Abstract: A transceiver system includes a clock generator and an analog-to-digital circuit (ADC). The transceiver system also includes a coupling correction circuit coupled to the clock generator and to the ADC, wherein the coupling correction circuit is configured to provide an in-phase correction and a quadrature-phase correction to a signal received by the ADC.

Abstract: Circuits comprising: a plurality of LNTA branches, each comprising: a cascode common-source (CCS) LNTA, a plurality of passive mixers (PMs), and a plurality of baseband two-stage Miller compensated TIAs (BB2S-TIAs); a plurality of mixer-first branches, each comprising: a plurality of RF switches, a plurality of baseband folded-cascode TIAs (BBFC-TIAs), and a plurality of Cherry-Hooper amplifiers, wherein an input to each of the BBFC-TIAs is provided by an output of at least one of the RF switches, and an input to each of the amplifiers is provided by an output of a corresponding one of the BBFC-TIAs; a first plurality of clock modulators that provide first non-overlapping modulated clocks that are provided to an input of the PMs; and a second plurality of clock modulators that provide a plurality of tri-level modulated mixer clocks that control the switching of the RF switches.

Abstract: Systems and methods to amplify the response of a MEMS micro-oscillator by driving the MEMS device at its electrical and mechanical resonance frequencies, simultaneously. This enhances the MEMS mechanical sensitivity to electrical excitation and increases the voltage across the MEMS capacitor. Moreover, using a combination of two input signals at different frequencies (beat signal) may be used to achieve double resonance in any MEMS device, even if its natural frequency is far from its electrical resonance.

Abstract: The present disclosure is directed to an apparatus and method for cancelling self-interference caused by full-duplex communication. In a full-duplex communication device, the receiver will generally experience significant self-interference from the full-duplex communication device's own transmitter transmitting a strong outbound signal over the same channel that the receiver is to receive a weak inbound signal. The apparatus and method are configured to adjust a phase and gain of the outbound signal provided at the output of a power amplifier (PA) and inject the phase and gain adjusted outbound signal at the input of a low-noise amplifier (LNA) to cancel the interference from the outbound signal in the inbound signal.

Abstract: Embodiments provide an amplification circuit, an apparatus for amplifying, a low noise amplifier, a radio receiver, a mobile terminal, a base station, and a method for amplifying. An amplification circuit for amplifying a radio signal comprises a first amplification stage configured to amplify an input signal, Vin(t), to obtain an intermediate signal. The amplification circuit further comprises a cascoding circuit configured to amplify the intermediate signal to obtain a first output signal Voutn(t). The amplification circuit further comprises a second amplification stage configured to amplify the intermediate signal to obtain a second output signal, Voutp(t).

Abstract: A radar assembly for receiving signals at spaced frequencies from an unknown transmitting source comprising a receiver operative to receive signals; the receiver comprising a series of channels, each channel comprising a low pass filter configured to allow passage of a signal from an unknown transmitting source, an analog to digital converter configured to transform the signal from the unknown transmitting source to a digital signal, a Hilbert transform configured to transform the digital signal from the unknown transmitting source into a single sideband signal, a Fourier transform configured to transform the single sideband signal into a plurality of regularly spaced frequency samples, and an inverse Fourier transform for extracting regularly spaced frequency samples; whereby extracted pulses form a train of pulses that are inputted into an imager which utilizes synthetic aperture radar to form an image of the area of interest containing the unknown transmitting device and method thereof.

Abstract: A transceiver system includes a clock generator and an analog-to-digital circuit (ADC). The transceiver system also includes a coupling correction circuit coupled to the clock generator and to the ADC, wherein the coupling correction circuit is configured to provide an in-phase correction and a quadrature-phase correction to a signal received by the ADC.

Abstract: Systems, methods, and devices enable spectrum management by identifying, classifying, and cataloging signals of interest based on radio frequency measurements. In an embodiment, signals and the parameters of the signals may be identified and indications of available frequencies may be presented to a user. In another embodiment, the protocols of signals may also be identified. In a further embodiment, the modulation of signals, data types carried by the signals, and estimated signal origins may be identified.

Abstract: A frequency multiplier, which may include multiple commutator cells, for multiplying an input signal is provided. A frequency doubler is provided that includes at least one transformer. Each of the at least one transformer includes a primary and a secondary. Each secondary includes a center tap. The frequency doubler further includes at least one commutator cell. Each of the at least one commutator cell includes a first differential pair of input terminals and a second differential pair of input terminals. Each primary is connected to the first pair of differential input terminals and each secondary is connected to the second differential pair of input terminals. The frequency doubler further includes at least one current source and at least one ground. The center tap is connected to the at least one ground via the at least one current source.

Abstract: An RF digitization and collection system (RFDCS) and methods for implementing the RF digitization and collection system to manage an application storage and retrieval space (App Space), wherein the App Space includes apps that may perform various offline and/or real-time transforms of RF signals received, stored, or played back on the RFDCS. Also, in the various embodiments, the RFDCS may govern the system resources available to these apps while ensuring that the RFDCS's core system functions are not impacted by the execution of one or more of these apps in the App Space. Thus, the RFDCS may enable users to utilize real-time signal processing by running various specialized apps without compromising the RFDCS's core system function, thereby promoting dynamic “on-the-fly” transformation of raw RF signals without compromising the user's overall experience.

Abstract: An interface device for providing Intrinsic Safety to a Smart Identity Module (SIM) card includes a buffer circuit including a voltage regulator and a voltage level translator including drivers. Baseband processor side pins include at least an input/output (IO) pin for receiving data signals, first SIM reset (RST) pin, core power supply (VCC) pin, a clock (CLK) pin, a battery power supply (VBAT) pin, and SIM side pins include at least a VCC pin, a SIM CLK pin, second SIM RST pin, and a SIM IO pin. There is at least one series resistor (R1, R2, R3, R4 and R5) in series with each of the baseband processor side pins.

Abstract: A system includes a first circuit and a second circuit. The first circuit includes a first MOS transistor having a gate and a drain. The first circuit is configured to receive a radio frequency (RF) signal at the gate of the first MOS transistor. The drain of the first MOS transistor is configured to output a first current that is proportional to the square of the input voltage of the RF signal while receiving the RF signal. The second circuit includes a second MOS transistor having a source configured to receive a first current from the first circuit. The second MOS transistor is biased in a triode region and has a channel resistance between the source and a drain. The second circuit is configured to output a voltage proportional to the value of the power of the RF signal received by the first circuit.

Abstract: A down-conversion circuit for a receiver circuit is disclosed, the down-conversion circuit comprises a first passive switching mixer arranged to down-convert a received radio frequency, RF, signal with a first local oscillator, LO, signal (LO1) having a first duty cycle for generating a first down-converted signal at an output port of the first passive switching mixer. The down-conversion circuit further comprises a second passive switching mixer arranged to down-convert the received RF signal with a second LO signal (LO2) having the same LO frequency as the first LO signal (LO1) and a second duty cycle, different from the first duty cycle, for generating a second down-converted signal at an output port of the second passive switching mixer.

Abstract: Embodiments of a mixer of a Near field communication (NFC) receiver device and a method for operating a mixer of an NFC receiver device are disclosed. In an embodiment, a mixer of an NFC receiver device includes an input unit from which an input signal is received, a sample and hold circuit configured to sample the input signal and to store electrical charge based on the sampled input signal in order to generate a differential output signal, a control unit configured to switch the sample and hold circuit between different operational modes based on whether the input signal is a single-ended input signal or a differential input signal, and a differential output unit from which the differential output signal is output. Other embodiments are also described.

Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for detecting characteristics of an input signal. One aspect includes a first finite impulse response (FIR) filter, a second FIR filter, and a controller coupled with the first and second FIR filters. The first FIR filter receives an input signal and a first reference signal. The first FIR filter filters the first reference signal to generate a first sinusoidal signal and mixes the first sinusoidal signal and the input signal to generate a first mixed signal. The second FIR filter receives the input signal and a second reference signal. The second FIR filter filters the second reference signal to generate a second sinusoidal signal and mixes the second sinusoidal signal and the input signal to generate a second mixed signal. The controller determines characteristics of the input signal based on the first and second mixed signals.

Abstract: A semiconductor integrated circuit includes a low-noise amplifier circuit, a transformer, and an ESD protection circuit. The low-noise amplifier circuit amplifies a radio signal that is supplied to an input terminal. The transformer includes a first winding and a second winding and functions as an input impedance matching circuit for the low-noise amplifier circuit, in which at least one end of the second winding is connected to the input terminal of the low-noise amplifier circuit. The ESD protection circuit is connected to a center tap of the first winding.

Abstract: An electronic device includes a transceiver connected to a differential signal transmission line for transmitting a differential signal through a pair of signal lines to communicate with one or a plurality of other devices connected to the differential signal transmission line. The electronic device includes: a suppression circuit that is operated by a power source voltage to suppress waveform distortion in the differential signal transmitted through the differential signal transmission line; and a power source controller that controls supply or cutoff of the power source voltage to the suppression circuit in response to a change in a differential voltage between the pair of signal lines.

Abstract: A balun includes an input coil and an output coil with first and second outputs that vary during normal operation. The output coil has a center point connection that remains substantially constant during normal operation. An ESD circuit provides a low impedance path between the center point connection and chip ground when the voltage at the center point connection is above a first threshold voltage or below a second threshold voltage and isolates the center point connection from chip ground otherwise. Another ESD protection circuit provides ESD protection for other input or output terminals of the integrated circuit by selectively coupling the other input or output terminals to chip ground. Thus, a charge that builds up between one of the balun outputs and another terminal on the integrated circuit can be safely dissipated.

Abstract: A radio circuit, comprises an antenna; a differential power amplifier, comprising differential transmit inputs and differential transmit outputs, configured to amplify differential transmit signals received via the differential transmit inputs and output the amplified differential transmit signals via the differential transmit outputs; a differential low noise amplifier, comprising differential receive inputs and differential receive outputs, configured to receive differential receive signals via the differential receive inputs and output amplified differential receive signals via the differential receive outputs; and a transformer comprising a primary winding and a secondary winding, the primary winding coupled with the differential transmit outputs of the power amplifier and the differential receive inputs of the low noise amplifier and the secondary winding coupled with the antenna.

Abstract: A system and method for abstracting an external device from a host includes the external device in communication with the host device. The host device includes an abstraction driver communicating with the plurality of different external devices. The host device communicates a control command to the abstraction driver. The abstraction driver communicates abstraction control commands from the abstraction driver to the external device in response to the control command. The external device determines executable code corresponding to the abstraction control commands, performs executable code at the external device and communicates data from the external device to the receiving device.

Abstract: A satellite-based emission and reception device, intended to receive and to process radiofrequency signals originating from an uplink and then to emit the processed signals on a downlink towards terrestrial users, comprises a power divider, two independent frequency converters and two input demultiplexers connected respectively at the output of the two corresponding frequency converters, each frequency converter being controlled by a dedicated local oscillator, the two local oscillators operating at one and the same frequency, the two input demultiplexers comprising channel filters operating in different, disjoint frequency sub-bands spaced apart in frequency, two adjacent frequency sub-bands being filtered by two channel filters belonging to different input demultiplexers.

Abstract: Recently proposed noise-cancelling receivers report a best case trade-off between noise figure and linearity for a matched wideband receiver. These receivers are further improved using a passive front-end gain. The front-end gain reduces the power requirements of the radio frequency transconductance stage, and potentially other stages where, e.g., smaller mixer switches may be employed.

Abstract: A filter auto-calibration system comprises a multi-clock module that includes a multi-clock generator configured to generate a first variable frequency signal based on a channel setting, the multi-clock generator comprising a quadrature signal generator configured to generate an in-phase component and a quadrature component of the first variable frequency signal; and a mixer configured to generate an in-phase component and a quadrature component of a quadrature signal from a received signal other than the first variable frequency signal. The system also comprises at least one filter to be calibrated, and an auto-calibration control module coupled to the multi-clock module and the at least one filter, the auto-calibration control module configured to receive the in-phase component and quadrature component of the first variable frequency signal from the multi-clock module, and configured to control calibration of the at least one filter based on the channel setting.

Abstract: In an example, there is disclosed a multiple-input analog-to-digital converter configured to receive a plurality of analog inputs and to output one or more digital outputs. In one embodiment, two input analog signals are received. The two analog signals may be mixed in a combiner, which provides them to a pipeline ADC. In another embodiment, the combiner may time multiplex the two analog input signals and provide two separate outputs signals. Advantageously, the multiple-input ADC of the present Specification may be realized with a single ADC pipeline.

Abstract: A passive electro-mechanical device that reduces phase noise in oscillators, thereby improving their frequency precision. The noise reduction device can consist of a pair of coupled nonlinear resonators that are driven parametrically—by modulating their natural frequency in time, through the output signal of a conventional oscillator at a frequency close to the sum of the linear mode frequencies. Above the threshold for parametric response, the coupled resonators can exhibit oscillation at an inherent frequency. The novel possibility for noise elimination is realized by tuning the system to operating points for which this periodic signal is immune to frequency noise in the drive signal, providing a way to clean the phase noise of the driving oscillator.

Abstract: A wireless communication device configured for receiving a multiple carrier signal is described. The wireless communication device includes a primary signal splitting carrier aggregation architecture. The primary signal splitting carrier aggregation architecture includes a primary antenna and a transceiver chip. The primary signal splitting carrier aggregation architecture reuses a first diversity/simultaneous hybrid dual receiver path. The wireless communication device also includes a secondary signal splitting carrier aggregation architecture. The secondary signal splitting carrier aggregation architecture includes a secondary antenna and a receiver chip. The secondary signal splitting carrier aggregation architecture reuses a second diversity/simultaneous hybrid dual receiver path.

Abstract: Examples of a digital transceiver, a switched-capacitor sampling mixer, and an N-stage switched-capacitor amplifier are generally described herein. The digital transceiver may include a plurality of switched-capacitor sampling mixers and a plurality of N-stage switched-capacitor amplifiers. Each mixer samples a received differential RF signal. The pair of N-stage switched-capacitor amplifiers operates as charge redistribution amplifiers. Each N-stage switched-capacitor amplifier provides a near-constant capacitive load for one of the mixers.

Abstract: Embodiments of the present invention may provide a receiver. The receiver may include an RF section and a quadrature mixture, coupled to the RF section, to downconvert a first group of wireless signals directly to baseband frequency quadrature signals and to downconvert a second group of wireless signals to intermediate frequency quadrature signals. The receiver may also include a pair of analog-to-digital converters (ADCs) to convert the downconverted quadrature signals to corresponding digital quadrature signals. Further, the receiver may include a digital section having two paths to perform signal processing on the digital baseband frequency quadrature signals and to downconvert the digital intermediate frequency signals to baseband cancelling a third order harmonic distortion therein. The receiver may be provided on a monolithically integrated circuit.

Abstract: A programmable non-volatile device is made with a floating gate that functions as a FET gate that overlaps a portion of a source/drain region and allows for variable coupling through geometry and/or biasing conditions. This allows a programming voltage for the device to be imparted to the floating gate through variable capacitive coupling, thus changing the state of the device. Multi-state embodiments are also possible. The invention can be used in environments such as data encryption, reference trimming, manufacturing ID, security ID, and many other applications.

Abstract: A heterodyne optical signal detector and method performed thereby, the signal detector including an optical signal spectrum shaper operable to modify the shape of the frequency spectrum of a received optical signal, a laser local oscillator (LO), and polarization beam splitters (PBSs) to divide the signal and the LO into orthogonal components, waveguides in which intermediate frequency (IF) signals are formed, balanced photodetectors (BPDs) arranged to receive the IF signals and operable to convert the IF signals into electric signals, and analog to digital converters (ADCs) that digitize the electric signals.

Abstract: The inventive concept relates to a wireless communication receiver. The wireless communication receiver includes a second off-chip RF filter, an RF-to-digital converter and a digital pre-processor processing a signal converted into a digital. The RF-to-digital converter converts an RF signal being received into a digital signal of DC frequency band or intermediate frequency band and has a dynamic range that can process a wanted RF band signal and unwanted signals near to the wanted RF band signal. The digital pre-processor digitally controls a signal gain to transmit it to a modulator/demodulator.

Abstract: A wireless communication device configured for receiving a wireless multiple-input and multiple-output signal. The wireless communication device includes a first multiple-input and multiple-output carrier aggregation receiver reuse architecture. The first multiple-input and multiple-output carrier aggregation receiver reuse architecture includes a first antenna, a second antenna and a transceiver chip. The first multiple-input and multiple-output carrier aggregation receiver reuse architecture reuses a first carrier aggregation receiver path. The wireless communication device also includes a second multiple-input and multiple-output carrier aggregation receiver reuse architecture. The second multiple-input and multiple-output carrier aggregation receiver reuse architecture includes a third antenna, a fourth antenna and a receiver chip. The second multiple-input and multiple-output carrier aggregation receiver reuse architecture reuses a second carrier aggregation receiver path.

Abstract: A circuit for a low-power and blocker-tolerant mixer-amplifier stage may include a complementary mixer formed by transmission gates having complementary structures. The complementary mixer may be configured to receive one or more radio-frequency (RF) signals and to convert the one or more RF signals to intermediate frequency (IF) current signals. A complementary TIA may be coupled to the complementary mixer and may be configured to receive the IF current signals and provide IF voltage signals. The complementary TIA may be formed by coupling an NMOS-TIA and a PMOS-TIA to a common load. A first portion of the complementary mixer may be coupled to the NMOS-TIA and a second portion of the complementary mixer may be coupled to the PMOS-TIA.

Abstract: A sub-harmonic mixer comprising a mixer circuit with input ports for RF and LO signals, and an output port for the product of the signals at the input ports, and an LO switching stage with input ports for an LO signal and the LO signal phase shifted 180 degrees. The LO switching stage comprises a third input port to which the output port of the mixer circuit is connected and a first output port for the product of the signal at its third and first input ports, and a second output port for the product of the signal at the third and second input ports with the same amplitude as the first output signal 180 degrees phase shifted. In the sub-harmonic mixer the mixer circuit comprises a transconductance mixer.

Abstract: One or more circuits may comprise at least one first-type analog-to-digital converter (ADC) and at least one second-type ADC. The circuit(s) may be operable to receive a plurality of signals, each of which may comprise a plurality of channels. The circuit(s) may be operable to digitize a selected one or more of the channels. Which, if any, of the selected channels are digitized via the at least one first-type ADC and which, if any, of the selected channels are digitized via the at least one second-type ADC, may be based on which of the plurality of channels are the selected channels and/or based on power consumption of the circuit(s). A bandwidth of each first-type ADC may be on the order of the bandwidth of one of the received signals. A bandwidth of each second-type ADC may be on the order of the bandwidth of one of the plurality of channels.

Abstract: Provided are a radio frequency identification (RFID) tag and a method for receiving a signal of the RFID tag. The RFID tag includes a voltage generator configured to generate a voltage signal from a received signal, a common gate circuit configured to convert the voltage signal into a current signal, a current/voltage converter configured to the current signal into a voltage signal by using a resistance value, a low-pass filter configured to perform low-pass filtering on the converted voltage signal, a buffer configured to buffer the low-pass-filtered voltage signal within an operation range, and a peak detector configured to detect a peak value from the buffered signal to demodulate information data. The current/voltage converter controls the resistance value to convert the current signal into a voltage signal included within the operation range of the buffer.

Abstract: A circuit includes first and second transconductance stages that generate first and second currents, respectively, in response to an input signal. A current combiner circuit selectively couples the first current to a first output, selectively couples the second current to the first output, selectively couples the first current to a second output, and selectively couples the second current to the second output. In response to the first current being coupled to both the first and second outputs, the current combiner circuit couples the second current to both the first and second outputs. In response to the first current being decoupled from the second output, the current combiner circuit decouples the second current from both the first and second outputs. In response to the first current being decoupled from the first output, the current combiner circuit decouples the second current from both the first and second outputs.

Abstract: A wireless device for receiving wireless signals based on channel conditions is described. The wireless device includes a direct sampling path used when operating in a direct sampling mode. The wireless device also includes a zero intermediate frequency path used when operating in a normal sampling mode. The wireless device further includes a first switch coupling a filter module input to an input of the direct sampling path and an input of the zero intermediate frequency path. The wireless device also includes a second coupling a filter module output to an output of the direct sampling path and an output of the zero intermediate frequency path. The first switch and the second switch are configured to switch between the direct sampling path and the zero intermediate frequency path based on a received signal power.