Abstract: A method for reducing frequency band interference for a multi-mode terminal, including: using a first frequency band to establish a first service in a first network standard; using a second frequency band to establish a second service in a second network standard; when determining that the first frequency band and the second frequency band interfere with each other, updating a frequency band capability support state or reporting an interference collision event to a network corresponding to a low-priority service, so that the network corresponding to the low-priority service updates a frequency band used by the low-priority service to a frequency band that has less interference with a frequency band used by a high-priority service, and establishing the low-priority service according to the updated frequency band. According to the embodiments of the present invention, interference between frequency bands of the multi-mode terminal may be reduced.

Abstract: A RF switch may include: a common port coupled to an antenna to transmit and receive first and second high frequency signals; a transmitting switching unit coupled between a transmitting port transferring the first high frequency signal and the common port and including a plurality of switching devices coupled to each other in series; and a receiving switching unit coupled between a receiving port transferring the second high frequency signal and the common port and including a first switching unit including a first switching device. The first switching unit may further include a second switching device having a first terminal coupled to a first terminal of the first switching device and a second terminal coupled to a control terminal of the first switching device.

Abstract: A radio frequency switch may include: a common port transmitting and receiving a radio frequency signal; a receive switch unit including a first switch unit having a plurality of first switch elements and a second switch unit having a plurality of second switch elements; and a transmit switch unit including a third switch unit having a plurality of third switch elements and a fourth switch unit having a plurality of fourth switch elements. The receive switch unit may further include a plurality of first capacitors connected between a first terminal and a body terminal of each of the plurality of first switch elements. The transmit switch unit may further include a plurality of second capacitors connected between a second terminal and a body terminal of each of the plurality of third switch elements.

Abstract: A mixer includes a first node to which an intermediate frequency (IF) signal is input; first and second transistors that respectively have control terminals supplied with local signals having mutually opposite phases and output terminals connected to the first node; a first filter that is connected between the output terminal of the second transistor and the first node and suppresses passage of the IF signal; a second node to which the IF signal is input; third and fourth transistors that respectively have control terminals supplied with local signals having mutually opposite phases and output terminals connected to the second node; a second filter that is connected between the output terminal of the fourth transistor and the second node and suppresses passage of the IF signal; and a combiner combining a signal output from the first node and a signal output from the second node.

Abstract: A radio receiver and method of operating the same are disclosed. In one embodiment, the radio receiver may include a RF receive path configured to convey a first radio signal within a first band to a radio tuning circuit. The RF receive path may be controllable using a first AGC circuit. The radio receiver may also include a loop-through path configured to convey a second radio signal within a second band between an input and an output of the radio receiver. The second band may be different from the first band. The loop-through path may be controllable using a second AGC circuit.

Abstract: A sub-harmonic electronic mixer has at least one field effect transistor (FET) having a gate, source, and drain; and a useful signal input at a useful frequency; and a local oscillator input. The input receives the oscillator signal at a frequency being an integral fraction of the useful frequency, plus or minus a mixing frequency to provide a signal output. A gate of the FET and/or the drain and/or the source receives the useful signal to generate a gate-source voltage and/or a drain-source voltage whereby the gate receives the local oscillator signal to generate a gate-source voltage, and the drain or a source receives the local oscillator signal to generate a drain-source voltage. A phase shift is introduced between the signal received at the gate and the signal received at the drain or source of the FET.

Abstract: Systems, apparatus, modules, and methods of communicating with memory devices utilizing multi-band communication containing a baseband and one or more amplitude shift keyed (ASK) RF channels over each differential pair of off-chip transmission lines. Configurations are described for interfacing between microprocessors, or controllers and memory devices or modules, and within a DIMM and its DRAM devices, and between multiple DIMM memory modules.

Abstract: Provided is a band pass filter constituted by a printed circuit board (PCB) and a multi-layer ceramic chip (MLCC) to be mounted in a circuit, without additional parts such as a low temperature co-fired ceramic (LTCC) based filter, and so on, and it is an object to produce a band pass filter constituted by an inductor formed of a PCB pattern and a capacitor formed of an MLCC to implement a high performance and compact band pass filter. The band pass filter includes an inductor pattern part formed of a plurality of PCB patterns and having inductance; an MLCC part constituted by a plurality of MLCCs mounted in a lower end side of the inductor pattern part and having a capacitance; and a port part formed of a plurality of PCB patterns and connected to the PCB patterns extending from the inductor pattern part.

Abstract: Switches for use in RF devices are provided that offer a better balance of power losses and switching times than switches of the prior art. Switches of the present invention comprise a stack of transistors controlled a symmetric bias network. The stack of transistors includes an even number of transistors arranged in series, where every two successive transistors defines a pair. The bias network includes a symmetrically branching set of connections, where the gates of every pair of transistors are connected by a first connection having a first node, and two or more first nodes are connected by a second connection to a second node, and so forth. The symmetry of the bias network tends to reject even harmonics, and the rejection of even harmonics can be further enhanced by adding capacitors between the bias network and the stack of transistors at points of symmetry.

Abstract: A digital correlator including an input, a plurality of serially connected delay elements, wherein a first delay element of the plurality of serially connected delay elements is coupled to the input, a plurality of current elements, wherein each respective current element of the plurality of current elements is coupled to a respective delay element, and each current element has a current, and a summer for summing the currents of the plurality of current elements, the summer having an output for the digital correlator.

Abstract: A monolithically integrated circuit, particularly an integrated circuit for radio frequency power applications, may include a transistor and a spiral inductor. The spiral inductor is arranged above the transistor. An electromagnetic coupling is created between the transistor and the inductor. The transistor may have a finger type layout to prevent any significant eddy currents caused by the electromagnetic coupling from occurring. The chip area needed for the circuit may be reduced by such arrangement.

Abstract: A circuit includes first and second transconductance stages that generate first and second currents, respectively, in response to an input signal. A current combiner circuit selectively couples the first current to a first output, selectively couples the second current to the first output, selectively couples the first current to a second output, and selectively couples the second current to the second output. In response to the first current being coupled to both the first and second outputs, the current combiner circuit couples the second current to both the first and second outputs. In response to the first current being decoupled from the second output, the current combiner circuit decouples the second current from both the first and second outputs. In response to the first current being decoupled from the first output, the current combiner circuit decouples the second current from both the first and second outputs.

Abstract: The present disclosure relates to a circuit for providing a signal gain, comprising: a first stage comprising a first set of variable gain transconductors arranged for receiving an input signal and for performing phase-shifting of the input signal, thereby producing an intermediate signal, and a second stage, comprising a second set of transconductors and a plurality of capacitors arranged for receiving the intermediate signal and for providing an output signal to a combiner, wherein the first stage and second stage together form a filter, and wherein the first set of variable gain transconductors and at least one of the transconductors of the second set define the signal gain of the circuit.

Abstract: A transmit (TX) signal path circuit in a multiple-input, multiple-output (MIMO) transceiver responsive to a digital front end (DFE) for generating receive (RX) path phase alignment signals is disclosed. A digital up-conversion block uses a first numerically-controlled oscillator (NCO) for generating digital intermediate frequency (IF) signals for ordinary TX signal generation, and a different, second NCO for generating digital IF signals for RX phase alignment signal generation. An RF up-conversion block uses a TX local oscillator (LO) for generating analog RF signals for ordinary TX signal generation, and a different feedback (FB) LO for generating analog RF signals for RX phase alignment signal generation. Thus, phase alignment of the circuitry used for ordinary TX signal generation is left undisturbed by RX phase alignment signal generation.

Abstract: A passive mixer with channel impedance equalization is disclosed. In an exemplary embodiment, an apparatus includes replica devices configured to generate replica output signals and an error amplifier configured to generate bias signals based on the replica output signals. The bias signals are configured to equalize on-state channel impedances associated with a mixer.

Abstract: A system may comprise a plurality of signal processing paths, a bin-wise combiner, an inverse transformation block, and a DAC. Each signal processing path may comprise a transformation block that is operable to transform a first time-domain digital signal to an associated frequency-domain signal having a plurality of subband signals. The bin-wise combiner may be operable to combine corresponding subband signals of the plurality of signal processing paths. The inverse transformation block may be operable to transform output of the bin-wise combiner to an second time-domain signal. The DAC may be operable to converts the second time-domain signal to a corresponding analog signal.

Abstract: A wireless communication system includes: a filter; and a semiconductor chip including a signal processing integrated circuit having an amplifier, wherein a main surface of the semiconductor chip is provided with a plurality of electrode terminals along an edge portion thereof; wherein the amplifier has a transistor including a control electrode, a first electrode through which a signal is outputted, and a second electrode to which a voltage is applied; wherein the control electrode, the first electrode and the second electrode of the transistor are connected to the electrode terminals, respectively; and wherein none of wirings are arranged between the electrode terminals and placements of the control electrode, the first electrode and the second electrode, making space between the electrodes and the electrode terminals narrow.

Abstract: A semiconductor apparatus includes multiple field effect transistors provided between an antenna terminal to be connected to an antenna and multiple external terminals through which RF signals are capable of being supplied and a voltage generating circuit. When the field effect transistors provided between one of the multiple external terminals and the antenna terminal are turned off, the voltage generating unit charges a capacitor via a resistor circuit by switching the polarity of the RF signal to be supplied to the other external terminal with respect to the control signal and outputs a voltage based on a sum of the charge voltage and the voltage of the control signal as the gate drive voltage. The resistor circuit includes a first resistor including positive temperature characteristics and a second resistor including negative temperature characteristics.

Abstract: An up-conversion mixer includes a mixer cell having at least one output node configured to generate an output. The up-conversion mixer further includes a first cascaded transconductance input stage coupled to the mixer cell, the first cascaded transconductance input stage configured to receive an input signal and to reduce a third order harmonic of the output. The up-conversion mixer further includes a second cascaded transconductance input stage coupled to the mixer cell, the second cascaded transconductance input stage configured to receive the input signal and to reduce a third order harmonic of the output.

Abstract: The disclosed communication system, information recording medium, and relay communication device allow communication via electromagnetic induction, allow the use of low-cost information recording media, improve communication stability when information recording media is misaligned or rotated, and provide high IC-chip tolerance to flexion in information recording media. An information recording medium (3-1) has: an IC chip (32-1) that is capable of communication via electromagnetic induction; and a pair of thin conductive sheets (21-1) connected to the IC chip (32-1). A relay medium (2-1) has thin conductive sheets (31-1) and a loop antenna (22-1), with one of said thin conductive sheets (31-1) connected to one end of the loop antenna (22-1) and the other thin conductive sheet (31-1) connected to the other end of the loop antenna (22-1). A read/write device (1-1) has a loop antenna (12-1).

Abstract: A system including a component of a transceiver, a comparator, a counter, and a calibration circuit. The component receives an input signal comprising packets and based on the input signal, generates output signals to transmit the packets. The comparator compares the output signals to generate a comparison signal. The counter counts cycles of a clock signal to provide a count value. The control device, based on the comparison signal, transitions the counter between incrementing the count value and decrementing the count value. The calibration circuit operates in first and second calibration modes; during the first calibration mode, calibrates the component until the counter transitions a predetermined number of times between incrementing the count value and decrementing the count value; and during the second calibration mode, calibrates the component until (i) the counter transitions between incrementing and decrementing the count value, or (ii) counts a predetermined number of cycles.

Abstract: There is provided a high frequency switch including: a first signal transferring unit including a plurality of first switching devices; a second signal transferring unit including a plurality of second switching devices; a first shunting unit including a plurality of third switching devices; and a second shunting unit including a plurality of fourth switching devices.

Abstract: A multi-mode I/O circuit or cell (10) is provided for transmitting and receiving data between ICs, where each IC contains at least one of the I/O circuits. Each data link includes transmitter circuitry (12) and receiver circuitry (14). The transmitter circuitry sends data to a receiver circuitry in another IC, and the receiver circuitry receives data from a transmitter circuitry in another IC. The I/O circuit is constructed with CMOS-based transistors (e.g., CMOS or BiCMOS) that are selectively interconnected together by a plurality of switches to operate as two single-ended, current or voltage mode links, or as a single differential current or voltage mode link. In the preferred embodiment the transmitter circuitry sends data to the receiver circuitry in another IC over a first pair of adjacently disposed conductors, and the receiver circuitry receives data from the transmitter circuitry in another IC over a second pair of adjacently disposed conductors.

Abstract: A time domain switching analog-to-digital converter apparatus and methods of utilizing the same. In one implementation, the converter apparatus comprises a carrier signal source, and at least one reference source. The carrier signal is summed with the input signal and the summed modulated signal is fed to a comparator circuit. The comparator is configured detects crossings of the reference level by the modulated waveform thereby generating trigger events. The time period between consecutive trigger events is used to obtain modulated signal deviation due to the input signal thus enabling input signal measurement. Control of the carrier oscillation amplitude and frequency enables real time adjustment of the converter dynamic range and resolution. The use of additional reference signal levels increases sensor frequency response and accuracy. A dual channel converter apparatus enables estimation and removal of common mode noise, thereby improving signal conversion accuracy.

Abstract: According to one embodiment, a semiconductor switch includes a voltage generator, a voltage controller, a driver, and a switch unit. The voltage generator generates a negative first potential. The voltage controller controls the first potential according to a terminal switch signal input from an outside. The driver is input the terminal switch signal, and outputs at least one selected from the first potential and the second potential based on the terminal switch signal. The second potential is a power supply voltage or is higher than the power supply voltage. The switch unit is provided on an SOT substrate, switches a connection between an antenna terminal and any one of high frequency terminals based on the output of the driver.

Abstract: Systems and methods for tuning an antenna for a frequency modulation (FM) transceiver are provided. A representative system includes: a network of electrical adjustable passive components that receives and sends radio frequency (RF) signals to a receiver circuitry via the network of electrical adjustable passive components. The receiver circuitry determines the received signal strength indication (RSSI) of the RF signal. The system further includes a transmitter circuitry that transmits RF signals via the network of electrical adjustable passive components, and a peak detector circuitry that receives and determines a voltage output of the RF signals from the variable capacitors. An auto-tune circuitry receives the RSSI and output value from the receiver circuitry and the peak detector circuitry, respectively.

Abstract: A multiphase mixer using a rotary traveling wave oscillator is disclosed. In addition to the oscillator, the mixer includes first and second mixer circuits. The rotary traveling wave oscillator generates a first set of N/2 phase and a second set of N/2 phases, where each phase has a frequency that is a factor of N/2 less than the incoming radio frequency signal. The first set of phases are sine signals and the second set of phases are cosine signals. The first mixer circuit generates a first down-converted signal from the first set of phases and the incoming rf signal. The second mixer circuit generates a second down-converted signal from the second set of phases and the rf signal.

Abstract: A mobile terminal and a method of operating an antenna thereof are provided. The mobile terminal includes a plurality of antennas. A resonance frequency moving unit moves a resonance frequency of at least one of the plurality of antennas. And a controller controls the resonance frequency moving unit to sustain or move a resonance frequency of the at least one antenna according to use of a plurality of antennas. Therefore, by minimizing mutual interference occurring between a plurality of antennas using a similar frequency band, a wireless communication performance can be improved.

Abstract: Disclosed is a semiconductor device including a semiconductor chip and a semiconductor package. The semiconductor package includes an antenna formed of a lead frame, a first wire that connects the antenna and a first electrode pad of the semiconductor chip, and a second wire that connects the antenna and a second electrode pad of the semiconductor chip. The semiconductor chip is disposed in one of four regions in the semiconductor package sectioned by line segments connecting midpoints of two pairs of opposing sides of the semiconductor package. A centroid of the semiconductor chip is positioned outside a closed curve composed of a straight line segment connecting a first connection point where the antenna and the first wire are connected and a second connection point where the antenna and the second wire are connected, and a line connecting the first and second connection points along the antenna.

Abstract: An object is to achieve low power consumption and a long lifetime of a semiconductor device having a wireless communication function. The object can be achieved in such a manner that a battery serving as a power supply source and a specific circuit are electrically connected to each other through a transistor in which a channel formation region is formed using an oxide semiconductor. The hydrogen concentration of the oxide semiconductor is lower than or equal to 5×1019 (atoms/cm3). Therefore, leakage current of the transistor can be reduced. As a result, power consumption of the semiconductor device in a standby state can be reduced. Further, the semiconductor device can have a long lifetime.

Abstract: Provided is a semiconductor device that is capable of performing background calibration during a reception operation without adversely affecting reception characteristics. During a reception operation, the semiconductor device detects a timing at which an invalid received signal occurs upon a gain change or a reception channel change and performs background calibration at the detected timing. In this instance, as the received signal is invalid, performing the calibration does not further decrease the substantial accuracy of reception. Moreover, an unnecessary signal component, which would arise when the background calibration is performed at fixed intervals, will not be generated as far as the background calibration is performed at random timing.

Abstract: A transconductance amplifier having an input terminal for receiving an input signal and an output terminal for communicating an output signal based on the input signal, the transconductance amplifier may include a gain transistor and a variable capacitance. The gain transistor may have a gate terminal, a first non-gate terminal, and a second non-gate terminal, the first non-gate terminal coupled to the output terminal of the transconductance amplifier. The variable capacitance may be coupled between the gate terminal of the gain transistor and the second non-gate terminal of the gain transistor.

Abstract: An RFIC includes an RF section, a memory interface, a display interface, an audio codec, a bus matrix, and a processing unit. The RF section converts a first inbound RF signal into a first inbound symbol stream and converts a second inbound RF signal into a second inbound symbol stream. The memory interface is operably coupled to retrieve a video file from memory and the display interface is operable to provide video data to a display. The audio codec converts an output digital signal into an output voice signal. The processing unit converts the first inbound symbol stream into streaming video data; converts the second inbound symbol stream into the output digital signal; and facilitates providing, via the bus matrix, at least one of: the video file to the display interface as the video data; the streaming video data to the display interface as the video data; and the digital output signal to the audio codec.

Abstract: Provided is a high-frequency module that can prevent a transmission signal from reaching a reception circuit and that can achieve high mounting density. A first duplexer for a first frequency band is mounted on a circuit substrate, and a second transmission filter and a second reception filter that constitute a second duplexer for a second frequency band are embedded in the circuit substrate. The second transmission filter and the second reception filter are embedded in the circuit substrate in locations that overlap at least a part of a projection region that is formed by projecting the first duplexer in a thickness direction of the circuit substrate. The first frequency band and the second frequency band are separated from each other by at least a prescribed frequency range.

Abstract: A wireless communication system includes: a filter; and a semiconductor chip including a signal processing integrated circuit having an amplifier, wherein a main surface of the semiconductor chip is provided with a plurality of electrode terminals along an edge portion thereof; wherein the amplifier has a transistor including a control electrode, a first electrode through which a signal is outputted, and a second electrode to which a voltage is applied; wherein the control electrode, the first electrode and the second electrode of the transistor are connected to the electrode terminals, respectively; and wherein none of wirings are arranged between the electrode terminals and placements of the control electrode, the first electrode and the second electrode, making space between the electrodes and the electrode terminals narrow.

Abstract: A high frequency mixer with a tunable dynamic range is disclosed. One embodiment provides a mixer apparatus including multiple first transistors at an input branch that receive a differential radio frequency (RF) signal, and multiple second transistors at a second branch that receive a differential local oscillator (LO) signal. The second transistors generate an intermediate frequency (IF) differential output signal. The bias current that flows at the input branch and the output branch can be independently adjusted to allow the conversion gain, linearity, or the output noise of the mixer to be controlled.

Abstract: Various embodiments implement waveguides for signal distribution or signal filtering in satellite receivers. According to some embodiments, a low noise block downconverter (LNB) is implemented using waveguides configured for signal distribution, band pass filtering, low pass filtering, high pass filtering, or band stop filtering. For some embodiments, the waveguides may be formed by the LNB chassis and the ground plane of a printed circuit board mounted to the LNB chassis.

Abstract: An integrated circuit package includes an encapsulation and lead frame with a portion of the lead frame disposed within the encapsulation. The lead frame includes a first conductor formed in the lead frame having a first conductive loop and a third conductive loop disposed substantially within the encapsulation. A second conductor is formed in the lead frame galvanically isolated from the first conductor. The second conductor includes a second conductive loop disposed substantially within the encapsulation proximate to the first conductive loop to provide a communication link between the first and second conductors. The third conductive loop is wound in an opposite direction relative to the first conductive loop in the encapsulation.

Abstract: Disclosed is a tuner input circuit. The tuner input circuit includes an integrated including a low noise amplifier and a band pass filter embedded in one chip.

Abstract: A frequency up and down converter, in which, when down converting a high frequency signal into an intermediate frequency signal or up converting an intermediate frequency signal into a high frequency signal by controlling switching elements using a local oscillator signal, a signal with a frequency to be converted is controlled a number of times during one cycle of the local oscillator signal, whereby the local oscillator signal with a frequency lower than an original frequency may be used. Transistors are added in parallel to switching transistors disposed in a frequency down conversion unit or a frequency up conversion unit, and local oscillator signals with predetermined phases and pulse widths are provided to the gates of the transistors such that a high frequency signal or an intermediate frequency signal is transferred to an output terminal at least two times during one cycle of a local oscillator signal.

Abstract: An architecture and protocol enables signal communications between either a frequency translation module and a decoder within a dwelling, or between an antenna and a decoder within a dwelling. According to an exemplary embodiment, the decoder comprises a switch 33 between the low noise block converter power supply, and a transceiver and output coupling. The switch 33 generates a high impedance during operation of the frequency translation module and the LNB power supply 38, thereby isolating the transceiver and the output coupling from the LNB power supply. The switch generates a low impedance between the LNB power supply and the transceiver and output coupling during operation of the LNB power supply.

Abstract: An RF circuit having a transcoupler, a multifunctional RF-circuit element that can operate both as an impedance inverter and as a signal coupler. When connected to a fixed load impedance, the transcoupler can also operate as an impedance transformer. The impedance-transformer/inverter functionality of the transcoupler can be used, e.g., to modulate the load of a power amplifier. The signal coupler functionality of the transcoupler can be used, e.g., to generate a corresponding feedback signal indicative of phase and/or amplitude distortions in the amplifier. The use of various embodiments of the transcoupler in an RF circuit can be advantageous, for example, because the transcoupler has a lower insertion loss than a cascade consisting of a prior-art impedance inverter and a prior-art directional coupler, occupies a relatively small area on the printed circuit board, and helps to reduce the per-unit fabrication and operating costs.

Abstract: A wireless communication device includes a processing module, a receiver section, a transmitter section, and an antenna system. The processing module is operable to generate tuning information and configuration information of a given wireless communication protocol. The receiver section is configurable in accordance with the configuration information to convert an inbound radio frequency (RF) signal into an inbound symbol stream in accordance with the tuning information. The transmitter section is configurable in accordance with the configuration information to convert an outbound symbol stream into an outbound RF signal in accordance with the turning information. The antenna system is operable to provide an antenna structure in accordance with the configuration information to transceive the inbound and outbound RF signals.

Abstract: A circuit used in a mixer configured to receive a signal made up of a relatively small modulation signal and a relatively large carrier signal is described. The mixer includes multiple switches. A balancing circuit configured to receive a supply voltage and a clocking signal is provided, and the balancing circuit provides a control signal to a switch in the mixer. The balancing circuit includes a capacitor configured to receive and selectively dissipate charge as a gate voltage along a gate path. The control signal causes switching of the switch in the mixer at times in accordance with the clocking signal according to a voltage difference value between a source voltage and the gate voltage, wherein the voltage difference value between the source voltage and the gate voltage is approximately a predetermined voltage value greater than a turn on voltage level of the switch.

Abstract: A smart data storage apparatus and data transmitting method for the same are to combine the hard disk with the dual interface memory, and are to use radio frequency identification (RFID) technology or near field communication (NFC) technology. The information of the self-monitoring analysis and reporting technology (SMART) of the hard disk still could be received by the handheld device without the power for the hard disk. Moreover, the external hard disk could be registered with the handheld device quickly.

Abstract: An apparatus for coupling a baseband integrated circuit that uses a first signalling standard to a radio frequency integrated circuit that uses a second signalling standard includes a buffer coupled to the baseband integrated circuit and a resistor network coupled between the buffer and the radio frequency integrated circuit. The resistor network implements a voltage divider so as to convert a first voltage used by the baseband integrated circuit to a second voltage used by the radio frequency integrated circuit. The apparatus may be used in a mobile telecommunications device.

Abstract: The semiconductor integrated circuit includes: a pair of antenna terminals; a rectifier; a source-voltage terminal; a shunt regulator; a series regulator. When the voltage of the inside source line rises to or above a first set voltage, the shunt regulator passes a pull-down current through a pull-down transistor. When the voltage of the inside source line drops to or below the second set voltage, the series regulator passes a pull-up current through a pull-up transistor. The first set voltage is set to be higher than the second set voltage in voltage level. With the semiconductor integrated circuit, the competition of actions of the two regulators is prevented. The semiconductor integrated circuit is arranged to work in contact and noncontact operation modes, and a stable source voltage can be supplied to an internal circuit thereof.

Abstract: A semiconductor device is provided with a power supply circuit having a function to generate a power supply voltage from a wireless signal and an A/D converter circuit having a function to detect the strength of the wireless signal by an A/D conversion of a voltage generated from the wireless signal. This enables to provide a semiconductor device which does not require replacement of batteries, has few limitations on its physical shape and mass, and has a function to detect a physical position. By formation of the semiconductor device with use of a thin film transistor formed over a plastic substrate, a lightweight semiconductor device, which has flexibility in physical shape and a function to detect a physical location, can be provided at low cost.

Abstract: Adjusting a phase locked loop (PLL) clock source to reduce wireless communication (e.g., radio frequency (RF)) interference within a device. The PLL may be included in a high speed serial interface, e.g., coupled to a display, and may be initially driven by a first clock. Later, when a second clock is available and aligned with the first clock, the PLL may be driven by the second clock. The second clock may be configured to change its frequency over time such that the PLL does not lose lock and also does not interfere (or reduces interference) with wireless communication of the device. For example, the second clock may be programmable or may dynamically vary its operating frequency, thereby reducing its interference with the wireless communication of the device.

Abstract: An integrated circuit includes an analog module, digital circuitry, and a border section. The analog module is susceptible to noise and is on a substrate of the integrated circuit. The digital circuitry generates the noise and is on the substrate. The border section is on the substrate and physically separates the analog module from the digital circuitry.