Abstract: An architecture and protocol enables signal communications between either a frequency translation module and a decoder within a dwelling, or between an antenna and a decoder within a dwelling. According to an exemplary embodiment, the decoder comprises a switch 33 between the low noise block converter power supply, and a transceiver and output coupling. The switch 33 generates a high impedance during operation of the frequency translation module and the LNB power supply 38, thereby isolating the transceiver and the output coupling from the LNB power supply. The switch generates a low impedance between the LNB power supply and the transceiver and output coupling during operation of the LNB power supply.

Abstract: An RF circuit having a transcoupler, a multifunctional RF-circuit element that can operate both as an impedance inverter and as a signal coupler. When connected to a fixed load impedance, the transcoupler can also operate as an impedance transformer. The impedance-transformer/inverter functionality of the transcoupler can be used, e.g., to modulate the load of a power amplifier. The signal coupler functionality of the transcoupler can be used, e.g., to generate a corresponding feedback signal indicative of phase and/or amplitude distortions in the amplifier. The use of various embodiments of the transcoupler in an RF circuit can be advantageous, for example, because the transcoupler has a lower insertion loss than a cascade consisting of a prior-art impedance inverter and a prior-art directional coupler, occupies a relatively small area on the printed circuit board, and helps to reduce the per-unit fabrication and operating costs.

Abstract: A wireless communication device includes a processing module, a receiver section, a transmitter section, and an antenna system. The processing module is operable to generate tuning information and configuration information of a given wireless communication protocol. The receiver section is configurable in accordance with the configuration information to convert an inbound radio frequency (RF) signal into an inbound symbol stream in accordance with the tuning information. The transmitter section is configurable in accordance with the configuration information to convert an outbound symbol stream into an outbound RF signal in accordance with the turning information. The antenna system is operable to provide an antenna structure in accordance with the configuration information to transceive the inbound and outbound RF signals.

Abstract: A circuit used in a mixer configured to receive a signal made up of a relatively small modulation signal and a relatively large carrier signal is described. The mixer includes multiple switches. A balancing circuit configured to receive a supply voltage and a clocking signal is provided, and the balancing circuit provides a control signal to a switch in the mixer. The balancing circuit includes a capacitor configured to receive and selectively dissipate charge as a gate voltage along a gate path. The control signal causes switching of the switch in the mixer at times in accordance with the clocking signal according to a voltage difference value between a source voltage and the gate voltage, wherein the voltage difference value between the source voltage and the gate voltage is approximately a predetermined voltage value greater than a turn on voltage level of the switch.

Abstract: A smart data storage apparatus and data transmitting method for the same are to combine the hard disk with the dual interface memory, and are to use radio frequency identification (RFID) technology or near field communication (NFC) technology. The information of the self-monitoring analysis and reporting technology (SMART) of the hard disk still could be received by the handheld device without the power for the hard disk. Moreover, the external hard disk could be registered with the handheld device quickly.

Abstract: A semiconductor device is provided with a power supply circuit having a function to generate a power supply voltage from a wireless signal and an A/D converter circuit having a function to detect the strength of the wireless signal by an A/D conversion of a voltage generated from the wireless signal. This enables to provide a semiconductor device which does not require replacement of batteries, has few limitations on its physical shape and mass, and has a function to detect a physical position. By formation of the semiconductor device with use of a thin film transistor formed over a plastic substrate, a lightweight semiconductor device, which has flexibility in physical shape and a function to detect a physical location, can be provided at low cost.

Abstract: An apparatus for coupling a baseband integrated circuit that uses a first signalling standard to a radio frequency integrated circuit that uses a second signalling standard includes a buffer coupled to the baseband integrated circuit and a resistor network coupled between the buffer and the radio frequency integrated circuit. The resistor network implements a voltage divider so as to convert a first voltage used by the baseband integrated circuit to a second voltage used by the radio frequency integrated circuit. The apparatus may be used in a mobile telecommunications device.

Abstract: The semiconductor integrated circuit includes: a pair of antenna terminals; a rectifier; a source-voltage terminal; a shunt regulator; a series regulator. When the voltage of the inside source line rises to or above a first set voltage, the shunt regulator passes a pull-down current through a pull-down transistor. When the voltage of the inside source line drops to or below the second set voltage, the series regulator passes a pull-up current through a pull-up transistor. The first set voltage is set to be higher than the second set voltage in voltage level. With the semiconductor integrated circuit, the competition of actions of the two regulators is prevented. The semiconductor integrated circuit is arranged to work in contact and noncontact operation modes, and a stable source voltage can be supplied to an internal circuit thereof.

Abstract: An integrated circuit includes an analog module, digital circuitry, and a border section. The analog module is susceptible to noise and is on a substrate of the integrated circuit. The digital circuitry generates the noise and is on the substrate. The border section is on the substrate and physically separates the analog module from the digital circuitry.

Abstract: Adjusting a phase locked loop (PLL) clock source to reduce wireless communication (e.g., radio frequency (RF)) interference within a device. The PLL may be included in a high speed serial interface, e.g., coupled to a display, and may be initially driven by a first clock. Later, when a second clock is available and aligned with the first clock, the PLL may be driven by the second clock. The second clock may be configured to change its frequency over time such that the PLL does not lose lock and also does not interfere (or reduces interference) with wireless communication of the device. For example, the second clock may be programmable or may dynamically vary its operating frequency, thereby reducing its interference with the wireless communication of the device.

Abstract: In one embodiment, the present invention includes a method for configuring a single chip radio tuner having a configurable front end, which may be adapted within an integrated circuit (IC). The method may include setting a controller of the tuner with configuration information for a radio in which the tuner is located. Then, control signals responsive to the configuration information can be sent to the configurable front end to configure the tuner.

Abstract: There is provided a high frequency switch which is satisfactory in terms of both insertion loss characteristics and harmonic characteristics. The high frequency switch includes: a common port outputting a transmission signal to an antenna; a plurality of transmission ports each having the transmission signal input thereto; and a plurality of switching units each connected between the plurality of transmission ports and the common port to conduct or block the transmission signal from each of the transmission ports to the common port, wherein each of the switching units includes a plurality of series-connected MOSFETs formed on a silicon substrate, the plurality of MOSFETs are any one of body contact-type FETs and floating body-type FETs, and each of the switching units includes both of the body contact-type FETs and the floating body-type FETs.

Abstract: Provided is a high-frequency module that can prevent a transmission signal from reaching a reception circuit and that can achieve high mounting density. A first duplexer for a first frequency band is mounted on a circuit substrate, and a second transmission filter and a second reception filter that constitute a second duplexer for a second frequency band are embedded in the circuit substrate. The second transmission filter and the second reception filter are embedded in the circuit substrate in locations that overlap at least a part of a projection region that is formed by projecting the first duplexer in a thickness direction of the circuit substrate. The first frequency band and the second frequency band are separated from each other by at least a prescribed frequency range.

Abstract: Provided is a high-frequency module that can prevent a transmission signal from reaching a reception circuit and that can achieve high mounting density. A first duplexer for a first frequency band is mounted on a circuit substrate, and a second transmission filter and a second reception filter that constitute a second duplexer for a second frequency band are embedded in the circuit substrate. The second transmission filter and the second reception filter are embedded in the circuit substrate in locations that overlap at least a part of a projection region that is formed by projecting the first duplexer in a thickness direction of the circuit substrate. The first frequency band and the second frequency band are separated from each other by at least a prescribed frequency range.

Abstract: Provided is a high-frequency module that can prevent a transmission signal from reaching a reception circuit and that can achieve high mounting density. A first duplexer for a first frequency band is mounted on a circuit substrate, and a second transmission filter and a second reception filter that constitute a second duplexer for a second frequency band are embedded in the circuit substrate. The second transmission filter and the second reception filter are embedded in the circuit substrate in locations that overlap at least a part of a projection region that is formed by projecting the first duplexer in a thickness direction of the circuit substrate. The first frequency band and the second frequency band are separated from each other by at least a prescribed frequency range.

Abstract: Provided is a high-frequency module that can prevent a transmission signal from reaching a reception circuit and that can achieve high mounting density. A first duplexer for a first frequency band is mounted on a circuit substrate, and a second transmission filter and a second reception filter that constitute a second duplexer for a second frequency band are embedded in the circuit substrate. The second transmission filter and the second reception filter are embedded in the circuit substrate in locations that overlap at least a part of a projection region that is formed by projecting the first duplexer in a thickness direction of the circuit substrate. The first frequency band and the second frequency band are separated from each other by at least a prescribed frequency range.

Abstract: A mobile terminal includes a terminal body; a window coupled to the terminal body, including a display region for displaying an image, and including a print region which encompasses the display region; a display unit including a display panel disposed in the terminal body and having a first touch detection layer therein, and including a driver integrated circuit (IC) mounted to the display panel so as to face the print region of the window; and a second touch detection layer formed on the print region of the window facing the driver IC, and configured to detect a touch signal. The mobile terminal may have a small size and an enhanced design.

Abstract: A car audio system having a tuner unit and an active antenna integrated into a single module, the car audio system being connected to an antenna for a vehicle and receiving broadcast signals, is provided. The car audio system includes an antenna-tuner integration module, in which the active antenna for receiving and amplifying the broadcast signals and the tuner unit for selecting a broadcast signal corresponding to a specific frequency among the received broadcast signals are formed as a single module; and a car audio device connected to the antenna-tuner integration module using a data cable of a certain length corresponding to a spaced distance for preventing effects of electrical noise generated by the vehicle.

Abstract: Multiplier circuitry includes first multiplier circuit including a first transistor having an emitter coupled to a first conductor, a base coupled to a second conductor, and a collector coupled to a third conductor, a second transistor having an emitter coupled to the first conductor, a base coupled to a fourth conductor, and a collector coupled to a fifth conductor, a third transistor having an emitter coupled to the second conductor and a base and collector coupled to a supply voltage, and a fourth transistor having an emitter coupled to the fourth conductor and a base and collector coupled to the supply voltage. Chopper includes a first switch to provide a chopped differential signal between the second and fourth conductors and a second switch for un-chopping a first differential output signal produced between the third and fifth conductors to provide an un-chopped differential output signal between the third and fifth conductors.

Abstract: A receiving apparatus is provided. The receiving apparatus comprises a chip carrier including at least one stack of layers, wherein at least one layer in the stack supports radio frequency transmission lines, tunable bandpass filters, wherein each bandpass filter is integrated within an associated radio frequency transmission line, and at least one integrated micro-chip on the chip carrier. The at least one integrated micro-chip couples selected bandwidth regions of received broadband radio frequency signals to the tunable bandpass filters via the associated radio frequency transmission line. The at least one integrated micro-chip outputs each filtered selected bandwidth region to an associated one of a plurality of intermediate frequency modules.

Abstract: A receiver may comprise a plurality of signal processing paths, a bin-wise combiner, and an inverse transformation block. Each signal processing path may comprise a transformation block that is operable to transform a time-domain digital signal to an associated frequency-domain signal having a plurality of subband signals. The bin-wise combiner may be operable to combine corresponding subband signals of the plurality of signal processing paths. The inverse transformation block may be operable to transform output of the bin-wise combiner to an associated time-domain signal. The transformation block in each said signal processing path may be a Fast Fourier Transform (FFT) block. The number of points used by the FFT block of any one of said plurality of signal processing paths may be based on the delay spread of a signal input to the one of the signal processing paths.

Abstract: An electronic apparatus includes: a first integrated circuit including an internal component section capable of being adjusted with adjustment data, a nonvolatile memory in which beforehand acquired adjustment data of a result of adjustment carried out in advance for the internal component section are stored, and an interface section having a data transfer function of transferring the beforehand acquired adjustment data read out from the nonvolatile memory to the outside and a data storage function of storing actual use adjustment data sent thereto from the outside and supplying the stored actual use adjustment data to the internal component section; and a second integrated circuit including a signal processor, to which the interface section of the first integrated circuit is connected.

Abstract: A balanced mixer circuit (300, 400, 500, 600, 700 and 800) in a baseband receiver (202) includes an oscillator circuit (212), a mixer (214 and 215), a digital-to-analog converter (258 and 259) and a digital signal processor (250). The mixer includes CMOS devices (301, 302, 303 and 304). In response to differential outputs from the mixer, the digital signal processor controls the digital-to-analog converter to output bias voltages for the gate of at least one of the CMOS devices of the mixer to compensate for imbalance in the differential output of the mixer that may be caused by mismatch among two or more CMOS devices of the mixer or caused by other reasons, in order to increase second order intercept point of the mixer.

Abstract: A wireless IC device includes a wireless IC chip, a power supply circuit board upon which the wireless IC chip is mounted, and in which a power supply circuit is provided, the power supply circuit includes a resonant circuit having a predetermined resonant frequency, and a radiation pattern, which is adhered to the underside of the power supply circuit board, for radiating a transmission signal supplied from the power supply circuit, and for receiving a reception signal to supply this to the power supply circuit. The resonant circuit is an LC resonant circuit including an inductance device and capacitance devices. The power supply circuit board is a multilayer rigid board or a single-layer rigid board, and between the wireless IC chip and the radiation pattern is connected by DC connection, magnetic coupling, or capacitive coupling.

Abstract: Embodiments of apparatuses, systems and methods relating to a mixer having high second- and third-order intercept points are disclosed. Other embodiments may be described and claimed.

Abstract: Methods and systems for an integrated leaky wave antenna-based transmitter and on-chip power distribution are disclosed, and may include supplying one or more bias voltages and ground for a chip including a plurality of power amplifiers (PAs) utilizing bias voltage and ground lines. One or more leaky wave antennas (LWAs) may be communicatively coupled to the power amplifiers. Wireless signals may be transmitted utilizing the LWAs integrated in the lines in the chip. Radio frequency (RF) signals may be transmitted via the plurality of LWAs. The RF signals may include 60 GHz signals and the LWAs may include microstrip and/or coplanar waveguides. A cavity length of the LWAs may be configured by a spacing between conductive lines in the microstrip and/or coplanar waveguides. The LWAs may be configured to transmit the wireless signals at a desired angle from a surface of the chip.

Abstract: A multiple mode RF circuit includes a switching network to switch the RF circuit between a mixer mode and amplifier mode of operation. Two differential amplifier stages coupled to a differential transistor pair form the core of the circuit. A differential local oscillator (LO) source is selectively coupled to the two differential amplifier stages for mixer operation by the switching network and a feedback loop is selectively coupled between the input of the differential transistor pair and the output of the two differential amplifier stages by the switching network for amplifier operation. Gain is controlled in both modes by varying the DC bias on the two differential amplifier stages so that partial cancellation of the amplified signal from the differential transistor pair occur at the RF output. The multiple mode RF circuit operates over a large dynamic range by adjusting a bias current to scale linearity.

Abstract: In a high frequency antenna switch module, an I/O interface generates various control signals for controlling a switch module on the basis of a system data signal and a system clock, a decoder generates a switch control signal SWCNT for controlling a switch in response to a control signal CNT in the control signals, a timing detector for switch-ports switching generates a switch-port switching detection signal t_sw in response to the switch control signal, a frequency control signal generator generates frequency control signals ICONT and CCONT in response to the signal t_sw, and a negative voltage generation circuit generates a negative voltage output signal NVG_OUT while switching the frequency of the clock signal generated in the negative voltage generation circuit to different frequencies in response to signals ICONT and CCONT. The switch switches the paths among the plural switch ports in response to the signals SWCNT and NVG_OUT.

Abstract: Circuits, methods, and apparatus incorporate both a wireless physical interface and audio processing unit on a single integrated circuit. The wireless physical interface may include a receiver, transmitter, or a complete transceiver. The audio processing unit is typically in communication with both the wireless interface and one or more wired physical interfaces. The integrated circuit may be as simple as a wireless physical interface and audio processing unit, or it may include other circuits such as graphics processors, networking interfaces, memories, or other circuits.

Abstract: A monolithic integrated circuit (IC), and method of manufacturing same, that includes all RF front end or transceiver elements for a portable communication device, including a power amplifier (PA), a matching, coupling and filtering network, and an antenna switch to couple the conditioned PA signal to an antenna. An output signal sensor senses at least a voltage amplitude of the signal switched by the antenna switch, and signals a PA control circuit to limit PA output power in response to excessive values of sensed output. Stacks of multiple FETs in series to operate as a switching device may be used for implementation of the RF front end, and the method and apparatus of such stacks are claimed as subcombinations. An iClass PA architecture is described that dissipatively terminates unwanted harmonics of the PA output signal.

Abstract: A voltage sampling RF receiver in which an impedance control circuit controls the input impedance, by using a mixer stage which generates a feedback voltage, which is coupled to the RF input by a feedback resistor. A biasing arrangement can be used to adjust the feedback path so that local oscillator leakage signals are suppressed.

Abstract: Aspects of a method and system for using a microstrip to switch circuits in CMOS applications may include generating a second signal from a first signal by frequency-translating the first signal by switching a first current associated with the first signal between a first signal path and a second signal path. The switched first current may be filtered via a microstrip filter that may be tuned to a desired frequency component of the frequency-translated first signal, and the second signal may be generated from the difference between the voltage of the first signal path and the second signal path.

Abstract: A multiband low noise amplifier (LNA) with parallel resonant feedback includes an amplifier element configured to receive a radio frequency (RF) signal at an RF input and provide an amplified version of the RF signal at an RF output, a resistive feedback circuit coupled between the RF input and the RF output, and a plurality of series-coupled resonant circuits coupled in series with the resistive feedback circuit between the RF input and the RF output of the amplifier element, wherein each of the resonant circuits is configured to operate as an effective short circuit at a frequency other than a resonant frequency and configured to operate as an effective open circuit at the resonant frequency to decouple the resistive feedback from the amplifier element at each resonant frequency.

Abstract: A tri-state control mechanism can be implemented for a line driver of a transmitter unit to switch the output impedance of the transmitter unit between a low impedance state in the transmit mode and a high impedance state in the receive mode while minimizing turn-off glitch. It may be determined whether a communication device comprising the transmitter unit is configured in a transmit operating mode or a receive operating mode. If the communication device is configured in the receive operating mode, a first bias voltage can be generated to bias output transistors of the line driver circuit in a sub-threshold state. If the communication device is configured in the transmit operating mode, a second bias voltage can be generated to bias output transistors of the line driver circuit in a saturation state.

Abstract: In accordance with an embodiment, a method includes determining an amplitude of an input signal provided by a capacitive signal source, compressing the input signal in an analog domain to form a compressed analog signal based on the determined amplitude, converting the compressed analog signal to a compressed digital signal, and decompressing the digital signal in a digital domain to form a decompressed digital signal. In an embodiment, compressing the analog signal includes adjusting a first gain of an amplifier coupled to the capacitive signal source, and decompressing the digital signal comprises adjusting a second gain of a digital processing block.

Abstract: An RF feedback receiver arrangement includes a reference signal provider configured to provide, in a normal operating phase, a first reference signal having a first reference signal frequency, and provide, in a calibration operating phase, a second reference signal having a second reference signal frequency different from the first reference signal frequency. In addition, the RF feedback receiver arrangement includes a signal property detector configured to detect a transmit signal property of the transmit signal in the normal operating phase based on combining the first reference signal with a transmit signal or with a signal derived from the transmit signal, and to obtain, in the calibration operating phase, a calibration signal based on combining the second reference signal with the transmit signal or the signal derived from the transmit signal, which describes a disturbing portion introduced into the detected transmit signal property by the RF feedback receiver arrangement itself.

Abstract: Provision of gigabit-rate data transmission over wireless radio links, using carrier frequencies in the millimeter-wave range (>30 GHz). More specifically, a circuit for detection of amplitude-shift keyed (ASK) or other amplitude modulations (AM) which can be easily incorporated into an integrated circuit receiver system is described, making the receiver capable of supporting both complex IQ modulation schemes and simpler, non-coherent on-off or multiple-level keying signals. Several novel radio architectures are also described which, with the addition of a frequency discriminator network, have the capability of handling frequency shift keyed (FSK) or other frequency modulations (FM), as well as AM and complex IQ modulation schemes. These radio architectures support this wide variety of modulations by efficiently sharing detector hardware components.

Abstract: Provision of gigabit-rate data transmission over wireless radio links, using carrier frequencies in the millimeter-wave range (>30 GHz). More specifically, a circuit for detection of amplitude-shift keyed (ASK) or other amplitude modulations (AM) which can be easily incorporated into an integrated circuit receiver system is described, making the receiver capable of supporting both complex IQ modulation schemes and simpler, non-coherent on-off or multiple-level keying signals. Several novel radio architectures are also described which, with the addition of a frequency discriminator network, have the capability of handling frequency shift keyed (FSK) or other frequency modulations (FM), as well as AM and complex IQ modulation schemes. These radio architectures support this wide variety of modulations by efficiently sharing detector hardware components.

Abstract: There is provided a mixing circuit in which a rise of the consumption current can be suppressed while decreasing a non-linear component. The mixing circuit includes: an input unit 803 including a grounded-gate MOS transistor M1 with a source into which an input signal is input, and a grounded-source MOS transistor M2 with a gate into which the input signal is input; a frequency converter 802 for converting frequencies of a first current signal output from the grounded-gate MOS transistor M1 and a second current signal output from the grounded-source MOS transistor M2, and for generating a third current signal and a fourth current signal; a load MOS transistor M7, with a gate and a drain connected, for receiving a third current signal; and a load MOS transistor M8, with a gate and a drain connected, for receiving a fourth current signal.

Abstract: A circuit and method for image frequency rejection is provided that includes an analog dual-quadrature mixer device whose signal inputs for an in-phase-signal and a quadrature-phase signal are connected to an input circuit in the signal path and whose oscillator inputs for an in-phase oscillator signal and a quadrature-phase oscillator signal are connected to a local oscillator device, having an analog adder-amplifier device, which has a number of transistor pairs, in which in each case both transistors of each transistor pair are connected to the same load resistor for the addition of the signals applied at the control inputs of both transistors, and in which the control inputs of both transistors are connected downstream of the outputs of analog dual-quadrature mixer device, and having a multistage analog polyphase filter whose inputs are connected to outputs of the adder-amplifier device.

Abstract: A mixer-amplifier of an RF signal including at least an amplifier circuit and a mixing circuit controlled at a local oscillator frequency, for amplifying a signal applied on at least one input terminal and converting a first frequency of this signal into a second, lower, frequency, and including a reverse feedback loop switched at the local oscillator frequency.

Abstract: An integrated circuit for transmit and receive matching is described. The integrated circuit includes a transmit amplifier. The transmit amplifier includes a first transistor, a second transistor and a first inductor. The first inductor couples the first transistor to the second transistor. The integrated circuit also includes a low noise amplifier. The low noise amplifier includes a third transistor, a fourth transistor, the first inductor, a second inductor, a third inductor and a transformer. The second inductor couples the first inductor to the third transistor. The third inductor couples the third transistor to ground.

Abstract: A receiver comprising: an antenna for receiving signals in a plurality of frequency bands; an integrated circuit including a plurality of amplifiers, wherein each of the plurality of amplifiers is configured to amplify signals in one of the plurality of frequency bands; and a plurality of selectable receive paths, each of the plurality of selectable receive paths connecting an output of the antenna to an input of one of the plurality of amplifiers and including a resonant circuit.

Abstract: A device and method for executing a reserved function using time information extracted from a broadcasting data that provides a correct time in asynchronous mobile communication terminal are provided. The method of executing a reserved function in a mobile communication terminal includes: when a broadcasting function is executed, performing (1) extracting a time information from received broadcasting data, (2) calculating a time difference between a time of the extracted time information and a corresponding operating time of the mobile communication terminal, and (3) storing the calculated time difference as a time difference information; and if a reservation time for executing a specific function is set and when the operating time reaches the set reservation time based on the stored time difference information, executing the specific function.

Abstract: According to some embodiments, an up-conversion mixer includes a mixer cell having an output node arranged to provide an output. An input stage is coupled to the mixer cell and arranged to receive an input signal. The mixer cell is configured to generate the output with an up-converted frequency compared to an input frequency of the input signal. The input stage is configured to reduce a third order harmonic term of the output so that an output power plot of the third order harmonic term with respect to an input power has a notch with a local minimum.

Abstract: A sub-harmonic mixer includes a first transistor having a source and a drain and a second transistor having a source connected to the source of the first transistor and a drain connected to the drain of the first transistor. A mixing transistor is configured to be biased in a linear operating region. The mixing transistor includes a drain coupled to the sources of the first transistor and the second transistor. The mixing transistor has its drain driven by a signal at twice a local oscillator (LO) frequency and its gate driven by a radio frequency (RF) signal while the mixing transistor is biased in the linear region such that a process of frequency doubling and mixing are performed simultaneously.

Abstract: The present invention is directed to accurately set a frequency characteristic of a filter integrated in a semiconductor integrated circuit. A semiconductor integrated circuit includes a filter circuit, a cutoff frequency calibration circuit, and a Q-factor calibration circuit. The cutoff frequency calibration circuit adjusts cutoff frequency of the filter circuit to a desired value by adjusting capacitance components of the filter circuit. After adjustment of the cutoff frequency of the filter circuit by the cutoff frequency calibration circuit, the Q-factor calibration circuit adjusts the Q factor of the filter circuit to a desired value by adjusting a resistance component of the filter circuit.

Abstract: Stacked CMOS power amplifier (PA) and radio frequency (RF) coupler devices and related methods are disclosed. The stacked device includes a CMOS PA die configured to receive a transmit input signal and to output an amplified transmit signal, and a RF coupler device configured to receive the amplified transmit signal, to output an antenna transmit signal, and to output an RF signal proportional to the antenna transmit signal. The CMOS PA die and the RF coupler device are stacked on top of and electrically coupled to each other, and the CMOS PA die and the RF coupler device are combined within a single semiconductor package. In some embodiments, the RF coupler device is positioned on top of the CMOS PA die, and in other embodiments the CMOS PA die is positioned on top of the RF coupler device.

Abstract: Embodiments of the present invention may be used to generate oscillating signals. One embodiment of the present invention includes a circuit that receives a differential signal to be divided. The circuit converts the differential signal into an injection signal. The injection signal is coupled to an oscillator, and the oscillator generates an output signal having a frequency that is a fraction of the frequency of the differential input signal. In another embodiment, the present invention includes a MIMO wireless communication system. The MIMO system may use the divider circuit to divide a local oscillator signal with reduced common mode distortion.

Abstract: A single-ended-to-differential mixer includes a differential pair amplifier, a passive current source, a cancellation sub-circuit, and a mixer. The differential pair amplifier is configured to receive a single-ended input signal. The differential pair amplifier includes a first input, a second input, a first output, and a second output. The passive current source is connected between (i) the differential pair amplifier and (ii) a reference potential. The cancellation sub-circuit is connected to each of the first input, the second input, the first output, and the second output of the differential pair amplifier. The cancellation sub-circuit is configured to at least partially cancel a non-linearity of the differential pair amplifier. The mixer is connected to each of the first output and the second output of the differential pair amplifier.