Abstract: A host base transceiver station BTS derives a reference timing signal from a physical layer training signal (such as a preamble) received from a neighbor network node/BTS. Downlink transmissions are then synchronized to the derived reference timing signal. This may be used as a holdover timing mode, such as when the host BTS determines that synchronization from a primary source is no longer reliable. In an embodiment, a reference oscillator of the host BTS is phase locked to the derived reference timing signal. Variations include one or multiple such training signals from one or multiple neighbor BTSs, selecting one BTS when the primary synchronization mechanism fails for several BTSs in the same area, and how to phase lock the oscillator without dithering about the target frequency. Apparatus and computer programs are also detailed.

Abstract: Briefly, in accordance with one or more embodiments, a transmitter comprises four phase modulators to provide four path phase modulation. The phase modulators modulate local oscillator signals with control signals derived from quadrature baseband data to be transmitted to result in four phase modulated signals. The four phase modulated signals may be combined to provide a pulse position and pulse width modulated signal that may have a constant, or nearly constant, amplitude. The frequency spectrum of the control signals have narrower bandwidths and greater out of band attenuation resulting in higher suppression of out of channel and out of band noise.

Abstract: A single chip GSM/EDGE transceiver comprises a fully differential receive chain, a subharmonic mixer in the receive chain, the subharmonic mixer configured to receive a radio frequency (RF) input signal and a local oscillator (LO) signal that is phase-shifted by a nominal 45 degrees, and a synthesizer having a voltage controlled oscillator and having at least one frequency divider to generate desired transmit and receive LO signals. The transceiver also comprises a transmitter having a closed power control loop, and a harmonic rejection modulator, the use thereof made possible by a frequency plan designed to allow the synthesizer to develop the transmit and receive LO signals without a frequency multiplier.

Abstract: A mobile communication terminal includes a de-spreader which de-spreads signals received from a base station, a RAKE-synthesizer which RAKE-synthesizes the de-spread signals, a SIR detector which measures a SIR of the received signals, a SIR comparator which compares a SIR of the received signals to a target SIR, a quality detector which measures quality of the received signals at a predetermined interval, a quality comparator which compares the quality of the received signals, transmitted from that quality detector, with target quality, the quality comparator lowering the target SIR, if the quality of the received signals is higher than the target quality, and raising that SIR, if the quality of the received signals is lower than the target quality, and a controller which stores a minimum target SIR therein, and varies the minimum SIR in accordance with a relation between the target SIR and the quality of the received signals.

Abstract: A transceiver system including a common receiver and transmitter oscillator. The transceiver system may include transmitter circuitry, receiver circuitry, and a first oscillator. The first oscillator may provide a transmit frequency to a mixer in the transmitter circuitry to generate a transmitter RF signal. Furthermore, the first oscillator may also provide the transmit frequency to a first stage mixer in the receiver circuitry to down-convert a receiver RF signal from a receive frequency to an intermediate frequency (IF). The receiver circuitry may include a second oscillator and a second stage mixer. The second oscillator may provide an IF frequency to the second stage mixer to down-convert receiver signals at IF to a lower frequency. The receiver circuitry may filter out transmitter RF feedthrough signals without using a SAW filter. The transmitter circuitry, the receiver circuitry, and the first oscillator may be included in a single IC.

Abstract: A monolithic radio integrated circuit includes a substrate, a set of one or more analog subcircuits on the substrate, a programmable bias current supply on the substrate coupled to the set to provide bias currents to the analog subcircuits of the set including programmable bias currents to one or more analog subcircuits forming a first subset of the set, and a digital subsection coupled to the programmable bias supply to determine the bias currents supplied to the analog subcircuits of the first subset, such that one or more characteristics of the radio integrated circuit are modifiable by programming the programmable bias supply.

Abstract: It is an object of the present invention to solve a problem that malfunction of communication is generated by varying a frequency of a clock due to noise from outside in a case where there is no supplied signal in a circuit which performs negative feedback control so that the supplied signal and the feedback signal can maintain a fixed phase relationship between the signals. The present invention provides a configuration including a PLL circuit and an oscillator circuit, where a switch for switching an output between a signal from the PLL circuit and a signal from the oscillator circuit to the signal output portion is provided to switch from a connection to the PLL circuit to a connection to the oscillator circuit in a case where there is no received signal.

Abstract: A RF transceiver and method of operating a transceiver are provided. The transceiver has a frequency synthesizer that generates a stable, operational frequency signal, a reference VCO that provides a reference frequency for use in operation of the synthesizer, a voltage source coupled to the reference VCO that produces a control voltage that controls an output frequency of the reference VCO, and a controller coupled to the voltage source that controls the voltage applied by the voltage source. The controller compares a value of a known frequency of a RF signal received by the transceiver with a value of a current receiver frequency to estimate an error of the current receiver frequency, calculates, using the estimated error, a change needed to the control voltage to change the reference frequency to eliminate the estimated error, and controls the voltage source to apply the calculated change to the control voltage.

Abstract: A tuner (200) includes a direct digital frequency synthesizer (206) and a mixer (220). The direct digital frequency synthesizer (206) has an output terminal for providing a digital local oscillator signal having a frequency chosen to mix a desired channel to baseband. The mixer (220) has a first input terminal for receiving a tuned radio frequency signal, a second input terminal coupled to the output terminal of the direct digital frequency synthesizer (206), and an output terminal for providing an in-phase baseband signal.

Abstract: A wireless communication system operating in a predetermined frequency range comprising a plurality of radios each having an enclosure configured to accept a common equipment assembly comprising a transmitter module, a receiver module, a synthesizer module, and an interface/radio processing control (“IF/RPC”) module. The IF/RPC module has connectors for operably connecting the transmitter, receiver, and synthesizer modules thereto where at least one of the modules is mechanically attached to a mounting plate. The size and shape of each of the modules and the size and shape of the mounting plate are each substantially independent of the frequency band of operation.

Abstract: A transmitter adopting a polar loop system including a phase control loop for controlling the phase of a carrier signal outputted from a transmitting oscillator and an amplitude control loop for controlling the amplitude of a transmitting output signal outputted from a power amplification circuit, and designed to be capable of performing transmission using a GMSK modulation mode and transmission using an 8-PSK modulation mode. In the transmitter, the phase control loop is shared as a phase control loop for use in the GMSK modulation mode and a phase control loop for use in the 8-PSK modulation mode. A component similar to any one of components constituting a loop filter is provided in parallel therewith so that the component can be connected or disconnected in accordance with the modulation mode, for example, by use of a switching element.

Abstract: A method and system for wireless communication using integrated clock generation for Bluetooth and FM transmit and FM receive functions may include generating a clock signal to enable transmission and/or reception of Bluetooth signals; and clocking a Direct Digital Frequency Synthesizer (DDFS) via the generated clock signal to generate one or more signals by the DDFS that enable transmission or reception of FM signals. The generated clock signals for the Bluetooth and for the FM transmit and receive functions may include an in phase and quadrature phase component. Time Division Duplex of FM transmission and reception and simultaneous FM transmission and FM reception may be simulated by switching the control frequency word at a certain rate. The DDFS may also receive control words to compensate for frequency changes in the Bluetooth LO. The FM signals reception and transmission may be controlled by a bi-directional coupler.

Abstract: The present invention provides architectures and methods which use multiple radio receive chains in mobile devices to boost performance of the mobile devices. While a first set of the receive chains are assigned to a serving base station, another set of receive chains are dynamically allocated to neighbor base stations and/or to the serving base station depending upon present or expected system conditions and timing. A first synthesizer is configured to provide signals to the first and second set of receive chains. Other synthesizers are also configured to provide signals to the second set of receive chains. Thus, depending on the mode of operation, the second set of receive chains utilizes signals from a given synthesizer as needed. A priori data may be used to allocate specific receive chains to the serving base station, neighboring base stations or both. Unused synthesizers may be turned off to conserve power.

Abstract: A multimode communications system includes a first communications module, a transmission module, a switch and a second communications module. The first communication module has a frequency modulator for modulating a dividing ratio to adjust an oscillating signal and selectively enabling the oscillating signal to have its frequency change with a variety of contents of a first communications signal by modulating the dividing ratio according to the contents of the first communications signal on a modulating mode or enabling the oscillating signal to have its frequency constant by keeping the dividing ratio unchanged. The switch is to selectively transmit the oscillating signal either to the transmission module when the frequency modulator is operating on the modulating mode or to a receiving end when the frequency modulator is operating on the constant frequency mode.

Abstract: A dual frequency synthesizer includes a reference oscillator, an R counter, a first fractional-N phase-locked loop (for a receiving channel) and a second fractional-N phase-locked loop (for a transmitting channel) and one shared sigma-delta modulator. The reference oscillator outputs a reference oscillation frequency clock. The R counter outputs a reference frequency clock based on the reference oscillation frequency clock. The first fractional-N phase-locked loop (PLL) (for a receiving channel) generates a first (receiving channel frequency) clock based on the reference frequency clock. The second fractional-N phase-locked loop (for a transmitting channel) generates a second (transmitting channel frequency) clock based on the same reference frequency clock. Both fractional-N phase-locked loops share a common sigma-delta modulator. Therefore, the chip size of the dual frequency synthesizer may be reduced.

Abstract: A method and an arrangement for transmitting and receiving RF signals, associated with different radio interfaces of communication systems, employ a direct conversion based transceiver which substantially comprises one receive signal branch and one transmit signal branch. Mixing frequencies of the different systems are generated by a single common synthesizer by use of an output frequency divider in combination with the synthesizer, and by use of filtering corresponding to a system channel bandwidth by means of a controllable low-pass filter operating at baseband frequency.

Abstract: An integrated-circuit element and passive components are mounted on a front face of a multilayer substrate. A capacitor constituting a crystal-oscillator circuit is disposed inside the multilayer substrate. A cavity is provided in a rear face of the multilayer substrate. A crystal oscillator constituting the crystal-oscillator circuit is accommodated in the cavity, and the cavity is sealed with a sealing cap made of a conductive material. The sealing cap is fixed to an electrode pad provided on a motherboard with solder therebetween.

Abstract: It is an object of the present invention to solve a problem that malfunction of communication is generated by varying a frequency of a clock due to noise from outside in a case where there is no supplied signal in a circuit which performs negative feedback control so that the supplied signal and the feedback signal can maintain a fixed phase relationship between the signals. The present invention provides a configuration including a PLL circuit and an oscillator circuit, where a switch for switching an output between a signal from the PLL circuit and a signal from the oscillator circuit to the signal output portion is provided to switch from a connection to the PLL circuit to a connection to the oscillator circuit in a case where there is no received signal.

Abstract: Methods and apparatus for reducing transmit emissions are described herein. The transmit out of band emissions in an adjacent band can be reduced while complying with existing wireless communication standards through utilization of one or more of reduced transmit bandwidth, transmit operating band offset, and channel index remapping. The transceiver can support a receive operating band that is substantially adjacent to a band edge. The transmit operating band can be offset from an adjacent frequency band, and can use a narrower operating band than is supported by the receiver. The transmit baseband signal can have a reduced bandwidth to reduce the amount of noise. The frequency offset can introduce a larger transition band between the transmit operating band edges and the adjacent frequency band of interest. The transceiver can remap channel assignments to compensate for the frequency offset such that the frequency offset introduced in the transmitter is transparent to channel allocation.

Abstract: A system (100) and method (200) for dynamic frequency synthesizer programming is provided The method can include identifying (202) a first operating frequency (120) of a first oscillator (250), identifying a second operating frequency (121) of a second oscillator (255), and adjusting the first operating frequency if the first operating frequency and the second operating frequency are within a pre-determined range (155) for suppressing an interference between the first oscillator and the second oscillator. In one configuration, the first operating frequency can be changed (121) by a pre-specified offset if the first oscillator is in transmit mode (121) and the second oscillator is in receive mode (142). In another configuration, the first operating frequency can be changed by a pre-specified offset if the first oscillator is in transmit mode (121) and the second oscillator is in transmit mode (141).

Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Abstract: A ratiometric transmit path architecture for communication systems and related methods are disclosed. This ratiometric transmit path architecture utilizes a single local oscillator signal and dividers to provide mixing signals for intermediate frequency (IF) mixing circuitry and feedback mixing circuitry, thereby eliminating the need for separate IF and radio frequency (RF) voltage controlled oscillators (VCOs) in prior solutions.

Abstract: Mixing circuitry for quadrature processing in communication systems and related methods are disclosed. The weighted mixing circuitry allows for arbitrary dividers to be utilized in generating the mixing signals for quadrature processing and thereby provides a significant advantage over prior architectures where 90 degree offset I and Q mixing signals were needed for quadrature mixing.

Abstract: A frequency synthesizer module with phase hits compensation, comprises an enclosure; a frequency synthesizer within the enclosure; and a heater module including a heater element in thermal communication with the frequency synthesizer for producing heat to adaptively adjust frequency synthesizer temperature. The frequency synthesizer module may be in an ODU and electrically isolated from the heater module. The heater module may include a posistor that varies based on temperature; and a voltage regulator having an input pin for receiving a varying input voltage, an output pin for providing a modifiable output voltage to the heater element for adaptively adjusting the heat generated thereby, and an adjust pin coupled to the posistor for maintaining a substantially constant voltage at the adjust pin. The heater module may heat when below room temperature, heat at less than maximum power when between room temperature and a threshold, and deactivate when above the threshold.

Abstract: An AFC-control D/A converter which controls a reference frequency oscillator is a voltage-potentiometer-type D/A converter containing three voltage followers. At least in the latter-stage voltage follower, an NMOS differential input circuit, a CMOS output circuit, and a bias circuit are supplied with an external power voltage. However, PMOS differential input circuit is supplied with an internal regulated power supply voltage generated by a reference voltage generator. Even if there is a shift in the pair nature of MP1 and MP2 of the differential PMOS, an increase of current of MP3 of a PMOS current source due to the increase of the external power voltage is suppressed. Also an input offset voltage of the differential PMOS does not increase, and a change of an AFC control analog output signal can be reduced.

Abstract: A wireless communication device (UST), comprising an input for receiving baseband data (I, Q) in a first signal having a first frequency. The device also comprises circuitry (681, 682) for increasing the first frequency, to form a second signal having a second frequency, in response to a first frequency reference signal (IF2), and the device comprises circuitry (74) for increasing the second frequency, to form a third signal having a third frequency, in response to a second frequency reference signal (LO2). Lastly, the device comprises an antenna (ATU2) for transmitting the baseband data at a final transmission frequency selected as a band within a predetermined set of frequency bands. With reference to the preceding, the first frequency reference signal and the second frequency reference signal are variable and are selected in response to the final transmission frequency which is a particular band selected as a different band at different times and from the predetermined set of frequency bands.

Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Abstract: A frequency synthesizer circuit generates an output clock signal having a desired frequency relationship with an input reference signal, and offers essentially arbitrary relational values and adjustment resolution within any applicable circuit limits. The frequency synthesizer includes a ring oscillator circuit that provides multiple phases of its output clock signal, a phase selection circuit to select a phase of the output clock signal for feedback to an oscillator control circuit at each cycle of the reference signal according to a phase selection sequence. The oscillator control circuit generates a control signal responsive to comparing the selected phases of the output clock signal with the reference signal, and the phase selection circuit may include a modulator to generate phase selection sequences having desired time-average values that enable arbitrary frequency adjustability.

Abstract: A digital signal transceiver includes a frequency modulator for outputting a high-frequency signal frequency-modulated with a digital signal input thereto, a power amplifier, an antenna terminal, and an antenna switch. The antenna switch includes a first branch port for receiving a signal output from the power amplifier, a common port connected to the antenna terminal, said common port being connected to the first branch port in the transmitting mode, and a second branch port connected to the common port in the receiving mode. The transceiver further includes a filter having an input port thereof connected to the second branch port of the antenna switch, a high-frequency amplifier having an input port thereof connected to an output port of the filter, and a mixer for mixing a signal output from the high-frequency amplifier with the signal output from the frequency modulator.

Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Abstract: An amplifier including an input stage having two inputs, each input being connected to the control terminals of first and second transistors, a current output of the first transistor being connected to a first terminal of a resistor and to a reference supply rail via a variable current source having a value capable of automatically varying according to the voltage applied between said amplifier inputs up to a limiting value, and a current output of the second transistor being connected to the reference supply rail via a fixed current source and to the second terminal of the resistor.

Abstract: A phase locked loop includes a detection module, a control conversion module, a controlled oscillation module, a divider module, and a power distribution module. The detection module is operably coupled to produce a difference signal based on a difference between a reference oscillation and a feedback oscillation. The control conversion module is operably coupled to convert the difference signal into a control signal. The controlled oscillation module is operably coupled to produce an output oscillation based on the control signal. The divider module is operably coupled to produce the feedback oscillation based on the output oscillation. The power distribution module is operably coupled to receive a supply voltage and to provide an individual supply voltage to at least one of the detection module, the control conversion module, the controlled oscillation module, and the divider module to optimize at least one of performance and power consumption of the phase locked loop.

Abstract: Methods and apparatus for providing a local oscillator (LO) signal are disclosed. An example apparatus includes a circuit for providing the LO signal. The circuit includes a voltage controlled oscillator (VCO) that is configured to operate at a first supply voltage. The VCO is also configured to produce a VCO signal. The circuit also includes an LO generator that is coupled with the VCO so as to receive the VCO signal. In the example apparatus, the LO generator is configured to operate at a second supply voltage, where the second supply voltage is greater than the first supply voltage. Further, the LO generator includes one or more resistively loaded circuits for producing the LO signal from the VCO signal.

Abstract: The present invention relates to an RF integrated circuit comprising a frequency synthesizer and a QAM modulator for modulating a baseband signal of frequency FBB, the frequency synthesizer supplying to the QAM modulator an output signal of frequency F1 adjustable with a frequency step ?F1, for forming a carrier signal of the QAM modulator. According to the present invention, the frequency synthesizer is a Vernier effect frequency synthesizer comprising an auxiliary frequency synthesizer supplying an auxiliary signal of frequency F2 adjustable with a frequency step ?F2 and a main frequency synthesizer having a phase-locked loop bandwidth at least two times higher than the frequency step ?F2 of the auxiliary signal.

Abstract: A method of controlling a phase locked loop in a mobile station and a mobile station of a cellular telecommunications system are provided. The mobile station comprises an integrated phase locked loop for generating output frequencies; a frequency control unit for providing a frequency control word for the phase locked loop, according to which frequency control word an output frequency is generated; and a tuning unit for providing a synchronized tuning word for the phase locked loop, the tuning unit being configured to output the synchronized tuning word to the phase locked loop in synchronization with the output of the frequency control word. The invention reduces the settling time of a mobile station when an operating frequency is changed from one to another.

Abstract: A frequency synthesizer for use in a transceiver generates a relatively high reference frequency with fine frequency resolution and low in-band phase noise by using a digital processor to generate a digital reference signal at a finely-tuned reference frequency. A Digital-to-Analog Converter (DAC) converts the digital reference signal to an analog reference signal, and a low pass filter filters the analog reference signal to produce a filtered analog reference signal. The frequency synthesizer further includes a phase locked loop for up-converting the filtered analog reference signal from an IF signal to an RF signal.

Abstract: According to an example embodiment, an apparatus is provided in a wireless transceiver. The apparatus may include a circuit configured to generate a first frequency signal (e.g., a VCO signal). A local oscillator (LO) generator may be provided that includes a frequency divider to divide the first frequency signal, and an image rejection mixer configured to mix the first frequency signal with an output of the frequency divider to generate an LO signal. In this manner, the LO generator may generate a desired LO signal while substantially rejecting or suppressing an unwanted sideband or image signal, according to an example embodiment.

Abstract: A phase locked loop frequency synthesizer including a phase locked loop, a frequency regenerator and a modulation processor, resistant to distortion induced by the frequency regenerator and conforming to transmission specifications. The phase locked loop comprises a detector generating a phase detection signal based on phase difference between a reference signal and a feedback signal, a loop filter, a voltage control oscillator generating a first output modulation signal and a frequency dividing unit varying a division factor based on a processed input modulation signal and dividing the frequency of the first output modulation signal by a division factor to generate the feedback signal. The frequency regenerator generates a second output modulation signal with a frequency range not overlapping an output frequency range of the voltage control oscillator.

Abstract: A method and device for frequency conversion is disclosed in which a first signal with a first frequency is converted into a second frequency through mixing with a divided oscillator signal and wherein the frequency of the divided oscillator signal stands in a fractional rational ratio to the frequency of the undivided oscillator signal. The method is characterized in that the oscillator signal is divided such that an average value of the divided oscillator signal over time corresponds to half the separation between the extreme values of the divided oscillator signal.

Abstract: Methods and systems frequency conversion for Bluetooth and FM radio are provided. FM data may be received and/or transmitted via the FM radio and Bluetooth data may be received and/or transmitted via the Bluetooth radio. With an integration of frequency conversion for Bluetooth and FM, both systems may operate from a single frequency source, thereby reducing part count and power consumption. Communication between Bluetooth and FM channels may be enabled via a single chip.

Abstract: Frequency conversion methods and systems for Bluetooth and FM radio communication are provided. FM data may be received and/or transmitted via the FM radio and Bluetooth data may be received and/or transmitted via the Bluetooth radio. With an integration of frequency conversion for Bluetooth and FM, both systems can operate from a single frequency source, thereby reducing part count and power consumption. Communication between Bluetooth and FM channels may be enabled via a single chip.

Abstract: A communication semiconductor integrated circuit has an oscillator circuit forming part of a transmission PLL circuit fabricated on a single semiconductor chip together with an oscillator circuit forming part of a reception PLL circuit and an oscillator circuit for an intermediate frequency. The oscillator circuit forming part of the transmission PLL circuit is configured to be operable in a plurality of bands. A circuit for measuring the oscillating frequency of the oscillator circuit forming part of the transmission PLL circuit is also used for measuring the oscillating frequency of the oscillator circuit forming part of the reception PLL circuit or for measuring the oscillating frequency of the oscillator circuit for the intermediate frequency.

Abstract: A device and method for generating an adjustable chaotic signal are provided. The chaotic signal generation device includes a plurality of triangle pulse train generators which generate a plurality of triangle waves having different frequency cycles, an adder which adds the triangle waves output from the triangle pulse train generators and outputs a noise signal, and a frequency modulator which converts the noise signal to a certain frequency band to output a chaotic signal. Accordingly, the power consumption and cost are reduced and the manufacture of the chaotic signal generation device is simplified due to the components integrated on an IC. Also, a plurality of users can use wireless communications in a particular wireless communications area.

Abstract: A wideband signal generator according to one embodiment of the invention includes a variable frequency source and a direct digital synthesizer. Local oscillators, signal analyzers, modulators, demodulators, and other equipment including one or more such generators are also disclosed.

Abstract: Interference between each other PLL circuits is suppressed. Detector 30 detects whether or not the difference between output signal frequency of PLL circuit 20 having frequency of an input signal swept and a predetermined frequency is not more than first threshold value. Frequency division ratio setting circuit 40 controls to change output signal frequency of a PLL circuit 10 when the difference is not more than the first threshold value. The predetermined frequency is fixed according to output signal frequency of PLL circuit 10. PLL circuit 10 comprises frequency dividers 11, 16, and 17 determining output signal frequency of the PLL circuit 10, and the frequency division ratio of frequency dividers can be changed under control of frequency division ratio setting circuit 40.

Abstract: A system and a method for self calibrating a voltage-controlled oscillator (VCO). In the system, a mode controller generates a control signal for each of an automatic band selection mode, an automatic gain tuning mode, and a phase-locking mode, from a frequency comparison result between a reference clock signal and a divided clock signal which is generated by dividing a frequency of an oscillation signal, and thereby controls the VCO, so that the VCO may generate the oscillation signal which is automatically phase-locked in a target frequency with an optimal state.

Abstract: A digital baseband (DBB) receiver for receiving and processing a wireless communication signal. The DBB receiver includes at least one low noise amplifier (LNA), at least one demodulator, a direct current (DC) discharge circuit and an LNA control circuit. The LNA selectively amplifies the communication signal. The demodulator outputs analog real and imaginary signal components on real and imaginary signal paths, respectively, in response to receiving the communication signal from the LNA. The DC discharge circuit selectively discharges DC accumulating on at least one of the real and imaginary signal paths. The LNA control circuit turns the LNA on or off.

Abstract: A frequency plan is provided for particular use in a transceiver. Advantageously, a single oscillator may be used to generate desired frequency signal. One or more power splitters receive the signal and equally divide the signal into first and second signals having a frequency substantially equal to the original. Multipliers on each arm of the transceiver receive a signal and increase the frequency of the signal. Ultimately, multiple signals having different frequencies may be transmitted over the same cable due in part to the generated frequency separation between the signals. In one particular aspect, the frequency plan provides a two-thirds relationship between the frequencies of the multiple signals.

Abstract: A frequency generation apparatus and a method are provided. The frequency generation apparatus for generating a plurality of center frequencies for use in multi-band hopping communication, includes: an oscillator generating an oscillation frequency; a reference frequency generator multiplying the oscillation frequency by a first multiplication rate to generate a reference frequency; a compensation frequency generator multiplying the oscillation frequency by a second multiplication rate to generate a compensation frequency for compensating for the influence of a frequency offset of the oscillation frequency; and a center frequency generator generating the plurality of center frequencies using the reference frequency and the compensation frequency. Therefore, by compensating for the influence of a frequency offset of an oscillation frequency on the generation of center frequencies, it is possible to generate stable center frequencies.

Abstract: A transceiver is provided that includes a TX path mixer that up converts, a RX path mixer that down converts, and a local oscillator that provides a mixing frequency for the TX and RX mixers. The transceiver further provides a directional coupler having an input path coupled to the input of a UHF VCO for dividing power to a TX path and a RX path in the directional coupler. A mixer is provided to mix the input/output frequencies from the RX IF/TX IF. The operating frequency range of the directional coupler is greater than the output frequency of the UHF VCO. The directional coupler splits the UHF VCO unequal power at different ports of the directional coupler to redistribute the power in different ports, thus preventing the TX signal from being reflected back to the RX signal. The invention further provides the additional isolation required by the TX local oscillator chain by preventing reverse power feed into the RX local oscillator.