Superconducting Transistor (e.g., Josephson Transistor, Etc.) Patents (Class 505/193)
  • Patent number: 5462916
    Abstract: The disclosed superconductive optoelectronic device with the basic substance Bi.sub.2 O.sub.3 or Bi.sub.2 O.sub.3 ;M.sup.2+ (M=Ca,Sr,Cu) of superconductive-conjugate photoconductivity has a substrate, a photoconductive gate region formed on the substrate, and a source region and a drain region formed on the substrate at opposite sides of the gate region so as to face toward each other across the gate region. The source region and the drain region are made of a Bi-based superconductive material. The gate region is made of such the basic material Bi.sub.2 O.sub.3 or Bi.sub.2 O.sub.3 ;M.sup.2+ (M=Ca,Sr,Cu) of superconductive-conjugate photoconductivity, which reveals photoconductivity at a temperature below the transition temperature of the above relevant Bi-based superconductive material. Also disclosed are superconductive optoelectronic devices formed of an organized integration of the above superconductive optoelectronic devices to develop effectively a new field of "Superconductive Optoelectronics".
    Type: Grant
    Filed: February 14, 1994
    Date of Patent: October 31, 1995
    Assignee: The University of Tokyo
    Inventor: Taizo Masumi
  • Patent number: 5462918
    Abstract: A superconducting device has a stacked structure including a first superconducting layer, a first insulating layer, a second superconducting layer, a second insulating layer and a third superconducting layer stacked on a substrate in this given order. The stacked structure has an end surface portion extending from the first insulating layer to the second insulating layer. A fourth superconducting layer is formed to cover the end surface of the stacked structure. A third insulating layer separates the stacked structure end surface and the fourth superconducting layer. The fourth superconducting layer is electrically connected to the first and third superconducting layers but is isolated from the second superconducting layer by the third insulating layer. The first through fourth superconducting layers are formed of an oxide superconductor thin film.
    Type: Grant
    Filed: May 26, 1994
    Date of Patent: October 31, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama
  • Patent number: 5447907
    Abstract: A superconducting device comprising a substrate having a principal surface, a superconducting source region and a superconducting drain region formed of an oxide superconductor on the principal surface of the substrate separated from each other, a superconducting channel formed of the oxide superconductor between the superconducting source region and the superconducting drain region. The superconducting channel electrically connects the superconducting source region to a superconducting drain region, so that a superconducting current can flow through the superconducting channel between the superconducting source region and the superconducting drain region. The superconducting device comprises a gate electrode through a gate insulator on the superconducting channel for controlling the superconducting current flowing through the superconducting channel, and non-superconducting oxide layers having a similar crystal structure to that of the oxide superconductor.
    Type: Grant
    Filed: December 10, 1992
    Date of Patent: September 5, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama
  • Patent number: 5446015
    Abstract: For manufacturing a superconducting device, a first oxide superconductor thin film having a very thin thickness is formed on a principal surface of a substrate, and a stacked structure of a gate insulator and a gate electrode is formed on a portion of the first oxide superconductor thin film. A second oxide superconductor thin film is grown on an exposed surface of the first oxide superconductor thin film, using the gate electrode as a mask, so that first and second superconducting regions having a relatively thick thickness are formed at opposite sides of the gate electrode, electrically isolated from the gate electrode. A source electrode and a drain electrode are formed on the first and second oxide superconducting regions. The superconducting device thus formed can function as a super-FET.
    Type: Grant
    Filed: February 10, 1994
    Date of Patent: August 29, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama
  • Patent number: 5441926
    Abstract: A superconducting transistor having a source region and a drain region are formed by a YBCO film on a barrier layer, which is composed of a PBCO film formed on an STO substrate. A gate electrode is disposed on the thinner wall at the back of the STO substrate. In a superconducting transistor so constructed the electric field created by the gate voltage works effectively at an interface with the barrier layer, more carriers can be drawn out relative to the applied gate voltage, and it becomes possible for a large superconduction current to flow.
    Type: Grant
    Filed: November 12, 1993
    Date of Patent: August 15, 1995
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Hiroshi Kimura, Toshiyuki Matsui, Takeshi Suzuki, Kazuo Mukae, Akihiko Ohi
  • Patent number: 5434127
    Abstract: For manufacturing a superconducting device, a first c-axis orientated oxide superconductor thin film having a very thin thickness is formed on a principal surface of a substrate, and a stacked structure of a gate insulator and a gate electrode is formed on a portion of the first oxide superconductor thin film. An a-axis orientated oxide superconductor thin film is grown, using the gate electrode as a mask, so that second and third superconducting regions having a relatively thick thickness are formed at both sides of the gate electrode, electrically isolated from the gate electrode. The superconducting device thus formed can functions as a super-FET.
    Type: Grant
    Filed: July 25, 1994
    Date of Patent: July 18, 1995
    Assignee: Sumitomo Electric Industries, ltd.
    Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama
  • Patent number: 5430013
    Abstract: A superconducting thin film formed on a substrate, comprising an a-axis orientated oxide superconductor layer, a c-axis orientated oxide superconductor layer and an oxide semiconductor layer inserted between the a-axis orientated oxide superconductor layer and the c-axis orientated oxide superconductor layer, in contact with them in which superconducting current can flow between the a-axis orientated oxide superconductor layer and the c-axis orientated oxide superconductor layer through the oxide semiconductor layer by a long-range proximity effect.
    Type: Grant
    Filed: October 24, 1994
    Date of Patent: July 4, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroshi Inada, Michitomo Iiyama
  • Patent number: 5430011
    Abstract: A superconducting thin film formed on a substrate, comprising at least one oxide superconductor layer formed on the principal surface of said substrate and at least one oxide layer formed of an oxide which compensates for crystalline incompleteness at the surface of said oxide superconductor layer, and which is arranged on or under the superconducting layer.
    Type: Grant
    Filed: September 17, 1992
    Date of Patent: July 4, 1995
    Assignee: Sumitomi Electric Industries, Ltd.
    Inventors: So Tanaka, Michitomo Iiyama
  • Patent number: 5422336
    Abstract: A superconducting transistor with superior withstand voltage having source region and a drain region formed of oxide superconductors 3, a PrBa.sub.2 Cu.sub.3 O.sub.7-x layer 2 or an ScBa.sub.2 Cu.sub.3 O.sub.7-x layer 2 forming an intermediate region sandwiched by the source and drain regions. The regions are disposed on a substrate 1. An insulation layer 4 is disposed on the intermediate region. A transistor uses the intermediate region as an insulator when the gate is turned off, and as a superconductor when the gate is turned on.
    Type: Grant
    Filed: September 22, 1993
    Date of Patent: June 6, 1995
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Koichi Tsuda, Toshiyuki Matsui, Takeshi Suzuki, Hiroshi Kimura, Takashi Ishii, Akihiko Ohi, Kazuo Mukae
  • Patent number: 5420101
    Abstract: The invention relates to a structured superconductive track and a process for making it from epitaxial high temperature superconductor (HTSC) layers using lift off technique, in which a HTSC track deposited on an elevated substrate region is surrounded by an insulating layer of doped HTSC lying on a lower substrate region, and the substrate region with the superconductive track formed thereon is elevated such that the superconductive track is isolated from the insulating layer.
    Type: Grant
    Filed: December 23, 1993
    Date of Patent: May 30, 1995
    Assignee: Forschungszentrum Julich GmbH
    Inventors: Carlo Copetti, Jurgen Schubert, Willi Zander, Christoph Buchal
  • Patent number: 5416072
    Abstract: A superconducting device has a superconducting channel formed of an oxide superconductor on the principal surface of a substrate. A source electrode and a drain electrode likewise formed of oxide superconductor, are electrically connected by the channel to provide for superconducting current flow. A superconducting gate electrode is isolated by a side insulating region which completely covers each of opposite side surfaces of the gate electrode. The relative thicknesses of both the source and drain electrodes are much greater than that of the channel thickness. The superconducting channel and the gate insulator are both formed by one oxide thin film, and in a preferred embodiment, the gate electrode likewise is provided by the same film which forms the gate insulator and channel.
    Type: Grant
    Filed: July 26, 1993
    Date of Patent: May 16, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroshi Inada, Takao Nakamura, Michitomo Iiyama
  • Patent number: 5413982
    Abstract: A superconducting device comprising a substrate having a principal surface, a non-superconducting oxide layer having a similar crystal structure to that of the oxide superconductor, an extremely thin superconducting channel formed of a c-axis oriented oxide superconductor thin film on the non-superconducting oxide layer, a superconducting source region and a superconducting drain region formed of an a-axis oriented oxide superconductor thin film at the both sides of the superconducting channel separated from each other, which are electrically connected each other by the superconducting channel, so that superconducting current can flow through the superconducting channel between the superconducting source region and the superconducting drain region, and a gate electrode of a material which includes silicon through a gate insulator on the superconducting channel for controlling the superconducting current flowing through the superconducting channel, in which the gate electrode is embedded between the supercondu
    Type: Grant
    Filed: December 14, 1992
    Date of Patent: May 9, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroshi Inada, So Tanaka, Michitomo Iiyama
  • Patent number: 5407903
    Abstract: For manufacturing a superconducting device, a first c-axis orientated oxide superconductor thin film having a very thin thickness is formed on a principal surface of a substrate, and a stacked structure of a gate insulator and a gate electrode is formed on a portion of the first oxide superconductor thin film. An a-axis orientated oxide superconductor thin film is grown, using the gate electrode as a mask, so that second and third superconducting regions having a relatively thick thickness are formed at both sides of the gate electrode, electrically isolated from the gate electrode. The superconducting device thus formed can functions as a super-FET.
    Type: Grant
    Filed: September 27, 1991
    Date of Patent: April 18, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama
  • Patent number: 5408108
    Abstract: A superconducting device comprises a substrate having a principal surface and a non-superconducting oxide layer having a similar crystal structure to that of the oxide superconductor, which has a projection at its center portion. A superconducting source region and a superconducting drain region formed of an .alpha.-axis oriented oxide superconductor thin film are positioned at the both sides of the projection of the non-superconducting oxide layer separated from each other and an extremely thin superconducting channel formed of a c-axis oriented oxide superconductor thin film is positioned on the projection of the non-superconducting oxide layer. The superconducting channel electrically connects the superconducting source region to the superconducting drain region, so that superconducting current can flow through the superconducting channel between the superconducting source region and the superconducting drain region.
    Type: Grant
    Filed: December 14, 1992
    Date of Patent: April 18, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takao Nakamura, Michitomo Iiyama, Hiroshi Inada
  • Patent number: 5401714
    Abstract: A field-effect structure formed on a substrate and comprising a channel with source and drain as well as a gate that is separated from the channel by an insulating layer. The channel is made of a high T.sub.c metal-oxide superconductor, e.g., YBaCuO, having a carrier density of about 10.sup.21 /cm.sup.3 and a correlation length of about 0.2 nm. The channel thickness is preferrable in the order of 1 nm. The superconductor is preferably a single crystalline and oriented such that the superconducting behavior is strongest in the plane parallel to the substrate. With a signal of a few volts applied to the gate, the entire channel cross-section is depleted of charge carriers whereby the channel resistance can be switched between a "zero resistance" (undepleted, superconducting) state and "very high resistance" (depleted state).
    Type: Grant
    Filed: May 4, 1994
    Date of Patent: March 28, 1995
    Assignee: International Business Machines Corporation
    Inventors: Preveen Chaudhari, Carl A. Mueller, Hans P. Wolf
  • Patent number: 5399546
    Abstract: A superconducting device comprises a substrate, a non-superconducting layer formed in a principal surface of said substrate, an extremely thin superconducting channel formed of an oxide superconductor thin film on the non-superconducting layer. A superconducting source region and a superconducting drain region of a relatively thick thickness are formed of the oxide superconductor at the both sides of the superconducting channel separated from each other but electrically connected through the superconducting channel, so that a superconducting current can flow through the superconducting channel between the superconducting source region and the superconducting drain region.
    Type: Grant
    Filed: November 30, 1992
    Date of Patent: March 21, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takao Nakamura, Michitomo Iiyama
  • Patent number: 5388068
    Abstract: Superconducting-semiconducting hybrid memories are disclosed. These superconducting-semiconducting hybrid memories utilize semiconductor circuits to store information, and either superconducting or semiconducting or combinations of superconducting and semiconducting circuits, with at least some superconducting circuitry used, to write and read information. The state of memory cells in the hybrid memories is determined by utilizing superconductor current sensing schemes to detect currents in the bit-line, thereby avoiding any bit-line charging delays and other problems associated with purely semiconductor memories. Additional features of the superconducting-semiconducting hybrid memories include wide margins, dense packing of memory cells, low power dissipation and fast access times. Interface curcuitry for converting superconducting signals to signals compatible with semiconductor circuits and for converting semiconductor signals to signals compatible with superconducting circuits is also disclosed.
    Type: Grant
    Filed: October 14, 1993
    Date of Patent: February 7, 1995
    Assignee: Microelectronics & Computer Technology Corp.
    Inventors: Uttam S. Ghoshal, Harry Kroger
  • Patent number: 5382565
    Abstract: This field-effect transistor comprises a conductive substrate (2) serving as the gate electrode, an insulating barrier layer (3), and a superconducting channel layer (1) on top of the barrier layer (3). The superconductor layer (1) carries a pair of mutually spaced electrodes (4, 5) forming source and drain, respectively. The substrate is provided with an appropriate gate contact (6).The substrate (2) consists of a material belonging to the same crystallographic family as the barrier layer (3). In a preferred embodiment, the substrate (2) is niobium-doped strontium titanate, the barrier layer (3) is undoped strontium titanate, and the superconductor (1) is a thin film of a material having a lattice constant at least approximately similar to the one of the materials of the substrate (2) and barrier (3) layers. A preferred material of this type is YBa.sub.2 Cu.sub.3 O.sub.7-.delta., where 0.ltoreq..delta..ltoreq.0.5.
    Type: Grant
    Filed: October 20, 1993
    Date of Patent: January 17, 1995
    Assignee: International Business Machines Corporation
    Inventors: Johannes G. Bednorz, Jochen D. Mannhart, Carl A. Mueller
  • Patent number: 5380704
    Abstract: Disclosed herein is a superconducting field effect transistor (FET) which has at least an active region formed from a film of oxide normal conductor, a plurality of electrodes formed from a film of oxide superconductor, and a means to control the current which flows between the electrodes through the active region. Having a much greater electrode distance than the conventional superconducting device, it can be produced easily by lithography without resorting to special techniques.
    Type: Grant
    Filed: August 30, 1993
    Date of Patent: January 10, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Yoshinobu Tarutani, Tokuumi Fukazawa, Uki Kabasawa, Kazumasa Takagi, Akira Tsukamoto, Masahiko Hiratani, Toshikazu Nishino
  • Patent number: 5345115
    Abstract: A superconducting interface circuit converting a signal sent from a normal conducting circuit into a small voltage swing signal suitable for a superconducting circuit includes a superconducting field effect device. The superconducting field effect device has a superconducting channel of an extremely thin oxide superconductor thin film, a superconducting source region and a superconducting drain region of an oxide superconductor thin film positioned at both ends of the superconducting channel, and a gate electrode on the superconducting channel through a gate insulator. The gate electrode of the super-FET is connected to a signal line which transmits a voltage signal from the normal conducting circuit.
    Type: Grant
    Filed: April 28, 1993
    Date of Patent: September 6, 1994
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hitoki Tokuda, Michitomo Iiyama
  • Patent number: 5338943
    Abstract: A magnetic flux-enhanced control line for a superconducting flux flow transistor (SFFT). The SFFT includes a pair of superconducting electrodes which provide a voltage output, a region of weakened superconductor connecting the electrodes and a control line. The region of weakened superconductor carries a current I.sub.body and the control line carries a current I.sub.Control. The control line further has a portion thereof proximate the weakened region for providing a localized magnetic field through the weakened region as a function of I.sub.Control. The magnetic flux through the weakened region induces vortices therein which have a resistance r.sub.o. The proximate portion of the control line forms a tortuous current path whereby the magnetic flux through the weakened region is increased for increasing r.sub.o so that the output voltage of the transistor is increased without increasing I.sub.Control.
    Type: Grant
    Filed: September 1, 1993
    Date of Patent: August 16, 1994
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventors: William Wilber, Roland Cadotte, Jr., Adam Rachlin, Michael Cummings
  • Patent number: 5318952
    Abstract: A superconducting transistor is provided with a base layer made of a normal conductor metal, an emitter layer made of a superconductor for injecting hot electrons to the base layer, a collector layer made of a superconductor for trapping electrons from the base layer, a first tunnel barrier layer made of an insulator and provided between the base layer and the emitter layer, and a second tunnel barrier layer made of an insulator and provided between the base layer and the collector layer.
    Type: Grant
    Filed: August 27, 1993
    Date of Patent: June 7, 1994
    Assignee: Fujitsu Limited
    Inventor: Tsunehiro Hato