Superconductor Next To Two Or More Nonsuperconductive Layers Patents (Class 505/237)
  • Patent number: 11515461
    Abstract: Techniques for trapping quasiparticles in superconductor devices are provided. A superconductor device can comprise a substrate layer. The superconductor device can further comprise a first superconductor layer composed of a first superconductor material, on a first surface of a substrate layer. The superconductor device can further comprise a trapping material buried in the first superconductor layer, wherein the trapping material is formulated to trap quasiparticles.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: November 29, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Baleegh Abdo, Sarunya Bangsaruntip
  • Patent number: 11489105
    Abstract: A method of fabricating a piezoelectric layer includes depositing a piezoelectric material onto a substrate in a first crystallographic phase by physical vapor deposition while the substrate remains at a temperature below 400° C., and thermally annealing the substrate at a temperature above 500° C. to convert the piezoelectric material to a second crystallographic phase. The physical vapor deposition includes sputtering from a target in a plasma deposition chamber.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: November 1, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Abhijeet Laxman Sangle, Vijay Bhan Sharma, Ankur Kadam, Bharatwaj Ramakrishnan, Visweswaren Sivaramakrishnan, Yuan Xue
  • Patent number: 11227706
    Abstract: A superconducting wire according to the present disclosure includes: a base material; a superconductor layer formed on each of the respective surfaces of the base material; and a conductive protection layer formed on each of the surfaces of the respective superconductor layers. The thickness of each of the conductive protection layers is 5% or less of the skin depth when a high-frequency current flows through the superconducting wire. The material for forming the conductive protection layer may be, for example, silver.
    Type: Grant
    Filed: July 12, 2018
    Date of Patent: January 18, 2022
    Assignee: UNIVERSITY OF YAMANASHI
    Inventor: Naoto Sekiya
  • Patent number: 10319500
    Abstract: Disclosed is a method for manufacturing a superconducting wire material having a laminated structure. The present invention provides a method for manufacturing a laminated superconducting wire material, comprising the steps of: providing a deposition substrate having a predetermined width; sequentially forming, on the deposition substrate, a laminated structure including a buffer layer, a superconducting layer and a stabilization layer, thereby forming, on both sides of the deposition substrate, regions in which a metal substrate is exposed in the width direction; providing a lamination substrate, having a width corresponding to the deposition substrate, to the laminated structure; and providing solder to the regions, in which the metal substrate is exposed, to thereby bond the deposition substrate and the lamination substrate.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: June 11, 2019
    Assignee: KOREA ELECTROTECHNOLOGY RESEARCH INSTITUTE
    Inventors: Rock Kil Ko, Seog Whan Kim, Young Sik Jo, Dong Woo Ha
  • Patent number: 9539626
    Abstract: A method of rolling NiW alloy tapes for coated conductors belongs to the technical field of metal materials rolling. According to the method, a cylindrical NiW alloy ingot with a diameter not less than 10 mm is used to be rolled back and forth along the axial direction as a rolling direction, wherein the content of W is 5˜7 at. %, and the axis of this ingot is perpendicular to the plane where the axes of working rollers are located. During rolling process, the cross sectional area reduction of the ingot is retained at 5% per pass. When the total cross sectional area reduction of the ingot is larger than 98% and the thickness of the tape is down to 60˜100 ?m, the rolling is stopped, and thus the NiW alloy tape is obtained.
    Type: Grant
    Filed: June 4, 2014
    Date of Patent: January 10, 2017
    Assignee: BEIJING UNIVERSITY OF TECHNOLOGY
    Inventors: Lin Ma, Hong-Li Suo, Yi-Chen Meng, Ya-Ru Liang, Li-Jia Chen, Yan Xu, Hui Tian, Yi Wang, Min Liu
  • Patent number: 9159898
    Abstract: An oxide superconducting thin film includes a substrate, and an intermediate layer and a superconducting layer provided in this order on the substrate. The intermediate layer has an average thickness of from 10 nm to 20 nm and a surface roughness Ra of 0.5 nm or less. The superconducting layer is formed on a surface of the intermediate layer and includes an oxide superconductor as a main component. A superconducting fault current limiter including the oxide superconducting thin film is also provided.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: October 13, 2015
    Assignees: FURUKAWA ELECTRIC CO., LTD., NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Hajime Kasahara, Norio Matsui, Masakazu Matsui, Naoto Edo, Kengo Nakao, Toshiya Kumagai, Takaaki Manabe, Mitsugu Sohma
  • Patent number: 9105794
    Abstract: An oxide superconducting thin film includes a substrate having a single crystal structure, the main face of the substrate and a crystal face of the single crystal structure having an angle therebetween; an intermediate layer formed on the main face of the substrate and having an axis oriented in a direction perpendicular to the crystal face; and a superconducting layer formed on the intermediate layer and containing, as a main component, an oxide superconductor having a c-axis oriented in a direction perpendicular to the surface of the intermediate layer. A superconducting fault current limiter and a method of manufacturing an oxide superconducting thin film are also provided.
    Type: Grant
    Filed: May 30, 2012
    Date of Patent: August 11, 2015
    Assignees: FURUKAWA ELECTRIC CO., LTD., NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Kengo Nakao, Hajime Kasahara, Masakazu Matsui, Norio Matsui, Naoto Edo, Toshiya Kumagai, Takaaki Manabe, Mitsugu Sohma
  • Publication number: 20150148236
    Abstract: A method of forming a superconductor includes exposing a layer disposed on a substrate to an oxygen ambient, and selectively annealing a portion of the layer to form a superconducting region within the layer.
    Type: Application
    Filed: November 27, 2013
    Publication date: May 28, 2015
    Applicant: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Connie P. Wang, Paul Murphy, Paul Sullivan, Sukti Chatterjee
  • Patent number: 9029296
    Abstract: There is described herein a superconducting segment and method of making same comprising one or several layers with very high electrical resistivity, acting as a current flow diverter when the current transfers from the superconductor to the stabilizer. The purpose of this current flow diverter is: i) to increase the contact resistance between the superconductor and the stabilizer, by reducing the contact area, and ii) to force the current to flow along a specific path, so as to increase momentarily the current density in a specific portion of the stabilizer. The consequence of i) and ii) is that heat generated at the extremities of the normal zone is increased and spread over a longer length along the superconducting segment, which increases the NZPV and thus, the uniformity of the quench.
    Type: Grant
    Filed: February 1, 2013
    Date of Patent: May 12, 2015
    Assignee: Polyvalor, Limited Partnership
    Inventors: Christian Lacroix, Frederic Sirois, Michael Robert Wertheimer
  • Patent number: 9023764
    Abstract: According to one embodiment, an oxide superconductor includes an oriented superconductor layer and an oxide layer. The oriented superconductor layer contains fluorine at 2.0×1016-5.0×1019 atoms/cc and carbon at 1.0×1018-5.0×1020 atoms/cc. The superconductor layer contains in 90% or more a portion oriented along c-axis with an in-plane orientation degree (??) of 10 degrees or less, and contains a LnBa2Cu3O7-x superconductor material (Ln being yttrium or a lanthanoid except cerium, praseodymium, promethium, and lutetium). The oxide layer is provided in contact with a lower surface of the superconductor layer and oriented with an in-plane orientation degree (??) of 10 degrees or less with respect to one crystal axis of the superconductor layer. Area of a portion of the lower surface of the superconductor layer in contact with the oxide layer is 0.3 or less of area of a region directly below the superconductor layer.
    Type: Grant
    Filed: February 14, 2013
    Date of Patent: May 5, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takeshi Araki, Mariko Hayashi, Ko Yamada, Hiroyuki Fuke
  • Patent number: 9006146
    Abstract: An AC superconducting cable with an insulating layer on the external circumference of a conductor, and wherein: the insulating layer includes a first insulating layer, a second insulating layer and a third insulating layer, from the inside layer to the outside layer; the insulating layer is impregnated with liquid nitrogen; the product of the dielectric constant ?1 of the first insulating layer and the dielectric loss tangent tan ?1 and the product of the dielectric constant ?2 of the second insulating layer and the dielectric loss tangent tan ?2 fulfilling the relationship ?1×tan ?1>?2×tan ?2; and the product of the dielectric constant ?2 of the second insulating layer and the dielectric loss tangent tan ?2 and the product of the dielectric constant ?3 of the third insulating layer and the dielectric loss tangent tan ?3 fulfilling the relationship ?2×tan ?2<?3×tan ?3.
    Type: Grant
    Filed: May 9, 2011
    Date of Patent: April 14, 2015
    Assignees: Furukawa Electric Co., Ltd., International Superconductivity Technology Center
    Inventors: Shinichi Mukoyama, Masashi Yagi, Tomoya Nomura, Shuka Yonemura
  • Publication number: 20150094208
    Abstract: The present invention relates to a textured substrate for epitaxial film formation, comprising a textured metal layer at least on one side, wherein the textured metal layer includes a copper layer having a cube texture and a nickel layer having a thickness of 100 to 20000 nm formed on the copper layer; the nickel layer has a nickel oxide layer formed on a surface thereof, having a thickness of 1 to 30 nm, and including a nickel oxide; and the nickel layer further includes a palladium-containing region formed of palladium-containing nickel at an interface with the nickel oxide layer. The top layer of the textured substrate, i.e. the nickel oxide layer, has a surface roughness of preferably 10 nm or less.
    Type: Application
    Filed: March 21, 2013
    Publication date: April 2, 2015
    Applicant: TANAKA KIKINZOKU KOGYO K.K.
    Inventors: Naoji Kashimma, Tomonori Watanabe, Shigeo Nagaya, Kunihiro Shima, Shuichi Kubota
  • Publication number: 20150087524
    Abstract: There is provided a method for producing a substrate (600) suitable for supporting an elongated superconducting element, wherein, e.g., a deformation process is utilized in order to form disruptive strips in a layered solid element, and where etching is used to form undercut volumes (330, 332) between an upper layer (316) and a lower layer (303) of the layered solid element. Such relatively simple steps enable providing a substrate which may be turned into a superconducting structure, such as a superconducting tape, having reduced AC losses, since the undercut volumes (330, 332) may be useful for separating layers of material. In a further embodiment, there is placed a superconducting layer on top of the upper layer (316) and/or lower layer (303), so as to provide a superconducting structure with reduced AC losses.
    Type: Application
    Filed: May 17, 2013
    Publication date: March 26, 2015
    Inventor: Anders Christian Wulff
  • Patent number: 8980797
    Abstract: A method for manufacturing a base material 2 for a superconductive conductor which includes: a conductive bed layer forming process of forming a non-oriented bed layer 24 having conductivity on a substrate 10; and a biaxially oriented layer forming process of forming a biaxially oriented layer 26 on the bed layer 24.
    Type: Grant
    Filed: August 24, 2012
    Date of Patent: March 17, 2015
    Assignee: Furukawa Electric Co., Ltd.
    Inventors: Yoshikazu Okuno, Hiroyuki Fukushima, Yuko Hayase, Eiji Kojima
  • Patent number: 8983563
    Abstract: The invention relates to a high temperature superconducting tape conductor having a flexible metal substrate that comprises at least one intermediate layer disposed on the flexible metal substrate and comprising terraces on the side opposite the flexible metal substrate, wherein a mean width of the terraces is less than 1 ?m and a mean height of the terraces is more than 20 nm, and that comprises at least one high temperature superconducting layer disposed on the intermediate layer, which is disposed on the at least one intermediate layer and comprises a layer thickness of more than 3 ?m. The ampacity of the high temperature superconducting tape conductor relative to the conductor width is more than 600 A/cm at 77 K.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: March 17, 2015
    Assignee: Theva Dunnschichttechnik GmbH
    Inventors: Robert Semerad, Werner Prusseit
  • Patent number: 8965469
    Abstract: Disclosed are an oxide superconductor tape and a method of manufacturing the oxide superconductor tape capable of improving the length and characteristics of superconductor tape and obtaining stabilized characteristics across the entire length thereof. A Y-class superconductor tape (10), as an oxide superconductor tape, comprises a tape (13) further comprising a tape-shaped non-oriented metallic substrate (11), and a first buffer layer (sheet layer) (12) that is formed by IBAD upon the tape-shaped non-oriented metallic substrate (11); and a second buffer layer (gap layer) (14), further comprising a lateral face portion (14a) that is extended to the lateral faces of the first buffer layer (sheet layer) (12) upon the tape (13) by RTR RF-magnetron sputtering.
    Type: Grant
    Filed: February 10, 2011
    Date of Patent: February 24, 2015
    Assignee: SWCC Show Cable Systems Co., Ltd.
    Inventors: Tatsuhisa Nakanishi, Yuji Aoki, Tsutomu Koizumi, Atsushi Kaneko, Takayo Hasegawa
  • Publication number: 20150051080
    Abstract: The films of this invention are high temperature superconducting (HTS) thin films specifically optimized for microwave and RF applications. In particular, this invention focuses on compositions with a significant deviation from the 1:2:3 stoichiometry in order to create the films optimized for microwave/RF applications. The RF/microwave HTS applications require the HTS thin films to have superior microwave properties, specifically low surface resistance, Rs, and highly linear surface reactance, Xs, i.e. high JIMD. As such, the invention is characterized in terms of its physical composition, surface morphology, superconducting properties, and performance characteristics of microwave circuits made from these films.
    Type: Application
    Filed: April 17, 2014
    Publication date: February 19, 2015
    Inventors: BRIAN MOECKLY, VIKTOR GLIANTSEV, SHING-JEN PENG, BALAM WILLEMSEN
  • Publication number: 20150045231
    Abstract: There is described herein a superconducting segment and method of making same comprising one or several layers with very high electrical resistivity, acting as a current flow diverter when the current transfers from the superconductor to the stabilizer. The purpose of this current flow diverter is: i) to increase the contact resistance between the superconductor and the stabilizer, by reducing the contact area, and ii) to force the current to flow along a specific path, so as to increase momentarily the current density in a specific portion of the stabilizer. The consequence of i) and ii) is that heat generated at the extremities of the normal zone is increased and spread over a longer length along the superconducting segment, which increases the NZPV and thus, the uniformity of the quench.
    Type: Application
    Filed: February 1, 2013
    Publication date: February 12, 2015
    Inventors: Christian Lacroix, Frederic Sirois, Michael Robert Wertheimer
  • Patent number: 8927461
    Abstract: Provided is a substrate for superconductive film formation, which includes a metal substrate, and an oxide layer formed directly on the metal substrate, containing chromium oxide as a major component and having a thickness of 10-300 nm and an arithmetic average roughness Ra of not more than 50 nm. A method of manufacturing a substrate for superconductive film formation, which includes forming an oxide layer directly on a metal substrate, the oxide layer containing chromium oxide as a major component and having a thickness of 10-300 nm and an arithmetic average roughness Ra of not more than 50 nm.
    Type: Grant
    Filed: May 20, 2011
    Date of Patent: January 6, 2015
    Assignees: International Superconductivity Technology Center, Furukawa Electric Co., Ltd., Japan Fine Ceramics Center
    Inventors: Seiki Miyata, Hiroyuki Fukushima, Reiji Kuriki, Akira Ibi, Masateru Yoshizumi, Akio Kinoshita, Yutaka Yamada, Yuh Shiohara, Ryuji Yoshida, Takeharu Kato, Tsukasa Hirayama
  • Patent number: 8926868
    Abstract: A superconducting article comprises a substrate, a buffer layer overlying the substrate, and a high-temperature superconducting (HTS) layer overlying the buffer layer. The HTS layer includes a plurality of nanorods. A method of forming a superconducting article comprises providing a substrate, depositing a buffer layer overlying the substrate; forming a nanodot array overlying the buffer layer; depositing an array of nanorods nucleated on the nanodot array; and depositing a high-temperature superconducting (HTS) layer around the array of nanorods and overlying the buffer layer.
    Type: Grant
    Filed: July 27, 2010
    Date of Patent: January 6, 2015
    Assignees: University of Houston System, Superpower, Inc.
    Inventors: Venkat Selvamanickam, Goran Majkic, Maxim Martchevskii
  • Patent number: 8921275
    Abstract: A tape-shaped base for a superconducting wire, which simplifies the intermediate layer and thus enables production of a superconducting wire at lower cost, and which is capable of improving the characteristics (such as electrical conduction and handling properties) of a superconducting wire; and a superconducting wire. Specifically disclosed is a tape-shaped base for a superconducting wire, which is obtained by forming an intermediate layer on a metal substrate. In the tape-shaped base for a superconducting wire a biaxially oriented layer of the intermediate layer is configured of a niobium monoxide (NbO) layer that is formed by depositing vapor deposition particles from a vapor deposition source on a film formation surface.
    Type: Grant
    Filed: September 6, 2010
    Date of Patent: December 30, 2014
    Assignee: Furukawa Electric Co., Ltd.
    Inventor: Hiroyuki Fukushima
  • Patent number: 8921276
    Abstract: The phase transition temperature, at which the crystal lattice of LMO that constitutes an oxide layer as an intermediate layer or as a part of an intermediate layer becomes cubic, is lowered. A substrate for a superconducting wire rod includes an oxide layer (LMO layer (22)) which contains, as a principal material, a crystalline material represented by the compositional formula: Laz(Mn1?xMx)wO3+? (wherein M represents at least one of Cr, Al, Co or Ti, ? represents an oxygen non-stoichiometric amount, 0<w/z<2, and 0<x?1).
    Type: Grant
    Filed: November 2, 2011
    Date of Patent: December 30, 2014
    Assignee: Furukawa Electric Co., Ltd.
    Inventors: Masayasu Kasahara, Hiroyuki Fukushima, Yoshikazu Okuno, Yuko Hayase
  • Patent number: 8912126
    Abstract: A substrate of the present invention includes a copper layer, an alloy layer containing copper and nickel, formed on the copper layer, a nickel layer formed on the alloy layer, and an intermediate layer formed on the nickel layer. The concentration of nickel in the alloy layer at the interface between the alloy layer and the nickel layer is greater than the concentration of nickel in the alloy layer at the interface between the alloy layer and the copper layer. According to the present invention, there can be provided a substrate that allows the AC loss of a superconducting wire to be reduced, a method of producing a substrate, a superconducting wire, and a method of producing a superconducting wire.
    Type: Grant
    Filed: July 7, 2010
    Date of Patent: December 16, 2014
    Assignees: Sumitomo Electric Industries, Ltd., Toyo Kohan Co., Ltd.
    Inventors: Takashi Yamaguchi, Masaya Konishi, Hajime Ota
  • Publication number: 20140336054
    Abstract: Operational characteristics of an high temperature superconducting (“HTS”) film comprised of an HTS material may be improved by depositing a modifying material onto appropriate surfaces of the HTS film to create a modified HTS film. In some implementations of the invention, the HTS film may be in the form of a “c-film.” In some implementations of the invention, the HTS film may be in the form of an “a-b film,” an “a-film” or a “b-film.” The modified HTS film has improved operational characteristics over the HTS film alone or without the modifying material. Such operational characteristics may include operating in a superconducting state at increased temperatures, carrying additional electrical charge, operating with improved magnetic properties, operating with improved mechanic properties or other improved operational characteristics. In some implementations of the invention, the HTS material is a mixed-valence copper-oxide perovskite, such as, but not limited to YBCO.
    Type: Application
    Filed: January 31, 2014
    Publication date: November 13, 2014
    Applicant: Ambature, Inc.
    Inventors: Douglas J. Gilbert, Timothy S. Cale
  • Patent number: 8880135
    Abstract: The present invention is configured such that, in a low AC loss oxide superconductor constituted by providing an oxide superconducting layer 6 on a substrate 1, said oxide superconducting layer 6 is separated into a plurality of filament conductors 2 in parallel to the lengthwise direction of said substrate 1 by dividing grooves 3 plurally formed in the widthwise direction of said substrate, and a high-resistance oxide 8 is formed in said dividing grooves 3. Because of the invention, it is possible to increase the insulation properties of individually divided mated filament conductors, and to obtain an oxide superconductor that has low AC loss.
    Type: Grant
    Filed: November 16, 2006
    Date of Patent: November 4, 2014
    Assignees: Railway Technical Research Institute, International Superconductivity Technology Center, the Juridical Foundation, Kyushu University, National University Corporation
    Inventors: Kenji Suzuki, Saburo Hoshi, Junko Matsuda, Teruo Izumi, Yuh Shiohara, Masataka Iwakuma
  • Patent number: 8865627
    Abstract: A method for manufacturing a superconducting wire includes the following steps. A laminate metal having a first metal layer and a Ni layer formed on the first metal layer is prepared. An intermediate layer (20) is formed on the Ni layer of the laminate metal. A superconducting layer (30) is formed on the intermediate layer (20). By subjecting the laminate metal to a heat treatment after at least either of the step of forming a intermediate layer (20) and the step of forming a superconducting layer (30), a nonmagnetic Ni alloy layer (12) is formed from the laminate metal.
    Type: Grant
    Filed: November 27, 2013
    Date of Patent: October 21, 2014
    Assignees: Sumitomo Electric Industries, Ltd., Toyo Kohan Co., Ltd.
    Inventor: Hajime Ota
  • Patent number: 8802598
    Abstract: A superconducting element (SE1-SE5) with a central section (20) located between two end sections (21a, 21b) of the superconducting element (SE1-SE5), the superconducting element (SE1-SE5) has a substrate tape (10), a buffer layer (11), a high temperature superconducting (HTS) layer (12), a first protection layer (14), and a shunt layer (17), The superconducting element (SE1-SE5) has at least one elongated opening (19) in the central section (20) elongated between the two end sections (21a, 21b), whereby the at least one elongated opening (19) divides the central section (20) of the superconducting element (SE1-SE5) into at least two HTS strips (18a, 18b, 18c), whereby the shunt layer (17) envelops the surface of each of the HTS strips (18a, 18b, 18c). The superconducting element shows improved electrical stabilization and time stability.
    Type: Grant
    Filed: February 15, 2012
    Date of Patent: August 12, 2014
    Assignee: Bruker HTS GmbH
    Inventor: Alexander Usoskin
  • Patent number: 8798696
    Abstract: A multilayer superconducting wire 7 with essentially round cross sectional area where the outer surface of the round wire is provided with a high temperature superconductor layer 3 and where at least the high temperature superconductor layer 3 is fabricated as a spiral running along the length of the superconductor wire 7 in parallel lanes 15.
    Type: Grant
    Filed: May 27, 2009
    Date of Patent: August 5, 2014
    Assignee: Nexans
    Inventors: Florian Steinmeyer, Mark Rikel, Jürgen Ehrenberg, Steffen Elschner
  • Patent number: 8791052
    Abstract: A rotating machine includes a stator and a rotor configured to rotate within the stator. Rotor windings are supported in the rotor and are formed of a laminated electrical conductor in a single-layer saddle coil configuration. The conductor includes a first support lamina, a second support lamina, an insert including a high temperature superconductor disposed between the first and second support lamina, and a filler material surrounding the insert that bonds the insert to each of the first and second support lamina. At the location between the first support lamina and second support lamina corresponding to the location of the insert, the width dimension of the filler material on each side of the insert is at least 10 percent of a width of the conductor. The conductor is configured to carry at least 600 Amperes per turn and have a C-axis tensile strength of at least 21 MPa.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: July 29, 2014
    Assignee: American Superconductor Corporation
    Inventors: Michael A. Tanner, Gregory L. Snitchler, William L. Carter, Eric R. Podtburg
  • Patent number: 8772201
    Abstract: An oxide superconducting conductor of the invention is configured to include an oxide superconducting layer including a substrate and an oxide superconductor formed on the substrate. The oxide superconductor being expressed by a composition formula of RE1Ba2Cu3Oy where RE represents a rare earth element and an expression of 6.5<y<7.1 is satisfied. A normal conduction phase including Ba and a different phase including an alkaline earth metal having an ionic radius smaller than that of Ba are dispersed in the oxide superconducting layer. The normal conduction phase is an oxide including Ba and one selected from a group consisting of Zr, Sn, Hf, Ce, and Ti.
    Type: Grant
    Filed: October 5, 2012
    Date of Patent: July 8, 2014
    Assignee: Fujikura Ltd.
    Inventor: Mitsunori Igarashi
  • Patent number: 8761848
    Abstract: Systems, articles, and methods are provided related to nanowire-based detectors, which can be used for light detection in, for example, single-photon detectors. In one aspect, a variety of detectors are provided, for example one including an electrically superconductive nanowire or nanowires constructed and arranged to interact with photons to produce a detectable signal. In another aspect, fabrication methods are provided, including techniques to precisely reproduce patterns in subsequently formed layers of material using a relatively small number of fabrication steps. By precisely reproducing patterns in multiple material layers, one can form electrically insulating materials and electrically conductive materials in shapes such that incoming photons are redirected toward a nearby electrically superconductive materials (e.g., electrically superconductive nanowire(s)). For example, one or more resonance structures (e.g.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: June 24, 2014
    Assignee: Massachusetts Institute of Technology
    Inventors: Karl K. Berggren, Xiaolong Hu, Daniele Masciarelli
  • Patent number: 8748349
    Abstract: A superconducting article includes a substrate having a biaxially textured surface. A biaxially textured buffer layer, which can be a cap layer, is supported by the substrate. The buffer layer includes a double perovskite of the formula A2B?B?O6, where A is rare earth or alkaline earth metal and B? and B? are different transition metal cations. A biaxially textured superconductor layer is deposited so as to be supported by the buffer layer. A method of making a superconducting article is also disclosed.
    Type: Grant
    Filed: April 15, 2011
    Date of Patent: June 10, 2014
    Assignees: UT-Battelle, LLC, University of Tennessee Research Foundation
    Inventors: Amit Goyal, Sung-Hun Wee
  • Patent number: 8748350
    Abstract: A method for making a superconducting article includes the steps of providing a biaxially textured substrate. A seed layer is then deposited. The seed layer includes a double perovskite of the formula A2B?B?O6, where A is rare earth or alkaline earth metal and B? and B? are different rare earth or transition metal cations. A superconductor layer is grown epitaxially such that the superconductor layer is supported by the seed layer.
    Type: Grant
    Filed: April 15, 2011
    Date of Patent: June 10, 2014
    Assignees: UT-Battelle, University of Tennessee Research Center
    Inventors: Amit Goyal, Mariappan Paranthaman, Sung-Hun Wee
  • Publication number: 20140087951
    Abstract: An oxide superconducting thin film includes a substrate, and an intermediate layer and a superconducting layer provided in this order on the substrate. The intermediate layer has an average thickness of from 10 nm to 20 nm and a surface roughness Ra of 0.5 nm or less. The superconducting layer is formed on a surface of the intermediate layer and includes an oxide superconductor as a main component. A superconducting fault current limiter including the oxide superconducting thin film is also provided.
    Type: Application
    Filed: May 31, 2012
    Publication date: March 27, 2014
    Applicants: National Institute of Advanced Industrial Science and Technology, FURUKAWA ELECTRIC CO., LTD.
    Inventors: Hajime Kasahara, Norio Matsui, Masakazu Matsui, Naoto Edo, Kengo Nakao, Toshiya Kumagai, Takaaki Manabe, Mitsugu Sohma
  • Patent number: 8680015
    Abstract: A method includes locating a defect in a first segment of high temperature superconducting wire. A second segment of high temperature superconducting wire is then positioned onto the first segment of high temperature superconducting wire such that the second segment of high temperature superconducting wire overlaps the defect. A path is then created such that current flows through the second segment of high temperature superconducting wire. The first segment of high temperature superconducting wire and second segment of high temperature superconducting wire are then laminated together.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: March 25, 2014
    Assignee: American Superconductor Corporation
    Inventors: Henry C. Valcour, III, Peter D. Antaya, John Gannon, Eric R. Podtburg, Subramaniam Anandakugan, William L. Carter, Hong Cai, Michael A. Tanner, David Crotzer, Alexander Otto, Dana Krause
  • Publication number: 20140080714
    Abstract: An oxide superconducting thin film includes a substrate having a single crystal structure, the main face of the substrate and a crystal face of the single crystal structure having an angle therebetween; an intermediate layer formed on the main face of the substrate and having an axis oriented in a direction perpendicular to the crystal face; and a superconducting layer formed on the intermediate layer and containing, as a main component, an oxide superconductor having a c-axis oriented in a direction perpendicular to the surface of the intermediate layer. A superconducting fault current limiter and a method of manufacturing an oxide superconducting thin film are also provided.
    Type: Application
    Filed: May 30, 2012
    Publication date: March 20, 2014
    Applicants: National Institute of Advance Industrial Science and Technology, FURUKAWA ELECTRIC CO., LTD.
    Inventors: Kengo Nakao, Hajime Kasahara, Masakazu Matsui, Norio Matsui, Naoto Edo, Toshiya Kumagai, Takaaki Manabe, Mitsugu Sohma
  • Patent number: 8664163
    Abstract: Described is an article including a sapphire substrate carrying a superconductive layer of a compound of the formula YBa2Cu3O7-x (YBCO), the layer having surface area of at least 10 cm2, and critical current of at least 100 A/cm width at a temperature of 77K or higher. In one exemplary embodiment, the thickness of the superconductive layer is between 10 nm and 50 nm. In another exemplary embodiment, the thickness of the superconductive layer is more than 600 nm. In preferred embodiment, an YSZ layer and a non-superconductive YBCO layer separate between the superconductive layer and the substrate.
    Type: Grant
    Filed: January 14, 2010
    Date of Patent: March 4, 2014
    Assignee: Ramot at Tel-Aviv University Ltd.
    Inventors: Guy Deutscher, Mishael Azoulay, Boaz Almog
  • Publication number: 20140038829
    Abstract: A superconducting thin film material exhibiting excellent superconducting properties and a method of manufacturing the same are provided. A superconducting thin film material includes a substrate, and a superconducting film formed on the substrate. The superconducting film includes an MOD layer formed by an MOD process, and a gas-phase-formed layer formed on the MOD layer by a gas-phase process. Since the MOD layer is formed first and then the gas-phase-formed layer is formed in this manner, degradation of the properties of the gas-phase-formed layer due to heat treatment in the step of forming the MOD layer (heat treatment in the MOD process) can be prevented.
    Type: Application
    Filed: May 9, 2012
    Publication date: February 6, 2014
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Kei Hanafusa, Genki Honda, Kotaro Ohki, Tsuyoshi Nakanishi, Takahiro Taneda, Tatsuoki Nagaishi
  • Patent number: 8644899
    Abstract: A coated conductor with a substantially round cross section has a high temperature superconductor layer which is sandwiched between an inner substrate layer and an outer substrate layer to place the high temperature superconductor layer in the region of neutral strain axis.
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: February 4, 2014
    Assignee: Nexans
    Inventors: Arnaud Allais, Mark O. Rikel, Jürgen Ehrenberg, Christian-Eric Bruzek
  • Publication number: 20140031236
    Abstract: According to one embodiment, an oxide superconductor includes an oriented superconductor layer and an oxide layer. The oriented superconductor layer contains fluorine at 2.0×1016-5.0×1019 atoms/cc and carbon at 1.0×1018-5.0×1020 atoms/cc. The superconductor layer contains in 90% or more a portion oriented along c-axis with an in-plane orientation degree (??) of 10 degrees or less, and contains a LnBa2Cu3O7-x superconductor material (Ln being yttrium or a lanthanoid except cerium, praseodymium, promethium, and lutetium). The oxide layer is provided in contact with a lower surface of the superconductor layer and oriented with an in-plane orientation degree (??) of 10 degrees or less with respect to one crystal axis of the superconductor layer. Area of a portion of the lower surface of the superconductor layer in contact with the oxide layer is 0.3 or less of area of a region directly below the superconductor layer.
    Type: Application
    Filed: February 14, 2013
    Publication date: January 30, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: KABUSHIKI KAISHA TOSHIBA
  • Patent number: 8633137
    Abstract: Disclosed herein is a high-temperature superconducting tape, including: a substrate; a buffer layer formed on the substrate; and a high-temperature superconducting layer formed on the buffer layer, wherein the substrate is made of SUS310s or stainless steel containing 0.01-1% of silicon (Si) and 1-5% of molybdenum (Mo) and has an average metal crystal grain size of 12 ?m or less, and the high-temperature superconducting layer is made of a ReBCO (ReBa2Cu3O7, Re=Nd, Sm, Eu, Gd, Dy, Ho, Y)-based superconductive material. The high-temperature superconducting tape is advantageous with the result that a high-grade superconducting layer can be deposited on the thin buffer layer and thus the critical current density of the high-temperature superconducting tape can be improved, thereby remarkably improving the characteristics of the high-temperature superconducting tape.
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: January 21, 2014
    Assignee: Korea Electrotechnology Research Institute
    Inventors: Hong Soo Ha, Sang Soo Oh, Ho Sup Kim
  • Publication number: 20130331272
    Abstract: A method and composition for doped HTS tapes having directional flux pinning and critical current.
    Type: Application
    Filed: June 12, 2013
    Publication date: December 12, 2013
    Inventors: Venkat Selvamanickam, Yimin Chen
  • Patent number: 8569212
    Abstract: Disclosed herein is a superconducting wire which is used in, for example, superconducting magnet energy storage systems. The superconducting wire includes: a wire comprising a metal substrate, a superconducting layer and a buffer interposed between the metal substrate and the superconducting layer; and a stabilizer layer plated on the wire, wherein an epoxy resin insulating layer coats the entire surface of the stabilizer layer. The superconducting wire makes it possible to reduce damage to an insulating material when forming the insulating material during the production of the superconducting wire, and it has a uniform surface and can be produced in a simple manner.
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: October 29, 2013
    Assignee: Korea Electrotechnology Research Institute
    Inventors: Hong Soo Ha, Sang Soo Oh, Seok Ho Kim, Gi Deok Shim
  • Patent number: 8536098
    Abstract: Novel articles and methods to fabricate same with self-assembled nanodots and/or nanorods of a single or multicomponent material within another single or multicomponent material for use in electrical, electronic, magnetic, electromagnetic and electrooptical devices is disclosed. Self-assembled nanodots and/or nanorods are ordered arrays wherein ordering occurs due to strain minimization during growth of the materials. A simple method to accomplish this when depositing in-situ films is also disclosed. Device applications of resulting materials are in areas of superconductivity, photovoltaics, ferroelectrics, magnetoresistance, high density storage, solid state lighting, non-volatile memory, photoluminescence, thermoelectrics and in quantum dot lasers.
    Type: Grant
    Filed: July 30, 2011
    Date of Patent: September 17, 2013
    Inventor: Amit Goyal
  • Publication number: 20130231250
    Abstract: An oxide superconducting conductor of the invention is configured to include a substrate; and an oxide superconducting layer formed on the substrate. The oxide superconducting layer is an oxide superconductor being expressed by a composition formula of RE1Ba2Cu3Oy where RE represents a rare earth element and an expression of 6.5<y<7.1 is satisfied. The oxide superconducting layer has a different phase including Tb. The different phase is dispersed in the oxide superconducting layer.
    Type: Application
    Filed: October 18, 2012
    Publication date: September 5, 2013
    Applicant: FUJIKURA LTD.
    Inventor: Mitsunori IGARASHI
  • Patent number: 8513163
    Abstract: A high-temperature superconducting thin-film strip conductor (HTSL-CC) includes a metal substrate, a buffer layer chemically generated thereon and grown crystallographically unrotated in relation to the metal substrate, and a chemically generated superconducting coating thereon. The HTSL-CC possesses high texturing of the buffer layer since the metal substrate has a surface roughness RMS<50 nm, and since and the buffer layer is grown directly onto its surface, without an intermediate layer, crystallographically unrotated in relation to the crystalline structure of the metal substrate.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: August 20, 2013
    Assignee: BASF SE
    Inventors: Michael Baecker, Theodor Schneller, Sandip Halder
  • Publication number: 20130196858
    Abstract: The invention pertains to creating new extremely low resistance (“ELR”) materials, which may include high temperature superconducting (“HTS”) materials. In some implementations of the invention, an ELR material may be modified by depositing a layer of modifying material unto the ELR material to form a modified ELR material. The modified ELR material has improved operational characteristics over the ELR material alone. Such operational characteristics may include operating at increased temperatures or carrying additional electrical charge or other operational characteristics. In some implementations of the invention, the ELR material is a cuprate-perovskite, such as, but not limited to BSSCO. In some implementations of the invention, the modifying material is a conductive material that bonds easily to oxygen, such as, but not limited to, chromium.
    Type: Application
    Filed: March 15, 2013
    Publication date: August 1, 2013
    Applicant: Ambature, LLC
    Inventor: Ambature, LLC
  • Publication number: 20130196856
    Abstract: In some embodiments of the invention, superconducting structures are described. In certain embodiments the superconducting structures described are thin films of iron-based superconductors on textured substrates; in some aspects a method for producing thin films of iron-based superconductors on textured substrates is disclosed. In some embodiments applications of thin films of iron-based superconductors on textured substrates are described. Also contemplated is the formation of a film of iron-based superconductor having a thickness and an in-plane lattice constant formed on a textured substrate having a thickness and an in-plane lattice constant similar to the in-plane lattice constant of the iron-based superconductor.
    Type: Application
    Filed: August 2, 2011
    Publication date: August 1, 2013
    Applicant: BROOKHAVENSCIENCE ASSOICATES, LLC
    Inventors: Qiang Li, Weidong Si
  • Publication number: 20130190188
    Abstract: A method for manufacturing a base material 2 for a superconductive conductor which includes: a conductive bed layer forming process of forming a non-oriented bed layer 24 having conductivity on a substrate 10; and a biaxially oriented layer forming process of forming a biaxially oriented layer 26 on the bed layer 24.
    Type: Application
    Filed: August 24, 2012
    Publication date: July 25, 2013
    Applicant: FURUKAWA ELECTRIC CO., LTD.
    Inventors: Yoshikazu Okuno, Hiroyuki Fukushima, Yuko Hayase, Eiji Kojima
  • Patent number: 8486864
    Abstract: The present invention relates to a method for producing a phase-separated layer useful as a flux pinning substrate for a superconducting film, wherein the method includes subjecting at least a first and a second target material to a sputtering deposition technique in order that a phase-separated layer is deposited epitaxially on a primary substrate containing an ordered surface layer. The invention is also directed to a method for producing a superconducting tape containing pinning defects therein by depositing a superconducting film on a phase-separated layer produced by the method described above.
    Type: Grant
    Filed: December 29, 2009
    Date of Patent: July 16, 2013
    Assignees: UT-Battelle, LLC, University of Tennessee Research Foundation
    Inventors: Tolga Aytug, Mariappan Parans Paranthaman, Ozgur Polat