Signal Frequency Or Phase Correction Patents (Class 702/106)
  • Patent number: 7805270
    Abstract: An apparatus and method for identifying the position of a magnetic shaft are provided. N field sensors are adjacently positioned at fixed locations relative to the shaft's periodic field, corresponding to 180/N relative phase shifts. A table provides N>2 predetermined signal models and a pre-identified position associated with each. An interpolator compares a representation of the N measured sensor signals to at least two predetermined models to generate a correction signal that provides another pre-identified position. The correction signal depends on N sensors for every position of the shaft. The correction signal is used to incrementally choose said another pre-identified position from the table as an approximate position of the shaft in an iterative process to find the minimum correction signal and identify the position.
    Type: Grant
    Filed: February 5, 2007
    Date of Patent: September 28, 2010
    Assignee: Moog Inc.
    Inventors: Paul M. Lindberg, Gary Schultze, Philip Hollingsworth
  • Patent number: 7805273
    Abstract: Provided is a waveform generating apparatus that generates analog signal based on fundamental waveform data including a predetermined number of samples, including: phase difference calculating section that calculates phase difference between the initial phase and final phase of a signal resulting from FSK-modulating, based on first set of modulation frequencies, input data sequence to be modulated onto a signal that the waveform generating apparatus generates; frequency calculating section that calculates correction frequency corresponding to quotient of dividing, by the predetermined number of samples, residue of dividing the phase difference by 2?; waveform producing section that produces fundamental waveform data representing a waveform corresponding to a signal resulting from FSK-modulating the input data sequence based on second set of modulation frequencies obtained by subtracting the correction frequency from the modulation frequencies in the first set; and output section that outputs a signal repeatin
    Type: Grant
    Filed: July 21, 2008
    Date of Patent: September 28, 2010
    Assignee: Advantest Corporation
    Inventor: Makoto Kurosawa
  • Publication number: 20100241389
    Abstract: Systems, methods, and other embodiments associated with MRI excitation are described. One example method includes performing a calibration to determine a set of transmission parameters for a set of excitation pulses for transmission channels available on a multi-channel MRI transmitter. The set of excitation pulses are configured to produce a resulting nuclear magnetic resonance (NMR) signal from an object exposed to the set of excitation pulses. The resulting NMR signal comprises NMR signal associated with a first NMR resonance associated with the object and NMR signal associated with a second NMR resonance associated with the object.
    Type: Application
    Filed: March 20, 2009
    Publication date: September 23, 2010
    Inventors: Mark A. Griswold, Jeremiah Heilman
  • Publication number: 20100228514
    Abstract: Systems and methods for synchronizing communication between devices include using a test circuit to measure a propagation time through a delay circuit. The propagation time is used to determine an initial delay value within a delay lock loop. This delay value is then changed until a preferred delay value, resulting in synchronization, is found. In various embodiments, used of the initial delay value increases the speed, reliability or other beneficial features of the synchronization.
    Type: Application
    Filed: March 24, 2010
    Publication date: September 9, 2010
    Applicant: RAMBUS INC.
    Inventors: Adrian E. Ong, Douglas W. Gorgen
  • Patent number: 7792649
    Abstract: A system and circuit for constructing a synchronous signal diagram from asynchronous sampled data provides a low cost and production-integrable technique for providing a signal diagram. The data signal is edge-detected and asynchronously sampled (or alternatively a clock signal is latched). The data signal or a second signal is compared to a settable threshold voltage and sampled. The edge and comparison data are folded according to a swept timebase to find a minimum jitter period. The crossing of the signal diagram edges is determined from a peak of a histogram of the folded edge data. A histogram of ratios of the sample values versus displacement from the position of the crossing location is generated for each threshold voltage. The technique is repeated over a range of settable threshold voltages. Then, the ratio counts are differentiated across the histograms with respect to threshold voltage, from which a signal diagram is populated.
    Type: Grant
    Filed: March 26, 2008
    Date of Patent: September 7, 2010
    Assignee: International Business Machines Corporation
    Inventors: Hayden C. Cranford, Jr., Fadi H. Gebara, Jeremy D. Schaub
  • Patent number: 7778789
    Abstract: A method of digital phase calibration is disclosed. An input signal is sampled using a clock. The sample points of the sampled signal are changed by a scaler. A phase calibration is performed by adjusting the phase of the scaler to obtain an optimum phase for the scaler. It is determined whether the input signal represents a static frame and the phase calibration is performed only if the input signal represents a static frame.
    Type: Grant
    Filed: April 18, 2007
    Date of Patent: August 17, 2010
    Assignee: Mediatek Inc.
    Inventor: Jia-Han Chang
  • Patent number: 7778787
    Abstract: A time-of-flight PET nuclear imaging device (A) includes radiation detectors (20, 22, 24), electronic circuits (26, 28, 30, 32) for processing output signals from each of detectors (20), a coincidence detector (34), a time-of-flight calculator (38) and image processing circuitry (40). A calibration system (48) includes an energy source (50, 150) which generates an electrical or optical calibration pulse. The electrical calibration pulse is applied at an input to the electronics at an output of the detector and the optical calibration pulse is applied to a preselected point adjacent a face of each optical sensor (20) of the detectors. A calibration processor (52) measures the time differences between the generation of the calibration pulse and the receipt of a trigger signal from the electronic circuitry by the coincidence detector (34) and adjusts adjustable delay circuits (44, 46) to minimize these time differences.
    Type: Grant
    Filed: August 2, 2005
    Date of Patent: August 17, 2010
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Klaus Fiedler, Michael Geagan, Gerd Muehllehner, Walter Ruetten, Andreas Thon
  • Patent number: 7770042
    Abstract: A microprocessor includes core logic that operates according to a core clock signal in order to execute program instructions, clock generation circuitry controllable to generate the core clock signal having one of N different possible frequencies, wherein N is more than two, and a control circuit. The control circuit, in response to a request to operate the core logic at a destination frequency, iteratively controls the clock generation circuitry to generate the core clock signal having a new frequency until the core clock signal frequency is the destination frequency. The new core clock signal frequency on each iteration is one of the N different possible frequencies monotonically closer to the destination frequency. The number of iterations is between zero and N?1 depending upon the destination frequency specified and the core clock signal frequency when the request is received.
    Type: Grant
    Filed: June 11, 2007
    Date of Patent: August 3, 2010
    Assignee: VIA Technologies, Inc.
    Inventor: Darius D. Gaskins
  • Publication number: 20100185409
    Abstract: A signal processing apparatus which computes a position or angle of a target object based on a first phase signal (A), a first reversed phase signal (A?) having a phase opposite to that of the first phase signal (A), a second phase signal (B) having a phase different from that of the first phase signal (A), and a second reversed phase signal (B?) having a phase opposite to that of the second phase signal (B) which are provided by a detecting apparatus that detects the position or angle of the target object, comprises a first computing unit which computes (A?A?)/(A+A?) as a cosine signal and (B?B?)/(B+B?) as a sine signal, and a second computing unit which computes the position or angle of the target object based on the cosine signal and the sine signal.
    Type: Application
    Filed: January 15, 2010
    Publication date: July 22, 2010
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Yuzo Seo
  • Patent number: 7747796
    Abstract: Systems and methods for performing data transfer rate throttling o improve the effective data transfer rate for SATA storage devices. The data transfer rate is diluted by inserting ALIGN primitives when data is sent. The receiving device simply discards the ALIGN primitives. Therefore, the receive data FIFO does not fill as quickly and fewer flow control sequences are needed for flow control to prevent the receive data FIFO from overflowing. An advantage of using the ALIGN primitives instead of conventional flow control is that the round-trip handshake latency is not incurred to disable and later enable data transfers.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: June 29, 2010
    Assignee: NVIDIA Corporation
    Inventors: Ambuj Kumar, Mark A. Overby
  • Patent number: 7747405
    Abstract: This invention relates to line frequency synchronisation for use in diagnostics for alternating current electrical circuits. The invention provides a method of synchronising measurement system frequency with an alternating current line frequency comprising the steps of: adjusting the frequency of the measurement system frequency using a frequency locked loop until the measurement system frequency is within a predetermined range of said alternating current line frequency; and when the measurement system frequency is within a predetermined range of said alternating current line frequency adjusting the phase and the frequency of the measurement system frequency using a phase and frequency locked loop.
    Type: Grant
    Filed: March 21, 2007
    Date of Patent: June 29, 2010
    Assignee: ICS TRIPLEX Technology Ltd.
    Inventors: Thomas Bruce Meagher, Kenneth John Murphy, Linda Murphy, legal representative
  • Patent number: 7728576
    Abstract: The traveling wave excitation system phase shifter chassis method and device of the invention is compact, inexpensive, and versatile when compared to customary methods for generating traveling wave excitation signals that would require using an equivalent number of commercial function generators. The method and device of the invention produces up to 56 simultaneous sine waves that are phase shifted with respect to one another.
    Type: Grant
    Filed: January 7, 2004
    Date of Patent: June 1, 2010
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Keith W. Jones, Christophe Pierre, Steven L. Ceccio, John Judge, Steve Fuchs
  • Publication number: 20100118627
    Abstract: A strobe offset control circuit is disclosed. The control circuit comprises a strobe signal input to receive a strobe signal and a data receiver to receive a data signal in response to a sample signal derived from the strobe signal. A calibration enable input is provided to receive a calibration enable signal. The calibration enable signal places the strobe offset control circuit in one of a calibration mode or a receiver mode. In the calibration mode, a phase offset between the data signal and the sample signal is adjusted based on output from the receiver. In the receiver mode, the phase offset between the data signal and the sample signal is not adjusted based on output from the receiver.
    Type: Application
    Filed: January 26, 2010
    Publication date: May 13, 2010
    Inventor: Scott C. Best
  • Patent number: 7711510
    Abstract: A signal processing system compensates for the relative phase difference between multiple frequency bands so that the combination of the bands is constructive throughout a substantial portion of the band overlap or crossover region. In one embodiment, a signal combining system may include a comparator for determining a relative phase difference between the two signals within a predefined crossover region, a phase adjusting element for adjusting a phase of one of the two signals; and a combiner for combining the phase-adjusted signal and the other of the two signals.
    Type: Grant
    Filed: December 19, 2007
    Date of Patent: May 4, 2010
    Assignee: LeCroy Corporation
    Inventor: Peter J. Pupalaikis
  • Patent number: 7706998
    Abstract: Systems and methods for synchronizing communication between devices include using a test circuit to measure a propagation time through a delay circuit. The propagation time is used to determine an initial delay value within a delay lock loop. This delay value is then changed until a preferred delay value, resulting in synchronization, is found. In various embodiments, used of the initial delay value increases the speed, reliability or other beneficial features of the synchronization.
    Type: Grant
    Filed: September 10, 2007
    Date of Patent: April 27, 2010
    Assignee: Rambus Inc.
    Inventors: Adrian E. Ong, Douglas W. Gorgen
  • Patent number: 7703202
    Abstract: A method for manufacturing an equalizer used to compensate a digital signal passed by a transmission line, in which the digital signal can be presented as a frequency-domain function. The method includes measuring a the transmission line scattering-parameter; performing an integration and a differentiation about the transmission line scattering-parameter, the frequency-domain function, the ideal gain, and an equalizer scattering-parameter to get the component impedances of the equalizer; and manufacturing the equalizer circuit with the derived component impedances.
    Type: Grant
    Filed: January 18, 2008
    Date of Patent: April 27, 2010
    Assignee: Inventec Corporation
    Inventor: Cheng-Hui Chu
  • Patent number: 7693672
    Abstract: A signal processing method includes receiving an unknown signal that includes a distorted component and an undistorted component, and performing self-linearization based at least in part on the unknown signal to obtain an output signal that is substantially undistorted, wherein performing self-linearization includes adaptively generating a replica distortion signal that is substantially similar to the distorted component, and subtracting the replica distortion signal from the unknown signal to obtain the output signal.
    Type: Grant
    Filed: March 26, 2007
    Date of Patent: April 6, 2010
    Assignee: Optichron
    Inventor: Roy G. Batruni
  • Patent number: 7668679
    Abstract: Systems and methods for strobe signal timing calibration and control in strobe-based memory systems are provided below. These strobe-offset control systems and methods receive a strobe signal from a memory device and in turn automatically generate separate per-bit strobe signals for use in receiving data on each data line of a memory system. The systems/methods generate the optimal per-bit strobe signals by automatically calibrating per-bit offset timing between data signals of individual data bits and corresponding strobe signals. The strobe-offset control system effectively removes the detected phase difference between the data signal and the strobe signal.
    Type: Grant
    Filed: January 9, 2007
    Date of Patent: February 23, 2010
    Assignee: Rambus Inc.
    Inventor: Scott C. Best
  • Patent number: 7660685
    Abstract: A method and apparatus for generating one or more transfer functions for converting waveforms. The method comprises the steps of determining a system description, representative of a circuit, comprising a plurality of system components, each system component comprising at least one component characteristic, the system description further comprising at least one measurement node and at least one output node, each of the at least one measurement nodes representative of a waveform digitizing location in the circuit. One or more transfer functions are determined for converting a waveform from one or more of the at least one measurement nodes to a waveform at one or more of the at least one output nodes. The generated transfer functions are then stored in a computer readable medium.
    Type: Grant
    Filed: August 1, 2007
    Date of Patent: February 9, 2010
    Assignee: LeCroy Corporation
    Inventors: Peter J. Pupalaikis, Lawrence W. Jacobs, Stephen M. Sekel
  • Patent number: 7650527
    Abstract: Self-calibration of devices such as computer and graphics processors permits adjustment of processor clock rates, and access to normally unused processor capacity. Processor clock rates specified by device manufacturers are normally selected to insure operation across the entire manufacturer-specified range of operating temperatures and supply voltages. By limiting processor clock rates to nominal values, even when operating well within manufacturer-specified temperature and/or supply voltage limits, designers sacrifice processor capacity. By determining the upper limits of processor clock rates at which reliable operation can be realized, and adjusting processor clock rates to match those speeds, a representative embodiment of the present invention permits device users to gain additional, previously inaccessible processing capacity.
    Type: Grant
    Filed: February 7, 2006
    Date of Patent: January 19, 2010
    Assignee: Broadcom Corporation
    Inventors: Darwin Rambo, Philip Houghton
  • Publication number: 20100010767
    Abstract: A method of controlling a clock signal with a print controller is provided. In response to receiving an external signal, the print controller determines the number of cycles of a clock signal generated by a ring oscillator of the print controller during a predetermined number of cycles of the external signal or the number of cycles of the external signal during a predetermined number of cycles of the clock signal and outputs the determined number of cycles to an external circuit. In response to receiving a trim value from clock trim circuitry of the print controller which trims the frequency of the clock signal based on the determined number of cycles from the external circuit, the trim value is stored in memory of the print controller. The clock trim circuitry is controlled to trim the frequency of the clock signal generated by the ring oscillator using the trim value.
    Type: Application
    Filed: September 21, 2009
    Publication date: January 14, 2010
    Inventors: Gary Shipton, Simon Robert Walmsley
  • Publication number: 20100010761
    Abstract: The present invention relates to a method and a device for monitoring a system such as a cable. Pulses propagating in different directions are distinguished by measuring and sampling current and voltage at a location of the system, frequency transforming the obtained signals, and by extracting signals corresponding to pulses propagating in different directions as linear combinations of the frequency-transformed signals. Such a method is applicable, e.g. when monitoring occurrences of partial discharge on a 10 kV cable.
    Type: Application
    Filed: September 26, 2007
    Publication date: January 14, 2010
    Applicant: WAVETECH SWEDEN AB
    Inventors: Sven Nordebo, Thomas Biro, Jonas Lundbäck
  • Publication number: 20090319217
    Abstract: A method for calibrating a high frequency measurement device having N measurement ports, where N is an integer ?1, in particular a vector network analyzer, for determining scattering parameters of a measurement object with an n-port measurement, where n is an integer ?1, wherein a high frequency test signal is fed into a first electrical lead connected to the measurement object or to a circuit having the measurement object, wherein for each port, an HF signal running on a second electrical lead, connected to the measurement object is coupled out from the second electrical lead at a first coupling position and at a second coupling position placed at a distance from the first coupling position, wherein from the two HF signals coupled out, in each port, for each measuring site or coupling site, an amplitude and/or a phase, relative to the HF test signal, of an HF signal running on the second electrical lead to the measurement object and of an HF signal running on the second electrical lead away from the measurem
    Type: Application
    Filed: June 19, 2007
    Publication date: December 24, 2009
    Applicant: ROSENBERGER HOCHFREQUENZTECHNIK GmbH & CO. KG
    Inventor: Thomas Zelder
  • Publication number: 20090290686
    Abstract: The effects of electromagnetic interference (EMI) on X-ray image data is corrected by characterizing the EMI and processing the image data to subtract the EMI effects from the image data. The X-ray image data, along with offset data, are collected in a conventional manner, affected by EMI if present, and EMI-characterizing data is immediately collected thereafter by disabling rows of a digital detector (FET off). The EMI-characterizing data, then, is not affected by the presence of image data, and can be used to characterize the amplitude and frequency of the EMI. The EMI-characterizing data is assured of being in phase with the collected image and offset data due to its collection in the same image acquisition sequence immediately following the collection of image and offset data. Artifacts due to the presence of EMI are thus eliminated from reconstructed images based upon the corrected data.
    Type: Application
    Filed: May 21, 2008
    Publication date: November 26, 2009
    Applicant: General Electric Company
    Inventors: James Zhengshe Liu, Tiantian Zhang, Kenneth Scott Kump, Jingyi Liang, Chuande Liu, Kadri Nizar Jabri
  • Patent number: 7617062
    Abstract: A process for determining the DC current in a fuel cell power plant includes the steps of determining current value from a power electronics converter of a power conditioning system of the power plant; determining a correction factor based upon losses within the converter; and correcting the current value from the converter with the correction factor to determine DC current in the fuel cell. This process also includes determining voltage within the converter and use of the voltage along with the corrected current to determine the desired DC current value.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: November 10, 2009
    Assignee: UTC Power Corporation
    Inventor: Steven Fredette
  • Patent number: 7617431
    Abstract: The apparatus for analyzing a delay defect of the present invention obtains the RC of the maximal incidence among region codes (RCs) to which check circuits detecting errors caused with gradual increase in the frequency of an operational clock pulse fed to an integrated circuit belongs. The apparatus obtains information on latch in which an error is caused with the RC of the maximal incidence, with reference to a mapping table that describes the mapping relationship between an RC and a latch. The apparatus extracts a circuit portion in which an error can be captured with the region code of the maximal incidence by exhaustively tracing back circuit portions connected with each obtained latch, from the latch to the latch described in the mapping table. The apparatus gives delay defects to the input and the output pin of each of logic elements included in the extracted circuit portion, generates test patterns for detecting the given delay defects, and performs delay tests.
    Type: Grant
    Filed: February 22, 2007
    Date of Patent: November 10, 2009
    Assignee: Fujitsu Limited
    Inventor: Noriyuki Ito
  • Patent number: 7610163
    Abstract: A method performed by a quality assurance integrated circuit for a print controller, the quality assurance integrated circuit comprising a memory; a system clock for generating a clock signal; clock trim circuitry for trimming the frequency of the clock signal; and a processor. the method includes, in the processor, in response to receiving an external signal, determining the number of cycles of the clock signal during a predetermined number of cycles of the external signal or the number of cycles of the external signal during a predetermined number of cycles of the clock signal and to output the determined number of cycles to an external circuit; and in response to receiving a trim value based on the determined number of cycles from the external circuit, storing the trim value in the memory and controlling the clock trim circuitry to trim the frequency of the clock signal using the trim value.
    Type: Grant
    Filed: December 5, 2007
    Date of Patent: October 27, 2009
    Assignee: Silverbrook Research Pty Ltd
    Inventors: Gary Shipton, Simon Robert Walmsley
  • Publication number: 20090254291
    Abstract: A system and method for acquiring phasors outside of the frequency tracking range for power protective relays. As the frequency of a power system varies from the rated frequency, phasors calculated from such samples include errors. A frequency tracking range is used to sample the signal waveform at a rate corresponding to the frequency when the frequency is within the frequency tracking range. When the frequency is outside of the frequency tracking range, the signal waveform is sampled at a rate corresponding with the maximum or minimum of the frequency tracking range depending on whether the frequency exceeds or falls below the frequency tracking range. The difference between the frequency and the minimum or maximum of the frequency tracking range is used to correct the measured phasors to result in accurate phasors.
    Type: Application
    Filed: April 4, 2008
    Publication date: October 8, 2009
    Inventor: Gabriel Benmouyal
  • Patent number: 7593826
    Abstract: The invention relates to a method of calibrating the reception path and the transmit path of an antenna array which is formed of at least three antennas and which is connected to a digital signal processor. For calibrating the reception path a signal of known amplitude and known phase is transmitted by a single antenna and received by n?1 antennas. For calibrating the transmit path of an antenna array path a signal of known amplitude and known phase is transmitted by n?1 antennas and received by the nth antenna. A phase difference and an amplitude difference between each of the n?1 transmitted signals is evaluated and the steps are repeated with a new transmit antenna until every antenna has been used as a transmit antenna. In the last step the phase differences and their associated amplitude differences are set to the factory-said values.
    Type: Grant
    Filed: September 8, 2006
    Date of Patent: September 22, 2009
    Assignee: Alcatel
    Inventor: Kurt Weese
  • Publication number: 20090228229
    Abstract: A system for calibrating and driving a piezo-electric transducer includes a voltage supply, a processor, an electrical signal switch, a Class F third order harmonic peaking blocking circuit segment enabling a drain voltage output having a time differential slope prior to signal passage through the harmonic peaking blocking circuit segment at turn-on of the switch, and wherein third order harmonics are rejected by the harmonic peaking blocking circuit, a programmable frequency oscillator in electrical communication with the processor and that drives the switch, wherein the processor programs the frequency oscillator to establish the operating frequency of the switch, and an inductor in parallel with a piezo-electric kinetic energy transducer that electrically represents a parallel resonant resistive-capacitive circuit segment that is configured to receive the oscillating signal input at the operating frequency and to produce kinetic energy output.
    Type: Application
    Filed: March 4, 2008
    Publication date: September 10, 2009
    Inventor: Titi Trandafir
  • Patent number: 7580801
    Abstract: In a method of monitoring two-phase fluid flow a vortex flowmeter is used to generate a signal indicative of the flow regime using the signal components and its fluctuations to determine the phase status of the fluid flow.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: August 25, 2009
    Assignee: University of Sussex Intellectual Property Limited
    Inventors: Peter Joseph Unsworth, Edward Hall Higham, Mongkol Pusayatanont
  • Patent number: 7580805
    Abstract: A circuit for regulating power is disclosed. The present invention provides circuits and methods for current sensing variations, static droop settings, mismatched phase outputs, and temperature variations in a multiphase power regulator. The circuits may include a calibration controller that senses and regulates both a current sensing circuit and the droop in a power regulator over a range of temperatures thus equalizing phase outputs. The present invention includes the schematic organization and implementation of the circuit, the circuit's calibration, its use, and implementation. This invention advantageously provides circuits and methods to properly power a processor or IC chip according to the unique power specifications of the processor or chip.
    Type: Grant
    Filed: June 3, 2008
    Date of Patent: August 25, 2009
    Assignee: Nupower Semiconductor, Inc.
    Inventors: Fereydun Tabaian, Hamed Sadati, Ali Hejazi, Ahmad Ashrafzadeh
  • Patent number: 7567880
    Abstract: An interface circuit includes a variable delay circuit and a delay adjustment circuit to automatically detect a data valid window of a DQ signal and adjust an optimum delay amount of a DQS signal, and a fixed delay circuit to delay the DQ signal by a delay amount tFIXDLY satisfying tFIXDLY>tMINDLY+tSKEW?tSETUP where a minimum delay amount in the variable delay circuit is tMINDLY, a skew between the DQ signal and the DQS signal is tSKEW, and a setup time of the DQ signal is tSETUP.
    Type: Grant
    Filed: July 20, 2007
    Date of Patent: July 28, 2009
    Assignee: NEC Electronics Corporation
    Inventor: Yoichi Iizuka
  • Publication number: 20090157344
    Abstract: Control and calibration solutions are described that provide control and calibration data that is recognized by a test meter allowing the meter to segregate the control and calibration data from regular test data. Recognition and segregation of the control and calibration data can occur automatically with no additional input from the meter's user. Methods for use of the solutions are also provided.
    Type: Application
    Filed: October 7, 2008
    Publication date: June 18, 2009
    Inventors: David W. Burke, Terry A. Beaty, Lance S. Kuhn, Vladimir Svetnik
  • Patent number: 7548826
    Abstract: Systems and methods for monitoring, managing, and testing power systems are disclosed. In various embodiments, a site server collects data from one or more generators, automatic transfer switches, sensors, and cameras at a site. The site server stores captured data and triggers alarm events when preselected limits are exceeded. The site server also enables users to configure, initiate, pause, resume, monitor, and abort scripted tests of the monitored entities. In some of these and other embodiments, an enterprise-wide server collects data from multiple site servers, makes the data available via a web-based or other client interface, and provides consolidated monitoring, alarm, test management, and management resources.
    Type: Grant
    Filed: November 3, 2006
    Date of Patent: June 16, 2009
    Assignee: Blue Pillar, Inc.
    Inventors: Bradley Jay Witter, Thomas Joseph Butler
  • Patent number: 7545150
    Abstract: A measurement and correction method provides for a complete full correction of a true-mode system using only the single ended error matrix developed for 4 port correction of single ended measurements. The degree of misalignment of the balanced sources may be determined from these measurements.
    Type: Grant
    Filed: February 28, 2007
    Date of Patent: June 9, 2009
    Assignee: Agilent Technologies, Inc.
    Inventors: Keith F. Anderson, David V. Blackham, Joel P. Dunsmore, Loren C Betts, Nicholas C. Leindecker
  • Publication number: 20090144009
    Abstract: A system comprises at least one of a first generator, at least two of a second generator, and a load board. The at least one of a first generator one of receives and transmits analog signals. The at least two of a second generator one of receives and transmits digital signals. The load board is disposed between the first generator and the second generators and electrically coupled therebetween to calibrate parameters relating to communications. The load board includes a direct path for each of the analog signals between the at least one of the first generator and a corresponding number of devices under test and for each of the digital signals between the at least two of the second generator and a corresponding number of devices under test.
    Type: Application
    Filed: December 3, 2007
    Publication date: June 4, 2009
    Inventor: Scott Chesnut
  • Patent number: 7542865
    Abstract: An abnormality determination device of a cylinder pressure sensor calculates a gain (sensing sensitivity coefficient) and an offset (bias) indicating an output characteristic of the cylinder pressure sensor. The device determines existence or nonexistence of an abnormality in the gain and the offset respectively. When the device determines that the abnormality exists, the device performs failsafe processing set in modes different from each other between the case of the abnormality in the gain and the case of the abnormality in the offset. As the failsafe processing in the case of the abnormality in the gain, the device performs processing for substantially prohibiting usage of a sensor value of the cylinder pressure sensor in control (fuel injection timing control) by using an alternative value (specified value) instead of the sensor value of the cylinder pressure sensor.
    Type: Grant
    Filed: May 29, 2007
    Date of Patent: June 2, 2009
    Assignee: DENSO Corporation
    Inventors: Shinya Hoshi, Hiroshi Haraguchi, Youhei Morimoto
  • Publication number: 20090133870
    Abstract: The method for correcting the phase of measured electric signals or magnetic signals of field data from a controlled source electromagnetic survey (CSES) by comparing the measured field data corresponding to a selected frequency to the simulated data for various signal source receiver offsets (71) and correcting the phases of the actual data based on the phase difference for a selected range of small signal offsets (76) based on a go-electric model.
    Type: Application
    Filed: September 25, 2006
    Publication date: May 28, 2009
    Inventors: Dmitriy A. Pavlov, Dennis E. Willen, James J. Carazzone
  • Patent number: 7536578
    Abstract: A method of determining a maximum optimum clock frequency at which a digital processing system can operate, the method comprising the steps of: generating a clock signal at an initial frequency; increasing said frequency in a step-wise manner and determining the operation of said system each of a selected number of frequencies, until a clock frequency is identified at which said processor does not operate correctly; and identifying a maximum clock frequency at which said system can operate correctly; characterized in that: said maximum clock frequency comprises the frequency immediately previous to the one identified as being one at which said system does not operate correctly; and in that a timing monitor is provided for determining whether or not said system can operate within system timing constraints at each frequency, thereby indicating whether or not said system operates correctly at the respective frequency.
    Type: Grant
    Filed: January 20, 2005
    Date of Patent: May 19, 2009
    Assignee: NXP B.V.
    Inventor: Francesco Pessolano
  • Publication number: 20090119052
    Abstract: A margin testing system comprises a margin testing controller and a frequency control module. The margin testing controller is internal to and integrated with an electronic system under test and is coupled with a plurality of components that are configured to provide the functionality of the electronic system under test. The plurality of components includes a processor of the electronic system under test. The frequency control module is in communication with the margin testing controller. The frequency control module is configured for varying a clock frequency associated with at least one of the components for frequency margin testing the at least one of the components in response to command of the margin testing controller.
    Type: Application
    Filed: January 7, 2009
    Publication date: May 7, 2009
    Inventors: Naysen Jesse ROBERTSON, Benjamin Thomas Percer, Sachin N. Chheda
  • Publication number: 20090093986
    Abstract: A method for correcting feed through signals for use with an oscilloscope employing Digital Bandwidth Interleaving is provided. The method comprises the steps of converting an original signal to a frequency other than an original frequency of the original signal, determining one or more feed through signals not converted with the original signal, providing an offsetting correction signal and combining the converted signal, the non-converted feed through signal, and the offsetting correction signal.
    Type: Application
    Filed: October 3, 2008
    Publication date: April 9, 2009
    Applicant: LeCroy Corporation
    Inventors: Francois LaMarche, Laxmikant Joshi, Jonathan Libby
  • Patent number: 7509250
    Abstract: In one embodiment, a system comprises debug functionality, a debug interface communicatively coupled to the debug functionality, and a hardware key interface. Communication with the debug functionality over the debug interface is not permitted if an authorized hardware key is not communicatively coupled to the hardware key interface.
    Type: Grant
    Filed: November 4, 2005
    Date of Patent: March 24, 2009
    Assignee: Honeywell International Inc.
    Inventors: Edwin D. Cruzado, William J. Dalzell, Brian R. Bernier
  • Patent number: 7493226
    Abstract: The present invention provides a margin testing system, incorporated in an electronic system (e.g., a computer system), that includes a controller, a frequency control module, and a voltage control module, and a fault bypass module. In response to commands from the controller, the frequency control module and/or the voltage control module can set a test clock frequency and/or a test voltage for application to one or more components of the electronic system to elicit system response to these test values. The response of the system at each test value can be monitored, e.g., by executing a diagnostics software, and analyzed. The fault bypass module can mask fault signals during margin testing to ensure that these signals will not disrupt margin testing of the system.
    Type: Grant
    Filed: June 26, 2003
    Date of Patent: February 17, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Naysen Jesse Robertson, Benjamin Thomas Percer, Sachin N. Chheda
  • Patent number: 7487057
    Abstract: A field device electronics with a sensor unit for process measurements, wherein the field device electronics is connected with the sensor unit over corresponding signal paths, and wherein the field device electronics receives analog measurement signals (S1) of the sensor unit and produces analog drive signals (S5) for the fundamental wave excitation of the sensor unit and transmits to the sensor unit. Present for producing the drive signal(S5) are an analog/digital converter, a digital phase shifter and a digital/analog converter, wherein the analog measurement signals (S1) are digitized by the analog/digital converter and forwarded to a digital phase shifter, and wherein the output signal (S4) of a phase shifter is converted by the digital/analog converter into the analog drive signal (S5) for the sensor unit.
    Type: Grant
    Filed: November 30, 2002
    Date of Patent: February 3, 2009
    Assignee: Endress + Hauser GmbH + Co. KG
    Inventors: Clemens Heilig, Roland Dieterle
  • Patent number: 7480580
    Abstract: An apparatus and method estimates a plurality of synchronized phasors at predetermined times referenced to an absolute time standard in an electrical power system. The method includes acquiring and determining a frequency of a power system signal, sampling the power system signal at a sampling interval rate based on a frequency of the power system signal to form signal samples, and generating a plurality of acquisition time values based on an occurrence of each of the signal samples at a corresponding plurality of different times referenced to the absolute time standard. The method further includes adjusting a phasor of each of the signal samples based on a time difference between a corresponding selected acquisition time value and a predetermined time referenced to an absolute time standard to form the plurality of synchronized phasors.
    Type: Grant
    Filed: August 15, 2006
    Date of Patent: January 20, 2009
    Assignee: Schweitzer Engineering Laboratories, Inc.
    Inventors: Gregary C. Zweigle, Luther S. Anderson, Armando Guzman-Casillas
  • Publication number: 20090018786
    Abstract: An interferometric intensity equation includes parameters that depend on bandwidth and numerical aperture. An error function based on the difference between actual intensities produced by interferometry and the intensities predicted by the equation is minimized iteratively with respect to the parameters. The scan positions (i.e., the step sizes between frames) that minimized the error function are then used to calculate the phase for each pixel, from which the height can also be calculated in conventional manner. As a result, the phase map generated by the procedure is corrected to a degree of precision significantly better than previously possible.
    Type: Application
    Filed: July 13, 2007
    Publication date: January 15, 2009
    Applicant: VEECO INSTRUMENTS, INC.
    Inventors: Florin Munteanu, Joanna Schmit
  • Patent number: 7474976
    Abstract: A device for compensating field disruptions in magnetic fields of electromagnets with high field homogeneity, in particular, for stabilizing the H0 field of an MR measuring system, comprising at least one field detector (31) for detecting interfering signals (Uin), at least one control loop for processing the detected interfering signals (Uin), and at least one compensation coil (34) to which the detected and processed interfering output signals (Uout) are transferred and which generates a correction field for compensating the interfering signals (Uin), is characterized in that at least one of the control loops comprises a multi-selective filter system (35) which comprises one or more parallel connected selective filter elements whose center frequencies can be tuned either once or in an adaptive fashion to the frequency values of the interfering signals (Uin) to be compensated for, wherein the outputs of these filter elements are connected to at least one of the compensation coils (34).
    Type: Grant
    Filed: July 23, 2007
    Date of Patent: January 6, 2009
    Assignee: Bruker Biospin AG
    Inventors: Michael Schenkel, Rolf Hensel, Werner Tschopp
  • Patent number: 7472362
    Abstract: A method of minimizing phase noise is provided. In operation, a first phase noise in a first circuit located on an integrated circuit is determined. Additionally, a second phase noise in a second circuit coupled to the first circuit but which is not located in the integrated circuit is determined, the second circuit being programmable. Further, the first phase noise is compared with the second phase noise. If the phase noises are about the same, it is determined that the noise source is from an algorithm of a random number generator, the second circuit is modified to optimize the performances of the integrated circuit, and the modified second circuit is copied to the first circuit. If the phase noises are different, it is determined that a source of the phase noise is at least one of a power supply coupling and a substrate coupling in the integrated circuit.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: December 30, 2008
    Assignee: International Business Machines Corporation
    Inventor: Kai Di Feng
  • Patent number: 7457715
    Abstract: A method is provided for monitoring characteristics of grinding tools and grinding system behavior in a production grinding process. The method includes steps of acquiring sensor data indicative of a rate of material removal over one or more measurement periods during the grinding process, acquiring sensor data indicative of power consumed by the grinding tools over the measurement periods during the grinding process, and, from a material removal versus power plot, calculating a ratio of the change in the rate of material removal to that of the power consumed by the grinding tools over the measurement periods. In some embodiments, the method includes optimizing the grinding process by adjusting the feed rates and feed transition points. Additional data from vibration sensors and work form gauges may also be used in some instances for optimization and system troubleshooting.
    Type: Grant
    Filed: February 1, 2006
    Date of Patent: November 25, 2008
    Assignee: Ranko, LLC
    Inventors: Rajiv K. Bhateja, Chander P. Bhateja