Abstract: A method for producing a thinned representation of vibration waveform data. The waveform vibration data is received and divided into sequential blocks. For each sequential block, each serially designated in turn as a current block, the following steps are performed. When the current block is also a first block, the current block is passed as a reference block. A representative value for the current block is computed and compared to the representative value for the reference block to determine a difference. The representative value for the current block is compared to a minimum representative value. The current block is transformed into a spectrum and compared to the spectrum for the reference block to determine a correlation value.

Abstract: The present invention is concerned with a method of determining stationary signals for the diagnostics of an electromechanical systems in which electrical rotating machinery is used and in which at least one electrical or mechanical signal is measured during an operation of the electromechanical system. The method is used especially for condition monitoring of electric motors and generators. The method consists of measuring an analog waveform signal (S) of the electromechanical system and then manipulating that signal in various ways to obtain a frequencies spectrum, from which a vector of interest frequencies and corresponding vector of amplitudes are extracted to diagnose the electromechanical system.

Abstract: A method for generating a pulse signal sequence using a processor unit is provided that allows calibrating a tip timing measurement system in a turbomachine in order to increase operational security and lifespan of the turbomachine. This is achieved by the method having the steps of: storing a number of wait time elements in a memory unit, creating a pulse signal in a signal output unit during at least one processor cycle, reading a wait time element from the memory unit, and creating a null signal in the signal output unit for a number of processor cycles derived from the wait time element read.

Abstract: The invention embodies the application of different combinations of the monitoring and data processing aspects as a means to develop an early warning chatter alarming system. Configuring an early warning chatter alarming system can be as simple as using n? alarm settings to develop an alarming strategy from different trend conditions such as overall RMS, selected vibration frequencies, slope analysis, and wavelet analysis. A higher level of alarming is provided by using a time integrated approach to account for both intensity of the alarm variable and duration. Combining these different aspects with a predictive model incorporates process-operating conditions to enhance the alarming sensitivity for earlier detection and reduce false positives. Finally, combining the different alarming aspects with a rule-based decision making approach such as fuzzy logic allows alarming based on qualitative analysis of different data streams.

Abstract: The invention is an apparatus and method of eliminating polarization-induced fading in interferometric fiber-optic sensor system having a wavelength-swept laser optical signal. The interferometric return signal from the sensor arms are combined and provided to a multi-optical path detector assembly and ultimately to a data acquisition and processing unit by way of a switch that is time synchronized with the laser scan sweep cycle.

Abstract: A system and method for checking a ground via of control chips of a printed circuit board (PCB) provides a graphical user interface (GUI) displaying a layout of the PCB. The control chip has a plurality of ground pins. The computer searches for signal path routing of each ground pin and ground vias along each signal path routing of each ground pin. If there are any ground vias having the same absolute coordinates, the computer determines that the ground vias are shared by more than one ground pin.

Abstract: A method is provided which measures PCB trace characteristics from measurements of a PCB trace structure.

Abstract: A first transform unit transforms clock change point information which indicates the change timing of a clock signal into information with respect to the frequency domain thereof so as to generate first clock change point frequency information. A digital filter performs filtering of the first clock change point frequency information so as to generate second clock change point frequency information. A second transform unit inverse-transforms the second clock change point frequency information into information with respect to the time domain so as to generate second clock change point information. A judgment unit evaluates a DUT based upon difference data between the change timing represented by the data change point information and the change timing represented by the second clock change point information in increments of phases.

Abstract: Memory power estimation by means of calibrated weights and activity counters are generally presented. In this regard, in one embodiment, a memory power is introduced to read a value from a memory activity counter, to determine a memory power estimation based at least in part on the value and a calibration, and to store the memory power estimation to a register. Other embodiments are also described and claimed.

Abstract: A fault diagnosis apparatus and method capable of simultaneously detecting the fault of a multiplexer and the fault of an A/D converter and isolating and identifying causes of these faults, the multiplexer and the A/D converter being used in a multi-channel analog input/output circuit. Test-voltage values are inputted from a diagnosis-voltage input unit into the multiplexer and the A/D converter constituting an analog-signal conversion unit, the multiplexer having plural channels, the A/D converter converting outputs from the multiplexer into digital signals, the test-voltage values being different from each other for each channel of the multiplexer. Comparisons are made between the digital voltage values and the test-voltage values inputted, the digital voltage values being outputted for each channel of the multiplexer. From this comparison result, it is judged whether the multiplexer is at fault or the A/D converter is at fault.

Abstract: Embodiments for testing an acoustic property of an ultrasound probe including a plurality of transducer elements are disclosed. A Schlieren image of an ultrasound probe and a visualized acoustic field of an ultrasound signal generated when one of the transducer elements is excited are acquired. A preprocessing including noise removal and position calibration upon the Schlieren image is then carried out. An acoustic property of the ultrasound probe is tested based on the preprocessed Schlieren image.

Abstract: Disclosed is provided an apparatus and a method for operating a macro command and inputting a macro command, wherein the apparatus including a storing unit storing control signals received from a control device for selecting of a menu item of a host device, a creating unit creating the macro command combined with the control signals, and an executing unit reading the macro command and executing functions corresponding to the respective menu item of the host device according to a combination sequence of the control signals included in the read macro command.

Abstract: An aging status diagnostic apparatus for a power conversion system and diagnosing method thereof are provided. The apparatus includes an output current sensing means detecting output current of an inverter switching module; and a measurement and diagnosis means receiving the output current, calculating one or more average values of the output current over one period, and magnitude or effective value of each harmonic of the output current, and determining whether aging of the inverter switching module has occurred. Furthermore, the measurement and diagnosis means determines that the aging of the inverter switching module has occurred if the average value of the output current over one period increases by a value equal to or greater than a predetermined range and/or an even order harmonic or a specific order harmonic based on FFT (Fast Fourier Transform) of the output current increases by a value equal to or greater than a predetermined range.

Abstract: An arrangement to determine at least one electrical feature of an electrical device including a signal injection unit configured to inject first and second test signals into the electrical device, a signal conversion unit configured to measure electrical qualities in electrical circuits resulting from the test signals, and a processing device including at least two input channels configured to receive the measured electrical quantities and to determine the electrical feature based on the measured electrical quantities. The arrangement further may include a mixing unit configured to add the measurements of a first electrical quantity determined from the test signals and based thereon generate a first mixed signal, to add the measurements of a second electrical quantity from the test signals and based thereon generate a second mixed signal, and to supply the first and second mixed signals to first and second input channels.

Abstract: A method is provided to improve the usability of Design-For-Testability Synthesis (DFTS) tools and to increase the design process productivity. The method comprises receiving a list of testability and design impact analysis functions, to be performed on the circuit, also referred to as a device under test (DUT). The impact analysis leads to the creation of logical transformations, which can be selected by a user with one or more available transformation methods from a list including, but not limited to, boundary scan test logic insertion, scan test logic insertion, memory BIST (built-in-self-test) logic insertion, and logic BIST logic insertion, and scan test data compression insertion logic insertion.

Abstract: A method of determining the intrinsic electrical characteristics of a device under test (DUT) includes determining a set of test measurements for a test structure including the device and determining test measurements for a number of de-embedding test structures. Based on the test measurements, DUT measurements are determined using both open-short and three-step de-embedding processes. The DUT measurements are combined to determine an imperfection error, which is used to adjust the calculations of a four-port de-embedding method. The adjusted calculations provide for a more accurate measurement of the parasitic elements in the test structure, thereby improving the determination of the intrinsic electrical characteristics of the device.

Abstract: An integrated circuit includes a first storage location, a first generator, a converter, and a second generator. The first storage location is operable to store a first adjustment value. The first generator is coupled to the first storage location, is operable to generate a first signal having a first characteristic, and includes a first adjuster operable to change the first characteristic in response to the first adjustment value. The converter is coupled to the first storage location and is operable to generate from the first adjustment value a modified adjustment value. The second generator is coupled to the converter, is operable to generate a second signal having a second characteristic, and includes a second adjuster operable to change the second characteristic in response to the modified adjustment value.

Abstract: Disclosed is provided an apparatus and a method for operating a macro command and inputting a macro command, wherein the apparatus including a storing unit storing control signals received from a control device for selecting of a menu item of a host device, a creating unit creating the macro command combined with the control signals, and an executing unit reading the macro command and executing functions corresponding to the respective menu item of the host device according to a combination sequence of the control signals included in the read macro command.

Abstract: There is implemented an instrument check system for storing check data of an instrument for a long period of time in an instrument body in a stylized format. The instrument check system comprises an instrument provided with an AD converter for converting a voltage value applied to an input terminal into a digital value, a checking PC connected to the instrument so as to communicate with the instrument, a voltage generation unit for applying a checking voltage value to the input terminal, a check data storage unit formed in the instrument, wherein the checking PC comprises an input check means for acquiring data that is converted from the voltage value into the digital value by the AD converter upon giving an instruction to the voltage generation unit, and storing the data in the check data storage unit.

Abstract: A method of verifying a digital design is disclosed. The method comprises generating a reference model for a first digital design and creating an operational model for a second digital design, wherein the first digital design and the second digital design are intended to have a same logical function. A plurality of testcase types are then created by constraining one or more internal signals, and one or more test scripts representing the plurality of testcase types are produced. The method also includes verifying the second digital design with a testing simulation program by comparing results of the test scripts from the operational model and the reference model.

Abstract: In an example embodiment, an integrated circuit comprises a mixer circuit and a local oscillator circuit. During testing a frequency divider circuit in the integrated circuit divides a local oscillator signal to a frequency below a normal operating range of the local oscillator. The integrated circuit applies the divided local oscillator signal to the mixer circuit instead of the local oscillator signal during testing. Signal properties of a signal derived from the mixer circuit are measured while the divided local oscillator signal is applied to the mixer circuit.

Abstract: A system and method of monitoring a plurality of electrical assets comprise an electricity distribution infrastructure, including a plurality of electrical asset sensors coupled to the electrical assets for monitoring an operating condition of the electrical assets as well as any fault conditions. The sensors may include a current transformer for obtaining a current waveform, a GPS receiver for applying a synchronized time-stamp to the waveform data, and a mesh network radio for transmitting the time-stamped waveform data. Data from the plurality of sensors may be encrypted and transmitted over a mesh network to one or more gateways that are in communication with a central command processor. In response to an abnormal operating condition of any electrical asset, the central command processor may determine a probable fault location, a probable fault type, and a fault response.

Abstract: The present invention is directed to a method and a system to evaluate operational characteristics of an electronic circuit. The method includes generating a visual display, on a monitor, of an eye diagram viewer. The eye diagram viewer is used to establish a test parameter for the circuit. Accessed is data that includes a graphical file containing eye diagram information corresponding to the test parameter. A visually perceivable image of the eye diagram information is provided in response to the test parameter. Specifically, the eye diagram viewer is used to establish an eye diagram information identifier by displaying in a plurality of test condition selector screens one of a multiple condition values for the test condition parameters. The graphical file containing the eye diagram information corresponding to the eye diagram information identifier is obtained from the server and displayed.

Abstract: According to one embodiment, a low phase noise testing system includes a tester providing a high phase noise digital channel output. The low phase noise testing system further includes a crystal filter configured to receive the digital channel output and to pass a narrow frequency range from the digital channel output, whereby the high phase noise digital channel output is converted to a low phase noise clock for use by a device under test. The crystal filter can be, for example, a monolithic crystal filter or a discrete crystal filter.

Abstract: A signal conversion system for interfacing selected components of a communication system and methods for manufacturing and using same. The signal conversion system converts selected logic signals from one system component into a pair of differential logic signals and provides the pair of differential logic signals to a second system component, resolving any logical and/or temporal artifacts. While one or more of the selected logic signals change signal state, the signal conversion system maintains the pair of differential logic signals in a first valid combined signal state until the signal state of the selected logic signals corresponds to a second valid combined signal state for the pair of differential logic signals. The signal verification system then updates the pair of differential logic signals to have the second valid combined signal state. The system components thereby can communicate, exchanging differential communication signals while maintaining duty cycle and avoiding signaling glitches.

Abstract: A system analyzer may generate an estimated frequency response of a device, system, communication medium, or combination thereof by utilizing a stimulus signal that is robust against IQ modulator impairments. A stimulus generator may be used to generate a plurality of discrete tones according to a frequency spacing and a frequency offset. The frequency spacing and the frequency offset cause spectrally inverted spurs (generated by impairments of the IQ modulator) to occur at frequencies other than frequencies of said modulated signal that are associated with said plurality of discrete tones. Additionally, by implementing a Discrete Fourier Transform (DFT) to possess a frequency resolution equal to the frequency offset, there is no leakage of power associated with the spectrally inverted spurs into frequency bins of the DFT associated with the desired frequency components. Likewise, leakage between the desired frequency components and leakage associated with the local oscillator may be avoided.

Abstract: A system and method of generating a test clock signal for scan testing of a main circuit in a semiconductor device includes receiving an external clock signal and a control signal and generating a gated clock signal by gating an internal clock signal based on the control signal. The internal clock signal has a frequency higher than a frequency of the external clock signal. One of the external clock signal and the gated clock signal is selectively output based on the control signal.

Abstract: A modulated laser light detector that converts laser light energy into electrical signals which exhibit a frequency that is substantially the same as the laser light modulation frequency, in which these signals allow the detector unit to determine a position where the laser light is impacting upon a photodiode array. A superheterodyne receiver circuit is used to provide high gain at an improved signal-to-noise ratio to improve the range at which the modulated laser light signal can be reliably detected. Various types of signal detection circuits are available. Various processing algorithms are disclosed, including a Discrete Fourier Transform with a simplified computational algorithm for use with a low-power processor device.

Abstract: A test system with multiple instruments. Some instruments act as controller instruments and others act as controlled instruments. Each instrument includes a clock generator that synthesizes one or more local clocks from a reference clock. The reference clock is a relatively low frequency clock that can be inexpensively but accurately generated and distributed to all of the instruments. A communication link between instruments is provided. Timing circuits within instruments that are to exchange time information are synchronized to establish a common time reference. Thereafter, instruments communicate time dependent commands or status messages asynchronously over the communication link by appending to each message a time stamp reflecting a time expressed relative to the common time reference. The test system includes digital instruments that contain pattern generators that send command messages to analog instruments, which need not include pattern generators.

Abstract: A real-time bulk material analyzing system is disclosed for analyzing the elemental characteristics of bulk material passing by the system on a moving conveyor belt. An exemplary embodiment includes a source of illumination emitting white light for exciting bulk material to be analyzed, and a hyperspectral imaging spectrometer for capturing spectral reflectance from bulk material excited by the illumination source. A non-hazardous source of excitation can be used, which allows the bulk material to pass unobstructed and undisturbed through the detector array.

Abstract: A method and system is provided for management of medical data from a network of devices. The network of devices may include federated sensors that collect and forward medical data pertaining to an individual or biological specimen. The federated sensors or a central or remote device may further process the medical data and assign a priority value to the medical data. Processing can also include the analysis of the data for sensor error, local fusion of multiple sensors into higher-level interpretations, and the summarization or abstraction of the data into information that people are more comfortable with sharing than they might be with transmittal of the base data. The medical data may be transported to a healthcare provider or other endpoints based on the priority value and the authorization of recipient.

Abstract: An acquisition apparatus for a test and measurement instrument includes an input to receive an input signal, a digitizer to digitize a selected signal, a bypass path to selectively couple the input to the digitizer, a frequency shift path to frequency shift the input signal and selectively couple the frequency-shifted input signal to the digitizer, the frequency shift path including a means for frequency shifting, an input switch to switch the input signal to one of the bypass path and the frequency shift path, and an output switch to provide the selected signal to the digitizer by selectively coupling an output of one of the frequency shift path and the bypass path to the digitizer.

Abstract: A signal processing system for a sensor for judging whether an event to be detected has occurred on the basis of a frequency of a sensor output includes a converting device for converting the sensor output into a square wave, a presuming device for presuming whether the frequency of the sensor output is lower than a predetermined frequency referred for judging whether the event to be detected has occurred on the basis of an output from the converting device, and a judging device for judging whether the event to be detected has occurred on the basis of an output from the presuming device.

Abstract: A signal monitoring system includes four sensors, a multiplexer, a signal converting circuit, and a monitor chip. The multiplexer is electrically connected to the sensors for receiving the signals from the sensors. The multiplexer includes two selecting ports for selecting one of the sensors to communicate with the multiplexer, and a data bus for transmitting the signals generated by the selected sensor. The signal converting circuit includes an ADC electrically connected to the multiplexer for converting analog signals output therefrom to digital signals, and an MCU electrically connected to the ADC and the multiplexer. The MCU includes a digital port electrically connected to the monitor chip for outputting digital signals thereto, and a timer electrically connected to the monitor chip for outputting pulse signals thereto. The monitor chip is for processing the digital signals or pulse signals. A related signal monitoring method is also disclosed.

Abstract: The method for wideband device measurement and modeling includes: measurement of an electronic device to obtain a set of time domain raw data representing characteristics of said device; conversion of said time domain raw data into frequency domain raw data; calibration and correction of embedded errors according to said frequency domain raw data to obtain clean frequency domain data representing characteristics of said device; conversion of said frequency domain data into time domain clean data; and establishment of equivalent model of said device according to said time domain data. The time domain raw data are obtained by applying to said device an ultra short impulse and measuring said impulse and its response from said device. Conversion between said time domain data and said frequency domain data may be Fourier transform.

Abstract: Disclosed are new methods and systems for achieving calibration in a pipelined ADC system. The methods and systems may be used to provide continuous digital background calibration in a pipelined ADC. Component mismatch error from each DAC in the pipeline is tabulated to provide an integral nonlinearity profile, which is subtracted from the ADC transfer characteristic.

Abstract: An apparatus, system, and method are disclosed for testing an analog to digital converter with a known analog signal applied. A first register module stores a first digitized instance of an analog signal. A second register module stores a second digitized instance of the analog signal. A difference module calculates the absolute difference between the first and second digitized instances. A bad code module identifies an erroneous digitized instance wherein the absolute difference is greater than a limit value. In one embodiment, a counter module counts the erroneous digitized instance. A test system may identify a failed analog to digital converter if the erroneous digitized instance count is greater than a specified target value.

Abstract: Disclosed are new methods and systems for achieving calibration in a pipelined ADC system. The methods and systems may be used to provide continuous digital background calibration in a pipelined ADC. Component mismatch error from each DAC in the pipeline is tabulated to provide an integral nonlinearity profile, which is subtracted from the ADC transfer characteristic.

Abstract: A system for de-embedding electrical characteristics to obtain the intrinsic electrical characteristics of a device under test. The system includes obtaining a set of S parameter data from measurements of a thru test structure and partitioning that set into a set of input S parameters and a set of output S parameters. The set of input S parameters and the set of output S parameters are converted to sets of input ABCD parameters and output ABCD parameters, respectively. An inverse matrix of the set of input ABCD parameters is cascaded with a matrix of a set of ABCD parameters representative of the electrical characteristics of a test structure including the device under test. The resultant matrix is then cascaded with the inverse matrix of the set of output ABCD parameters to obtain a set of device ABCD parameters representative of the intrinsic electrical characteristics of the device under test.

Abstract: The present invention relates to a method and an apparatus for generating an electronic test signal, and particularly to the use of such a method and apparatus for calibrating meters used to measure electrical characteristics such as voltage, current, phase angle and power. A user may select via a user input control the frequency domain characteristics of a desired electronic test signal including a user-defined set of amplitudes and phases of a fundamental frequency and one or more harmonic frequencies. A processor generates from the user-defined set of amplitudes and phases a frequency domain output set of amplitudes and phases for the fundamental frequency and one or more harmonic frequencies, which is then converted into a first time domain set of amplitudes extending over at least one cycle of the fundamental frequency. The first time domain set of amplitudes is communicated to a digital-to-analog output stage which generates an electronic test signal corresponding to the time domain set of amplitudes.

Abstract: A system for determining impulse events of an asset by sampling and digitizing a complex signal sensed by a transducer monitoring the asset into a digitized signal with a sampling device operatively coupled to the transducer, transforming the digitized signal into a plurality of maximum and minimum value pairs each pair having an associated location correlated to a relative movement of a moving member of the asset with a processor operatively coupled to the sampling device, and a monitor and/or a computerized condition monitor having the processor integrally formed therewith or operatively coupled thereto for comparing at least one of the plurality of maximum and minimum value pairs and its respective location to at least one known value for determining impulse events based on the comparison step for providing asset protection.

Abstract: A method and apparatus for real-time derivation of precise digital clock edges and synchronous logic samples from a digital signal having a clock channel and at least one data channel acquires a plurality of temporally offset analog samples during each of a sequence of sample periods and from consecutive samples where there is a logic level transition estimates an edge time. From the edge times for the clock channel an offset is added and applied to the at least one data channel to determine the synchronous logic samples for the data channel at each offset clock edge time.

Abstract: A method and apparatus for the characterization of optical pulses and modulators includes modulating, using a modulator, a train of optical pulses, measuring a spectrum of the modulated train of optical pulses, recording the measured spectrum as an entry in a spectrogram at a position in the spectrogram corresponding to a relative delay between the modulation and the train of optical pulses, incrementing the relative delay, and repeating the above steps until the accumulated relative delay is equal to the period of the spectrogram. The train of optical pulses and the modulator are then characterized using the measured spectra recorded in the spectrogram.

Abstract: An inter-chip line transmission circuit in a transmitting chip and complementary receiving circuit in a receiving chip provide the capability to characterize the inter-chip interface by separately generating identical pseudo-random test data at both chips, comparing the data, and recording errors. Preferably, one or both chips can be tuned on an individual line basis to reduce errors by altering threshold detection voltage, signal delay, and/or driver power. The receiver circuit preferably contains counters for counting test cycles and errors, which can be masked for any particular line or type of error. A tunable and characterizable interface in accordance with the preferred embodiment thus supports the accurate determination of low error rates on an individual line basis for various tuning parameter settings.

Abstract: A method and counter for reducing the background counting rate in gas-filled alpha particle counters wherein the counter is constructed in such a manner as to exaggerate the differences in the features in preamplifier pulses generated by collecting the charges in ionization tracks produced by alpha particles emanating from different regions within the counter and then using pulse feature analysis to recognize these differences and so discriminate between different regions of emanation. Thus alpha particles emitted from the sample can then be counted while those emitted from the counter components can be rejected, resulting in very low background counting rates even from large samples. In one embodiment, a multi-wire ionization chamber, different electric fields are created in different regions of the counter and the resultant difference in electron velocities during charge collection allow alpha particles from the sample and counter backwall to be distinguished.

Abstract: An on-board self test system for an electrical power monitoring device includes a test signal circuit in an electronic circuit of the monitoring device, and responsive to a programmable test input signal for producing an analog signal simulating an electrical power waveform, and a programmable memory in an electronic circuit of the monitoring device and operatively coupled with the test signal circuit for storing and reproducing upon command, one or more of the programmable test input signals.

Abstract: An apparatus for measuring an intake air flow of an internal combustion engine, wherein presence of a backflow is determined from a waveform of the electric signal of flow detecting unit. If a backflow is present, a kurtosis is calculated. A backflow ratio is calculated based on the relation obtained from the kurtosis and the backflow ratio. The mass of the flow obtained by converting electric signals from the flow detecting unit into flows are integrated or averaged. Then, the integrated value or the average value is compensated by the backflow ratio, and accumulate mass of the air flow is calculated.

Abstract: The inventive method and apparatus include sensory devices that invariantly represent stimuli in the presence of processes that cause systematic sensor state transformations. Such processes include: 1) alterations of the device's detector, 2) changes in the observational environment external to the sensory device and the stimuli, and 3) certain modifications of the presentation of the stimuli themselves. A specific embodiment of the present invention is an intelligent sensory device having a “front end” comprised of such a representation “engine”. The detectors of such a sensory device need not be recalibrated, and its pattern analysis module need not be retrained, in order to account for the presence of the above-mentioned transformative processes. Another embodiment of the present invention is a communications system that encodes messages as representations of signals.

Abstract: A method and system that include a first measurement signal and a second measurement signal that can be input to first and second filters. The filters can be subject to a first constraint to minimize the energy difference between the first and second measurement signals on a per frequency basis, and subject to a second constraint that includes a model frequency and phase response. By adapting the filters subject to the two constraints, coherent differences between the two measurement signals can be identified. In one embodiment, the system can be applied to Synthetic Aperture Radar (SAR) data.

Abstract: A method and system for monitoring at least one of a system, a process and a data source. A method and system have been developed for carrying out surveillance, testing and modification of an ongoing process or other source of data, such as a spectroscopic examination. A signal from the system under surveillance is collected and compared with a reference signal, a frequency domain transformation carried out for the system signal and reference signal, a frequency domain difference function established. The process is then repeated until a full range of data is accumulated over the time domain and a Sequential Probability Ratio Test methodology applied to determine a three-dimensional surface plot characteristic of the operating state of the system under surveillance.