Computer Or Peripheral Device Patents (Class 703/21)
  • Patent number: 10209962
    Abstract: Mechanisms are provided for generating a new compilable program from an instruction trace. The mechanisms receive a trace file for an original program whose execution on computing hardware has been traced and perform analysis of the trace file to identify a hot function, symbol information corresponding to the hot function, and initialization parameters for the hot function. The mechanisms generate a trace control flow graph based on the identified hot function and the symbol information corresponding to the hot function. The mechanisms identify, based on the trace control flow graph, pathways in the original program to the hot function, represented in the trace file. The mechanisms generate a reconstructed program based on the trace control flow graph, the pathways to the hot function, and the initialization parameters, and output the reconstructed program.
    Type: Grant
    Filed: February 6, 2017
    Date of Patent: February 19, 2019
    Assignee: International Business Machines Corporation
    Inventors: Biplob Mishra, Saritha Vinod
  • Patent number: 10205636
    Abstract: In an example, there is disclosed a computing apparatus, having: one or more logic elements, including at least a processor and a memory, providing a network simulation engine to: periodically perform a network traffic simulation; cache at least one network traffic simulation in a traffic state cache; receive a quest for additional network demand; and compute a network delta based at least in part on a difference between the request for additional network demand and the traffic state cache.
    Type: Grant
    Filed: October 5, 2016
    Date of Patent: February 12, 2019
    Assignee: Cisco Technology, Inc.
    Inventors: John William Evans, Arash Afrakhteh
  • Patent number: 10198277
    Abstract: Techniques are described for facilitating interactions with device driver modules. In at least some situations, the techniques include managing interactions between device driver modules and other programs or hardware devices so as to minimize disruptions related to the device driver modules, including when changes to existing device driver modules are made. Such device driver module changes may have various forms and may occur for various reasons, including to install new versions of device driver modules or otherwise upgrade existing device driver modules. Furthermore, the interactions with device driver modules may be managed in various manners, including to allow changes to occur to a device driver module while that device driver module is in use on a computing system, but without causing other programs on the computing system to be restarted or to lose existing connections to the device driver module being changed.
    Type: Grant
    Filed: January 8, 2016
    Date of Patent: February 5, 2019
    Assignee: Amazon Technologies, Inc.
    Inventor: Fiorenzo Cattaneo
  • Patent number: 10196152
    Abstract: A sensor system and method includes first and second sensing elements, digital sensors, a host computer and a digital bus. The first sensing element is configured to collect first sensor data and the second sensing element is configured to collect second sensor data. The digital sensor includes a controller that is configured to receive the first and second sensor data and process the first sensor data together with the second sensor data to generate processed data. The host computer is configured to receive the processed data from the digital sensor over the digital bus.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: February 5, 2019
    Assignee: Simmonds Precision Products, Inc.
    Inventors: Travis Gang, Peter Carini, Richard Joseph Sopko
  • Patent number: 10197459
    Abstract: A deformation sensing apparatus comprises an elastic substrate, a conductive element, and an additional conductive element. The conductive element includes conductive joints that are separated from each other by resolving elements along a length of the conductive element. Different combinations of conductive joints and resolving elements correspond to different segments of the deformation sensing apparatus. Based on a change in capacitance between a conductive joint and the additional conductive element when a strain is applied to the deformation sensing apparatus, the deformation sensing apparatus generates a signal that allows determination of how the strain deforms the deformation sensing apparatus.
    Type: Grant
    Filed: December 16, 2016
    Date of Patent: February 5, 2019
    Assignee: Facebook Technologies, LLC
    Inventors: Sean Jason Keller, Tristan Thomas Trutna, David R. Perek, Bruce A. Cleary, III, Brian Michael Scally
  • Patent number: 10181991
    Abstract: A system includes a first processor and a second processor coupled to the first processor through a high speed connection and a low speed connection. The first processor and the second processor are disposed within a first device. The first processor and the second processor exchange heartbeat signals therebetween through the low speed connection. The first processor communicates a first reset signal through a reset line to the second processor when the first processor does not receive a first heartbeat signal of the heartbeat signals from the second processor. The second processor resets in response to the first reset signal.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: January 15, 2019
    Assignee: The DIRECTV Group, Inc.
    Inventors: Robin M. Mathews, Henry Derovanessian
  • Patent number: 10169205
    Abstract: Method and system are provided for automated system testing in a complex software environment. The method includes: collecting data during a test run of a product under test that involves multiple systems and resources where a test run introduces one or more product code change sets, the collected data including a product trace of the execution of the product under test at a product code level; and storing the last good collected data. Based on the test failing, comparing a current product trace with a last good product trace; determining a difference between the current and last good traces and identifying a failing product program referenced in the product trace; looking through the introduced product code change sets to determine if a code change is found for the failing program indicating that the error is likely to be in the code change set, and generating an appropriate defect prompt.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: January 1, 2019
    Inventors: Darren R. Beard, Jenny J. He
  • Patent number: 10162654
    Abstract: The transmission of data on computer networks according to one or more policies is disclosed. A policy may specify, among other things, various parameters which are to be followed when transmitting initiating network traffic. Multiple network interfaces may be installed on a server to enable transmission of data from the single server according a number of discrete configuration settings implicated by the various policies. The multiple network interfaces may correspond to separate physical components, with each component configured independently to implement a feature of a policy. The multiple network interfaces may also correspond to a single physical component that exposes multiple network interfaces, both to the network and to the server on which it is installed.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: December 25, 2018
    Assignee: Amazon Technologies, Inc.
    Inventors: Matthew D. Klein, Michael David Marr, Samuel J. McKelvie
  • Patent number: 10162655
    Abstract: In a virtualized computer system operable in more than two hierarchical privilege levels, components of a hypervisor, which include a virtual machine kernel and virtual machine monitors (VMMs), are assigned to different privilege levels. The virtual machine kernel operates at a low privilege level to be able to exploit certain features provided by the low privilege level, and the VMMs operate at a high privilege level to support execution of virtual machines. Upon determining that a context switch from the virtual machine kernel to a VMM is to be performed, the computer system exits the low privilege level, and enters the high privilege level to execute a trampoline that supports context switches to VMMs, such as state changes, and then the VMM. The trampoline is deactivated after execution control is switched to the VMM.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: December 25, 2018
    Assignee: VMware, Inc.
    Inventors: Harvey Tuch, Andrei Warkentin
  • Patent number: 10164841
    Abstract: Systems, methods, and computer readable storage mediums for using a cloud assist service to generate a read-only GUI to view the status of a storage system. An authorized user can login remotely to the cloud assist service to view the read-only GUI of the storage system. The read-only GUI will present a view of the status of the storage system that is similar to a local GUI available to users connecting directly to the storage system. Responses used to generate the local GUI are recorded and simulated by the cloud assist service to create a familiar read-only GUI.
    Type: Grant
    Filed: October 2, 2014
    Date of Patent: December 25, 2018
    Assignee: Pure Storage, Inc.
    Inventors: John Colgrove, Benjamin Borowiec, Joseph S. Hasbani, Emanuel G. Noik
  • Patent number: 10133851
    Abstract: Disclosed herein are a method for constructing an extended R-MO library with mutually exclusive molecular orbital distribution, calculation method of molecular orbital distributing region and a system using the same. The molecular orbital distributing region estimation method using a molecular orbital library with a mutually exclusive orbital distribution can accurately molecular orbital distributing regions in a quantitative manner by means of an extended R-MO library that expresses intrinsic molecular distributing region properties in various patterns. In addition, the coverage of the quantitative molecular orbital distribution estimation method can be extended to the systemic utilization of molecular orbital information in developing materials.
    Type: Grant
    Filed: July 16, 2014
    Date of Patent: November 20, 2018
    Assignee: LG CHEM, LTD.
    Inventors: Seungyup Lee, Hyesung Cho
  • Patent number: 10120738
    Abstract: Guest memory data structures are read by one or more read operations which are set up to handle page faults and general protection faults generated during the read in various ways. If such a fault occurs while performing the one or more read operations, the fault is handled and the one or more read operation is terminated. The fault is handled by either dropping the fault and reporting an error instead of the fault, by dropping the fault and invoking an error handler that is set up prior to performing the read operations, or by forwarding the fault to a fault handler that is setup prior to performing the read operations. If no fault occurs, the read operations complete successfully. Thus, under normal circumstances, no fault is incurred in a read operation on guest memory data structures.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: November 6, 2018
    Assignee: VMware, Inc.
    Inventors: Radu Rugina, Jeffrey W. Sheldon, James S. Mattson, Jr., David Dunn
  • Patent number: 10120435
    Abstract: An integrated circuit device includes a peripheral control circuit configured to receive a low power intent signal from a first processor, and a first control register in the peripheral control circuit. The first control register includes a peripheral enable indicator for each processor that can use a first peripheral. Acknowledgement logic circuitry is configured to assert a first low power acknowledgement signal when the first processor issuing the low power intent signal has enabled use of the first peripheral as indicated by the peripheral enable indicator for the first processor in the first control register.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: November 6, 2018
    Assignee: NXP USA, Inc.
    Inventors: Simon J. Gallimore, Colin MacDonald, James H. Carlquist
  • Patent number: 10102323
    Abstract: Embodiments include systems and methods for optimization of micro-benchmark analysis for microprocessor designs. For example, embodiments seek to generate a suite of micro-benchmarks and associated weighting factors, which can be used to effectively define a weighted aggregate workload condition for a fine-grained (e.g., RTL) simulation in a manner that is a sufficient proxy for predicted commercial workload conditions. The suite of micro-benchmarks can be appreciably more efficient to simulate than the commercial workload, so that using the suite of micro-benchmarks as a proxy for the commercial workload can provide many benefits, including more efficient iterative design.
    Type: Grant
    Filed: October 12, 2016
    Date of Patent: October 16, 2018
    Assignee: Oracle International Corporation
    Inventors: Haowei Zhang, Xiaoying Shen, Sebastian Turullols
  • Patent number: 10095990
    Abstract: The present disclosure relates to methods and systems for developing, implementing, transforming, and governing a business model of an enterprise. In some embodiments, a method of implementing and managing a business model of an enterprise includes defining a business model using a business model tool that is executed by a computer, wherein the business model is based on interrelated business strategy, business goal and business constraint data, and includes a business service, inputting into the computer a first set of data representing a benchmark performance value of the business service, and operating the enterprise in accordance with the business model. The enterprise is monitored to determine an actual performance value of the business service, and the actual performance value and the benchmark performance value are processed in the computer to affect a comparison therebetween. The business model is modified based on the comparison.
    Type: Grant
    Filed: January 24, 2008
    Date of Patent: October 9, 2018
    Assignee: International Business Machines Corporation
    Inventors: Mohammed Farooq, Raghunath Sapuram, Manish Modh, Robert Erickson
  • Patent number: 10095427
    Abstract: A System, Computer program product, and computer-executable method of dynamically modifying data storage resilience within a two tiered data storage system, where the two tiered data storage system includes one or more fast data storage appliances and storage capacity tier wherein the fast data storage appliance is enabled to provide reliable data storage, the System, Computer program product, and computer-executable method including receiving configuration information from a node utilizing the two-tiered data storage system, wherein the configuration information provides characteristics of a job, analyzing the configuration information, updating use of the fast data storage appliances based on the analysis.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: October 9, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: John M. Bent, Sorin Faibish, Sassan Teymouri, James M. Pedone, Jr., Dennis Pei Jean Ting
  • Patent number: 10084643
    Abstract: System and method embodiments are provided for providing customized virtual networks based on SONAC. In an embodiment, a network management entity for providing a customized VN includes a SONAC module executed by a computing device that is connected to a wireless network, the SONAC module configured to receive service requirement data from the wireless network and create a service customized VN according to the service requirement data, the service requirement data describing one or more service requirements, wherein the SONAC module comprises an interface to interact with: an SDT component, the SDT component used by the SONAC module to determine a service customized logical topology; an SDRA component that maps the logical topology to physical network resources within the wireless network; and a SDP component that determines an end-to-end data transport protocol for communication between a first device and a second device via the wireless network.
    Type: Grant
    Filed: November 26, 2015
    Date of Patent: September 25, 2018
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Hang Zhang, Xu Li, Nimal Gamini Senarath, Sophie Vrzic, Ngoc-Dung Dao, Hamidreza Farmanbar
  • Patent number: 10068091
    Abstract: Systems and methods for malware containment on connection is provided. In exemplary embodiments, a malware containment method is described that performs a number of operations. The method involves redirecting network data received over a communication network to a virtual machine. The virtual machine is configured to simulate functionality of a digital device. Furthermore, the method involves analyzing of the redirected network data that including analyzing a response of the virtual machine to processing of the network data within the virtual machine to identify a malware attack. Thereafter, the method involves continuing to redirect the network data for processing by the virtual machine until expiration of a predetermined period of time without detection of malware, or continuing to redirect the network data for processing by the virtual machine beyond the predetermined period of time when malware is detected.
    Type: Grant
    Filed: November 23, 2015
    Date of Patent: September 4, 2018
    Assignee: FireEye, Inc.
    Inventors: Ashar Aziz, Wei-Lung Lai, Jayaraman Manni
  • Patent number: 10055216
    Abstract: Apparatus and methods for updating binary images are described. A computing device can determine transfers for updating a binary source image to become a binary target image. A transfer can include a source memory reference for the source image and a target memory reference for the target image. The computing device can determine a graph based on ordering dependencies between the transfers. The graph can include vertices for the transfers with edges between vertices. The computing device can generate an edge from a first vertex for a first transfer to a second vertex for a second transfer, with the first transfer to be performed before the second transfer. The computing device can break any cycles present in the graph to obtain an acyclic graph. The computing device can order the transfers based on the acyclic graph and send the ordered transfers in an update package for the source image.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: August 21, 2018
    Assignee: Google LLC
    Inventor: Douglas Earl Zongker
  • Patent number: 10038744
    Abstract: A method includes (a) receiving workload data for a data storage system, the data storage system having a plurality of processing cores, the data storage system being configured to operate according to any of a plurality of profiles, each of the plurality of profiles having a respective assignment of respective cores of the plurality of cores to particular storage roles of the data storage system, (b) for each profile of the plurality of profiles, simulating operation of the data storage system running a workload based on the received workload data using the assignment of respective cores of the plurality of cores to particular storage roles for that profile, thereby producing a set of utilization scores, (c) selecting a profile of the plurality of profiles based on the set of utilization scores, and (d) outputting an indication of the selected profile for use by the data storage system.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: July 31, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Hagay Dagan, Ilies Idrissi, Dan Aharoni, Gil Ratsaby, Sergey Rytenkov
  • Patent number: 10031838
    Abstract: Embodiments of the present invention provide methods, systems, and computer program products for building an environment. Embodiments of the present invention can be used to allocate resources and build an environment such that the environment is built when a user is prepared to test one or more portions of code in the environment. Embodiments of the present invention can be used to reduce the “lag time” developers experience between waiting for the code to be built and for resources to be provisioned, and can also provide a less costly alternative to maintaining and operating dedicated environments.
    Type: Grant
    Filed: May 13, 2016
    Date of Patent: July 24, 2018
    Assignee: International Business Machines Corporation
    Inventors: Jason A. Collier, David L. Leigh, Yi-Hsiu Wei, Scott A. Will
  • Patent number: 10019072
    Abstract: An approach is provided in which an information handling system detects fingertip movements of a user based on an imaginary grid imagined by the user. The information handling system determines a key entry or control request based upon matching the fingertip movements to fingertip movement patterns corresponding to the imaginary grid. In turn, the information handling system displays characters on a wearable computing device or performs actions based on the control requests.
    Type: Grant
    Filed: January 1, 2016
    Date of Patent: July 10, 2018
    Assignee: International Business Machines Corporation
    Inventors: Inseok Hwang, Su Liu, Cheng Xu, Quan W. Zhang
  • Patent number: 10019394
    Abstract: A data processing apparatus has a plurality of processors and a plurality of interrupt interfaces each for handling interrupt requests from a corresponding processor. An interrupt distributor controls routing of interrupt requests to the interrupt interfaces. A shared interrupt request is serviceable by multiple processors. In response to the shared interrupt request, a target interrupt interface issues an interrupt ownership request to the interrupt distributor, without passing the shared interrupt request to the corresponding processor, if it estimates that the corresponding processor is available for servicing the shared interrupt request. The shared interrupt request is passed to the corresponding processor when an ownership confirmation is received from the interrupt distributor indicating that the processor has been selected for servicing the shared interrupt request.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: July 10, 2018
    Assignee: ARM Limited
    Inventors: Michael Alexander Kennedy, Anthony Jebson
  • Patent number: 10013335
    Abstract: A program control flow trace is obtained from a processor trace module, which may be hardware based, and is used, in combination with debug information and information from dissassembly of basic blocks, to identify candidate store instruction(s) which produced a memory corruption. The candidate store instruction(s) and links to a software program may be used to further debug the memory corruption and/or to instrument the software program to identify basic block(s) which produced the memory corruption in future executions of the compiled software program and/or to track debugging of the software program.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: July 3, 2018
    Assignee: Intel Corporation
    Inventor: Andreas Kleen
  • Patent number: 9990184
    Abstract: A distributed component model for creating a scalable and available distributed application is disclosed. The distributed component model provides for an application schema to be declaratively defined to include a module having a component. The schema includes a corresponding definition construct in a technology agnostic manner. The corresponding definition construct is declaratively defined to include metadata to control scaling and availability.
    Type: Grant
    Filed: March 25, 2011
    Date of Patent: June 5, 2018
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Dharma Shukla, Akash Jeevan Sagar, Nathan C. Talbert, Muthukaruppan Annamalai, Robert B. Schmidt, Aditya Bhandarkar, Asad Jawahar
  • Patent number: 9983795
    Abstract: Described are techniques for determining data storage system configurations. Inputs are provided to a data storage system configuration generator. The inputs include first inputs and second inputs. The first inputs include a performance objective, a storage capacity, and input(s) characterizing an I/O workload. The second inputs characterize performance of data storage system components and costs of the data storage system components. First processing is performed by the data storage system configuration generator in accordance with the inputs to determine a set of one or more candidate data storage system configurations. The data storage system configuration selects, in accordance with one or more criteria, a first candidate data storage system configuration from the set.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: May 29, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Amnon Naamad, Kuram T. Narayana, Ron Bigman, Anurag S. Maunder
  • Patent number: 9971615
    Abstract: In one embodiment, a predefined behavior of a virtual machine monitor (VMM) with respect to one or more virtual machines (VMs) is identified, and processor-managed resources associated with the one or more VMs are utilized based on the predefined behavior of the VMM.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 15, 2018
    Assignee: Intel Corporation
    Inventors: Steven M. Bennett, Andrew V. Anderson, Stalinselvaraj Jeyasingh, Alain Kagi, Gilbert Neiger, Richard Uhlig, Xiang Zou, Lawrence Smith, III, Scott Rodgers
  • Patent number: 9952103
    Abstract: A computer-implemented method for evaluating cooling performance of equipment in a data center. In one aspect, the method comprises receiving data related to equipment in the data center, determining first parameters related to airflow and temperature in the data center at a first period in time, receiving a description of a transient event affecting one of airflow and temperature in the data center at a second time, breaking a second time period subsequent to the second time into a plurality of time intervals, determining second parameters related to airflow in the data center during one of the time intervals, determining the parameters related to temperature in the data center at each of the time intervals based on the second parameters related to airflow, and storing, on a storage device, a representation of the parameters related to temperature in the data center during the second time period.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: April 24, 2018
    Inventors: James William VanGilder, Christopher M. Healey, Xuanhang Zhang
  • Patent number: 9952887
    Abstract: A secure mode of a computer system is used to provide simulated devices. In operation, if an instruction executing in a non-secure mode accesses a simulated device, then a resulting exception is forwarded to a secure monitor executing in the secure mode. Based on the address accessed by the instruction, the secure monitor identifies the device and simulates the instruction. The secure monitor executes independently of other applications included in the computer system, and does not rely on any hardware virtualization capabilities of the computer system.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: April 24, 2018
    Assignee: VMware, Inc.
    Inventors: Andrei Warkentin, Harvey Tuch
  • Patent number: 9946819
    Abstract: Buffer credits are starved upon a storage area network (SAN) switch. The starved buffer credit restricts a SAN switch buffer and enables a smaller load to stress the SAN switch, effectively emulating a larger load. Credit starvation may partially inhibit a SAN switch from delivering frames resulting in the filling of the SAN switch buffer and corresponding computational stress. The emulated load allows for all ports of a SAN switch to be simultaneously tested without the need or expense of a large number computing devices stressing the SAN. The SAN switch may be located within a test SAN environment or may be located in a functioning SAN environment to determine SAN bottlenecks prior to critical loading.
    Type: Grant
    Filed: January 6, 2015
    Date of Patent: April 17, 2018
    Assignee: International Business Machines Corporation
    Inventors: Tara Astigarraga, Louie A. Dickens, Michael E. Starling, Daniel J. Winarski
  • Patent number: 9921842
    Abstract: A method for translating instructions for a processor. The method includes accessing a plurality of guest instructions that comprise multiple guest branch instructions comprising at least one guest far branch, and building an instruction sequence from the plurality of guest instructions by using branch prediction on the at least one guest far branch. The method further includes assembling a guest instruction block from the instruction sequence. The guest instruction block is translated to a corresponding native conversion block, wherein an at least one native far branch that corresponds to the at least one guest far branch and wherein the at least one native far branch includes an opposite guest address for an opposing branch path of the at least one guest far branch. Upon encountering a missprediction, a correct instruction sequence is obtained by accessing the opposite guest address.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: March 20, 2018
    Assignee: Intel Corporation
    Inventor: Mohammad Abdallah
  • Patent number: 9910158
    Abstract: A Global Navigation Satellite System (GNSS) chipset embedded within the cellular device is accessed. The GNSS chipset calculates raw observables that include raw pseudoranges and carrier phase information. The raw observables are extracted from the GNSS chipset for processing elsewhere in the cellular device outside of the GNSS chipset. Smoothed pseudoranges are provided by smoothing the raw pseudoranges based on the carrier phase information. The accessing, the extracting and the providing are performed by one or more hardware processors located in the cellular device and outside of the GNSS chipset.
    Type: Grant
    Filed: May 2, 2014
    Date of Patent: March 6, 2018
    Assignee: Trimble Inc.
    Inventors: Richard Rudow, Robert Wold, Venkateswaran Kasirajan, Nicholas C. Talbot, Peter Van Wyck Loomis, Shawn D. Weisenburger, James M. Janky
  • Patent number: 9892549
    Abstract: Systems, methods and articles of manufacture for rendering an image. Embodiments include selecting a plurality of positions within the image and constructing a respective linear prediction model for each selected position. A respective prediction window is determined for each constructed linear prediction model. Additionally, embodiments render the image using the linear prediction models using the constructed linear prediction models, where at least one of the constructed linear prediction models is used to predict values for two or more of a plurality of pixels of the image, and where a value for at least one of the plurality of pixels is determined based on two or more of the constructed linear prediction models.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: February 13, 2018
    Assignee: Pixar
    Inventors: Kenneth Mitchell, Bochang Moon, Jose A. Iglesias-Guitian
  • Patent number: 9880917
    Abstract: Methods and systems may provide for detecting an event external to a plurality of virtual machines running on one or more physical machines and determining that the event corresponds to one or more error conditions associated with at least one particular virtual machine in the plurality of virtual machines. Additionally, an alert may be generated in response to at least one of the one or more error conditions. In one example, detecting the event includes detecting an emulated device interrupt associated with the at least one particular virtual machine.
    Type: Grant
    Filed: September 1, 2015
    Date of Patent: January 30, 2018
    Assignee: International Business Machines Corporation
    Inventors: Dale M. Schultz, Radhika Sohoni, Esmond P. Walshe
  • Patent number: 9871729
    Abstract: A non-transitory computer program product with computer readable program code for system detection and flow control. The throughput and response time of the system are acquired, where the throughput reflects the number of requests from outside the system that has been processed by the system. The response time reflects time required by the system to process requests from outside the system. Acquiring throughput and response time includes directly sampling the throughput and the response time of the system; and conducting noise filtering on the sampled throughput and response time. A system performance characteristic parameter based on the filtered throughput and response time is obtained and is used to describe congestion condition of the system to determine whether there is a bottleneck in the system. Detecting a bottleneck and flow control is provided in a simple and effective way to ensure that requests are processed in time.
    Type: Grant
    Filed: July 6, 2016
    Date of Patent: January 16, 2018
    Assignee: International Business Machines Corporation
    Inventors: Ren Shi Luo, Asser N. Tantawi, Hai Shan Wu
  • Patent number: 9871889
    Abstract: Described are techniques for processing command requests. A plurality of requests are issued from a client to a server. The server has a current configuration. Each of the plurality of requests requests a portion of current configuration information describing the current configuration of the server. Response are sent from the server to the client. Each response includes a portion of the current configuration information describing the current configuration of the server. A first set of configuration files is determined in accordance with portions of the current configuration information included in the responses. The client services a second plurality of command requests using a simulator by processing the second set of command requests in accordance with a simulation mode and the first set of one or more configuration files.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: January 16, 2018
    Assignee: EMC IP Holing Company LLC
    Inventor: Gev F. Daruwalla
  • Patent number: 9858363
    Abstract: Methods, systems, and computer programs, for estimating think times. One of the methods includes receiving a request to perform a test of one or more computing resources. The test of the one or more computing resources is performed by simulating an interaction of one or more simulated users with the one or more computing resources. Requests are submitted from the simulated user for execution by the one or more computing resources. Respective response times of the one or more computing resources to each of the requests are measured. An estimated think time of the simulated user is computed, wherein the estimated think time is computed based on at least one preceding response time.
    Type: Grant
    Filed: April 7, 2014
    Date of Patent: January 2, 2018
    Assignee: VMware, Inc.
    Inventors: Uday Kurkure, Hari Sivaraman
  • Patent number: 9853941
    Abstract: Systems and methods are described for conducting work flows by an SIEM device to carry out a complex task automatically. According to one embodiment, an SIEM device may create a work flow that includes multiple security tasks that are performed by one or more security devices. When a security event is captured or the work flow is scheduled to be executed, the SIEM device starts the work flow by scheduling the security tasks defined in the work flow. The SIEM device then collects results of security tasks performed by the one or more security devices.
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: December 26, 2017
    Assignee: Fortinet, Inc.
    Inventor: Dong Liang
  • Patent number: 9847965
    Abstract: A pluggable asset detection engine is used to identify devices within a network. The pluggable asset detection engine includes a set of pluggable discovery sensors and is adapted to identify particular address information of a particular computing device within a network, using a first pluggable discovery sensor in the set of discovery sensors, and send an identification of the particular address information of the particular computing device to an asset management system for inclusion of the particular address information in an asset repository managed by the asset management system.
    Type: Grant
    Filed: June 2, 2015
    Date of Patent: December 19, 2017
    Assignee: McAfee, LLC
    Inventors: James Michael Hugard, IV, Robin Keir, Joshua Cajetan Rebelo, Ofir Arkin, Sven Schrecker
  • Patent number: 9841960
    Abstract: According to one aspect of the present disclosure, a method comprises receiving a command to load first compiled program code for execution by a processor. The first compiled program code is decompiled to generate source code. The source code is compiled to generate second compiled program code, the second compiled program code comprising information associated with the source code. The second compiled program code is provided to a debugger.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: December 12, 2017
    Assignee: CA, Inc.
    Inventor: Jean David Dahan
  • Patent number: 9836342
    Abstract: An application alerting system includes a computing system that executes an application alerting service monitor at least one of multiple computing resources configured in a computing infrastructure to determine whether the one monitored computing resource experiences a failure. When a failure is detected, the service transmits a failure notification to applications associated with the failed monitored computing resource such that the application may perform at least one remedial action according to the received failure notification.
    Type: Grant
    Filed: September 5, 2014
    Date of Patent: December 5, 2017
    Assignee: VCE IP Holding Company LLC
    Inventors: Akshaya Mahapatra, Michael Tan, Rahul Talekar
  • Patent number: 9838416
    Abstract: A computer worm containment system comprises a detection system and a blocking system. The detection system orchestrates a sequence of network activities in a decoy computer network and monitors that network to identify anomalous behavior and determine whether the anomalous behavior is caused by a computer worm. The detection system can then determine an identifier of the computer worm based on the anomalous behavior. The detection system can also generate a recovery script for disabling the computer worm or repairing damage caused by the computer worm. The blocking system is configured to use the computer worm identifier to protect another computer network. The blocking system can also use the recovery script to disable a computer worm within the other network and to repair damage caused to the network by the worm.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: December 5, 2017
    Assignee: FireEye, Inc.
    Inventor: Ashar Aziz
  • Patent number: 9817779
    Abstract: A redirected USB device that does not fall within well-defined device-classes requires special treatment as redirection software will not always permit the servicing of universal serial bus request blocks (URB) on the same thread that the URBs are received. This results in the redirected USB device not functioning properly. A virtual USB bus driver may intercept the URBs so that a temporary kernel buffer can be created. The temporary kernel buffer stores the data necessary for processing the URBs. The temporary kernel buffer is queued along with the URB so that regardless of the thread for processing the URB, the data associated with the URB is preserved so that the vendor-specific application at the client may properly service any request.
    Type: Grant
    Filed: August 24, 2015
    Date of Patent: November 14, 2017
    Assignee: Dell Products L.P.
    Inventor: Gokul Thiruchengode Vajravel
  • Patent number: 9811070
    Abstract: A test case is executed on a product using a hardware machine, the product being configured in manufacturing according to a configuration, the test case being related to an estimation function. A set of data points resulting from the executing is collected. Using the estimation function, an estimated time needed for the executing is computed. Using the set of data points, an actual time used for the executing is computed. A determination is made whether a difference between the estimated time and the actual time is within a tolerance. Responsive to the difference not being within the tolerance, the estimation function is adjusted using the set of data points and at least one other set of data points, the other set of data points being generated by executing the test case on a second product configured according to a second configuration at a previous time.
    Type: Grant
    Filed: August 8, 2014
    Date of Patent: November 7, 2017
    Inventors: David Monczynski, Kaoru Stabnow, Jason Yue
  • Patent number: 9804943
    Abstract: Implementations of the present disclosure provide computer-implemented methods including defining a workload comprising a plurality of service requests, each service request corresponding to a class of a plurality of classes, applying the workload to a computer system that receives and processes service requests, measuring a response time of the computer system for each request of the workload, estimating a mean service demand for each class based on the response times and a base queuing model that represents the computer system, and generating the queuing model based on the mean service demands and characteristics of the workload.
    Type: Grant
    Filed: October 16, 2009
    Date of Patent: October 31, 2017
    Assignee: SAP SE
    Inventors: Stephan Kraft, Sergio Pacheco-Sanchez, Giuliano Casale, Stephen Dawson
  • Patent number: 9798664
    Abstract: Provided method includes storing a first cache snap shot including cache profiling information regarding a cache when a first process being executed by a cycle accurate simulator is terminated; storing a second cache snap shot including the cache profiling information on the cache when a second process is executed in the cycle accurate simulator; comparing the second cache snap shot of the second process and the first cache snap shot of the first process to readjust any one value of a cache hit value and a cache miss value which are present in the second cache snap shot of the second process; and correcting the cache profiling information which is stored in the first cache snap shot of the first process by reflecting the readjusted any one value of the cache hit value and the cache miss value present in the second cache snap shot of the second process.
    Type: Grant
    Filed: March 12, 2014
    Date of Patent: October 24, 2017
    Inventors: Jin-seok Lee, Tai-song Jin
  • Patent number: 9794145
    Abstract: In one embodiment, a device in a network monitors performance data for a first predictive model. The first predictive model is used to make proactive decisions in the network. The device maintains a supervisory model based on the monitored performance data for the first predictive model. The device identifies a time period during which the supervisory model predicts that the first predictive model will perform poorly. The device causes a switchover from the first predictive model to a second predictive model at a point in time associated with the time period, in response to identifying the time period.
    Type: Grant
    Filed: January 7, 2015
    Date of Patent: October 17, 2017
    Assignee: Cisco Technology, Inc.
    Inventors: Jean-Philippe Vasseur, Sukrit Dasgupta, Grégory Mermoud
  • Patent number: 9785485
    Abstract: Embodiments of apparatuses and methods for processing virtualization events in a layered virtualization architecture are disclosed. In one embodiment, an apparatus includes a event logic and evaluation logic. The event logic is to recognize a virtualization event. The evaluation logic is to determine whether to transfer control from a child guest to a parent guest in response to the virtualization event.
    Type: Grant
    Filed: July 27, 2005
    Date of Patent: October 10, 2017
    Assignee: Intel Corporation
    Inventors: Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Dion Rodgers, Richard A. Uhlig, Lawrence O. Smith, Barry E. Huntley
  • Patent number: 9778315
    Abstract: A testbench for testing a device under test (DUT), wherein the testbench has a verification environment including a reference model, a scoreboard and a customized agent for each interface that the DUT needs to receive input from and/or transmit output on. The testbench system is able to be generated by a testbench builder that automatically creates a scoreboard, a reference model, a dispatcher and generic agents including generic drivers, loopback ports, sequencers and/or generic monitors for each interface and then automatically customize the generic agents based on their corresponding interface such that the agents meet the requirements of the interface for the DUT.
    Type: Grant
    Filed: February 9, 2015
    Date of Patent: October 3, 2017
    Assignee: Cavium, Inc.
    Inventors: Nimalan Siva, Keqin Kenneth Han, Saurin Patel, Mohan Balan
  • Patent number: 9772867
    Abstract: Embodiments relate to a control area for managing multiple threads in a computer. An aspect is a computer system that includes a virtual machine (VM) configuration with one or more cores. Each core is enabled to operate in a single thread (ST) mode or a multithreading (MT) mode. The ST mode consists of a single thread and the MT mode consists of a plurality of threads on shared resources of a respective core. The computer system includes a core-oriented system control area (COSCA) having a common area representing all of the cores of the VM configuration and separate core description areas for each of the cores in the VM configuration. Each core description area indicates a location of one or more thread description areas each representing a thread within the respective core, and each thread description area indicates a location of a state description of the respective thread.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: September 26, 2017
    Inventors: Jonathan D. Bradbury, Fadi Y. Busaba, Mark S. Farrell, Charles W. Gainey, Jr., Dan F. Greiner, Lisa Cranton Heller, Jeffrey P. Kubala, Damian L. Osisek, Donald W. Schmidt, Timothy J. Slegel