Abstract: Systems and methods are provided for loop escape analysis in executing computer instructions. In one embodiment, a method comprises instructions performed by at least one computer process. The method comprises receiving a set of executable computer instructions stored on a storage medium (e.g., by reading the instructions from a tangible, non-transitory storage medium). The method further comprises analyzing the computer instructions to determine a loop, analyzing the computer instructions to determine at least one new variable in the loop, and storing, in a data structure, at least one of an operation related to the variable or a value related to the variable. The method further comprises determining whether to compress the data structure upon reaching the end of the loop, and, based on the determination, compressing the data structure. Systems and computer-readable media are also provided.

Abstract: A route generator includes: a conversion unit configured to generate virtual road information in which a shape of a road has been converted into a rectilinear shape on the basis of map information including information indicating the shape of the road; a traveling path generating unit configured to generate a traveling path of a host vehicle on the road having the rectilinear shape in the virtual road information generated by the conversion unit; and an inverse conversion unit configured to generate a traveling path of the host vehicle in the shape of the road which has not been converted into the rectilinear shape by the conversion unit by performing inverse conversion of the conversion performed by the conversion unit on the traveling path of the host vehicle generated on the road having the rectilinear shape by the traveling path generating unit.

Abstract: Systems and methods are provided for channel estimation using linear phase estimation. These systems and methods enable improved channel estimation by estimating a linear channel phase between received pilot subcarrier signals. The estimated linear phase can then be removed from the received pilot subcarrier signals. After the estimated linear phase is removed from the received pilot subcarrier signals, a channel response can be estimated. A final estimated channel response can be generated by multiplying the results of the linear channel estimation by the estimated linear phase.

Abstract: A specified function p is generated to satisfy a first condition that an integral value of an evaluation function over a specified period is minimal. The evaluation function denotes a magnitude of an absolute value of a third order specified function p(3)(t). Moreover, the specified function p is generated to satisfy a second condition that a value of a second order specified function p(2)(t) is limited within a limiter range [p(2)min_c, p(2)max_c].

Abstract: There is provided an information processing apparatus. A multidimensional input vector is input. For each dimension of the input vector, a function value of a single-variable function with an element of the dimension as a variable is derived, by referring to a lookup table indicating a correspondence between a variable and a function value of the single-variable function. A product of the single-variable functions approximates a function value of a multiple-variable function. For each dimension of the input vector, a product of the function value derived by the derivation unit and a predetermined coefficient corresponding to the dimension is calculated. A value calculated using the total of the products calculated by the product calculation unit for each dimension of the input vector is output as a classification index indicating a class of the input vector.

Abstract: A segment including a set of blocks necessary to calculate blocks having internal states and blocks having no outputs is extracted by tracing from blocks for use in calculating inputs into the blocks having internal states and from the blocks having no outputs in the reverse direction of dependence. To newly extract segments in which blocks contained in the extracted segments are removed, a set of nodes to be temporarily removed is determined on the basis of parallelism. Segments executable independently of other segments are extracted by tracing from nodes whose child nodes are lost by removal of the nodes in the upstream direction. Segments are divided into upstream segments representing the newly extracted segments and downstream segments representing nodes temporarily removed. Upstream and downstream segments are merged so as to reduce overlapping blocks between segments such that the number of segments is reduced to the number of parallel executions.

Abstract: Systems and methods are provided for channel estimation using linear phase estimation. These systems and methods enable improved channel estimation by estimating a linear channel phase between received pilot subcarrier signals. The estimated linear phase can then be removed from the received pilot subcarrier signals. After the estimated linear phase is removed from the received pilot subcarrier signals, a channel response can be estimated. A final estimated channel response can be generated by multiplying the results of the linear channel estimation by the estimated linear phase.

Abstract: In an embodiment, hardware implementing a transcendental or other non-linear function is based on a series expansion of the function. For example, a Taylor series expansion may be used as the basis. One or more of the initial terms of the Taylor series may be used, and may be implemented in hardware. In some embodiments, modifications to the Taylor series expansion may be used to increase the accuracy of the result. In one embodiment, a variety of bit widths for the function operands may be acceptable for use in a given implementation. A methodology for building a library of series-approximated components for use in integrated circuit design is provided which synthesizes the acceptable implementations and tests the results for accuracy. A smallest (area-wise) implementation which produces a desired level of accuracy may be selected as the library element.

Abstract: A reusable expression graph system and method that generates reusable expression graphs that can be used with potentially different input parameters in order to achieve computational efficiency and ease of programming. Reusable expression graph mitigate the need to rebuild an expression for each new value. This is achieved in part by creating a node called a “parameter node.” The parameter node acts as a generic placeholder for a leaf node in the expression graph. In addition, the parameter node acts as a proxy for a bindable term of the leaf node, and the bindable term can be either a value or one or more additional expressions. The parameter node then is bound to the bindable term and the expression is evaluated with that bindable term instead of the placeholder. The parameter node created by embodiments of the reusable expression graph system and method works across many different programming languages.

Abstract: The application of finite differences methods to solve boundary value problems typically involves a discretization of such a problem across an orthogonal array of discrete grid points. This leads to an array of difference equations which is solved numerically within the constraints of the boundary conditions to yield solutions at the grid point locations. However, the accuracy of the solutions is limited with conventional finite differences methods when the boundary conditions are not represented exactly within the orthogonal array of discrete grid points, as when the boundary conditions are curved or slanted surfaces. The invention described herein provides finite differences methods for solving boundary value problems more accurately than with conventional finite differences methods, particularly when curved or slanted boundary surfaces correspond to terminations of a known analytical function.

Abstract: A system and method for displaying data provided by a sensor in Polar coordinates on a raster scan device operating in Cartesian coordinates. Cartesian coordinates for display points on said raster scan device are converted to corresponding Polar coordinates, and sensor data values for said Polar coordinates are fetched for display on said raster scan device. The coordinates are converted by differentiating the equations mapping Polar coordinates to Cartesian coordinates, and solving the differential relationships using a suitable integration method. Preferable the integration method is a Midpoint method. In order to avoid divisions and speed up the conversion process, synthetic division in Newton-Ralphson iteration is used instead.

Abstract: A specified function p is generated to satisfy a first condition that an integral value of an evaluation function over a specified period is minimal. The evaluation function denotes a magnitude of an absolute value of a third order specified function p(3)(t). Moreover, the specified function p is generated to satisfy a second condition that a value of a second order specified function p(2)(t) is limited within a limiter range [p(2)min_c, p(2)max_c].

Abstract: Systems and methods for calculating the Lyapunov exponent of a chaotic system are described. In one particular embodiment, a Lyapunov exponent calculating method includes obtaining a value indicative of a condition of a chaotic system and assigning the value to first and second precision levels, the second precision level having a higher level of precision than the first precision level. The method also includes iterating the chaotic system over time and comparing the value at the first precision level with the value at the second precision level. From the comparison of values at the first and second precision levels, the method calculates the Lyapunov exponent for the chaotic system.

Abstract: A system and method identifies data peaks representative of empirical data of a sample. The system and method assign a grammar type to correspond to data points represented on a data plot such as a chromatogram and identify the presence of a peak syntax based on an analysis of the grammar element types assigned to the data points of the chromatogram.

Abstract: Disclosed is a method for measuring change in closed system, characterized in that, (the thesis): the partial differential equation the closed system ƒ(z) as a substitution or map onto a fixed point space such as closed band gap J, ƒ(z):J?J gives g=ƒ(g) if g ?J, if this partial differential equation ƒ(z) contains the partial derivatives of a function system in several variables ƒ(z)=ƒ(N,T,E, ?E/?N, ?E/?T, . . . ) such as function E(N,T) in two independent variables, could be on a closed pathway. ? Initial Final .

Abstract: A system, method and chip for transforming data through a Rung-Kutta integration of a single point on a plane defined by X, Y, and Z values along X, Y and Z axes from a travel time data volume. The system includes at least one memory bank and at least one alternate memory bank and at least one single cycle Runge-Kutta travel time generator in communication with the memory banks. The single cycle Runge-Kutta travel time generator reads data from the at least one memory bank, and transforms the data by performing a Runge-Kutta integration on points of a plane defined by X, Y, and Z values along X, Y and Z axes in a travel time data volume and slowness data to generate another plane of values with the integration carried forward by a half step; and writes the data back to the at least one alternate memory bank.

Abstract: A second derivative of a second-order differential equation is calculated at a reference variable value. The second derivative is multiplied by an analytical small variable value, the first derivative at the reference variable value is added, and a result is output as a first derivative after an increment of the analytical small variable value. The first derivative after an increment of the analytical small variable value is multiplied by the analytical small variable value, a physical value at the reference variable value is added, and a result is output as a physical value after an increment of the analytical small variable value.

Abstract: In order to cause a computer to execute integral calculation of an integrand, to thereby calculate a value of a second variable used at each calculation time point, the integrand being defined by: a first variable to which a value is given at all calculation time points; and the second variable to which only an initial value is given, the following processing is executed. First, a partial derivative which is obtained by partially differentiating the integrand for the second variable is read out from a storage device. At each calculation time point, the initial value or a value of the second variable calculated at a last calculation time point and a value of the first variable given at a current calculation time point are substituted into each of the integrand and the partial derivative, to thereby calculate a value of the integrand and a value of the partial derivative at the current calculation time point.

Abstract: Provided is a deterministic component model determining apparatus that determines a type of a deterministic component included in a probability density function supplied thereto, comprising a standard deviation calculating section that calculates a standard deviation of the probability density function; a spectrum calculating section that calculates a spectrum of the probability density function; a null frequency detecting section that detects a null frequency of the spectrum; a theoretical value calculating section that calculates a theoretical value of a spectrum for each of a plurality of predetermined types of deterministic components, based on the null frequency; a measured value calculating section that calculates a measured value of the spectrum for the deterministic component included in the probability density function, based on the standard deviation and the spectrum; and a model determining section that determines the type of the deterministic component included in the probability density function

Abstract: The invention includes a novel differentiator cell, a novel resample unit cell, and precision synchronization circuitry to ensure proper timing of the circuits and systems at the anticipated ultra-high speed of operation. The novel differentiator cell includes circuitry for combining a carry input signal, a data bit signal and the output signal of a NOT cell and applying the signals as distinct and separate pulses to the input of a toggle flip-flop (TFF) for producing an asynchronous carry output and a clocked data output. The novel differentiator cells can be interconnected to form a multi-bit differentiator circuit using appropriate delay and synchronization circuitry to compensate for delays in producing the carry output of each cell which is applied to a succeeding cell.

Abstract: A system and method for decimating a digital signal is disclosed. The system includes an input to receive digital data, a control input to receive a desired decimation rate, and an integrator stage responsive to the input. The system also includes a variable rate down sampling module responsive to the integrator stage and a differentiator stage responsive to the variable rate down sampling module. The down sampling module has a decimation rate that is dynamically adjustable based on the desired decimation rate.

Abstract: A circuit includes a signal processing circuit for accepting an input and for generating a set of outputs. The input is provided in an input range that has a set of representative values, and each output represents a measure of an association of the input with one or more of the representative values. The signal processing circuit includes a group of output sections, each output section being responsive to the input of the signal processing circuit. Each output section includes one or more sigmoid generators. Each sigmoid generator is responsive to an input of the output section to generate an output that represents a sigmoid function of the input of the output section. Each output section also includes a circuitry for combining the outputs of the one or more sigmoid generators to form one of the set of outputs of the signal processing circuit. An input transformation circuit is coupled to the plurality of output sections.

Abstract: A method for detecting steady-state convergence of noisy or noise free signal comprising the steps of calculating derivative of signal input, calculating the tan inverse of the ratio of positive and negative derivatives and validation of establishment of steady state from the arctan value thereof.

Abstract: A graphing calculator includes: a touchscreen display unit having a formula display area and a graph display area; a formula input section configured to receive a calculation formula; a formula display control section configured to control the touchscreen display unit to display the calculation formula in the formula display area; a formula drag determining section configured to determine whether the calculation formula is dragged to the graph display area; a function calculating section configured to perform a calculation corresponding to a type of a function included in the calculation formula; a range setting section configured to set coordinate ranges to be used for generating a graph image; and a graph display control section configured to generate a graph image corresponding to the calculation formula and the calculation result according to the coordinate ranges.

Abstract: Methods, apparatus, and articles of manufacture for performing calculations using reduced-width data are disclosed. In particular, an example method determines reduced-width data values associated with generating and evaluating functions. Some of the reduced-width data values are stored within instructions in an instruction memory during a compile phase and retrieved from instruction memory during a runtime phase.

Abstract: The symbolic differentiation technique described herein uses operator overloading and two simple recursive procedures, both the forward and reverse forms of differentiation, to create purely symbolic derivatives. The symbolic derivative expressions can be translated into a program in an arbitrary source language, such as C# or C++, and this program can then be compiled to generate an efficient executable which eliminates much of the interpretive overhead normally encountered in automatic differentiation.

Abstract: The derivative of a noise-containing input signal is determined by using an aliased derivative to periodically reset a filtered version of a normally determined derivative. The aliased derivative is calculated using a slower update or sampling rate than the normally determined derivative, and the filtered version of the normally determined derivative is reset to a reset value at each update of the aliased derivative. The reset value is based on a weighted sum of the aliased derivative and the filter output. The periodically reset filter output closely follows an idealized derivative of the input signal, substantially eliminating the phase delay introduced by conventional filtering.

Abstract: This disclosure describes techniques for determining a shape of a signal. In particular, a kernel is applied to a portion of a signal to compute at least a first, first order derivative of the portion of the signal and a second, first order derivative of the portion of the signal in a single pass of the kernel. The shape of the portion of the signal is determined based on the first and second first order derivatives. In one example, the shape of the portion of the signal is determined based on the ratio of the first, first order derivative and the second, first order derivative. These techniques may be particularly effective for detecting edges within image signals. However, the techniques may be used to detect the shape of significant changes within any signal that represents a variable that is changing over time, space or other dimension.

Abstract: An innovative method is taught for accelerating the simulation rate of differential equation systems having behavior piece-wise continuous in both value and time. Specifically, a system of differential equations representing the behavior of a physical system comprised of electronic, optical, or mechanical components may be simulated more rapidly using this method. The method utilizes incremental and iterative reconfiguration of digital logic wherein each configuration of the logic operates to yield a unique future value or range of values for each time-varying state variable within a system of equations representing a linear approximation of the original differential equation system for state variable values defined initially or at the onset of an iteration. Various configurations of the digital logic may be pre-computed or computed on demand, optionally caching such configurations for subsequent reuse.

Abstract: A method and system for analyzing time series data. In an embodiment, a loop is executed and terminated upon a specified maximum number of iterations of the loop being performed or upon a difference between scores in successive iterations of the loop not being greater than a specified tolerance, wherein the score in each iteration is calculated as function of an absolute value of a difference between respective cumulative probability values of first and second cumulative probability distributions which are generated from respectively first and second time series data sets. In an embodiment, time series data is processed in a sequence of time periods, wherein a combined cumulative probability distribution is generated in each time period by combining a cumulative probability distribution of new time series data with previously combined cumulative probability distribution data according to a ratio of the number of new to previous observed values.

Abstract: One or more embodiments are disclosed that involve computer implementable techniques for generating simulate-able waveforms without the need for repeatedly including and simulating a full channel model or testing the waveforms on a physical channel. Techniques according to such embodiments the invention comprise simulating the sending of a waveform across a channel and recording deviations from a simulated received waveform, which comprise differences between the ideal waveform as sent and the simulated received waveform. These deviations are then used to create simulate-able waveforms, which include the effects of noise and jitter, without the need for additional channel simulation. As an alternative to using channel simulation, deviations may also be collected from sending a waveform across a physical channel.

Abstract: The application of finite differences methods to solve boundary value problems typically involves a discretization of such a problem across an orthogonal array of discrete grid points. This leads to an array of difference equations which is solved numerically within the constraints of the boundary conditions to yield solutions at the grid point locations. However, the accuracy of the solutions is limited with conventional finite differences methods when the boundary conditions are not represented exactly within the orthogonal array of discrete grid points, as when the boundary conditions are curved or slanted surfaces. The invention described herein provides finite differences methods for solving boundary value problems more accurately than with conventional finite differences methods, particularly when curved or slanted boundary surfaces correspond to terminations of a known analytical function.

Abstract: The embodiments herein provide a device and method to generate Pre-emphasized signal. In one embodiment herein an input file containing digital data representing a digital data pattern waveform is received and up-sampled by an Fs/Fd rate. The up-sampled digital data is used for generating step response. The generated step response is differentiated to generate coefficients of a pre-emphasis filter which are convolved with the digital data pattern waveform input signal to generate a pre-emphasized digital data pattern waveform file.

Abstract: An efficient symbolic differentiation method and system that automatically computes one or more derivatives of a function using a computing device. A derivative graph is used to graphically represent the derivative of a function. Repeated factorization of the derivative graph yields a factored derivative graph. The derivative is computed by summing the products along all product paths in the factored derivative graph. The efficient symbolic differentiation method and system operates on both single input/single output and multiple input/multiple output functions. For a single input/single output function, the order of the factoring does not matter. However, for a multiple input/multiple output function, the factoring order is such that the factor subgraph appearing most frequently in the derivative graph is factored first. The method and system also use a product pairs priority queue to avoid the re-computing of sub-strings that are common between product paths.

Abstract: A method of determining interpolation coefficients (607, 609, 610, 611) of a symmetric interpolation kernel (608) is disclosed. The method comprises determining a first interpolation coefficient (611) from the symmetric interpolation kernel (608) and storing the first interpolation coefficient in a memory (506). The method then determines the value of an intermediate function (310) from symmetrically opposed segments (201, 204) of the kernel, and determines a subsequent interpolation coefficient dependent upon the first interpolation coefficient and the value of the intermediate function.

Abstract: The present invention is directed to an apparatus and methods that facilitate implementation of a practical Finite-Difference-Time-Domain (FDTD) hardware accelerator. The apparatus and methods of the present invention increase speed, reduce memory requirements, and/or simplify a FDTD hardware implementation. This is accomplished by providing one, some, or all of the following: a reformulated FDTD method to simplify the hardware implementation; a memory look-up table (MLUT) to decrease memory requirements; customized, floating-point arithmetic units optimized for speed to decrease execution time; a memory switching unit (MSU) that coordinates multiple memory reads and writes from/to multiple random access memories (RAMs) to simplify control; a data dependence unit (DDU) that determines all dependencies associated with a given calculation to simplify control; and/or a control unit based on a global counter to simplify control.

Abstract: A tailored response cascaded integrator comb digital filter is disclosed which has a cascaded integrator structure, a cascaded comb structure, a first rate change component, a second rate change component and can additionally include a resonator. The improved structure achieves greater bandwidth without requiring higher sampling rates. In an additional embodiment, a pre-decimated cascaded integrator filter section for a cascaded integrator comb digital filter is disclosed as having a data rate change component and a first integrator structure receiving data at the rate established by the data rate change component and modifying the received data. The pre-decimated filter section can also include a second integration structure. The pre-decimate structure outputs data equivalent to data that would be output by a post-decimated cascaded integrator structure having an equal number of cascaded integrator stages.

Abstract: A method for solving a wide variety of linear partial differential equations by exploiting the normally undesirable parasitic resistances present in flexible digital switching components. The terminal relationships of these field programmable interconnect devices can be manipulated under program control to directly mimic the nodal relationships defined in finite difference method models of a partial difference equation problem. Adding analog-to-digital/digital-to-analog converters (“ADCs/DACs”) to automate the solution process can extend the method of analog equation solving. It is also possible to segment larger problems using this approach, feeding sections into the device and injecting/capturing voltages as appropriate to produce an overall solution that will eventually converge after a number of presentation/solution sub-cycles.

Abstract: A chain rule-based evaluation technique is presented for analytically evaluating partial derivatives of nonlinear functions or differential equations defined by a high-level language. A coordinate embedding strategy is introduced that replaces all scalar variables with higher-dimensional objects. The higher dimensional objects are defined by a concatenation of the original scalar and its Jacobian and Hessian partials. The artificial problem dimensions permit exact sensitivity models to be recovered for arbitrarily complex matrix-vector models. An object-oriented operator-overloading technique is used to provide a familiar conceptual framework for generating the model sensitivity data. First- and second-order partial derivative models are automatically evaluated by defining generalized operators for multiplication, division, and composite function calculations.

Abstract: A device for calculating numerical solutions for partial differential equations in successive intervals using adaptive meshes, comprises: a neural network part for producing predictions of gradients at a following interval based on gradients available from previous intervals, and a mesh adaptation part, associated with said neural network part, configured for adapting a mesh over a domain of a respective partial differential equation using said predictions, such that said mesh adaptively refines itself about emerging regions of complexity as said partial differential equation progresses over said successive intervals. The neural network part succeeds in its predictions since its use herein is equivalent to using time series function fitting techniques.

Abstract: A polynomial expansion of the z-transform characterization of an n'th order differentiator component's output is utilized to implement a differentiator having reduced gates. The differentiator component comprises at least one adder and a plurality of latches, both having inputs and outputs. The connection of the inputs and outputs is dependent on a polynomial expansion of the z-transform characterization of the differentiator components output. A method of reducing gates in an Nth order differentiator component includes characterizing the differentiator component's output by a z-transform. A polynomial expansion of the z-transform characterization is used to implement a differentiator. A differentiator that is implemented based on a polynomial expansion utilizes fewer gates to achieve the same mathematical function.

Abstract: An apparatus and method which is capable of solving a diffusion equation at a high precision by Fourier expansion. Diffusion quantity f, when a diffusion source s is provided, is determined by Fourier-transforming spacial components of f(r, t) and s(r, t) in both sides of ∂f (r, t)/∂t=s(r, t)+D∇2f(r, t), modifying each component into a differential equation of a form which is each of spacial frequency components obtained by the Fourier transformation and finite solving a finite difference equation f(t+&Dgr;t)=exp(−c&Dgr;t)f(t)+(&Dgr;t/2)[exp(−c&Dgr;t)s(t)+s(t+&Dgr;t)] by a repeating method.

Abstract: Method is provided for calculating a matrix by using a vector computer with at least one vector processor and a plurality of memory banks. The method controls procedure of the calculation so that the memory banks may be accessed in a constant stride. Furthermore, the method can be applied to vector computers having various queue length and the number of the memory banks. As a result, rapid operation can be made compared to the existing method. In addition, without further outlay, other dependencies than the known 5-point stencil or 7-point stencil can be taken into account.