Abstract: The invention relates to a circuit configuration for determining the average value of an input signal (s), comprising a signal input (1) for receiving the input signal (s) and comprising a signal output (13) for outputting an output signal (g) that depicts the average value of the input signal (s). According to the invention, a counter (10) is placed between the signal input (1) and the signal output (13) in order to conduct an averaging. Said counter is preferably controlled by a sigma-delta modulator (2).

Abstract: Parallel hardware computation structures for integrated-circuit arithmetic and statistical signal averaging are described herein as an invention that is applicable to broad systems applications where a variety of analog-to-digital and digital-to-analog data interfaces occur. Signal values are improved to accommodate signal reconstruction of high quality and at high frequencies. The computation efficiency of the parallel hardware structures makes them useful in a broad set of applications where signal data is being converted from one electronics domain to another—in particular, from the analog domain to the digital domain and the reverse. Important application areas include video processing, music studios, telecommunications, voice communication and support systems, and information technology in general.

Abstract: A method and an apparatus for averaging includes generating a carry using a least significant bit of each of two binary numbers, wherein the two binary numbers include a first binary number and a second binary number, and adding a first shifted binary number, a second shifted binary number, and the carry generated, thereby outputting an average of the two binary numbers. The carry generated is added to the least significant bit position. The first shifted binary number is obtained by right-shifting the first binary number by one bit, and the second shifted binary number by right-shifting the second binary number by one bit.

Abstract: A method for processing sensor data which are transmitted by at least one asynchronous sensor at a transfer rate, the sensor data being read at a predefined sampling rate, a mean value being computed from a predefined number of read sensor data, wherein the sampling ratio between the sampling rate and transfer rate is estimated for averaging, the number of transmitted data values and the number of sampling pulses within a predefined time span being ascertained and correlated to each other for estimating the sampling ratio.

Abstract: A functional unit includes one or more instances of arithmetic circuitry for calculating averages. Each instance of arithmetic circuitry includes first, second and third adders, each having first and second inputs and an output that is a sum of the first and second inputs and a carry-in bit. An output of the first adder is coupled to a first input of the third adder, and an output of the second adder is coupled to a second input of the third adder. The arithmetic circuitry is able to calculate an arithmetic operation on a set of four inputs. The arithmetic operation is fully determined by control bits and may be: an average of two values (with or without rounding by 1), an average of four values (with or without rounding by 1 or 2), or a sum of four values.

Abstract: Systems and methods for digital signal averaging using parallel computation structures are disclosed herein. An exemplary method includes: receiving a series of samples in the time domain, each sample containing a number of bit positions M; averaging, using coefficient polynomial arithmetic, the value in a selected one of the bit positions in each of the samples to produce an average of the bit position, wherein the selected bit position remains constant during the averaging; and repeating the averaging for another selected bit position. Another exemplary method includes: receiving a series of samples in the time domain, each sample containing the same number predefined number of bit positions M; and for each bit position, averaging, using coefficient polynomial arithmetic, the value in the corresponding bit position in each of the samples to produce a plurality of averages, each average corresponding to one of the bit positions.

Abstract: A sampled data averaging circuit which comprises sampling means for sampling input data at predetermined timing by a number of sampling times set, division means for dividing the sampled data by the number of sampling times for each time the input data is sampled, and accumulation means for sequentially accumulating the division result, and an average value is obtained from the accumulation result of the accumulation means.

Abstract: According to some embodiments, a Single-Instruction/Multiple-Data averaging operation is presented. The averaging operation averages multiple sets of data elements, for example, two data elements each from a first source and a second source, producing a set of averages. In at least one embodiment, in a first adder stage, a first plurality of data elements are added to a second plurality of data elements, generating a plurality of intermediate results. In a second adder stage, multiple different combinations of the plurality of intermediate results are added together, generating a plurality of sum results. The two least significant bits of each sum result are discarded.

Abstract: Apparatus and methods are provided for reducing coherent noise in measurements of repetitive analog signal waveforms by digital signal averagers. Coherent noise is repetitive and synchronous with the signal waveform and is therefore undiminished by conventional signal averaging techniques. A major source of coherent noise is the repetitive voltage transitions that occur within the digital signal averager itself. The apparatus and methods of the present invention introduce a known and variable phase offset during the signal averaging process between the signal waveform being measured and the internally generated coherent noise, thereby allowing such coherent noise to be averaged, and therefore reduced, during the signal averaging process. Consequently, the apparatus and methods of the present invention allow greater signal-to-noise ratio and signal dynamic range than with the prior art.

Abstract: A mobile terminal which has a positioning function, a positioning method and a positioning system for implementing positioning with plural processes and selecting an optimum process by which positioning can be executed with the least error in positioning accuracy. A positioning method applied to a mobile terminal which is provided with a positioning function, wherein a positioning result is obtained by selectively using a first calculation process for finding out a weighted average value from the results of two or more latest positioning calculations each time a measurement has been made based on the results of a plurality of positioning calculations, and a second calculation process for finding out a weighted average value by adding the latest positioning result as a calculation factor to the weighted average of past positioning results each time a measurement has been made based on the results of a plurality of positioning calculations.

Abstract: Disclosed is a method and circuit for generating an average binary code from at least two input binary codes. The circuit may be employed in an integrated circuit having first and second circuits for generating binary codes am-1:0 and bm-1:0, respectively. In one embodiment, the circuit asynchronously generates a binary code cm-1:0 representing an average of the binary codes am-1:0 and bm-1:0 generated by the first and second circuits, respectively.

Abstract: The color image processing apparatus of the present invention selects, on the basis of a moving average number n of pixels calculated by a predetermined numerical formula with respect to any notable pixel i, n number of reference pixels j located before and after the notable pixel i, and calculates an absolute value of a difference between an output of respective of the selected reference pixels j and that of the notable pixel i. Then, a moving average processing is executed by using only some reference pixels j of which the absolute value of the difference between each of their output levels and the output level of the notable pixel i is smaller than a threshold value.

Abstract: An electronic system with power approximation for circuit savings. Power approximation is provided by means for generating an absolute value of a real part of a signal, means for generating an absolute value of an imaginary part of the signal, means for generating a sum of the absolute values, and means for performing an averaging function on the sum such that a result of the averaging function provides an approximate power which indicates an actual power of the signal. The approximate power enables a determination of actual signal-to-noise ratio in the electronic system and a determination of a variety of other signal-to-noise determinations without the use of multipliers.

Abstract: An integrated circuit having statistical processing capability. The integrated circuit has an input for receiving input data in a first data domain. A data converter is provided for converting received input data from the first domain to a second domain different from the first domain. A statistical processor is provided for obtaining statistical information from the output of the data converter and processing the obtained statistical information in accordance with a predetermined processing algorithm. An output on the integrated circuit allow access of the processed statistical information by the statistical processor external to the integrated circuit.

Abstract: An averaging measurement circuit comprises a register successively storing a series of data words having a plurality of bits and providing, for each of said data words, a first output consisting of all of the plurality of bits of the data word and a second output consisting of a number of the higher order bits of the data word. A subtracter subtracts each second output of the register from a corresponding data sample and outputs the corresponding subtraction result. An adder adds each first output of the register to a corresponding subtraction result and storing the result in the register.

Abstract: When performing data processing operations upon data words 2, 4 including a plurality of abutting data values a0, a1, a2, a3, b0, b1, b2 and b3 the results of the operation upon one data value may influence a neighboring data value in an undesired manner. An error correcting value 34 may be determined from the input data words 2, 4 and then combined with the intermediate result 32 to correct for any undesired interactions between adjacent data values.

Abstract: Disclosed is a method and circuit for generating an average binary code from at least two input binary codes. The circuit may be employed in an integrated circuit having first and second circuits for generating binary codes am−1:0 and bm−1:0, respectively. In one embodiment, the circuit asynchronously generates a binary code cm−1:0 representing an average of the binary codes am−1:0 and bm−1:0 generated by the first and second circuits, respectively.

Abstract: According to the invention, a process for averaging two pixel values is disclosed. In one step, an instruction is decoded. A plurality of first operands is loaded from a first input register. A plurality of second operands is loaded from a second input register. An average of one of the plurality of first operands and one of the plurality of second operands is produced. The average is stored in an output register.

Abstract: A method for reducing the crest factor of a signal, the signal being represented by a digital signal vector whose elements are sampled values of the signal. The method includes the steps of calculating a digital correction vector from the elements of the digital signal vector. Adding the digital correction vector and to the digital signal vector, and outputting a corrected digital signal vector.

Abstract: A system and method for efficiently obtaining corrected results when averaging multiple integers together. The invention detects when round off errors occur during integer averaging operations, and determines if the accumulated errors are sufficient to require correction. If so, the result is modified by a correction factor to produce an accurate result. Errors can be detected by examining the even/odd status of pairs of numbers that are being averaged together. The invention can be employed with Single Instruction Multiple Data instructions to process multiple sets of integers in parallel. In one embodiment, the invention is used for averaging pixel values in the compression and/or decompression of digitized moving pictures.

Abstract: The present invention relates to a method and an apparatus which reproduce a digital terrain model (DTM) from contour data with geomorphological consistency and natural features including fine folds. An initial DTM ho is produced (step 101), and set ho as an initial value (step 102). Then the operator T which smooths the elevational values along flowing water lines or the neighborhood of the lines is operated on the DTM h (step 103), further the operator B which sets the boundary values by substituting the contour data is operated on the DTM h (step 104). The number n of operating times of the steps 103 and 104 is checked (step 105). If n is less than preset number nmax, return to the step 103 and if n reaches nmax, go to the step 106 and the DTM h is output.

Abstract: An electronic system with power approximation for circuit savings. Power approximation is provided by means for generating an absolute value of a real part of a signal, means for generating an absolute value of an imaginary part of the signal, means for generating a sum of the absolute values, and means for performing an averaging function on the sum such that a result of the averaging function provides an approximate power which indicates an actual power of the signal. The approximate power enables a determination of actual signal-to-noise ratio in the electronic system and a determination of a variety of other signal-to-noise determinations without the use of multipliers.