Abstract: Systems and methods for multiplying a sparse matrix by a vector using a single instruction multiple data (SIMD) architecture are provided. An example method includes sorting rows of the sparse matrix by a number of non-zero elements in the rows to generate sorted rows. The sorted rows are split to generate groups of the sorted rows. The number of rows in each group of the sorted rows is equal to the number of rows updated in parallel. The method allows for packing the sorted rows in each of the groups to generate packed rows. Each of the packed rows within the same group has the same length. Per clock cycle, C elements of the packed rows and data for selecting elements of the vector are provided to computational units in the SIMD architecture, where C is the number of computational units.

Abstract: Methods, systems, and apparatus, including a system for transforming sparse elements to a dense matrix. The system is configured to receive a request for an output matrix based on sparse elements including sparse elements associated with a first dense matrix and sparse elements associated with a second dense matrix; obtain the sparse elements associated with the first dense matrix fetched by a first group of sparse element access units; obtain the sparse elements associated with the second dense matrix fetched by a second group of sparse element access units; and transform the sparse elements associated with the first dense matrix and the sparse elements associated with the second dense matrix to generate the output dense matrix that includes the sparse elements associated with the first dense matrix and the sparse elements associated with the second dense matrix.

Abstract: Methods, systems, and apparatus, including a system for transforming sparse elements to a dense matrix. The system is configured to receive a request for an output matrix based on sparse elements including sparse elements associated with a first dense matrix and sparse elements associated with a second dense matrix; obtain the sparse elements associated with the first dense matrix fetched by a first group of sparse element access units; obtain the sparse elements associated with the second dense matrix fetched by a second group of sparse element access units; and transform the sparse elements associated with the first dense matrix and the sparse elements associated with the second dense matrix to generate the output dense matrix that includes the sparse elements associated with the first dense matrix and the sparse elements associated with the second dense matrix.

Abstract: Disclosed herein is a shared memory systems that use a combination of SBR and MRRR techniques to calculate eigenpairs for dense matrices having very large numbers of rows and columns. The disclosed system allows for the use of a highly scalable tridiagonal eigensolver. The disclosed system likewise allows for allocating a different number of threads to each of the different computational stages of the eigensolver.

Abstract: A TRANSACTION BEGIN instruction begins execution of a transaction and includes a general register save mask having bits, that when set, indicate registers to be saved in the event the transaction is aborted. At the beginning of the transaction, contents of the registers are saved in memory not accessible to the program, and if the transaction is aborted, the saved contents are copied to the registers.

Abstract: A video encoding method, a video encoding apparatus, a video decoding method, and a video decoding apparatus are provided. The video encoding method includes producing a fast transform matrix based on a transform matrix which is used for frequency transformation on a block which has a predetermined size; producing a transformed block by transforming the block having the predetermined size by using the fast transform matrix; and performing scaling with respect to the transformed block in order to correct a difference between the transform matrix used for the frequency transformation and the fast transform matrix.

Abstract: A microprocessor performs a fused multiply-accumulate operation of a form ±A*B±C using first and second execution units. An input operand analyzer circuit determines whether values of A, B and/or C meet a sufficient condition to perform a joint accumulation of C with partial products of A and B. The first instruction execution unit multiplies A and B and jointly accumulates C to partial products of A and B when the values of A, B and/or C meet a sufficient condition to perform a joint accumulation of C with the partial products of A and B. The second instruction execution unit separately accumulates C to the products of A and B when the values of A, B and/or C do not meet a sufficient condition to perform a joint accumulation of C with the partial products of A and B.

Abstract: Methods, systems, and apparatus, including a system for transforming sparse elements to a dense matrix. The system is configured to receive a request for an output matrix based on sparse elements including sparse elements associated with a first dense matrix and sparse elements associated with a second dense matrix; obtain the sparse elements associated with the first dense matrix fetched by a first group of sparse element access units; obtain the sparse elements associated with the second dense matrix fetched by a second group of sparse element access units; and transform the sparse elements associated with the first dense matrix and the sparse elements associated with the second dense matrix to generate the output dense matrix that includes the sparse elements associated with the first dense matrix and the sparse elements associated with the second dense matrix.

Abstract: Methods, systems, and apparatus, including a system for transforming sparse elements to a dense matrix. The system is configured to receive a request for an output matrix based on sparse elements including sparse elements associated with a first dense matrix and sparse elements associated with a second dense matrix; obtain the sparse elements associated with the first dense matrix fetched by a first group of sparse element access units; obtain the sparse elements associated with the second dense matrix fetched by a second group of sparse element access units; and transform the sparse elements associated with the first dense matrix and the sparse elements associated with the second dense matrix to generate the output dense matrix that includes the sparse elements associated with the first dense matrix and the sparse elements associated with the second dense matrix.

Abstract: A method of building a soft linkage between a plurality of graphs includes initializing a correspondence between type-1 and type-2 objects in the plurality of graphs, and reducing a cost function by alternately updating the type-1 correspondence and updating the type-2 correspondence.

Abstract: Embodiments of the invention relate to sparsity-driven matrix representation. In one embodiment, a sparsity of a matrix is determined and the sparsity is compared to a threshold. Computer memory is allocated to store the matrix in a first data structure format based on the sparsity being greater than the threshold. Computer memory is allocated to store the matrix in a second data structure format based on the sparsity not being greater than the threshold.

Abstract: A method of estimating a steering vector of a sensor array of M sensors according to one embodiment of the present disclosure includes estimating a steering vector of a noise source located at an angle ? degrees from a look direction of the array using a least squares estimate of the gains of the sensors in the array, defining a steering vector of a desired sound source in the look direction of the array, and estimating the steering vector by performing element-by-element multiplication of the estimated noise vector and the complex conjugate of steering vector of the desired sound source. The sensors may be microphones.

Abstract: A system, method, and computer program product are provided for executing casting-arithmetic instructions. The method comprises receiving a casting-arithmetic instruction that specifies an arithmetic operation to be performed on input data and at least one casting operation of an input casting operation and an output casting operation. Upon determining that the casting-arithmetic instruction specifies the input casting operation, the input casting operation is performed on identified terms comprising the input data. Then the arithmetic operation is performed on the input data to generate an arithmetic result. Upon determining that the casting-arithmetic instruction specifies the output casting operation, the output casting operation is performed on the arithmetic result.

Abstract: Briefly, embodiments of methods and/or systems of computation via array decomposition are disclosed. For one embodiment, as an example, a system may be capable of implementation of an advertising audience overlap analysis dashboard in which for an audience exceeding 100 million users and exceeding 10,000 user groups. Such a system embodiment, for example, may be capable of computing an exact count of user overlap among the user groups in less than two hours.

Abstract: Embodiments of the invention relate to sparsity-driven matrix representation. In one embodiment, a sparsity of a matrix is determined and the sparsity is compared to a threshold. Computer memory is allocated to store the matrix in a first data structure format based on the sparsity being greater than the threshold. Computer memory is allocated to store the matrix in a second data structure format based on the sparsity not being greater than the threshold.

Abstract: According to one embodiment, a code optimizer is configured to receive first code having a program loop implemented with scalar instructions to store values of a first array to a second array based on values of a third array. The code optimizer is configured to generate second code representing the program loop with vector instructions including a shuffle instruction and a store instruction, the store instruction to shuffle using a shuffle table elements of the first array based on the second array in a vector manner, the store instruction to store using a mask store table the shuffled elements in the third array in a vector manner.

Abstract: Embodiments of the invention relate to sparsity-driven matrix representation. In one embodiment, a sparsity of a matrix is determined and the sparsity is compared to a threshold. Computer memory is allocated to store the matrix in a first data structure format based on the sparsity being greater than the threshold. Computer memory is allocated to store the matrix in a second data structure format based on the sparsity not being greater than the threshold.

Abstract: Various embodiments relating to encoding a sparse matrix into a data structure format that may be efficiently processed via parallel processing of a computing system are provided. In one embodiment, a sparse matrix may be received. A set of designated rows of the sparse matrix may be traversed until all non-zero elements in the sparse matrix have been placed in a first array. Each time a row in the set is traversed, a next non-zero element in that row may be placed in the first array. If all non-zero elements for a given row of the set of designated rows have been placed in the first array, the given row may be replaced in the set of designated rows with a next unprocessed row of the sparse matrix. The data structure in which the sparse matrix is encoded may be outputted. The data structure may include the first array.

Abstract: Systems and methods are provided for mitigating natural and man-made interference through the use of one or more orthogonal, or nearly-orthogonal, projections of the received signal, which is assumed to be contaminated with interference, into one or more orthogonal projection spaces based on properties of the signal of interest. Once separated into orthogonal projection space(s), the system and method use information contained in the orthogonal projection space(s) to separate the signal of interest, or target signal, from the interference and to mitigate the interference.

Abstract: System and method for computing QR matrix decomposition and inverse matrix R?1. A circuit is configured to implement a QR decomposition of a matrix A into two matrices Q and R using a Modified Gram Schmidt (MGS) process. The circuit includes a specified portion dedicated to computing matrix Q. Matrix Q is computed via the specified portion based on first inputs using the MGS process, where the first inputs include the matrix A and possibly a scaling factor ?. The identity matrix may be scaled by the scaling factor ?, thereby generating scaled identity matrix ?I. Scaled matrix ?R?1 (or unscaled R?1) may be computed via the specified portion based on second inputs provided to the portion using the MGS process, where the second inputs include the (possibly scaled) identity matrix. If scaled, the scaled matrix ?R?1 may be unscaled, thereby computing matrix R?1. Matrix R?1 is stored and/or output.

Abstract: System and method for developing a circuit for QR decomposition with auxiliary functionality. A first function is included in a first program. The first function is configurable to specify an auxiliary function to be performed by a modified QR decomposition circuit in addition to QR decomposition of a matrix A into two matrices Q and R using a Modified Gram Schmidt process. A second program is automatically generated based on configuration of the QR decomposition and the first function. The second program includes program code implementing the QR decomposition and the auxiliary function for the first function in the first program. A hardware configuration program (HCP) may be automatically generated based on the first program, including the second program, where the HCP is deployable to hardware, e.g., a programmable hardware element, thereby implementing the modified QR decomposition circuit, including the QR decomposition of the matrix A and the auxiliary function.

Abstract: A system and method for re-factorizing a square input matrix on a parallel processor. In one embodiment, the system includes: (1) a matrix generator operable to generate an intermediate matrix by embedding a permuted form of the input matrix in a zeroed-out sparsity pattern of a combination of lower and upper triangular matrices resulting from a prior LU factorization of a previous matrix having a same sparsity pattern, reordering to minimize fill-in and pivoting strategy as the input matrix and (2) a re-factorizer associated with the matrix generator and operable to use parallel threads to apply an incomplete-LU factorization with zero fill-in on the intermediate matrix.

Abstract: Embodiments of computer-implemented methods, systems, computing devices, and computer-readable media (transitory and non-transitory) are described herein for analyzing execution of a plurality of executable instructions and, based on the analysis, providing an indication of a benefit to be obtained by vectorization of at least a subset of the plurality of executable instructions. In various embodiments, the analysis may include identification of the subset of the plurality of executable instructions suitable for conversion to one or more single-instruction multiple-data (“SIMD”) instructions.

Abstract: Systems and methods are provided for generating at least one high fidelity resource state. A classical code and punctured to provide a first set of generators and a second set of generators. The first set of generators is mapped to a set of stabilizer generators, and the second set of generators is mapped to a set of logical operators. A set of resource states are prepared in physical qubits. A decoding process is performed on the resource states according to a quantum code represented by the set of stabilizer generators and the set of logical operators, and qubits corresponding to the stabilizers are measured.

Abstract: In general, techniques are described for implementing an 8-point inverse discrete cosine transform (IDCT). An apparatus comprising an 8-point inverse discrete cosine transform (IDCT) hardware unit may implement these techniques to transform media data from a frequency domain to a spatial domain. The 8-point IDCT hardware unit includes an even portion comprising factors A, B that are related to a first scaled factor (?) in accordance with a first relationship. The 8-point IDCT hardware unit also includes an odd portion comprising third, fourth, fifth and sixth internal factors (G, D, E, Z) that are related to a second scaled factor (?) in accordance with a second relationship. The first relationship relates the first scaled factor to the first and second internal factors. The second relationship relates the second scaled factor to the third, fourth, fifth and sixth internal factors.

Abstract: Embodiments relate to dynamic programming. An aspect includes representing a dynamic programming problem as a matrix of cells, each cell representing an intermediate score to be calculated. Another aspect includes providing a mapping assigning cells of the matrix to elements of a result container data structure, and storing cells of the matrix to elements of the result container data structure in accordance with the mapping. Another aspect includes calculating intermediate scores of all cells of the matrix, whereby intermediate scores of some of the cells of the matrix are stored to a respectively assigned element of the result container data structure in accordance with the mapping. Another aspect includes during the calculation of the intermediate scores, dynamically updating the assignment of cells and elements in the mapping and assembling a final result of the dynamic programming problem from the intermediate scores stored in the result container data structure.

Abstract: A video decoder includes an entropy decoding device that generates entropy decoded (EDC) data from an encoded video signal. A multi-format video decoding device includes a plurality of vector processor units that generate a decoded video signal from the EDC data. The plurality of vector processing units includes at least one filter vector processor that operates in conjunction with a plurality of programmable filter parameters.

Abstract: In a surgical system, a system controller executes a video signature identification and image control routine to maintain quality of a video image taken by a video camera located at a surgical site and provided on a video display. The system includes a video camera/light source handpiece for insertion into a patient body. A tool is inserted separately into the surgical site. Fluid input into the surgical site is provided by a liquid pump or by an insufflator. Video signals are analyzed and fluid input/output, fluid pressure, and/or tool operation is automatically controlled to maintain image quality of the surgical site without manual adjustments.

Abstract: Apparatus and method for processing linear systems of equations and finding a n×1 vector x satisfying Ax=b where A is a symmetric, positive-definite n×n matrix corresponding to n×n predefined high-precision elements and b is an n1 vector corresponding to n predefined high-precision elements. A first iterative process generates n low-precision elements corresponding to an n×1 vector xl satisfying Alxl=bl where Al, bl are elements in low precision. The elements are converted to high-precision data elements to obtain a current solution vector x. A second iterative process generates n low-precision data elements corresponding to an n×1 correction vector dependent on the difference between the vector b and the vector product Ax. Then there is produced from the n low-precision data elements of the correction vector respective high-precision data elements of an n×1 update vector u. The data elements of the current solution vector x are updated such that x=x+u.

Abstract: An acoustic apparatus including circuitry to correct for acoustic cross-coupling of acoustic drivers mounted in a common acoustic enclosure. A plurality of acoustic drivers are mounted in the acoustic enclosure so that motion of each of the acoustic drivers causes motion in each of the other acoustic drivers. A canceller cancels the motion of each of the acoustic drivers caused by motion of each of the other acoustic drivers. A cancellation adjuster cancels the motion of each of the acoustic drivers that may result from the operation of the canceller.

Abstract: The present invention provides an innovative method and system for quantifying the binary words symmetry. Information of all kinds is necessarily interpreted by binary words. Quantifying the symmetry of these binary words, regardless of their size, is a new approach that makes available a new measure that can better appreciate the complexity, the information, the redundancy or the physical structure contained in each binary word and hence, in its source. Binary numbers processing can, thanks to this measure, have new tools for new approaches in many areas such as Information Theory and Theory of Symmetry which plays a significant role in Mathematics, Chemistry, Biology, Crystallography, etc. This method is based on computational system that generates the concerned ‘Symmetric Value’ of any binary number as well as its two amazing ‘Symmetric Value Matrixes’ which do not require storage to be known, regardless of their size.

Abstract: Embodiments of the invention relate to sparsity-driven matrix representation. In one embodiment, a sparsity of a matrix is determined and the sparsity is compared to a threshold. Computer memory is allocated to store the matrix in a first data structure format based on the sparsity being greater than the threshold.

Abstract: Methods for compiling single-qubit quantum gates into braid representations for non-Abelian quasiparticles described by the Fibonacci anyon model are based on a probabilistically polynomial algorithm that, given a single-qubit unitary gate and a desired target precision, outputs a braid pattern that approximates the unitary to desired precision and has a length that is asymptotically optimal (for a circuit with such property). Single-qubit unitaries that can be implemented exactly by a Fibonacci anyon braid pattern are classified, and associated braid patterns are obtained using an iterative procedure. Target unitary gates that are not exactly representable as braid patterns are first approximated to a desired precision by a unitary that is exactly representable, then a braid pattern associated with the latter is obtained.

Abstract: The present invention provides a method and system for distributed probabilistic matrix factorization. In accordance with a disclosed embodiment, the method may include partitioning a sparse matrix into a first set of blocks on a distributed computer cluster, whereby a dimension of each block is MB rows and NB columns. Further, the method shall include initializing a plurality of matrices including first mean matrix ?, a first variance matrix ?, a first prior variance matrix ?P, a second mean matrix V, a second variance matrix {tilde over (V)}, and a second prior variance matrix {tilde over (V)}P, by a set of values from a probability distribution function. The plurality of matrices can be partitioned into a set of blocks on the distributed computer cluster, whereby each block can be of a shorter dimension K, and the plurality of matrices can be updated iteratively until a cost function of the sparse matrix converges.

Abstract: According to an embodiment, a matrix operation apparatus executing a matrix operation includes multiple nodes, the nodes including: a multiplier configured to perform a first operation for a first input, which is column data and a second input which is row data for the matrix operation and output element components of an operation result of the matrix operation; and an accumulator configured to perform cumulative addition of operation results of the multiplier.

Abstract: A method for reconstructing a first vector from a second vector includes: storing code for the row vectors according to a first code and a second code; correcting the row vectors of the second vector corresponding to the first vector so that the row vectors of the second vector have the same code as the row vectors of the first vector; calculating the code of the column vectors of the second vector according to the second code; comparing the code of the row vectors of the second vector with the code of the column vectors of the first vector; identifying the columns in which the first vector is unequal to the second vector; the rows in which the first vector is unequal to the second vector; and the components in which the first vector is not equal to the second vector, and correcting the components of the second vector.

Abstract: A computer system retrieves a slice of sparse matrix data, which includes multiple rows that each includes multiple elements. The computer system identifies one or more non-zero values stored in one or more of the rows. Each identified non-zero value corresponds to a different row, and also corresponds to an element location within the corresponding row. In turn, the computer system stores each of the identified non-zero values and corresponding element locations within a packet at predefined fields corresponding to the different rows.

Abstract: A computer system is operable to identify subfields that differ in two data elements using a bit matrix compare function between a first matrix filled with pattern elements and a reference pattern.

Abstract: Advantageously, embodiments of the invention provide techniques for determining dependency relationships between matrix supernodes by storing a list of dependencies for each supernode in a data structure and augmenting this list as needed when a column is moved from one supernode to another while factorizing a series Ai of symmetric matrices. As iterating over all supernodes to determine which supernodes a given supernode depends on at the beginning of each factorization adds significant overhead to the computation, embodiments described above maintains a supernode dependency data structure used for each successive factorization, greatly reducing the overhead of the dependency determination.

Abstract: Operators such as unitary operators common in quantum mechanical applications may be approximated by a Trotter-like approximation. An operator may be decomposed and terms of the operator may be grouped, or assigned into levels. The levels may be scaled and applied at unique intervals of calculational steps. A quantum device may have circuitry for applying levels of the operator at the unique intervals.

Abstract: Computerized singular value decomposition of an input complex matrix. A real-value matrix representation of the input complex matrix is provided to a singular value decomposition module, which correctly obtains a singular value representation of the real-value matrix representation. However, the result is not provided in a form for convenient conversion back into a valid singular value decomposition solution for the original input complex matrix, as the upper left half and lower right half of the diagonal of the diagonal matrix are not identical. A correction module corrects by formulating a corrected diagonal matrix that represents the value of the diagonal of the first diagonal matrix, but shuffled so that the upper left half of the diagonal of the second diagonal matrix is the same as the lower right half of the diagonal of the second diagonal matrix. Corrected unitary matrices may also be formed.

Abstract: A method of operation within an integrated circuit device having a plurality of processing lanes. A first sub-stream of data, having a variable length, is generated in a first one of the processing lanes. A second sub-stream of data, also having a variable length, is generated in a second one of the processing lanes. The first and second sub-streams are then output to form a single bitstream.

Abstract: A mechanism for reconstructing a signal (e.g., an image) based on a vector s, which includes measurements of the signal. The measurements have been acquired using at least a portion of a measurement vector set represented by a matrix H. Each of the measurements corresponds to a respective row of the matrix H. (For example, each of the measurements may correspond to an inner product between the signal and a respective row of the matrix product HD, wherein D is a generalized permutation matrix.) A total-variation primal-dual hybrid gradient (TV-PDHG) algorithm is executed based on data including the matrix H and the vector s, to determine an estimate for the signal. The TV-PDHG algorithm is implemented in fixed-point arithmetic.

Abstract: There is provided a matrix calculation apparatus. The apparatus includes: a matrix calculation formula display controller configured to display a matrix calculation formula on a display unit, wherein the matrix calculation formula comprises a first matrix; a matrix display controller configured to display a second matrix on the display unit; a submatrix receiver configured to input the second matrix into a certain element of the first matrix as a submatrix of the first matrix in response to a user operation; and a matrix size change display controller configured to change a size of the first matrix in accordance with a size of the second matrix and the certain element of the first matrix into which the second matrix is input and then display the matrix calculation formula.

Abstract: Embodiments of the invention include method of approximating a matrix of data using sparse matrices which includes receiving a first matrix and generating a second matrix based on the first matrix and a first sparse matrix. The method further includes generating a third matrix based on the first matrix and a second sparse matrix and generating a fourth matrix by generating a Moore-Penrose pseudo-inverse matrix based on the first matrix, the second matrix and the third matrix. The method also includes generating a fifth matrix based on a product of the second matrix, the third matrix, and a fourth matrix. The method further includes receiving, by a computer, a request to access at least one entry of the first matrix and responding to the request by accessing an entry of the fifth matrix.

Abstract: A method of identifying a set of parameters representative of a data set is provided. An eigen decomposition of a covariance matrix is calculated to form a decomposed matrix and an eigenvalue vector. The covariance matrix is calculated for a matrix of data including a plurality of data values for each of a plurality of parameters. The decomposed matrix includes a number of eigenvectors equal to a number of the plurality of parameters with each eigenvector including a coefficient for each parameter. The eigenvalue vector includes an eigenvalue defined for each eigenvector. A first matrix is created by rank ordering the coefficient within each parameter of the plurality of parameters for each of the plurality of parameters. A score is determined for each parameter using the created first matrix and the eigenvalue vector. A parameter set is identified based on the determined score for each parameter.

Abstract: A configuration for FPGA logic is provided to perform random access channel (RACH) preamble detection used in 3G mobile communications to identify individual rows of a Hadamard matrix using a Walsh Hadamard Transform (WHT). The configuration provides minimal add/subtract circuit blocks for the WHT by using stages, each stage containing a shift register connected to an add/subtract circuit. The shift register has outputs provided from a tap into its nth and n/2 elements, the outputs being connected to an add/subtract circuit, wherein n is the order of the Hadamard matrix. In a further embodiment parallel connected shift registers are used in each stage to increase operation speed.

Abstract: A method and a system is provided for Coordinate Rotation Digital Computer (CORDIC) based matrix inversion of input digital signal streams from multiple antennas using an bi-directional ring-bus architecture. The bi-directional ring bus includes a first ring bus having signals flow in a clockwise direction, and a second ring bus having signals flow in a counter-clockwise direction. An I/O controller is coupled to the first and the second ring bus, respectively. A plurality of processing elements (PEs), where each of the plurality of PEs is coupled to the first and the second ring bus, respectively, wherein each of the plurality of PEs includes at least one CORDIC core for performing CORDIC iterations on the plurality of input digital stream signals to produce inversed matrix signals.

Abstract: Efficient and scalable circuitry for performing Cholesky decomposition is based on a dataflow style architecture which uses self-timed circuitry and eliminates the need for complicated state machines. Calculations are ordered such that partial sums of products are created in parallel subject to data dependency requirements, allowing a single accumulator to perform the summation. A Vector FIFO receives a partial sum of products from a vector processing engine. A Feedback FIFO stores partial results and feeds the partial results back to the data path based on signals from a dataflow controller. The circuitry is flexible to allow different matrix sizes, speed grades, and target frequencies without recompilation.

Abstract: A digital signal processor is provided in a wireless communication device, wherein the processor comprises a vector unit, first and second registers coupled to and accessible by the vector unit; and an instruction set configured to perform matrix inversion of a matrix of channel values by coordinate rotation digital computer instructions using the vector unit and the first and second registers.