Abstract: In an encrypted storage system employing data deduplication, encrypted data units are stored with the respective keyed data digests. A secure equivalence process is performed to determine whether an encrypted data unit on one storage unit is a duplicate of an encrypted data unit on another storage unit. The process includes an exchange phase and a testing phase in which no sensitive information is exposed outside the storage units. If duplication is detected then the duplicate data unit is deleted from one of the storage units and replaced with a mapping to the encrypted data unit as stored on the other storage unit. The mapping is used at the one storage unit when the corresponding logical data unit is accessed there.

Abstract: The technology is a division circuit with decreased circuit area. An embodiment includes an integrated circuit implementing multiplicative division of a dividend input and a divisor input. The integrated circuit includes a lookup table circuit and multiplier circuits. The lookup table circuit providing an approximation of a reciprocal of a divisor input. The multiplier circuits receive the approximation and refine a quotient output of the dividend input and a divisor input. At least one of the multiplier circuits is a squaring circuit implementing multiplication with a reduced number of intermediate partial products. The reduced number of intermediate partial products prevent the squaring circuit from multiplication of any two unequal numbers and limiting the squaring circuit to multiplication of a same number by the same number.

Abstract: A method for determining a quotient value from a dividend value and a divisor value in a digital processing circuit is provided. The method includes computing a reciprocal value of the divisor value and multiplying the reciprocal value by the dividend value to obtain a reciprocal product, the reciprocal product having an integer part. The method also includes computing an intermediate remainder value by computing a product of the integer part and the divisor value, and subtracting the resulting product from the dividend value and determining the quotient value based upon the intermediate remainder value.

Abstract: A current-mode analog computational circuit can be controlled to produce multiplying, squaring, divider and inverse functions and corresponding current outputs. The current-mode analog computational circuit is based on an implementation using MOSFETs operating in a sub-threshold region as can provide relatively ultra-low power dissipation. Furthermore, the current-mode analog computational circuit can be operated from a ±0.75 V DC supply. Tanner simulation results conducted using a 0.35-?m TSMC CMOS process confirmed the functionality of the multiplying, squaring, divider and inverse functions of the circuit. The current-mode analog computational circuit advantageously can have a total power consumption of 2.3 ?W, a total harmonic distortion is 1.1%, a maximum linearity error of 0.3% and a bandwidth of 2.3 MHz.

Abstract: There is disclosed an apparatus for dividing the frequency of an input signal by an integer N. First and second means may divide the frequency of the input signal by a factor of N and then by a factor of 2. An output of the first means and an output of the second means may be combined by an exclusive OR gate. Third means may be used to control the relative phase of the outputs from the first and second means such that the output from the first means and the output of the second means differ in phase by one-quarter cycle or 90 degrees.

Abstract: The present disclosure provides a system and method for performing multi-precision division. A method according to one embodiment may include generating a first product by multiplying a modulus having a most significant bit and/or a least significant bit equal to one and a quotient approximation of the modulus. The method may also include generating the 1's complement of the first product, generating a second product by multiplying the 1's complement and the quotient approximation, normalizing and truncating the second product to obtain a quotient, and storing the quotient in memory. Of course, many alternatives, variations and modifications are possible without departing from this embodiment.

Abstract: A method and apparatus are provided for driving an electro-optic converter assembly with an information signal. The method includes the steps of disposing a resistor having a resistance substantially equal to a resistance of the electro-optic converter adjacent the electro-optic converter, coupling the electro-optic converter and resistor together, in series, to form a current loop, driving the electro-optical converter end of the current loop with the information signal and driving the resistor end of the current loop with an opposite polarity of the information signal.