Address Data Transfer Patents (Class 710/4)
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Patent number: 12086441Abstract: An interconnected stack of one or more Dynamic Random Access Memory (DRAM) die also has one or more custom logic, controller, or processor die. The custom die(s) of the stack include direct channel interfaces that allow direct access to memory regions on one or more DRAMs in the stack. The direct channels are time-division multiplexed such that each DRAM die is associated with a time slot on a direct channel. The custom die configures a first DRAM die to read a block of data and transmit it via the direct channel using a time slot that is assigned to a second DRAM die. The custom die also configures the second memory device to receive the first block of data in its assigned time slot and write the block of data.Type: GrantFiled: August 30, 2021Date of Patent: September 10, 2024Assignee: Rambus Inc.Inventors: Michael Raymond Miller, Steven C. Woo, Thomas Vogelsang
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Patent number: 11954348Abstract: Techniques are provided for combining data block and checksum block I/O into a single I/O operation. Many storage systems utilize checksums to verify the integrity of data blocks stored within storage devices managed by a storage stack. However, when a storage system reads a data block from a storage device, a corresponding checksum must also be read to verify integrity of the data in the data block. This results in increased latency because two read operations are being processed through the storage stack and are being executed upon the storage device. To reduce this latency and improve I/O operations per second, a single combined I/O operation corresponding to a contiguous range of blocks including the data block and the checksum block is processed through the storage stack instead of two separate I/O operations. Additionally, I/O operation may be combined into a single request that is executed upon the storage device.Type: GrantFiled: April 8, 2022Date of Patent: April 9, 2024Assignee: NetApp, Inc.Inventors: James Alastair Taylor, Suhas Girish Urkude
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Patent number: 11895086Abstract: A network device may maintain, for a user device, a pool domain into which address prefixes are allocated from a partition of an address pool management (APM) device, and may estimate, based on pool domain data, an average subscriber login rate for the pool domain by the user device. The network device may estimate, based on the pool domain data, an average response latency per apportionment alarm, and may calculate a dynamic apportionment threshold based on the average subscriber login rate for the pool domain and the average response latency per apportionment alarm. The network device may utilize the dynamic apportionment threshold for the user device.Type: GrantFiled: September 7, 2022Date of Patent: February 6, 2024Assignee: Juniper Networks, Inc.Inventor: Michael D. Carr
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Patent number: 11765226Abstract: A method for provisioning an internet of things device and a device are provided. The method includes discovering, by a first device, an unprovisioned second device, and configuring, by the first device, a device owner identity (ID) of the second device, where the first device is a sub-onboarding tool (sub-OBT), the configured device owner ID of the second device is the same as a device owner ID of the first device, and devices with the same device owner ID are able to communicate mutually.Type: GrantFiled: December 20, 2021Date of Patent: September 19, 2023Assignee: GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP., LTD.Inventor: Jun Zhang
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Patent number: 11526312Abstract: A device management apparatus has a providing means configured to provide a first screen for determining device specific information corresponding to a contract and a second screen for determining setting information to be distributed if a new device specified by the device specific information is detected; a search means configured to search a device via a network; and a distribution means configured to distribute the setting information that has been determined in the second screen according to a detection if a new device corresponding to the device specific information that has been determined in the first screen is detected by the search.Type: GrantFiled: June 18, 2021Date of Patent: December 13, 2022Assignee: Canon Kabushiki KaishaInventor: Yuichiro Sato
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Patent number: 11497132Abstract: A backplane management and configuration system includes a chassis housing a first storage system having a first backplane, a second storage system having a second backplane, a second computing device coupled to each of the first backplane and the second backplane via a second multiplexer and a communication bus, and a first computing device coupled to each of the first backplane and the second backplane via a first multiplexer and the communication bus. A backplane configuration/management subsystem in the first computing device detects a multi-computing-device configuration including the first and second computing devices in the chassis and, in response, determines a first computing device location in the chassis.Type: GrantFiled: June 24, 2021Date of Patent: November 8, 2022Assignee: Dell Products L.P.Inventors: Chandrasekhar Mugunda, Shivabasava Karibasappa Komaranalli, Rui An, Akshata Sheshagiri Naik
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Patent number: 11496634Abstract: A portable terminal includes a user interface, a memory, a network interface, and a controller, and performs operations including: performing a first acquiring processing of acquiring the content data, which is identified by the data identification information, and the operation identification information; performing, a second acquiring processing of acquiring operation information representing operations, which is able to be performed by the first device; performing, a first determining processing of determining whether the output operation, which is identified by the operation identification information, is represented by the operation information, and transmitting, in the output instructing processing in a case where it is determined that the output operation is represented by the operation information, a first output instructing information to the first device via the network interface, wherein the first output instructing information is output instructing information for outputting the content data by thType: GrantFiled: April 6, 2021Date of Patent: November 8, 2022Assignee: Brother Kogyo Kabushiki KaishaInventor: Norihiko Asai
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Patent number: 11347597Abstract: Systems and methods of error handling in a network interface card (NIC) are provided. For a data packet destined for a local virtual machine (VM), if the NIC cannot determine a valid translation memory address for a virtual memory address in a buffer descriptor from a receive queue of the VM, the NIC can retrieve a backup buffer descriptor from a hypervisor queue, and store the packet in a host memory location indicated by an address in the backup buffer descriptor. For a transmission request from a local VM, if the NIC cannot determine a valid translated address for a virtual memory address in the packet descriptor from a transmit queue of the VM, the NIC can send a message to a hypervisor backup queue, and generate and transmit a data packet based on data in a memory page reallocated by the hypervisor.Type: GrantFiled: January 14, 2021Date of Patent: May 31, 2022Assignee: Google LLCInventors: Prashant Chandra, Ian Mclaren, Jon Olson, Jacob Adriaens
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Patent number: 11245267Abstract: A battery module for use in a battery system is coupled with other battery modules in the battery system in a daisy-chain configuration. And, the battery module communicates with the other battery modules through a daisy chain according to a communication interface protocol which has a predetermined number of clock pulses. The battery module includes a battery unit and a battery control circuit. When the battery module operates in a bottom mode, the battery control circuit generates an upstream clock output signal which includes the predetermined number of clock pulses plus a number of inserted clock pulses, to compensate a clock difference caused by a propagation delay of the daisy chain, such that the battery module is able to synchronously receive a downstream data signal transmitted from a target module via the daisy chain as the battery module is transmitting an upstream clock output signal.Type: GrantFiled: April 16, 2020Date of Patent: February 8, 2022Assignee: RICHTEK TECHNOLOGY CORPORATIONInventor: Wei-Hsu Chang
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Patent number: 11023312Abstract: A serial management interface master device includes an input/output pin and a controller including an error code calculator. The controller is configured to output a first access frame on the input/output pin to cause data to be written to a first register of a serial management interface slave device connected to the input/output pin; cause the error code calculator to generate first error code bits based on the first access frame sent to the serial management interface slave device; and output a second access frame including the first error code bits to the serial management interface slave device on the input/output pin to cause the first error code bits to be written to a second register of the serial management interface slave device.Type: GrantFiled: November 21, 2019Date of Patent: June 1, 2021Assignee: MARVELL ASIA PTE, LTD.Inventors: Dance Wu, Chuanhai Zhou, Hong Yu Chou
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Patent number: 10853255Abstract: An information handling system with improved memory transactions includes a data mover configured to generate a transaction layer packet (TLP) hint when a descriptor includes a write operation to a persistent memory. A logic block may perform a persistent write based on the TLP hint.Type: GrantFiled: January 25, 2019Date of Patent: December 1, 2020Assignee: Dell Products, L.P.Inventors: Shyamkumar T. Iyer, Stuart Allen Berke
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Patent number: 10817441Abstract: The present disclosure is directed to systems and methods sharing memory circuitry between processor memory circuitry and accelerator memory circuitry in each of a plurality of peer-to-peer connected accelerator units. Each of the accelerator units includes virtual-to-physical address translation circuitry and migration circuitry. The virtual-to-physical address translation circuitry in each accelerator unit includes pages for each of at least some of the plurality of accelerator units. The migration circuitry causes the transfer of data between the processor memory circuitry and the accelerator memory circuitry in each of the plurality of accelerator circuits. The migration circuitry migrates and evicts data to/from accelerator memory circuitry based on statistical information associated with accesses to at least one of: processor memory circuitry or accelerator memory circuitry in one or more peer accelerator circuits.Type: GrantFiled: March 29, 2019Date of Patent: October 27, 2020Assignee: INTEL CORPORATIONInventors: Sanjay Kumar, David Koufaty, Philip Lantz, Pratik Marolia, Rajesh Sankaran, Koen Koning
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Patent number: 10794957Abstract: The present invention relates to a battery module and cell configuration recognition system for ID assignment, and more specifically, to a battery module and cell configuration recognition system for ID assignment that recognizes the number of battery cells and battery modules connected in series in order to assign an ID to a BMS and a battery cell of each of the battery modules.Type: GrantFiled: December 12, 2016Date of Patent: October 6, 2020Assignee: LG Chem, Ltd.Inventors: Seung Kyu Yoon, Hyun Jin Kim
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Patent number: 10681224Abstract: A portable terminal includes a user interface, a memory, a network interface, and a controller, and performs operations including: performing a first acquiring processing of acquiring the content data, which is identified by the data identification information, and the operation identification information; performing, a second acquiring processing of acquiring operation information representing operations, which is able to be performed by the first device; performing, a first determining processing of determining whether the output operation, which is identified by the operation identification information, is represented by the operation information, and transmitting, in the output instructing processing in a case where it is determined that the output operation is represented by the operation information, a first output instructing information to the first device via the network interface, wherein the first output instructing information is output instructing information for outputting the content data by thType: GrantFiled: May 26, 2016Date of Patent: June 9, 2020Assignee: Brother Kogyo Kabushiki KaishaInventor: Norihiko Asai
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Patent number: 10523510Abstract: There is provided a method for configuring a plurality of network devices of a wireless fire detection system comprising a configuration device, a gateway device wirelessly communicating with the configuration device, and the plurality of network devices wirelessly communicating with the gateway device and among them, the method comprising: determining, by the configuration device, configuration data of each one of the plurality of network devices for configuring each one of the plurality of network devices; transmitting, by the configuration device, the configuration data to the gateway device; and upon receiving the configuration data from the configuration device, distributing, by the gateway device, the configuration data to each one of the plurality of network devices according to predetermined time slots for transmitting the configuration data.Type: GrantFiled: May 13, 2016Date of Patent: December 31, 2019Assignee: LIFE SAFETY DISTRIBUTION AGInventors: Andrea Frison, Daniel Merli, Daniel Polito
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Patent number: 10509920Abstract: In particular embodiments, a data subject request processing system may be configured to utilize one or more local storage nodes in order to process a data subject access request on behalf of a data subject. In particular embodiments, the one or more local storage nodes may be local to the data subject making the request (e.g., in the same country as the data subject, in the same jurisdiction, in the same geographic area, etc.). The system may, for example, be configured to: (1) receive a data subject access request from a data subject (e.g., via a web form); (2) identify a suitable local storage node based at least in part on the request and/or the data subject; (3) route the data subject access request to the identified local storage node; and (4) process the data subject access request at the identified local storage node.Type: GrantFiled: February 15, 2019Date of Patent: December 17, 2019Assignee: OneTrust, LLCInventors: Kabir A. Barday, Jonathan Blake Brannon, Jason L. Sabourin
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Patent number: 10474404Abstract: An image forming system includes a mobile terminal and an image forming apparatus. The mobile terminal obtains a list related to document data from the image forming apparatus, receives, from a user, a selection of document data via the list to create selected document data, transmits information indicating the selected document data to the image forming apparatus, causes a display device to display a preview image based on the preview image data, accepts print setting information and a print instruction of the document data corresponding to the preview image, and transmits the print setting information and the print instruction of the document data to the image forming apparatus. The mobile terminal sets the print setting information and transmits the print instruction of the selected document data to the image forming apparatus without receiving the selected document data from the image forming apparatus.Type: GrantFiled: December 8, 2017Date of Patent: November 12, 2019Assignee: CANON KABUSHIKI KAISHAInventor: Ryousuke Suzuki
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Patent number: 10423333Abstract: An HBA or proxy HBA device is configured to use separate Abort Buffer and I/O Buffer in each channel thereby allowing parallel queuing of regular I/O commands and Abort commands. Processing of Abort commands is prioritized such that Abort commands can be processed before all I/O commands received before the abort command are processed. The use of parallel queuing of regular I/O commands and Abort commands is of particular advantage in systems where multiple channels may receive abort commands simultaneously in the situation where the multiple channels share a common communication resource. In a particular embodiment the abort processing logic is implemented in a fiber channel adapter card which includes a proxy host bus adapter device which connects multiple HBAs via fiber channel to a storage area network.Type: GrantFiled: June 9, 2016Date of Patent: September 24, 2019Assignee: ORACLE INTERNATIONAL CORPORATIONInventors: Sajid Zia, Viswa Krishnamurthy, Louise Yeung
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Patent number: 10067685Abstract: Systems and methods are disclosed for identifying disk drives and processing data access requests. A disk drive may be identified as an Advanced Host Controller Interface (AHCI) drive, a Non-Volatile Memory Express (NVME) drive, and/or an ATA packet interface (ATAPI) drive. Data access requests for the disk drive may be translated to NVME commands, AHCI commands, or ATAPI commands, based on whether the drive is identified as a NVME drive, an AHCI drive, and/or an ATAPI drive.Type: GrantFiled: October 16, 2017Date of Patent: September 4, 2018Assignee: Western Digital Technologies, Inc.Inventor: John E. Maroney
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Patent number: 10025510Abstract: A technique for use in managing data storage in a data storage system is disclosed. A first and second data storage commands (DSC) are received from a storage driver stack. Determining if the first DSC and the second DSC are both related aspects of a combined storage command and if so, establishing a pairing structure to pair the first DSC and the second DSC together. Fulfilling the combined storage command by fulfilling both the first DSC and the second DSC with reference to the pairing structure.Type: GrantFiled: June 30, 2016Date of Patent: July 17, 2018Assignee: EMC IP Holding Company LLCInventors: Milind Koli, Timothy C. Ng, James Mark Holt, David Haase, Vedashree Anantha Raman
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Patent number: 9906593Abstract: An information processing device is disclosed. The information processing device includes an identifier acquisition unit configured to receive an identifier of an associated device, and an application specifier generation unit. The application specifier generation unit is configured to generate a first application specifier identifying a first application corresponding to the information processing device, and a second application specifier based on the received identifier and identifying a second application corresponding to the associated device. The information processing device further includes a transmission unit configured to transmit the first and second application specifiers to a server, and an application reception unit configured to receive the first application.Type: GrantFiled: May 29, 2012Date of Patent: February 27, 2018Assignee: Saturn Licensing LLCInventor: Yoshinori Ohashi
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Patent number: 9898429Abstract: Control circuitry controls the operations of a central processing unit, CPU, which is associated with a nominal clock frequency. The CPU is further coupled to an I/O range and configured to deliver input to an application. The control circuitry controls the CPU to poll the I/O range for input to the application. The control circuitry also monitors whether or not each poll results in input to the application and adjusts a clock frequency at which the CPU operates to a clock frequency lower than the nominal clock frequency if a pre-defined number of polls resulting in no input is detected. Methods and a central computer server of an automated exchange system are also provided.Type: GrantFiled: May 18, 2016Date of Patent: February 20, 2018Assignee: Nasdaq Technology ABInventor: Hakan Winbom
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Patent number: 9824046Abstract: A method of triggering a desired operating mode in a universal serial bus (USB)-compatible client device is provided. A USB-compatible client device detects that it has been coupled to a USB-compatible host device via a USB bus. The USB-compatible client device attempts to pull a data line of the USB bus high. The USB-compatible client device then ascertains that the data line remains pulled low, thereby indicating that the USB-compatible client device should enter a first mode of operation. The USB-compatible client device operates according to the first mode of operation.Type: GrantFiled: July 22, 2014Date of Patent: November 21, 2017Assignee: QUALCOMM IncorporatedInventors: Terrence Brian Remple, Devdutt Patnaik, Jay Yu Jae Choi, Yanru Li
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Patent number: 9792048Abstract: Systems and methods are disclosed for identifying disk drives and processing data access requests. A disk drive may be identified as an Advanced Host Controller Interface (AHCI) drive, a Non-Volatile Memory Express (NVME) drive, and/or an ATA packet interface (ATAPI) drive. Data access requests for the disk drive may be translated to NVME commands, AHCI commands, or ATAPI commands, based on whether the drive is identified as a NVME drive, an AHCI drive, and/or an ATAPI drive.Type: GrantFiled: June 22, 2015Date of Patent: October 17, 2017Assignee: Western Digital Technologies, Inc.Inventor: John E. Maroney
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Patent number: 9658929Abstract: A computer implemented method, system, and program product for asynchronous splitting in a virtual replication environment, the method comprising intercepting IO directed to one or more volumes, adding, at a splitter, ordering info to the IOs, and sending the IOs to an appliance.Type: GrantFiled: August 29, 2012Date of Patent: May 23, 2017Assignee: EMC IP Holding Company LLCInventors: Assaf Natanzon, Saar Cohen
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Patent number: 9507620Abstract: A method and system for the display device configuration in a VM environment are disclosed. In one embodiment, the method includes determining one or more devices in a display system of a client and transmitting client display system information to a host running one or more VMs. Further, a notification is received by the client from the host indicating that display settings of the VM were configured based on the client display system information.Type: GrantFiled: June 19, 2013Date of Patent: November 29, 2016Assignee: Red Hat Israel, Ltd.Inventors: Yaniv Kamay, Arnon Gilboa
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Patent number: 9471522Abstract: According to embodiments of the invention, methods, computer system, and apparatus for virtual channel management and bus multiplexing are disclosed. The method may include establishing a virtual channel from a first device to a second device via a bus, the bus having a first bus capacity and a second bus capacity, the second bus capacity having greater capacity than the first bus capacity, determining whether a store command is issued for the first bus capacity, determining whether the first bus capacity is available, and allocating the second bus capacity and marking the second bus capacity as unavailable in response to the store command if the first bus capacity is unavailable.Type: GrantFiled: December 4, 2013Date of Patent: October 18, 2016Assignee: International Business Machines CorporationInventors: Norbert Hagspiel, Sascha Junghans, Matthias Klein, Joerg Walter
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Patent number: 9354680Abstract: An image forming apparatus includes an update unit configured to execute firmware update processing, a storage unit configured to store information relating to a change in a setting value of the image forming apparatus produced by the firmware update processing, a selection unit configured to select a specific update history entry from a firmware update history, and a display unit configured to display information relating to the change in the setting value produced by the firmware update processing corresponding to the specific update history entry selected by the selection unit based on the information stored in the storage unit.Type: GrantFiled: January 29, 2013Date of Patent: May 31, 2016Assignee: Canon Kabushiki KaishaInventor: Kenji Kasuya
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Patent number: 9311270Abstract: A scheduler and scheduling method perform scheduling for a reconfigurable architecture. The scheduling, performed by the scheduler, includes path information extracting including extracting direct path information and indirect path information between functional units in a reconfigurable array complying with predefined architecture requirements, based on architecture information of the reconfigurable array, command selecting including selecting a command from a data flow graph (DFG) showing commands to be executed by the reconfigurable array, and scheduling including scheduling the selected command based on the extracted direct path information and indirect path information.Type: GrantFiled: March 5, 2014Date of Patent: April 12, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Won-Sub Kim, Yoonseo Choi, Hae-Woo Park
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Patent number: 9262083Abstract: A virtualized storage system comprises at least one host, at least one virtual array, a backend array and a management server. The host requests storage operations to the virtual array, and the virtual array executes storage operations for the host. The backend array, coupled to the virtual array, comprises physical storage for the virtual array. The management server determines the efficiency for the virtual array. The management server determines an input throughput data rate between the host and the virtual array based on storage operations between host and virtual array. The management server also determines an output throughput data rate, from the virtual array to the backend array. The output throughput data rate is based on the storage operations that require access to the backend array. The management server determines the efficiency of the virtual array using the input throughput data rate and the output throughput data rate.Type: GrantFiled: April 25, 2014Date of Patent: February 16, 2016Assignee: NETAPP, INC.Inventors: Ran Gilboa, Barry S. Kleinman, Anton Sergeev
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Patent number: 9201790Abstract: The present disclosure is directed to systems and methods of matching data rates. In a particular embodiment, a device includes a first data bus and a controller having a first output coupled to the first data bus to provide data to the first data bus. The device also includes a first memory of a first type coupled to the first data bus. The first memory may have a first input to receive data from the controller via the first data bus. The device also includes logic coupled to the first data bus. The logic may have a second input coupled to the first data bus to receive data from the controller via the first data bus. The device may also include a second data bus coupled to the logic. The logic may have a second output coupled to the second data bus to provide data to the second data bus. The logic may also include a second memory of a second type coupled to the second data bus. The second memory may have a third input to selectively receive data from the logic via the second data bus.Type: GrantFiled: October 9, 2007Date of Patent: December 1, 2015Assignee: Seagate Technology LLCInventors: Stanton MacDonough Keeler, Todd Strope
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Patent number: 9195971Abstract: A method for planning a meeting in a cloud computing environment is disclosed. The method embodiment includes receiving by a server a meeting configuration file including information identifying a meeting, a plurality of meeting collaborators, and/or a plurality of meeting participants. When the meeting configuration file is received, the server is configured to generate a virtual planning space associated with the meeting and located in a cloud computing environment, to transmit a message to the plurality of meeting collaborators that includes an invitation to collaborate in the meeting via the virtual planning space, and to receive an indication to load planning content that includes at least one data object. In response to receiving the indication, the server associates the planning content with the virtual planning space so that the planning content is accessible by the meeting collaborators via the virtual planning space in the cloud computing environment.Type: GrantFiled: January 6, 2012Date of Patent: November 24, 2015Assignee: salesforce.com, inc.Inventors: Jager McConnell, Ciara Peter
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Patent number: 9176708Abstract: The invention is directed to a primary data storage system for use in a computer network in which a network allows user computers to transfer data to/from the primary data storage system. In one embodiment, the primary data storage system allows an administrator of the computer network to define two or more volumes on the primary data storage system and define quality of service goals for each volume. The primary data storage system operates so as allocate resources within the primary data storage system to the volumes based upon criticality and performance goals specified for each of the volumes.Type: GrantFiled: November 7, 2012Date of Patent: November 3, 2015Assignee: NexGen Storage, Inc.Inventors: David A. Gallant, Kelly E. Long, Paul A. Ashmore, Sebastian Piotr Sobolewski
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Patent number: 9069806Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for virtual block storage. In one aspect, a method includes receiving a request to initialize a virtual machine, the virtual machine having an associated virtual block device; accessing a file map comprising a plurality of file map entries; determining file map entries corresponding to blocks of data allocated to the virtual block device and one or more files in which the blocks of data allocated to the virtual block device are stored; determining that a particular one of the blocks allocated to the virtual block device has been written to a new position not associated with the particular block in the file map; and updating the position associated with the particular block to the new position.Type: GrantFiled: March 14, 2013Date of Patent: June 30, 2015Assignee: Google Inc.Inventors: Andrew Kadatch, Sergey Khorun
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Patent number: 9052898Abstract: A mobile device having an identifier supports a mobile server hosting an HTML web site. The mobile device is power cycled according to an ON-OFF timing defined by timing parameters. An association between the timing parameters and the identifier of the mobile device is provided. A web client sends a request to access the mobile device, using a public mobile device identifier. Optionally, the public mobile device identifier is mapped to identify ON-OFF timing parameters of the mobile device, and web client access to the mobile device is controlled based on the ON-OFF timing parameters.Type: GrantFiled: August 31, 2012Date of Patent: June 9, 2015Assignee: Qualcomm IncorporatedInventors: Yuval Corey Hershko, Nir Strauss
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Patent number: 9043494Abstract: A method includes configuring a processing circuit to perform: receiving a control word for an I/O operation, forwarding a transport command control block (TCCB) from the channel subsystem to a control unit, gathering data associated with the I/O operation, and transmitting the gathered data to the control unit in the I/O processing system. Gathering the data includes accessing entries of a list of storage addresses that collectively specifying the data. Based on an entry of the list comprising a not-set first flag and a corresponding first storage address, gathering data from a corresponding storage location, and based on an entry of the list comprising a set first flag and a corresponding second storage address, obtaining a next entry of the list from a second storage location.Type: GrantFiled: March 4, 2013Date of Patent: May 26, 2015Assignee: International Business Machines CorporationInventors: Daniel F. Casper, Mark P. Bendyk, John R. Flanagan, Catherine C. Huang, Matthew J. Kalos, Ugochukwu C. Njoku, Dale F. Riedy, Gustav E. Sittmann, III, Harry M. Yudenfriend
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Patent number: 9043513Abstract: A memory system includes a CPU that communicates commands and addresses to a main-memory module. The module includes a buffer circuit that relays commands and data between the CPU and the main memory. The memory module additionally includes an embedded processor that shares access to main memory in support of peripheral functionality, such as graphics processing, for improved overall system performance. The buffer circuit facilitates the communication of instructions and data between CPU and the peripheral processor in a manner that minimizes or eliminates the need to modify CPU, and consequently reduces practical barriers to the adoption of main-memory modules with integrated processing power.Type: GrantFiled: December 17, 2014Date of Patent: May 26, 2015Assignee: Rambus Inc.Inventors: Richard E. Perego, Pradeep Batra, Steven Woo, Lawrence Lai, Chi-Ming Yeung
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Publication number: 20150134855Abstract: A controller includes a virtual memory mapped to device-side Peripheral component interconnect express address space includes virtual buffers allocation for each data transfer. Each virtual buffer is associated with a scatter/gather list entry in a host memory. The controller executes direct transfers between Peripheral component interconnect express devices and host memory without introducing address mapping dependencies between the host and device domains.Type: ApplicationFiled: May 28, 2014Publication date: May 14, 2015Applicant: LSI CorporationInventor: Robert L. Sheffield
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Publication number: 20150134856Abstract: A control device for controlling a safety device which can be connected to a master assembly by means of an IO link is characterized in that a safety protocol can be transmitted via an IO link connection.Type: ApplicationFiled: May 8, 2013Publication date: May 14, 2015Applicant: Balluff GmbHInventor: Albert Feinaeugle
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Patent number: 9021155Abstract: A computer program product is provided for performing input/output (I/O) processing. The computer program product is configured to perform: generating and storing in local channel memory at least one address control word (ACW) specifying one or more host memory locations for data transfer and including a data discard field; generating an address control structure specifying a local channel memory location of a corresponding ACW; receiving one or more data transfer requests from a network interface that each corresponding address control structure information; accessing an ACW and routing the data transfer request to a host memory location specified in the ACW; and responsive to encountering an error during at least one of the accessing and the routing, discarding the one or more data transfer requests and setting the data discard field to a value configured to instruct a channel to discard any subsequent data transfer requests associated with the ACW.Type: GrantFiled: June 1, 2011Date of Patent: April 28, 2015Assignee: International Business Machines CorporationInventors: Carl A. Bender, Clinton E. Bubb, Daniel F. Casper, John R. Flanagan
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Patent number: 9015352Abstract: The present invention includes an adaptable high-performance node (RXN) with several features that enable it to provide high performance along with adaptability. A preferred embodiment of the RXN includes a run-time configurable data path and control path. The RXN supports multi-precision arithmetic including 8, 16, 24, and 32 bit codes. Data flow can be reconfigured to minimize register accesses for different operations. For example, multiply-accumulate operations can be performed with minimal, or no, register stores by reconfiguration of the data path. Predetermined kernels can be configured during a setup phase so that the RXN can efficiently execute, e.g., Discrete Cosine Transform (DCT), Fast-Fourier Transform (FFT) and other operations. Other features are provided.Type: GrantFiled: March 31, 2014Date of Patent: April 21, 2015Assignee: Altera CorporationInventor: Amit Ramchandran
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Patent number: 9009374Abstract: A portable computer-peripheral apparatus comprises a Universal Serial Bus (USB) connector. The apparatus is operable to communicate with a computer terminal (e.g. a ‘PC’). Following connection to the PC, the apparatus initializes (i.e. presents or enumerates itself) as a HID keyboard and then sends to the terminal a first predefined sequence of keycodes automatically without manual interaction; the keycodes complying with the human interface device (HID) keyboard standard protocol. Each keycode represents and simulates a keystroke, such as those performed when a user strikes a key on the PC keyboard. The keycode sequence automates the direct access to content, and/or the initiation of a task or other process.Type: GrantFiled: January 5, 2007Date of Patent: April 14, 2015Assignee: Visible Computing LimitedInventors: Thomas Steven Hulbert, Durrell Grant Bevington Bishop
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Patent number: 8996733Abstract: The invention relates to a method for allocating an operating address to an operating device for luminous means, in which the operating address is transmitted to the operating device in digitally coded form via an interface which is configured to connect a light sensor. The operating address is allocated by a user using a handheld device to transmit optical digital signals to a light sensor or infrared sensor which is connected to the interface.Type: GrantFiled: July 23, 2009Date of Patent: March 31, 2015Assignee: Tridonic GmbH & Co. KGInventors: Patrick Zueger, Andre Mitterbacher, Reto Sprenger, Markus Kuenzli, Reinhard Boeckle, Roger Kistler
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Patent number: 8990437Abstract: A software or hardware agent running on a personal computing (PC) device provides allows a consumer electronic device connected to the PC device over a high definition multimedia interface (HDMI) network to control the PC device using standardized commands. This enables a user to control the PC device and other consumer electronic devices that are connected to the HDMI network using a single interface. The agent responds as a consumer electronic device and translates the standardized commands as universal serial bus (USB) human interface device (HID) input reports to the PC device operating system. The agent represents the specific capabilities of the PC device as standard consumer electronic device controls.Type: GrantFiled: November 13, 2007Date of Patent: March 24, 2015Assignee: Nvidia CorporationInventors: Mark A. Overby, Robert William Chapman
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Patent number: 8984182Abstract: The present disclosure includes systems and techniques relating to input/output (I/O) command aggregation for Small Computer System Interface (SCSI) enabled devices.Type: GrantFiled: March 27, 2013Date of Patent: March 17, 2015Assignee: Marvell International Ltd.Inventors: Qun Zhao, Xinhai Kang, Michael Wang, Jacky Feng, Nancy Xu, Andy Yan
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Publication number: 20150067192Abstract: In a method for adjusting SAS addresses of SAS expanders in an SAS storage system, an initial SAS address of a specified SAS expander is read when the specified SAS expander is first connected to a processor of the SAS storage system. SAS addresses of other SAS expanders that are already connected to the processor are obtained. The initial SAS address of the specified SAS expander is compared with the obtained SAS addresses. When the initial SAS address is identical to one of the obtained SAS addresses, the initial SAS address is adjusted according to a predefined address number to generate an updated SAS address of the specified SAS expander. The initial SAS address of the specified SAS expander is reset according to the updated SAS address.Type: ApplicationFiled: January 24, 2014Publication date: March 5, 2015Applicant: HON HAI PRECISION INDUSTRY CO., LTD.Inventor: CHIH-HUANG WU
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Patent number: 8966124Abstract: Systems and methods for streaming data. Systems allow read/write across multiple or N device modules. Device modules on a bus ring configure at power up (during initialization process); this process informs each device module of its associated address values. Each ringed device module analyzes an address indicator word, which identifies an address at which a read/write operation is intended for, and compares the address designated by the address indicator word to its assigned addresses; when the address designated by the address indicator word is an address associated with the device module, the device module read/writes from/to the address designated by the address indicator word. Memory controller (ring controller or master bus) is not required to ‘know’ which memory chip/device module in a daisy chain the address command word is intended for. Therefore, system embodiments allow streaming without consideration of a number of memory chips/device modules on bus.Type: GrantFiled: September 26, 2012Date of Patent: February 24, 2015Assignee: The United States of America as Represented by the Secretary of the NavyInventor: Ronald Norman Prusia
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Patent number: 8914458Abstract: A method for data transfer includes receiving in an input/output (I/O) operation a first segment of data to be written to a specified virtual address in a host memory. Upon receiving the first segment of the data, it is detected that a first page that contains the specified virtual address is swapped out of the host memory. At least one second page of the host memory is identified, to which a second segment of the data is expected to be written. Responsively to detecting that the first page is swapped out and to identifying the at least one second page, at least the first and second pages are swapped into the host memory. After swapping at least the first and second pages into the host memory, the data are written to the first and second pages.Type: GrantFiled: September 27, 2012Date of Patent: December 16, 2014Assignee: Mellanox Technologies Ltd.Inventors: Shachar Raindel, Haggai Eran, Liran Liss, Noam Bloch
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Publication number: 20140365687Abstract: According to one embodiment, a display have a USB host configured to divide object data, and to transmit the divided object data and a unique ID allocated to the object data through a USB cable, a USB device configured to receive the object data from the USB host through the USB cable, and a display unit configured to display an image corresponding to the object data.Type: ApplicationFiled: June 5, 2013Publication date: December 11, 2014Inventors: Toshihiro Morohoshi, Yuichi Inoue
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Patent number: 8909833Abstract: Systems and methods for streaming data. Systems allow read/write across multiple or N device modules. Device modules on a bus ring configure at power up (during initialization process); this process informs each device module of its associated address values. Each ringed device module analyzes an address indicator word, which identifies an address at which a read/write operation is intended for, and compares the address designated by the address indicator word to its assigned addresses; when the address designated by the address indicator word is an address associated with the device module, the device module read/writes from/to the address designated by the address indicator word. Memory controller (ring controller or master bus) is not required to ‘know’ which memory chip/device module in a daisy chain the address command word is intended for. Therefore, system embodiments allow streaming without consideration of a number of memory chips/device modules on bus.Type: GrantFiled: September 26, 2012Date of Patent: December 9, 2014Assignee: The United States of America as Represented by the Secretary of the NavyInventor: Ronald Norman Prusia