Dynamic Patents (Class 710/41)
  • Patent number: 10353791
    Abstract: An approach for dynamically changing a copy policy associated with a cluster grid for tape storage virtualization which involves monitoring one or more statuses of a plurality of clusters associated with the cluster grid, wherein the one or more of the plurality of clusters are assigned one of a plurality of copy modes, detecting that at least one of the plurality of clusters, having a highest priority copy mode associated with the cluster grid, is unavailable, selecting an available second cluster of the plurality of clusters and changing the copy policy wherein the available second cluster is assigned the highest priority copy mode.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: July 16, 2019
    Assignee: International Business Machines Corporation
    Inventors: Thorsten Altmannsberger, Katja I. Denefleh, Katsuyoshi Katori, Sosuke Matsui
  • Patent number: 10318345
    Abstract: The present disclosure relates to dynamic queue placement. In one embodiment, a method includes receiving a plurality of items for processing by a computing device, wherein each item received by the computing device is associated with a priority type. The method also includes determining a computed code for the plurality of items to assign a processing order in a queue for each of the plurality of items. The computed code is based on a timeout period for a lowest priority item of the plurality of items, and a safety margin interval of each of the plurality of items, the safety margin level including a time period for processing an item. The method may also include placing the plurality of items into the queue based on the computed code of each item.
    Type: Grant
    Filed: April 20, 2015
    Date of Patent: June 11, 2019
    Assignees: HISENSE USA CORP., HISENSE ELECTRIC CO., LTD., HISENSE INTERNATIONAL CO., LTD.
    Inventor: Roger Stringer
  • Patent number: 10169182
    Abstract: Monitoring a level of utilization is provided. A threshold is determined based, at least in part, on a count of service channels of a device. An upper boundary value of a numerical range is determined based, at least in part, on the count of service channels. A lower boundary value of the numerical range is determined based, at least in part, on the threshold. Whether a count of outstanding requests of the device is contained within the numerical range is determined. An estimated level of utilization of the device is determined based, at least in part, on the upper boundary value, the lower boundary value, the count of service channels, and the count of outstanding requests. The estimated level of utilization is reported.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: January 1, 2019
    Assignee: International Business Machines Corporation
    Inventors: Bruce McNutt, Richard A. Ripberger
  • Patent number: 10133611
    Abstract: A system and method for communicating data between a first software and a second software located on first and second devices, respectively, has a hardware driver and memory associated with each device. Each communication of data from the first software to the second software allocates memory to manage data to be communicated from the first software to the second software, provides memory allocation information to the hardware driver associated with the first software, and transmits the data from the first hardware driver to the second hardware driver for delivery to the second software via the memory associated with the second software.
    Type: Grant
    Filed: October 7, 2014
    Date of Patent: November 20, 2018
    Assignee: Synopsys, Inc.
    Inventors: Andrew Alexander Elias, Jean-Pierre Thibault, Nick Bowler, Steven Lougheed, Michael James Lewis
  • Patent number: 10048875
    Abstract: Embodiments of this disclosure relate to improving solid-state non-volatile memory management. Embodiments improve the management of solid-state non-volatile memory by providing an execution manager responsible for controlling the timing of providing a request to a memory unit for execution. In embodiments, the execution manager traverses a list of received requests for memory access and dispatches commands for execution. In embodiments, if a request is directed to memory units which have reached a threshold for outstanding requests, the request may be skipped so that other requests can be dispatched for memory units which have not yet reached the threshold.
    Type: Grant
    Filed: October 14, 2016
    Date of Patent: August 14, 2018
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventor: Lan D. Phan
  • Patent number: 9569375
    Abstract: A system, device and method for communicating between a host device and a plurality of peripheral devices wherein the communications utilize a single interface that is supported by the host. The host includes a plurality of class drivers and miniport drivers. Each of the class drivers implements functionality associated with one or more of the plurality of peripheral devices. Each miniport driver provides an interface by which one or more of the class drivers communicate with one or more of the plurality peripheral devices using class protocols, wherein the miniport drivers communicate through a single host interface supported by the host. An embedded controller interfaces with the plurality of peripheral devices using the respective native bus protocols of the peripheral devices and wherein the embedded controller interfaces with the plurality of miniport drivers using the single host interface.
    Type: Grant
    Filed: May 12, 2015
    Date of Patent: February 14, 2017
    Assignee: MICROCHIP TECHNOLOGY INCORPORATED
    Inventors: Ravindra Kumar, Jayavasanth Vethamanickam, Arun Krishnan Mundan Vilakath
  • Patent number: 9467166
    Abstract: Technology is disclosed herein for compressing, encoding, and otherwise reducing the size of resource files. In at least one implementation, similarity compression is employed to reduce the size of a resource file. In another implementation, map-less encoding is employed to reduce the number of bytes used to represent a resource string. Bit-level compression is employed in another implementation to reduce the quantity of bits used to encode each character in a string. In addition, implementations are disclosed related to technology for naming strings and accelerated string location and retrieval.
    Type: Grant
    Filed: January 12, 2015
    Date of Patent: October 11, 2016
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Anatoliy Burukhin, Thomas Gary Moore, Thomas Jeffrey Lavoy, Rory Keary
  • Patent number: 9348767
    Abstract: According to an embodiment of the invention, a method for operating a data processing machine is described in which data about a state of the machine is written to a location in storage. The location is one that is accessible to software that may be written for the machine. The state data as written is encoded. This state data may be recovered from the storage according to a decoding process. Other embodiments are also described and claimed.
    Type: Grant
    Filed: March 6, 2012
    Date of Patent: May 24, 2016
    Assignee: Intel Corporation
    Inventors: Scott H. Robinson, Gustavo P. Espinosa, Steven M. Bennett
  • Patent number: 9348648
    Abstract: In accordance with embodiments, there are provided mechanisms and methods for facilitating dynamic workload scheduling and routing of message queues for fair management of the resources for application servers in an on-demand services environment. In one embodiment and by way of example, a method includes detecting an organization of a plurality of organization that is starving for resources. The organization may be seeking performance of a job request at a computing system within a multi-tenant database system. The method may further include consulting, based on a routing policy, a routing table for a plurality of queues available for processing the job request, selecting a queue of the plurality of queues for the organization based on a fair usage analysis obtained from the routing policy, and routing the job request to the selected queue.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 24, 2016
    Assignee: salesforce.com, inc.
    Inventors: Xiaodan Wang, Vijayanth Devadhar, Praveen Murugesan
  • Patent number: 9043512
    Abstract: Systems, mediums, and methods are provided for scheduling input/output requests to a storage system. The input output requests may be received, categorized based on their priority, and scheduled for retrieval from the storage system. Lower priority requests may be divided into smaller sub-requests, and the sub-requests may be scheduled for retrieval only when there are no pending higher priority requests, and/or when higher priority requests are not predicted to arrive for a certain period of time. By servicing the small sub-requests rather than the entire lower priority request, the retrieval of the lower priority request may be paused in the event that a high priority request arrives while the lower priority request is being serviced.
    Type: Grant
    Filed: January 7, 2015
    Date of Patent: May 26, 2015
    Assignee: Google Inc.
    Inventor: Arif Merchant
  • Patent number: 9037767
    Abstract: An arbiter configured to selectively grant access to a shared bus to a plurality of requestors. The arbiter includes a plurality of request shapers each configured to receive a request signal corresponding to a request, from a respective one of the plurality of requestors, to access the shared bus, a base priority signal indicating a base priority level of the respective one of the plurality of requestors, and a delta period signal indicating a counter value threshold. The counter value threshold corresponds to a threshold amount of time, and the counter value threshold is different for each of the plurality of requestors. Each of the plurality of request shapes is configured to separately output the request signal and a priority signal indicating a priority level of the request based on the base priority level, the counter value threshold, and a counter value.
    Type: Grant
    Filed: November 5, 2012
    Date of Patent: May 19, 2015
    Assignee: MARVELL INTERNATIONAL LTD.
    Inventor: Bhaskar Chowdhuri
  • Patent number: 9032104
    Abstract: A direct memory access (DMA) engine schedules data transfer requests of a data processing system according to both an assigned transfer priority and the deadline for completing a transfer.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: May 12, 2015
    Assignee: Cradle IP, LLC
    Inventors: Moshe B. Simon, Erik P. Machnicki, David A. Harrison
  • Patent number: 9021158
    Abstract: A memory device includes a memory array with a plurality of memory elements. Each memory element is configured to store data. The device includes an input/output (I/O) buffer coupled to the memory array. The I/O buffer is configured to receive data from an I/O interface of a memory device controller and write the data to the memory array. The device includes a memory control manager coupled to the memory array. The memory control manager is configured to pause a program operation to the memory array in response to receiving a pause command. The memory control manager is also configured to resume the program operation in response to receiving a resume command.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: April 28, 2015
    Assignee: SanDisk Technologies, Inc.
    Inventors: Jea Woong Hyun, Mark Brinicombe, Hairong Sun, Hao Zhong, John Strasser, Robert Wood
  • Patent number: 8996739
    Abstract: A method for configuring an electricity system including providing a first programmable electronic device, providing a further programmable electronic device adapted to communicate with the first programmable electronic device and configurable according to a first communication configuration mode which is dynamic or a static, providing a first configuration description file defining communications between the first and further programmable electronic devices according to a second communication configuration mode opposite to the first mode, and processing via computer the first file to convert it into a converted configuration description file defining communications configuration between the first and further programmable electronic devices according to the first mode.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: March 31, 2015
    Assignee: ABB Technology AG
    Inventors: Cristina Carrara, Pietro Danelli
  • Patent number: 8972627
    Abstract: An apparatus, system, and method are disclosed for managing operations for data storage media. An adjustment module interrupts or otherwise adjusts execution of an executing operation on the data storage media. A schedule module executes a pending operation on the data storage media in response to adjusting execution of the executing operation. The pending operation comprises a higher execution priority than the executing operation. The schedule module finishes execution of the executing operation in response to completing execution of the pending operation.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: March 3, 2015
    Assignee: Fusion-io, Inc.
    Inventors: John Strasser, David Flynn, Robert Wood
  • Patent number: 8949489
    Abstract: Systems, mediums, and methods are provided for scheduling input/output requests to a storage system. The input output requests may be received, categorized based on their priority, and scheduled for retrieval from the storage system. Lower priority requests may be divided into smaller sub-requests, and the sub-requests may be scheduled for retrieval only when there are no pending higher priority requests, and/or when higher priority requests are not predicted to arrive for a certain period of time. By servicing the small sub-requests rather than the entire lower priority request, the retrieval of the lower priority request may be paused in the event that a high priority request arrives while the lower priority request is being serviced.
    Type: Grant
    Filed: March 21, 2012
    Date of Patent: February 3, 2015
    Assignee: Google Inc.
    Inventor: Arif Merchant
  • Patent number: 8930601
    Abstract: A transaction routing device (e.g. an interconnect) for routing transactions in an integrated circuit includes arbitration circuitry for performing arbitration between a plurality of candidate transactions using attribute values associated with the candidate transactions. Candidate transactions are selected for routing to a destination device in dependence on the arbitration. In a cycle in which a new candidate transaction is received, the arbitration is performed using a default attribute value as the attribute value for the new transaction. Meanwhile, the actual attribute value is stored to an attribute storage unit. In a following processing cycle, if the new candidate transaction has not yet been selected for muting, then the arbitration is performed using the actual attribute value stored in the storage unit.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: January 6, 2015
    Assignee: ARM Limited
    Inventor: Arthur Laughton
  • Patent number: 8918557
    Abstract: A SAS expander configured to operate as a SAS expander hub receives IO requests from a plurality of connected SAS expanders. Each SAS expander determines if it is capable of servicing a received IO request and sending such IO requests to the SAS expander hub if necessary. The SAS expander hub relays the IO requests to SAS expanders connected to data storage devices capable of servicing such IO requests.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: December 23, 2014
    Assignee: LSI Corporation
    Inventor: Brett J. Henning
  • Patent number: 8850082
    Abstract: A system for implementing a virtual Universal Serial Bus (USB) compound device with a simulated hub enables a single physical USB device, such as a USB peripheral device, to expose multiple stand-alone functions on the USB bus. Logical functions on the single physical USB device can be added and removed dynamically without re-enumerating the entire device and without affecting the state of other functions. Logical functions can also be independently implemented on any of a number of processors in a system that has access to the USB hardware. Each processor can enumerate as one or more USB devices via the virtual hub. Initialization of logical functions can be performed via the virtual USB hub to maintain a charging current level from a USB host in a device having a discharged battery.
    Type: Grant
    Filed: August 22, 2011
    Date of Patent: September 30, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Igor Malamant, Thomas E. Virgil
  • Patent number: 8843672
    Abstract: An access method includes: obtaining, by a computer, a result of monitoring a busy rate and a number of access operations per unit time of a storage device, the storage device having a first storage area and a second storage area; calculating a characteristic of correlation between the busy rate and the number of access operations per unit time based on the result; calculating a second number of access operations per unit time based on the characteristic of the correlation such that a sum of a first busy rate corresponding to a first number of access operations per unit time and a second busy rate corresponding to a second number of access operations per unit time becomes equal to or lower than a given busy rate; and controlling a number of operations to access the second storage area per unit time based on the second number of access operations.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: September 23, 2014
    Assignee: Fujitsu Limited
    Inventors: Kazuichi Oe, Kazutaka Ogihara, Yasuo Noguchi, Tatsuo Kumano, Masahisa Tamura, Yoshihiro Tsuchiya, Takashi Watanabe, Toshihiro Ozawa
  • Patent number: 8843671
    Abstract: Various embodiments of the invention provide resource management of available data bandwidth of a SAS system in a non-uniform way. In certain embodiments, arbitration wait time values are adaptively modified to achieve a specified performance quota for a link.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: September 23, 2014
    Assignee: PMC-Sierra US Inc.
    Inventors: Gregory Arthur Tabor, Kurt Marshall Schwemmer, John Matthew Adams
  • Patent number: 8782304
    Abstract: The present disclosure relates to a method for enabling a virtual processing unit to access a peripheral unit, the virtual processing unit being implemented by a physical processing unit connected to the peripheral unit, the method comprising a step of transmitting to the peripheral unit a request sent by the virtual processing unit to access a service provided by the peripheral unit, the access request comprising at least one parameter and an identifier of the virtual unit, the method comprising steps, executed by the peripheral unit after receiving an access request, of allocating a set of registers to the virtual unit identifier received, storing the parameter received in the register set allocated, and when the peripheral unit is available for processing a request, selecting one of the register sets, and triggering a process in the peripheral unit from the parameters stored in the selected register set.
    Type: Grant
    Filed: May 11, 2012
    Date of Patent: July 15, 2014
    Assignee: STMicroelectronics Rousset SAS
    Inventors: Christian Schwarz, Joel Porquet
  • Patent number: 8732356
    Abstract: A storage system includes: an access path management unit managing a state of each access path for each logical disk; an I/O speed calculation unit storing, for each of the access paths, a data size and required time obtained when an I/O is executed, and calculates an I/O speed for every calculation cycle; a path candidate selection unit selecting an access path in the available state as an I/O use candidate; and a path candidate exclusion unit which excludes access paths of which speed is slow from the candidates, using a highest speed value among the speed values of the access paths selected as candidates, and the access path management unit sequentially changes the states of the access paths, out of the remaining candidates, to the I/O use states, in order of the I/O speed from the fastest until the number of access paths reaches the maximum number of paths.
    Type: Grant
    Filed: March 20, 2012
    Date of Patent: May 20, 2014
    Assignee: NEC Corporation
    Inventor: Masanori Kabakura
  • Patent number: 8560746
    Abstract: An access control apparatus which establishes a connection based on connection establishment requests from connected devices and controls accesses to a connection target device. The access control apparatus includes a connection information managing unit which manages connect wait conditions to the connection target device of the connected devices based on criterion information in a connection request transmitted from the connected devices and determination for selecting one connected device from the connected devices. The access control apparatus includes a selecting unit which selects one of the connected devices which has a delay tendency related to connection based on adjustment information which is set in accordance with the connect wait conditions of the connected devices and increases a delay tendency in connection of the connected device, and a determining unit which determines the connected device selected by the selecting unit as one to be connected to the connection target device.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: October 15, 2013
    Assignee: Fujitsu Limited
    Inventors: Nobuyuki Honjo, Atsuhiro Otaka, Atsushi Katano
  • Patent number: 8478911
    Abstract: Methods and systems for migrating data between storage tiers may include various operations, including, but not limited to: determining at least one activity index of at least one data storage region; receiving an input/output request addressing at least one data segment included in the at least one data storage region; qualifying a data segment addressed by the input/output request for migration to at least one higher-performing storage device; and adding a data segment reference associated with a qualified data segment to a priority queue according to the at least one activity index.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: July 2, 2013
    Assignee: LSI Corporation
    Inventors: Brian McKean, Donald Humlicek
  • Patent number: 8417849
    Abstract: A method to adjust a multi-path device reservation by supplying a computing device and a storage controller interconnected with a communication link. The method further reserves a data storage device in communication with the storage controller, where that data storage device reservation is held by a first communication path group comprising a first plurality of communication paths configured in the communication link. If the method detects a failed communication path configured in the first communication path group, the method configures a second communication path group by removing the failed communication path from the first communication path group, wherein the second communication path group maintains the data storage device reservation.
    Type: Grant
    Filed: October 7, 2009
    Date of Patent: April 9, 2013
    Assignee: International Business Machines Corporation
    Inventors: Clint Alan Hardy, Matthew Joseph Kalos, Richard Anthony Ripberger
  • Patent number: 8407328
    Abstract: Audio visual or other equipment modules in a common enclosure are controlled through an SNMP control agent by interrogating module locations for the presence of an equipment module; determining an equipment type; determining a list of available control objects associated with that equipment type; associating values identified by equipment type and by control parameter with the control objects of equipment modules to be controlled; and communicating said values across a network.
    Type: Grant
    Filed: April 14, 2006
    Date of Patent: March 26, 2013
    Assignee: Snell & Wilcox Limited
    Inventors: Sandy Kellagher, Jonathan Riches
  • Patent number: 8407710
    Abstract: Systems and methods for scanning ports for work are provided. One system includes one or more processors, multiple ports, a first tracking mechanism, and a second tracking mechanism for tracking high priority work and low priority work, respectively. The processor(s) is/are configured to perform the below method. One method includes scanning the ports, finding high priority work on a port, and accepting or declining the high priority work. The method further includes changing a designation of the processor to TRUE in the first tracking mechanism if the processor accepts the high priority work such that the processor is allowed to perform the high priority work on the port. Also provided are computer storage mediums including computer code for performing the above method.
    Type: Grant
    Filed: October 14, 2010
    Date of Patent: March 26, 2013
    Assignee: International Business Machines Corporation
    Inventors: Stephen L. Blinick, Steven E. Klein, Daniel W. Sherman
  • Patent number: 8356129
    Abstract: There is provided a request arbitration apparatus for arbitrating a plurality of request holding sections which hold requests having priorities when the requests are output from the plurality of request holding sections to the output device. The request arbitration apparatus includes: a setting section that sets the request holding section, which holds the highest priority request among all the requests held by the plurality of request holding sections, as a highest priority request holding section; and a control section that controls the highest priority request holding section so that the request held first among all the requests held by the highest priority request holding section is output to the output device.
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: January 15, 2013
    Assignee: Seiko Epson Corporation
    Inventor: Ryuichi Tsuji
  • Patent number: 8341279
    Abstract: In one embodiment, a node in a computer network may receive data of a particular type at a first frequency (e.g., a sensor in a sensor network), and may correspondingly determine whether there is at least one interested subscriber for the data of the particular type, where the interested subscriber desires the data at a second frequency. If there is an interested subscriber, buffered data publishing may be dynamically activated at the node in response to a ratio between the second and first frequencies being less than a configured threshold. In particular, buffered data publishing comprises buffering the received data and transmitting a latest received data to the interested subscriber at the second frequency.
    Type: Grant
    Filed: November 17, 2008
    Date of Patent: December 25, 2012
    Assignee: Cisco Technology, Inc.
    Inventors: Pascal Thubert, Jean-Philippe Vasseur, Patrick Wetterwald, Vincent Jean Ribiere
  • Patent number: 8332549
    Abstract: A method for communication between an initiator system and a block storage cluster may include receiving a first input/output (I/O) request from the initiator system. The method may also include sending a referral response from a first storage system included in a plurality of storage systems of the block storage cluster to the initiator system when data associated with the first I/O request is stored in more than one storage system of the plurality of storage systems of the block storage cluster. Additionally, the method may include directing a referral I/O to the first storage system and the second storage system for transferring data to or transferring data from the first storage system and the second storage system, and transferring data associated with the referral I/O to or transferring data associated with the referral I/O from the first storage system and the second storage system.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: December 11, 2012
    Assignee: LSI Corporation
    Inventors: Andrew J. Spry, Ross Zwisler, Gerald J. Fredin, Kenneth J. Gibson
  • Patent number: 8307139
    Abstract: A communication system including a resource and an arbiter. The resource is shared among a plurality of requestors such that, at any given time, only one of the plurality of requestors has access to the resource. The arbiter is configured to receive a request from each of the plurality of requestors to access the resource, in which each request has a priority level associated with the request. The arbiter is further configured to age each request at a different rate relative to that associated with another request, and grant each requestor access to the resource based on i) the priority level and/or ii) the age of the request corresponding to the requestor.
    Type: Grant
    Filed: October 17, 2011
    Date of Patent: November 6, 2012
    Assignee: Marvell International Ltd.
    Inventor: Bhaskar Chowdhuri
  • Patent number: 8209449
    Abstract: The present disclosure relates to a method for enabling a virtual processing unit to access a peripheral unit, the virtual processing unit being implemented by a physical processing unit connected to the peripheral unit, the method comprising a step of transmitting to the peripheral unit a request sent by the virtual processing unit to access a service provided by the peripheral unit, the access request comprising at least one parameter and an identifier of the virtual unit, the method comprising steps, executed by the peripheral unit after receiving an access request, of allocating a set of registers to the virtual unit identifier received, storing the parameter received in the register set allocated, and when the peripheral unit is available for processing a request, selecting one of the register sets, and triggering a process in the peripheral unit from the parameters stored in the selected register set.
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: June 26, 2012
    Assignee: STMicroelectronics Rousset SAS
    Inventors: Christian Schwarz, Joel Porquet
  • Patent number: 8151008
    Abstract: A direct memory access (DMA) engine schedules data transfer requests of a system-on-chip data processing system according to both an assigned transfer priority and the deadline for completing a transfer. Transfer priority is based on a hardness representing the penalty for missing a deadline. Priorities are also assigned to zero-deadline transfer requests in which there is a penalty no matter how early the transfer completes. If desired, transfer requests may be scheduled in timeslices according to priority in order to bound the latency of lower priority requests, with the highest priority hard real-time transfers wherein the penalty for missing a deadline is severe are given the largest timeslice. Service requests for preparing a next data transfer are posted while a current transaction is in progress for maximum efficiency. Current transfers may be preempted whenever a higher urgency request is received.
    Type: Grant
    Filed: July 2, 2008
    Date of Patent: April 3, 2012
    Assignee: Cradle IP, LLC
    Inventors: Moshe B. Simon, Erik P. Machnicki, David A. Harrison
  • Patent number: 8122232
    Abstract: A self programming slave device controller is described which comprises interface circuitry and control circuitry. The interface circuitry is responsive to one or more configuration parameters to communicate data between the slave device controller and a slave device in accordance with the one or more configuration parameters. The control circuitry is responsive to one or more operating parameter signals indicative of one or more operating parameters influencing current performance characteristics of the slave device to set the one or more configuration parameters so as to control an access operation for accessing the slave device to accommodate the current performance characteristics of the slave device. In this way, an access operation can be conducted efficiently and reliably having regard to the current performance characteristics of the slave device.
    Type: Grant
    Filed: June 21, 2007
    Date of Patent: February 21, 2012
    Assignee: ARM Limited
    Inventors: Daren Croxford, Graeme Leslie Ingram
  • Patent number: 8117359
    Abstract: A memory control apparatus generates a plurality of commands whose unit of data transfer is smaller than the unit of data transfer of a memory access request, and when the memory access requests are transmitted from a plurality of request sources, issues the plurality of commands to a memory in alternate order for each request source. The plurality of memory access requests are executed by time division and concurrently.
    Type: Grant
    Filed: February 19, 2010
    Date of Patent: February 14, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventor: Toshiaki Minami
  • Patent number: 8086768
    Abstract: The storage system includes a first storage subsystem having a first logical volume to be accessed by a host computer, and a second storage subsystem connected to the first storage subsystem and having a second logical volume to be mapped to the first logical volume. The first storage subsystem includes a memory having definition information for defining a plurality of logical paths that transfer, to the second logical volume, I/O from the host computer to the first logical volume, and a transfer mode of the I/O to the plurality of logical paths. At least two or more logical paths among the plurality of logical paths are defined as active, and the controller transfers the I/O to the at least two or more logical paths set as active.
    Type: Grant
    Filed: June 9, 2008
    Date of Patent: December 27, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Yutaka Watanabe, Keishi Tamura
  • Patent number: 8069283
    Abstract: Method of processing data of at lease one data stream, data processing module for processing at a of at least one data stream, data processing system comprising such module, computer program product, data storage system and method of use thereof. For a time-based transfer of data to or from a device, data streams may be given a system ID and it is proposed to dynamically distribute available stream IDs. The proposed concept provides for indicating a type of data stream, providing and/or handling a set of stream IDs comprising a number of stream IDs and issuing a stream ID from the set of stream IDs to the data stream depending on the type of data stream. In a preferred embodiment, it is proposed to reserve one stream ID for an audio-video request, characterized by having no error handling time available. A further stream ID may be reserved for best effort requests.
    Type: Grant
    Filed: April 22, 2003
    Date of Patent: November 29, 2011
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Stephen Rodney Cumpson, Ozcan Mesut
  • Patent number: 8065458
    Abstract: An information processing apparatus configured to control communications of a plurality of devices via a common communication channel on the basis of predetermined priority levels of the devices includes a changing unit configured to change the priority level of a predetermined device, which is one of the plurality of devices, having a first priority level to a second priority level for a predetermined amount of time and a controlling unit configured to control the length of the predetermined amount of time.
    Type: Grant
    Filed: April 17, 2007
    Date of Patent: November 22, 2011
    Assignee: Sony Corporation
    Inventors: Yoshito Nagao, Takeshi Shimoyama
  • Patent number: 8041870
    Abstract: An arbiter in a communication system including a plurality of request shapers in communication with a plurality of requestors. Each request shaper is configured to receive a request for access to a resource of the communication system, initially assign a priority level to the request upon receipt of the request, increase an age of the request, after increasing the age of the request, compare the age of the request to a delta period value associated with the respective requestor, and repeatedly increase the priority level of the request based on the comparison. Each of the plurality of requestors has a corresponding delta period value that is different from that of other ones of the plurality of requestors. An arbiter core is configured to grant one of the plurality of requestors access to the resource based on the priority level of each request and the age of each request.
    Type: Grant
    Filed: April 13, 2010
    Date of Patent: October 18, 2011
    Assignee: Marvell International Ltd.
    Inventor: Bhaskar Chowdhuri
  • Patent number: 8037261
    Abstract: A closed-loop system for dynamically distributing memory bandwidth between real-time components and non-real-time components is provided. Specifically, the present invention includes monitors for measuring a performance of each of the real-time components. Based on the measured performance, closed-loop feedback loop is communicated to a unified memory system. The feedback is used by the memory controls within the unified memory system to efficiently and dynamically distribute memory bandwidth between the real-time and the non-real-time components.
    Type: Grant
    Filed: June 12, 2002
    Date of Patent: October 11, 2011
    Assignee: International Business Machines Corporation
    Inventors: Steven B. Herndon, David A. Hrusecky
  • Patent number: 7979604
    Abstract: A computerized data storage system and a method for portioning performance among data areas on a hard disk drive. The system includes a management computer coupled to one or more host computers and a storage apparatus. The storage apparatus includes hard disk drives and a storage controller for partitioning the hard disk drives among data volumes in the storage apparatus and for assigning the data volumes to the host computer. A performance partitioning module utilizes a queue management table for forming a number of queues on memory of the hard disk drive. The queues receive READ and WRITE requests and convey these requests to data areas assigned on recording media of the hard disk drive. After a request from a queue is executed, a gate between the queue and the data areas may be closed to allow requests from other queues an opportunity to access the data areas.
    Type: Grant
    Filed: January 7, 2008
    Date of Patent: July 12, 2011
    Assignee: Hitachi, Ltd.
    Inventor: Yasunori Kaneda
  • Patent number: 7937509
    Abstract: According to one embodiment, a content processing apparatus has an interface circuit connected to one or more external devices, and a control circuit which executes plural kinds of content processing to access the one or more external devices simultaneously and in parallel. The control circuit includes a CPU configured to set an order of priority for plural kinds of content processing, and limit processing operation sequentially from lower priority content processing, as load increases and disables simultaneous parallel execution of plural kinds of content processing.
    Type: Grant
    Filed: November 25, 2009
    Date of Patent: May 3, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Naoki Yamanashi
  • Patent number: 7882278
    Abstract: A control mechanism for data bus communications employs channels to which bus transactions are assigned, each channel having independent flow control. The control mechanism enforces an ordering algorithm among channels, whereby at least some transactions may pass other transactions. Channel attributes are programmable to vary the ordering conditions. Preferably, each channel is allocated its own programmable buffer area. The control mechanism independently determines, for each channel, whether buffer space is available and enforces flow control independently for each channel accordingly. Flow control is preferably credit-based, credits representing buffer space or some other capacity of a receiver to receive data. Preferably, the flow control mechanism comprises a central interconnect module controlling internal communications of an integrated circuit chip.
    Type: Grant
    Filed: January 30, 2009
    Date of Patent: February 1, 2011
    Assignee: International Business Machines Corporation
    Inventors: Sundeep Chadha, Mark Anthony Check, Bernard Charles Drerup, Michael Grassi
  • Patent number: 7797468
    Abstract: In certain, currently available data-storage systems, incoming commands from remote host computers are subject to several levels of command-queue-depth-fairness-related throttles to ensure that all host computers accessing the data-storage systems receive a reasonable fraction of data-storage-system command-processing bandwidth to avoid starvation of one or more host computers. Recently, certain host-computer-to-data-storage-system communication protocols have been enhanced to provide for association of priorities with commands. However, these new command-associated priorities may lead to starvation of priority levels and to a risk of deadlock due to priority-level starvation and priority inversion. In various embodiments of the present invention, at least one additional level of command-queue-depth-fairness-related throttling is introduced in order to avoid starvation of one or more priority levels, thereby eliminating or minimizing the risk of priority-level starvation and priority-related deadlock.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: September 14, 2010
    Assignee: Hewlett-Packard Development Company
    Inventors: George Shin, Rajiv K. Grover, Santosh Ananth Rao
  • Publication number: 20100138570
    Abstract: According to one embodiment, a content processing apparatus has an interface circuit connected to one or more external devices, and a control circuit which executes plural kinds of content processing to access the one or more external devices simultaneously and in parallel. The control circuit includes a CPU configured to set an order of priority for plural kinds of content processing, and limit processing operation sequentially from lower priority content processing, as load increases and disables simultaneous parallel execution of plural kinds of content processing.
    Type: Application
    Filed: November 25, 2009
    Publication date: June 3, 2010
    Inventor: Naoki Yamanashi
  • Patent number: 7707342
    Abstract: When four access request origins A, B, C, and D are present, a priority table (No. 1) having a priority order of A, B, C, and D, a priority table (No. 2) having a priority order of B, D, A, and C, a priority table (No. 3) having a priority order of C, A, D, and B, and a priority table (No. 4) having a priority order of D, C, B, and A are prepared. An order of employing these tables is determined in advance in this order. A priority table next in the order to the priority table employed in last arbitration or, when a priority table at the bottom in the order is employed in last arbitration, a priority table at the top in the order is employed. Based on the priority levels defined in the employed priority table, an access request to be accepted is selected.
    Type: Grant
    Filed: July 17, 2007
    Date of Patent: April 27, 2010
    Assignee: Fujitsu Microelectronics Limited
    Inventor: Yasunobu Horisaki
  • Patent number: 7698486
    Abstract: An arbitration circuit for granting access to a shared resource among requestors comprises N request shapers, where N is an integer greater than one. An input unit receives a request from a requestor. An age unit assigns an age to the request and increases the age of the request when the requestor is not granted access to the shared resource. A priority unit assigns a priority level to each of the requests and selectively increases the priority level of the request based on the age of the respective one of the requests and a delta period of the request. An arbiter core receives the requests from the N request shapers and selectively grants access to the shared resource to each of the requestors corresponding to the requests based on the priority level and age of the requests. The delta period of one of the N request shapers is different than the delta period of another of the N request shapers.
    Type: Grant
    Filed: March 28, 2006
    Date of Patent: April 13, 2010
    Assignee: Marvell International Ltd.
    Inventor: Bhaskar Chowdhuri
  • Patent number: 7694040
    Abstract: A method and an apparatus of memory access request priority queue arbitration comprises sorting the requests into plurality of different priority levels firstly. The priority queues of different priority levels are arranged respectively according to the following steps: counting the cycles and latencies of each access request; counting the total cycles; comparing the latencies of each access request and total cycles respectively, if the total cycles is larger than the latency of a request, then arranging one more the same request in the priority queue, else executing the priority queue in order.
    Type: Grant
    Filed: December 19, 2007
    Date of Patent: April 6, 2010
    Assignee: VIA Technologies, Inc.
    Inventor: Ting-Kun Yeh
  • Patent number: 7664893
    Abstract: Media drive control system and method. The media drive control system comprises a player console, a user operation filter, and a plurality of playback management devices. The player console provides an instant user operation (UOP) according to a received user command. The user operation filter comprises a queue and a management device. The queue receives and stores a plurality of UOPs, and outputs stored UOPs as control instructions on a first-in-first-out basis. The management device determines whether the queue is full. If the queue is full, the management device discards at least one of the stored UOPs prior to storing the instant UOP in the queue. Each playback management device receives control instructions for controlling corresponding playback devices.
    Type: Grant
    Filed: December 29, 2004
    Date of Patent: February 16, 2010
    Assignee: Via Technologies Inc.
    Inventor: King Huang