Abstract: A dock system is provided. The dock system includes a dock device and an electronic device. The dock device includes a first connection interface, a Power Delivery (PD) controller, a storage device, and a plurality of connection ports. The PD controller is coupled to the connection ports. The electronic device includes a second connection interface and a processor. In response to the first connection interface being connected to the second connection interface, the processor executes a high-layer service filter driver to write system information corresponding to the electronic device into the storage device, and the PD controller uses the system information to set the parameters of the connection ports. The first connection interface and the second connection interface are PD interfaces.

Abstract: A system for automatically addressing serially connected slave devices includes a master device and multiple slave devices each including a serial communication transceiver, an address input port, an address output port, and a controller. The system also includes a serial communication wiring bus connected between the serial communication transceivers of the master and slave devices, and at least one digital address line connected between the address input ports and the address output ports. Each controller is configured to receive a PWM or PFM signal from a previous one of the multiple slave devices, determine an address for the slave device including the controller according to the received PWM or PFM signal, and transmit a PWM or PFM signal indicative of the determined address to a subsequent one of the multiple slave devices.

Abstract: A data control apparatus includes an analog signal input interface for receiving an analog signal from a first device, a communication interface for receiving correlation information indicating addresses of storage areas in a storage and conditional values associated with the storage areas, and a data controller for writing a digital value generated from the analog signal into one of the storage areas. The data controller includes a cam switch block for acquiring a reference signal generated from an input signal input from a second device and comparing a value of the reference signal with at least one of the conditional values, and a logger block for switching the storage area into which the digital value is written, on the basis of the comparison in the cam switch block, and writing the digital value into the storage area.

Abstract: The present disclosure relates to a method for parameterizing a field device of process automation technology, comprising at least the following steps: parameterizing a mapping of the field device, wherein the mapping is executed as field-device-specific software on an interpreter, especially a software emulator; wherein the interpreter is executed on a host and there is no connection between host and field device during parameterization, and transmitting the parameterization generated via the mapping to the field device.

Abstract: An information processing system includes a CPU that is configured to output an address and a writing instruction signal instructing to write data to the address or a reading instruction signal instructing to read data from the address, to a selector, the selector that is configured by hardware such that an output destination of data input from the CPU is determined according to the address, the writing instruction signal, and the reading instruction signal, a volatile memory that is configured to store data including snapshot image information and initial setting data for a non-standard device including a register when the information processing system is started, on the basis of a signal output from the selector, and the register that has the same address as an address of a memory region of the volatile memory storing the initial setting data.

Abstract: A processing device in a memory system receives, from a host system, a request for a debug slave address associated with a system management bus port of a memory sub-system and sends a response comprising the debug slave address to the host system. The processing device receives, from the host system, a request to enable the system management bus port to receive a request for debug information directed to the debug slave address, receives, from the host system, the request for debug information directed to the debug slave address, and sends the debug information to the host system over a system management bus coupled to the system management bus port of the memory sub-system.

Abstract: Disclosed are techniques regarding aspects of implementing client configurable logic within a computer system. The computer system can be a cloud infrastructure. The techniques can include providing an identifier in response to configuring client configurable logic within the computer system.

Abstract: A robotic system that includes a mobile robot linked to a plurality of remote stations. One of the remote stations includes an arbitrator that controls access to the robot. Each remote station may be assigned a priority that is used by the arbitrator to determine which station has access to the robot. The arbitrator may include notification and call back mechanisms for sending messages relating to an access request and a granting of access for a remote station.

Abstract: Embodiments may include systems and methods for managing multiple ports of a computing interface. A computing device may include a connector with a power port and a data port. A connector manager may identify whether a port partner is coupled to the connector, identify an inquiry related to a status of the connector, where the inquiry may be received from a BIOS of the computing device. In addition, the connector manager may generate an indication of the status of the connector, and further transmit the indication of the status of the connector to the BIOS. A BIOS may identify that a data device coupled to the connector through a port partner is to be initialized, and further transmit to a connector manager an inquiry related to a status of the connector, before initializing the data device. Other embodiments may be described and/or claimed.

Abstract: Apparatuses, systems, and methods having positionally aware communication between a controller and a plurality of solid state drives (SSD) over a multi-wire serial bus is described. An example electronic device includes a multi-wire serial bus, multiple SSD connectors coupled to the multi-wire serial bus, and a serial bus position address (BPos) line to uniquely identify the physical position of each SSD connector with a unique BPos identifier (ID). The device also includes a serial bus controller coupled to the multi-wire serial bus and further comprising circuitry configured to communicate with a specific SSD connector at a known physical position by associating the BPos ID of the specific SSD connector with the communication.

Abstract: Some embodiments include a method of communication between a master device and N slave devices on a synchronous data bus. The method includes selecting a slave device from among the N slave devices using a selection channel, where the master device and the N slave devices are coupled in series through the selection channel. The method also includes transmitting data between the master device and the selected slave device using a transmission channel, where the master device and the N slave devices are coupled in parallel through the transmission channel.

Abstract: The present disclosure relates to a method of initializing a set of controllable units in an electrical system. The method comprises: A) obtaining, by a controllable unit controller module in a sequence of the controllable units, a discovery message on a non-addressable data pathway; B) broadcasting on an addressable data bus, by the controllable unit controller module, an identity of the functional unit; C) transmitting the discovery message to another controllable unit controller module in the sequence of the controllable units by way of the non-addressable data pathway; and D) recording, by the system controller module, the broadcasted identity of the controllable unit.

Abstract: A radio frequency front-end (RFFE) slave circuit and related apparatus are provided. The RFFE slave circuit may be coupled to a number of RFFE masters over an RFFE bus. The RFFE slave circuit may be configured by the RFFE masters for accessing, either concurrently or alternately, a number of sharable circuits in an envelope tracking (ET) circuit. The RFFE slave circuit may include common configuration circuitry configured to set a common configuration parameter(s) for a concurrently sharable circuit(s) in the ET circuit. The RFFE slave circuit may include private configuration circuitry configured to set a private configuration parameter(s) for an alternately sharable circuit(s) in the ET circuit. By employing the RFFE slave circuit to set the common and/or private configuration parameter(s) for the ET circuit, it may be possible to reduce processing delays in the RFFE bus, thus helping to improve efficiency of the ET circuit and/or the power amplifier(s).

Abstract: A method for managing a memory of a virtual machine, a physical host, a PCIE device and a configuration method thereof are provided. The method executed by a virtual machine includes: allocating a memory to a service carried on a PCIE device, where the memory includes multiple memory blocks, the multiple memory blocks is used to save working information of the service; generating a base address table BAT and a chip logic address table CLAT, where the BAT includes a CLAT entry base address corresponding to the service, and the CLAT includes a first address of each memory block; and sending an address of the BAT and a function number corresponding to the virtual machine to the PCIE device. Therefore, the PCIE device can obtain, according to the address of the BAT and the function number, working information of a service from the virtual machine.

Abstract: Methods and systems for enumerating digital circuits in a system-on-a-chip (SOC) are disclosed. The method includes incrementing an enumeration value received from a previous enumerable instance to uniquely identify an immediately adjacent enumerable instance of a plurality of enumerable instances in a daisy chain configuration.

Abstract: An extensible host controller (xHC) applied to a host includes universal serial bus (USB) module, a control circuit, an xHC interface circuit, a peripheral component interconnect express (PCIE) bus. The USB module includes a USB interface circuit and a predetermined interface circuit. The PCIE bus supports a USB mode and a predetermined data transmission mode. When a USB device is connected to the USB module, the control circuit issues first requests to the USB device to let the host utilize the USB mode and the USB interface circuit to communicate with the USB device; and when a USB host is connected to the USB module, the control circuit responds to second requests issued from the USB host to let the host utilize the predetermined data transmission mode and the predetermined interface circuit to communicate with the USB host.

Abstract: A method of an aspect includes receiving an indication of an attempt by a virtual machine to modify a paging structure identification storage location to have a given value. It is determined that the given value matches at least one of a set of one or more blacklist values. The attempt by the virtual machine to modify the paging structure identification storage location to have the given value is trapped to a virtual machine monitor. Other methods, apparatus, and systems are also disclosed.

Abstract: A bus node is capable of performing a method for the assigning of bus node addresses to bus nodes of a serial data bus. The method is performed with the aid of bus shunt resistors in the individual bus nodes of the data bus system in an assignment time period. After the assigning of bus node addresses to the bus nodes in the assignment time period, there follows an operating time period. For this purpose, the bus node comprises such a bus shunt resistor. The bus node is characterized by a bus shunt bypass switch which, prior to assigning a bus node address to the bus node in the assignment time period is opened and which after the assignment of bus node address to the bus node in the assignment time period is closed, and which is closed in the operating time period.

Abstract: A printing apparatus connectable to a server, the printing apparatus includes: a printing apparatus communication unit that transmits printing apparatus information to the server and receives an address which designates a storage location of overwriting firmware of firmware from the server in a case where a predetermined condition is satisfied; and a printing apparatus control unit that receives the overwriting firmware from the server and executes overwriting of the firmware based on the address received by the printing apparatus communication unit.

Abstract: Provided is a method of controlling an image forming apparatus, the method including: periodically making an inquiry about an instruction to a management server; determining whether or not to display a notification indicating that a message has arrived, based on information about a registered time of the message acquired by the management server as a result of the inquiry, and information about a time when the message is displayed on the image forming apparatus; and controlling the notification indicating that a message has arrived to be displayed in a predetermined display area in accordance with at least a determination, in the determining, that the notification indicating that the message has arrived is displayed, and controlling not to display the notification indicating that the message has arrived in accordance with at least a determination, in the determining, that the notification indicating that the message has arrived is not displayed.

Abstract: A robotic system that includes a mobile robot linked to a plurality of remote stations. One of the remote stations includes an arbitrator that controls access to the robot. Each remote station may be assigned a priority that is used by the arbitrator to determine which station has access to the robot. The arbitrator may include notification and call back mechanisms for sending messages relating to an access request and a granting of access for a remote station.

Abstract: A bus node is capable of performing a method, for the assigning of bus node addresses to bus nodes of a serial data bus. The method is performed with the aid of bus shunt resistors in the individual bus nodes in an assignment time period. After assigning bus node addresses to the bus nodes of the serial data bus system in the assignment time period, there follows an operating time period. For this purpose, the bus node comprises such a bus shunt resistor. The bus node is characterized by a bus shunt bypass switch which, prior to assigning a bus node address to the bus node in the assignment time period is opened and which after the assignment of bus node address to the bus node in the assignment time period is closed, and which is closed in the operating time period.

Abstract: A memory device includes an input/output interface, a bus of SPI type coupled to the input/output interface, and a plurality of individual non-volatile memory devices connected to the bus of SPI type. The chip select inputs of each individual memory device are all connected to one and the same chip select wire of the SPI bus. The individual memory devices are further configured and controllable so as to behave, as seen by the input/output interface, as a single non-volatile memory device, the total memory space of which has a total memory capacity equal to the sum of the individual memory capacities of the individual devices.

Abstract: A selected boundary of memory to be used in processing an instruction is dynamically selected, based on a predictor. The instruction is decoded, and the decoding provides a sequence of operations to perform a specified operation. The sequence of operations includes a load to boundary operation to load data up to the selected boundary of memory. The data is loaded as part of the specified operation.

Abstract: A method and system for assigning slot addresses to modules in an industrial control system is disclosed. The modules are set up in a daisy chain topology. On power-up, a first module in the chain reads its slot address from a user configurable input or sets its slot address to a default value. The first module communicates to its immediate right neighbor using a special, one-hop message. The neighboring modules communicate to receive each other's information. The first module then sets an enable signal between the modules and sends a slot number to the neighbor in a firmware message. The neighbor checks if the enable signal is set and verifies that the slot number is a valid slot number. If so, then the neighboring module accepts the slot and repeats the same procedure to its next immediate neighbor, and so on until the last module.

Abstract: Systems and methods provide zone management for devices in a Serial Attached Small Computer System Interface (SAS) topology. In one embodiment, a zone management device stores a zone map that identifies an initial zone of a device in the topology. The management device detects changes in the topology, and identifies a current zone of the device subsequent to the change in the topology. The management device compares the zone map for the device to the current zone to identify a change in the zone of the device, and generates a message for an expander in the topology based on the change in the zone. The management device then transmits the message to the expander to restore the zone of the device to the initial zone.

Abstract: In order to control individual circuit nodes coupled to a common serial line, each of the different circuit nodes must be assigned a locally unique address. However, mass manufactured electronics are manufactured as identical electronic devices. Thus, several techniques are presented for assigning unique addresses to identical electronic devices coupled to a common serial line. One set of techniques uses a local sensor that is stimulated in order to specify a single device on the serial line. Another set of techniques measures a pulse presented onto the common serial by a circuit node to determine its relative position on the serial line.

Abstract: A method includes providing run-time optical 5G mobile fronthaul MFH topology re-configurability through software-defined control of both optical circuit switches and electrical packet switches readily accommodating unpredictable traffic patterns and low latency optical by-pass based device-to-device connectivity. The providing includes employing an optical any-to-any switch for wavelength-tunable and fixed-wavelength optical transceivers.

Abstract: The present document relates to a wireless communication method, a user equipment, a network device, and a system. The method includes: a first user equipment sending a dedicated discovery signal; the first user equipment receiving a response message, wherein the response message is sent by a second user equipment which has detected the dedicated discovery signal; the first user equipment establishing a device-to-device connection with the second user equipment; and the first user equipment communicating with a network side through the device-to-device connection and a communication link between the second user equipment and the network side.

Abstract: In general, embodiments of the present disclosure are directed to techniques for configuring a mobile device according to detection of one or more peripheral devices in an environment using short-range wireless communication. In one example, a method includes, receiving, by a computing device that communicates with a peripheral device using short-range wireless communication, a unique identifier of the peripheral device. If the computing device recognizes the unique identifier of the peripheral device, the computing device may determine a configuration operation based on the unique identifier that changes a current operating state of at least one application executing on the computing device to a different operating state. If the computing device does not recognize the unique identifier of the peripheral device, the computing device may send a lookup request to a network resource external to the computing device that requests data specifying the configuration operation for the computing device.

Abstract: The system program includes, as an execution control process of the control program, an owner-side start process that starts execution of an owner-side control program; a copy process in which, when execution of the owner-side control program ends, a global variable that is rewritten by the owner-side control program is copied from a global variable area to a synchronous buffer corresponding to the global variable; and a referrer-side start process that starts execution of a referrer-side control program.

Abstract: Memory devices and methods are described and shown that are capable of being configured in a chain. In one configuration, a single data input port and a single data output port are utilized at a host to communicate with the chain of memory devices. Methods for assigning identifiers to memory devices in the chain are described that include detection of a presence or absence of downstream memory devices. In selected examples, identifiers are assigned sequentially to memory devices in the chain until no additional downstream memory devices are detected.

Abstract: The various embodiments described herein include systems, methods and/or devices used to enable power inrush management of storage devices (e.g., DIMM devices). In one aspect, the method includes, for at least one storage device populated in a slot of a plurality of storage device slots, the plurality of storage device slots configured to be populated by two or more storage devices: (1) detecting a unique location associated with the storage device, (2) determining a time delay for the storage device in accordance with the unique location associated with the storage device, and (3) delaying at least one power-on operation of the storage device by the time delay for the storage device.

Abstract: A control computer as a master apparatus in a control network system includes a packet generation unit. The packet generation unit: selects a control command for writing a data from among packet generation information; references the packet generation information for each of the selected control command; and includes a data for write which is read from an address in a storage section corresponding to the each control command, in a control packet to generate the control packet. A communication unit transmits the generated control packet to a controlled object as a slave device.

Abstract: An industrial automation environment communication system comprises a component that receives a web-based request in an industrial automation environment, wherein the web-based request includes data relating to an automation device. An encapsulating component encapsulates the web-based request, wherein the encapsulation facilitates transmitting the data to the automation device via an industrial automation network protocol.

Abstract: An integrated circuit is disclosed, including at least one configuration pin, an interface circuit, a detecting circuit, a determining circuit and a storage unit. A physical layer circuit of the invention not only increases the flexibility of setting PHY addresses, but also reduces the number of configuration pins.

Abstract: Embodiments of the disclosed subject matter can provide techniques for synchronizing data acquisition (DAQ) modules in a data acquisition system. In data acquisition systems where multiple DAQ modules are in use, it can be desirable to synchronize the DAQ modules to facilitate the analysis of signals captured by sensors coupled to those DAQ modules. This way, a signal processing platform, such as a computer, can analyze different sensor signals (e.g., an audio sensor and vibration sensor) without separately compensating for the time difference between the audio and vibration signals. In some embodiments, the synchronization techniques can include an automatic or a semi-automatic mechanism for temporally synchronizing the sensors and for arbitrating the sampling rate between the data acquisition systems.

Abstract: A management apparatus includes a device-information acquiring unit that acquires device identification information for identifying a user-designated device from multiple devices; a processing-status-information acquiring unit that acquires processing status information of each device; a commanded-processing-information acquiring unit that acquires commanded processing information related to a content of processing to be commanded to the designated device; a commanding unit that gives a command to the designated device based on the commanded processing information so as to set the designated device in an occupied state; a cancellation-condition-information acquiring unit that acquires cancellation condition information indicating a condition for cancelling the occupied state; and a cancellation-condition determining unit that determines whether the acquired processing status information satisfies the acquired cancellation condition.

Abstract: A dock for connecting a smartphone to a display and peripherals is disclosed. The dock uses a single connector to transfer audio/video data to a display and input-output data and to establish a wireless link with peripherals. The dock has a controller with a switch, a wireless communication module, a USB hub, a relay, a first connector, an audio/video (AV) converter and a second connector. The relay normally connects AV data from the smartphone to the AV converter. The controller switches the relay while the switch is being operated, and then the controller links the USB hub, the first connector and the wireless communication module, and the wireless communication module establishes the wireless link with the smartphone.

Abstract: A data processing device 1 comprises: first processors (2-i (i=1, 2, . . . , n)) that initialize the data processing device based on boot programs; a chip set (4) that includes first memories (4a-j (j=1, 2, . . . , m)) that store the first boot program (Pj (j=1, 2, . . . , m)) respectively and a memory controller (4b) that reads out the first boot program (Pj (j=1, 2, . . . , m)); second buses (5-i (i=1, 2, . . . , n)) that are arranged between the memory controller (4b) and the first processors (2-i (i=1, 2, . . . , n)) respectively, and do not require initialization based on boot programs before use; and first buses (3-i (i=1, 2, . . . , n)) that are connected with the first processors (2-i (i=1, 2, . . . , n)) and require initialization based on boot programs before use.

Abstract: An adapter is enabled for use. The enabling includes assigning one or more address spaces to the adapter, based on a request. For each address space assigned to the adapter, a corresponding device table entry is assigned. When the adapter is no longer needed, it is disabled and the assigned device table entries become available.

Abstract: A method and system for transferring frames from a storage device to a host system via a controller is provided. The method includes transferring frames from a transport module to a link module; and sending an acknowledgment to the transport module, wherein the link module sends the acknowledgement to the transport module and it appears to the transport module as if the host system sent the acknowledgement. The frames in the controller are tracked by creating a status entry indicating that a new frame is being created; accumulating data flow information, while a connection to transfer the frame is being established by a link module; and updating frame status as frame build is completed, transferred, and acknowledged. The controller includes, a header array in a transport module of the controller, wherein the header array includes plural layers and one of the layers is selected to process a frame.

Abstract: Per-Function Downstream Port Containment (pF-DPC) is an extension to Downstream Port Containment (DPC) in the Peripheral Component Interconnect express (PCIe) standard. Pf-DPC confines non-fatal errors to specific functions of an end-point device without disabling the link between a PCIe port and the end-point device. PCIe ports configured for pF-DPC may filter (e.g., drop) packets carrying routing identifiers (RIDs) and/or addresses assigned to a function affected by a non-fatal error, while continuing to forward packets carrying RIDs/addresses associated with remaining operable functions over the corresponding link.

Abstract: An ID setting method and system capable of easily setting IDs of a plurality of display units. The ID setting system includes a plurality of display units connected through an input port and an output port to each other, and a control unit that controls assignment of an ID to each of the plurality of display units. Each of the display units compares a present ID to an initial ID, and disables a connection between the output port and an another display unit when the present ID and the initial ID match. Accordingly, a user can easily assign IDs to each of the plurality of display units.

Abstract: An electrical device includes a plurality of apparatus connected with a daisy chain connection through a communication line so that the apparatus communicate with each other through the communication line; and a control unit connected to one of the apparatus at an end stage thereof so that the control unit is configured to communicate with the one of the apparatus. The apparatus includes an address setting unit for setting a specific number to an address of the apparatus according to an address setting command when the apparatus receives address setting data including an address addition instruction as the address setting command for adding the specific number to the address of the apparatus. The apparatus further includes an address setting data transmission control unit for outputting the address setting data to a later stage apparatus when the address setting unit sets the specific value to the address of the apparatus.

Abstract: In some examples, a node in a distributed system may receive one or more IP addresses for use with one or more virtual machines. For example, at least one of the received IP addresses may be encoded into a respective MAC address. Further, a hypervisor implemented on the node may configure a virtual machine on the node. For instance, configuring the virtual machine may include passing the encoded MAC address to the virtual machine through the hypervisor. The virtual machine may be configured to decode the IP address from the encoded MAC address, and the IP address is assigned to the virtual machine.

Abstract: In a computer system configured to handle I/O signals received by the computer system from input devices and/or output signals output by the computer system, a virtual attachment module includes logic for selecting such that program code for coupling can alter the operating system's selection of I/O devices used for particular I/O device operations, coupling to a wireless I/O device at least for determining whether the wireless I/O device is available, and causing redirection of I/O signals destined to a default I/O device to be to the wireless I/O device, if the program code for coupling determines that the wireless I/O device is available. A virtual connection module could be used to intercept system messages indicating a wireless device is present and connected, determine whether the wireless device is present and/or connected, and determine which intercepted messages to forward, drop, delay or reformulate.

Abstract: Techniques are described for establishing a Wireless Serial Bus (WSB) service to transport data using a Media Agnostic Universal Serial Bus (MAUSB) protocol according to a selected transport mode in a WSB session of the WSB service. The MAUSB protocol may be deployed either over an Internet Protocol (IP) stack or directly over a Media Access Control (MAC) layer. According to the techniques, the wireless service advertiser and the wireless service seeker negotiate the transport mode for the MAUSB protocol in each WSB session of the WSB service. During a service discovery process, the wireless service advertiser identifies one or more supported transport modes for the MAUSB protocol in service information for the WSB service. During a P2P connection setup and a WSB session setup, the wireless service seeker indicates a selected one of the supported transport modes for the MAUSB protocol in session information for the WSB session.

Abstract: The present invention provides a method for controlling a HDMI CEC device on HDMI CEC network including a plurality of devices, the method comprising: receiving a message for requesting a physical address allocation of a new device when the new device is connected to the HDMI CEC network; allocating a physical address of the new device based on the received message; and allocating a plural logical addresses of the new device when the physical address of the new device is valid, the plural logical addresses corresponding to the plural device types of the new device, wherein at least one of the plural logical addresses is set by using a flag bit.

Abstract: The present disclosure includes a method for migration of a first virtual function of a first device located on a PCI bus and accessible by a device driver using a virtual address. A second virtual function is created on a second device. A base address is determined for the second virtual function as a function of a logical location of the second device within the PCI structure. An offset is determined for the second virtual function as a function of the base address and the virtual address. The device driver is notified that the first virtual function is on hold. The offset is stored in a translation table. The device driver is notified that the hold has been lifted. Accesses to the virtual address and by the device driver to memory of the second virtual function are routed based upon the offset in the translation table.