Abstract: The invention relates to a dynamically addressable slave unit, comprising a bus interface, an enable circuit having a switch and two control ports which are connected via the enable circuit. The enable circuit only releases the slave unit for assigning an address by an address signal provided at the bus interface when a control signal is provided at one of the control ports and when the switch of the release signal is open. Otherwise, the enable circuit locks the slave unit for the assigning of an address. The switch locks depending on whether a switching signal is provided at the bust interface directed to the address assigned to the slave unit. The invention further relates to a master unit for use with one or more dynamically addressable slave units, to slave units according to the invention, and to a method for dynamically addressing slave units according to the invention.

Abstract: A method of setting an address of a component that includes determining a characterization value associated with a consumable, calculating a number of address change operations based upon the characterization value, and setting a last address generated from the number of address change operations as the new address of the component, wherein the characterization value is determined based upon a usage of the consumable.

Abstract: A method for optimizing control circuit for FC HDDs in a system includes determining the number of subsystems supported in a FC loop and the number of HDDs to be supported in each of the subsystems, analyzing binary values of address of all HDDs for each of the subsystems, enumerating logical variations of the address selection signals according to the analyzed binary values to obtain logic combinations for the address selection signals, analyzing logic relations between these logic combinations and a system address signal, selecting logic components required according to the found logic relations, and calculating the total number of required logic components and the number of address selections signals that can share an output pin of each of the required logic components based on properties of output pins of the logic components and maximum input current of the address selection signals.

Abstract: A cluster of storage control members connect different clients to different storage disks. Connection path information between the different clients and disks is discovered and distributed to the storage cluster members. The connection path information is then used to maintain coherency between tiering media contained in the different storage cluster members. Unique Small Computer System Interface (SCSI) identifiers may be associated with the different connection paths to uniquely identify particular storage disks connected to the clients.

Abstract: In one aspect of the present description, in an input/output (I/O) device having multiple CPUs and multiple I/O ports, a cycle of I/O port rotations is initiated in which each port rotation of the cycle includes rotating an assignment of at least one I/O port from one CPU to a different CPU of a plurality of the CPUs. In the illustrated embodiment, an I/O port assignment for each CPU of the plurality CPUs is rotated for at least a portion of the cycle. Other features and aspects may be realized, depending upon the particular application.

Abstract: A method and an apparatus for identifying device ports of a data card in a Linux system are provided, the method comprises: acquiring information of a Universal Serial Bus (USB) device; recording device information that is related to the USB device to be identified in said information; acquiring port information of each port of said USB device to be identified according to the device information of the said USB device to be identified; identifying attributes of said ports according to the information of each port. By acquiring the device information and the port information, the Attention (AT) port and the Modem port could be identified correctly according to the feature that the AT port and the Modem port could send and receive AT commands as well as the preset order attribute of the AT port and the Modem port, thus identifying the attributes of each port of the device accurately.

Abstract: A method of identifying devices on a bus and an apparatus are provided. A method of identifying devices on a bus comprises pooling a plurality of devices connected to a bus, each of the plurality of devices not having uniquely assigned to it a respective unique device identifier (ID) of the bus, selecting, after the pooling, one of the plurality of devices using at least one selection criteria, the at least one selection criteria identifying the one of the plurality of devices uniquely among all of the plurality of devices, and reassigning a unique device ID of the bus to the selected one of the plurality of devices uniquely. An apparatus is configured to carry out the method of identifying devices on a bus.

Abstract: A microcontroller or integrated system has a bus, a plurality of peripheral devices each one coupled with the bus, a non-volatile memory, and a state machine coupled with the non-volatile memory and being operable to initialize the peripheral devices by reading initialization information from the non-volatile memory and writing it to the peripheral devices.

Abstract: A method and circuit for implementing conductive microcapsule rupture to generate a tamper event for data theft prevention, and a design structure on which the subject circuit resides are provided. A polymeric resin containing microcapsules surrounds a security card and a tamper sensor device provided with the securing card. Each microcapsule contains a conductive material. The conductive material of the microcapsule disperses onto the tamper sensor device on the security card responsive to the microcapsule being ruptured to create a change in resistance, reducing the resistance of a security mesh of the tamper sensor device. The microcapsules are more sensitive to pressure than a tamper mesh of the tamper sensor device and therefore rupture first, creating the change in resistance when dispersed onto the tamper sensor device. The resistance change is detected by the tamper sensor device and the security card is disabled to prevent data theft.

Abstract: A memory system architecture is provided in which a memory controller controls memory devices in a serial interconnection configuration. The memory controller has an output port for sending memory commands and an input port for receiving memory responses for those memory commands requisitioning such responses. Each memory device includes a memory, such as, for example, NAND-type flash memory, NOR-type flash memory, random access memory and static random access memory. Each memory command is specific to the memory type of a target memory device. A data path for the memory commands and the memory responses is provided by the interconnection. A given memory command traverses memory devices in order to reach its intended memory device of the serial interconnection configuration. Upon its receipt, the intended memory device executes the given memory command and, if appropriate, sends a memory response to a next memory device. The memory response is transferred to the memory controller.

Abstract: An output module for an industrial controller configurable to simplify setup and commissioning is disclosed. The output module includes configurable PWM outputs that may be scheduled to start at different times within the PWM period, that may be configured to generate a fixed number of PWM pulses, and that may have an extendable PWM period. The output terminals are configurable to enter a first state upon generation of a fault and further configurable to enter a second state after a configurable time delay following the fault being generated. The output module may receive inputs signals directly from another module and set output signals at the terminals responsive to these signals.

Abstract: One embodiment relates to an integrated circuit having a plurality of four-channel serial interface modules. Each of the plurality of four-channel serial interface modules includes a first physical medium attachment (PMA) channel circuit, a second PMA channel circuit adjacent to the first PMA channel circuit, a third PMA channel circuit adjacent to the second PMA channel circuit, a fourth PMA channel circuit adjacent to the third PMA channel circuit, and at least one phase-locked loop (PLL) circuit which is programmably coupled to each of the first, second, third and fourth PMA channel circuits. Other embodiments and features are also disclosed.

Abstract: An information processing apparatus that can communicate with an external apparatus includes an instruction unit configured to receive an instruction to change a parameter in the external apparatus, and a sending unit configured to send a control signal for causing the external apparatus to change the parameter in the external apparatus, to the external apparatus according to the instruction received by the instruction unit, in which the sending unit sends, when the instruction received by the instruction unit includes an instruction to change a plurality of types of parameters in the external apparatus, the control signal a plural number of times according to the types of the parameters to be changed, to cause the external apparatus to change the parameters in a predetermined order.

Abstract: The present disclosure describes techniques for scalable embedded memory programming. In some aspects data is received at a first communication interface from a host device, at least a portion of the data is stored to a memory device supported by a printed circuit board, and the data is transmitted to a target device via a second communication interface.

Abstract: A method for expanding input/output in an embedded system is described in which no additional strobes or enable lines are necessary from the host controller. By controlling the transitions of the signal levels in a specific way when controlling two existing data or select lines, an expansion input and/or output device can generate a strobe and/or enable signal internally. This internal strobe and/or enable signal is then used to store output data or enable input data. The host controller typically utilizes software or firmware to control the data transitions, but no additional wires are needed, and no changes are needed to existing peripheral devices. Thus, an existing system can be expanded when there are no additional control lines available and no unused states in existing signals.

Abstract: Exemplary embodiments are directed to a system and method for integrating field devices in an automation system having a plurality of field devices connectable via at least one bus system. A respective field device is connected to the bus system of the automation system, and is automatically addressed by a superordinate controller using a predefined default address. The device addressed using the default address then registers in the system with its device address, and a fixed address which is provided from a multiplicity of unassigned addresses from an address memory is automatically allocated to the device registered in the system. An individually assigned identification (TAG) provided from the predetermined configuration of the automation system is allocated to the allocated fixed address, and, after the automatically allocated fixed address has been transmitted to the field device, the field device is changed to a suitable state for communication with the superordinate controller.

Abstract: A method to adjust physical links of serial attached small computer system interface (SAS) expanders of a computing device. The SAS expanders include a first SAS expander and one or more second SAS expanders. When data flow of the physical links of the first SAS expander for transmitting data to a second SAS expander is saturated, the method determines whether the first SAS expander has reserved physical links that can be adjusted. If the first SAS expander has reserved physical links that can be adjusted, the method generates a new firmware, and adjusts the adjusted physical link to the second SAS expander by writing the new firmware to the first SAS expander. The method also adjusts the adjusted physical link to the second SAS expander on hardware circuit.

Abstract: Apparatuses and methods for use in connection with a Building Automation System (BAS) are disclosed herein. In one embodiment, the present invention comprises an intelligent power node comprising a JAVA-enabled device and serial communication cable that provide a seamless open protocol and aggregation point to broadcast internet protocol communications. In another embodiment, the present invention enables energy monitoring and control of individual ports and outlets. In yet another embodiment, the present invention is a method of configuring and operating fieldbus devices.

Abstract: A first slave electronic module and a second slave electronic module are adapted for communicating over the data bus. The first slave electronic module has a first resistor coupled in series with a main power line. The second electronic module has a second resistor coupled in series with the main power line. A master electronic module has a master current measurement circuit for determining an aggregate current level indicative of the total number of slave electronic modules on the main power line. A first current measurement circuits is capable of measuring a node current indicative of a number of other active slaves connected to the main power line and data bus. A master data processor in the master electronic module is arranged to assign a unique module identifier to a first slave electronic module based on the first node current and the aggregate current level, the unique module identifier indicating a respective position of the first slave electronic module on the data bus.

Abstract: A method of performing an input/output (I/O) processing operation includes: generating an address control structure for each of a plurality of consecutive data transfer requests, each address control structure specifying a local channel memory location of a corresponding address control word (ACW); receiving a data transfer request from a network interface that includes addressing information specified by a corresponding address control structure; comparing, by a data router in the channel, an Offset field of an address control structure and an Expected Offset field of an ACW to determine whether the data transfer request has been received in the correct order; and based on determining that the data transfer request has been received in the correct order, accessing the ACW by the data router and routing the data transfer request to a host memory location specified in the ACW.

Abstract: Systems and methods for re-mapping memory transactions are described. In an embodiment, a method includes receiving a memory request from a hardware subsystem to a memory, replacing a first identifier with a modified identifier in the memory request, and transmitting the memory request to the memory through a processor complex. The method further includes receiving a response from the memory, determining that the response corresponds to the memory request, replacing the modified identifier with the first identifier in the response, and transmitting the response to the hardware subsystem. In some embodiments, a system may be implemented as a system-on-a-chip (SoC). Devices suitable for using these systems include, for example, desktop and laptop computers, tablets, network appliances, mobile phones, personal digital assistants, e-book readers, televisions, and game consoles.

Abstract: A communication slave used in a communication network system includes a control device, a capacitive element, a voltage determining portion, and a time measuring portion. The control device controls communication with a master. The capacitive element is coupled between a high-potential side bus and a low-potential side bus. The voltage determining portion determines whether a voltage between the buses exceeds a threshold voltage. The time measuring portion measures a time from when a charge of the capacitive element through the buses is started to when the voltage determining portion determines that the voltage exceeds the threshold voltage. The control device sets an ID value for communicating with the master based on a length of the time measured by the time measuring portion.

Abstract: A data acquisition card, an expansion control system for a data acquisition card and a method thereof are disclosed. The method includes: a card address is preset for each data acquisition card, a channel address is preset for each data channel in the data acquisition card; the data acquisition card generates a corresponding card address signal after receiving a card beat signal from a user circuit, and judges whether the data acquisition card is selected; if the data acquisition card is selected, it generates a corresponding channel address signal after receiving a channel beat signal from the user circuit, and selects the data channel corresponding to the channel address signal. The data acquisition card, the expansion control system for the data acquisition card and the method thereof have powerful expansibility and high stability.

Abstract: An output module for an industrial controller configurable to simplify setup and commissioning is disclosed. The output module includes configurable PWM outputs that may be scheduled to start at different times within the PWM period, that may be configured to generate a fixed number of PWM pulses, and that may have an extendable PWM period. The output terminals are configurable to enter a first state upon generation of a fault and further configurable to enter a second state after a configurable time delay following the fault being generated. The output module may receive inputs signals directly from another module and set output signals at the terminals responsive to these signals.

Abstract: A data processing system and computer instructions in a data processing system for identifying device configurations. Unique identification information is identified for a set of devices in the data processing system. The identified unique identification information is compared with previously identified unique identification information. Configuration data is moved to a memory for devices in the set of devices in which a match exists between the identified unique identification information and the previously identified unique identification information for devices. Configuration information is obtained from a device in which configuration information is absent in the memory after configuration data has been moved to the memory for the devices to form a current set of configuration data for the set of devices.

Abstract: An image processing apparatus includes: an acquiring unit that acquires a display request including a first external apparatus identification information and screen identification information; a storage unit storing external apparatus screen information; an update unit updating the first external apparatus screen information whenever the display request is acquired; a determining unit determining a polling interval for a first external apparatus on the basis of the stored external apparatus screen information; and a transmitting unit transmitting, to the first external apparatus, screen data which includes information of the determined polling interval, wherein, when a second external apparatus identification information item corresponding to the same screen identification information as that in the display request is stored in the storage unit, the determining unit determines the polling interval for the first external apparatus to be less than that for a second external apparatus indicated by the second ext

Abstract: An image processing apparatus includes: a receiving unit that receives a screen update request including identification information of a screen and a job start request including identification information of a job; a database that defines a relationship between the identification information of the screen, the identification information of the job, and a polling interval corresponding to a degree of association between the screen and the job; a determining unit that determines the polling interval corresponding to the degree of association between the screen and the job on the basis of the identification information of the screen and the identification information of the job received by the receiving unit and the database; and a transmitting unit that incorporates information of the determined polling interval into screen data and transmits the incorporated screen data to an external apparatus that outputs the screen update request.

Abstract: A device includes an interface configured to receive an indication of a second device on a network, and a processor configured to determine if the indication is one of an expected set of indications and generate a permanent node address for assignment to the second device if the indication is one of an expected set of indications. The permanent node address places the second device into an active mode as a permanent node addressed device. The processor is further configured to receive at least one device parameter from the permanent node addressed device, determine if the at least one device parameter matches an expected device parameter for the permanent node addressed device, and generate a second permanent node address for assignment to the device if the at least one device parameter matches the expected device parameter for the permanent node addressed device.

Abstract: In one embodiment, a method includes detecting a coupling of a device to an interface of the host machine. The method also includes determining, through an operating system of the host machine whether the device coupled to the interface of the host machine is same as another device that is formerly coupled to the interface of the host machine as indicated in a topology file of the operating system. In addition, the method includes modifying the topology file maintained in the operating system to remove a mapping information of the other device that is formerly coupled with the interface of the host machine in the topology file to logically decouple the other device from the interface of the host machine and to add a mapping information of the device coupled with the interface in the topology file to logically couple the device with the interface of the host machine.

Abstract: A method comprises detecting a control device, and if the control device is not bound to the computing system, detecting an optical beacon emitted from the control device and binding the control device to the computing system.

Abstract: A display apparatus connected to a video/audio output device includes at least two connecting portions to connect with the video/audio output device, a first storage unit to store extended display identification data (EDID) information to be provided to the video/audio output device, a second storage unit to store EDID information corresponding to the two connecting portions respectively, and a controller to change the EDID information stored in the first storage unit into one information of a currently connected connecting portion among the EDID information stored in the second storage unit when the connecting portion connected with the video/audio output device is changed.

Abstract: A method of routing data in an information handling system can include receiving a notification from a management controller at a basic input/output system (BIOS) that includes a system management interrupt (SMI) handler. The a notification can indicate that the management controller has a data packet bound for a peripheral component interconnect express input/output (PCIe I/O) device coupled to a secondary processor. The method can include generating a system management interrupt at the information handling system via the BIOS SMI handler in response to the notification. The method can also include retrieving the data packet from the management controller via the BIOS SMI handler and sending a payload associated with the data packet from the BIOS SMI handler to the PCIe I/O device.

Abstract: Various aspects are disclosed herein for bounding the behavior of a non-privileged virtual machine that interacts with a device by creating a description of the device which indicates to a privileged authority (1) which operations on the device may have system-wide effects and (2) which operations have effects local to the device. The privileged authority may then permit or deny these actions. The privileged authority may also translate these actions into other actions with benign consequences.

Abstract: An apparatus includes a first module including a bus port for coupling the first module to a bus; a first configuration port receiving an input indicating whether address assignment is enabled/disabled for the first module; a second configuration port providing an output indicating whether address assignment is enabled/disabled for a second module; a memory to store a unique address, wherein the unique address identifies the first module; and a controller coupled to a central management unit (CMU) via the bus, the controller to receive the unique address from the CMU, determine whether address assignment is enabled for the first module and store the unique address in the memory if address assignment is enabled, enable/disable address assignment for a second module when the second module is coupled to the first module, and the controller to enable/disable address assignment for the second module based on a message from the CMU.

Abstract: One embodiment relates to an integrated circuit having a plurality of four-channel serial interface modules. Each of the plurality of four-channel serial interface modules includes a first physical medium attachment (PMA) channel circuit, a second PMA channel circuit adjacent to the first PMA channel circuit, a third PMA channel circuit adjacent to the second PMA channel circuit, a fourth PMA channel circuit adjacent to the third PMA channel circuit, and at least one phase-locked loop (PLL) circuit which is programmably coupled to each of the first, second, third and fourth PMA channel circuits. Other embodiments and features are also disclosed.

Abstract: A baseboard management controller is disclosed. The baseboard management controller adapted to monitor a host comprises a baseboard management control module, a memory controller and a video graphic array (VGA) module. The VGA module comprises a video controller, a decoder, a select circuit and a mapping circuit. The decoder receives a transaction signal from a first local bus and decodes a first address signal contained in the transaction signal. The select circuit selectively transfers data from one of the microprocessor bus, the video controller and the memory controller back to the first local bus according to a control signal. The mapping circuit being connected with the decoder maps the first address signal and a second address signal to a third address signal, updates the first address signal and transfers an updated transaction signal.

Abstract: A semiconductor device includes at least one endpoint communicating with a host, and an endpoint controller dividing each of the at least one endpoint into a majority of sub-endpoints and performing numbering to each of the divided sub-endpoints. The endpoint controller transmits a packet generated by the host to any one of the sub-endpoints.

Abstract: A data storage device includes one or more data paths through electrical contacts of the data storage device. The data paths are operably connected to allow bits to be transferred into and out of the data storage device. The data storage device stores an indication of a number of the one or more data paths in a configuration register. A method includes performing, while the data storage device is operatively coupled to a host device, receiving a command of the host device to read the configuration register and providing the indication via at least one of the one or more data paths. Providing the indication enables indicating to the host device the number of the one or more data paths.

Abstract: A peripheral device comprises a first entity and a second entity. In operation, the first/second entities are configured to respectively: receive a first/second entity-related message from at least one other device to indicate the availability of the at least one other device for attachment, send, to the at least one other device, a first/second entity-related message indicating the availability for communication with the at least one other device, receive, from the at least one other device, a first/second entity-related signal including a first/second entity-related peripheral device identifier, send a first/second entity-related response to the at least one other device, receive, from the at least one other device, a first/second entity-related device response, and send, to the at least one other device, a first/second entity-related second peripheral response including the first/second entity-related peripheral device identifier.

Abstract: A system and method for protecting against corruption of data stored in a peripheral storage device. The peripheral storage device is communicatively coupled with a host computer. The peripheral storage device includes at least memory and a controller. Data from the host computer is stored to a first portion of the peripheral storage device memory. The controller backs up some or all of the data to a second portion of the data to a second portion of the peripheral storage device memory. The controller restores some or all of the data from the second portion of the peripheral storage device memory to the first portion of the peripheral storage device memory.

Abstract: To make it possible to take over an IO configuration that is assigned to logical partitions in reallocation of the logical partitions, and to make an IO access work normally. A computer system has a server having an IO bridge, a switch that has a first IO bridge for connecting with the IO bridge of the server through a bus and plural second IO bridges for connecting to plural IO devices through a bus, and bus number assignment management means for fixedly assigning mutually different PCI bus numbers to the plural second IO bridges.

Abstract: According to one implementation, the slave identifier bits are tested recursively in groups of p bits. For these p bits, each slave will recognize, in its p corresponding identifier bits, one combination out of the 2p possible combinations. The slaves respond simultaneously (20) over the bus, for example an I2C bus, to a request from the master. The response is given by outputting a series of “1” bits in which each slave inserts a “0”, which is, for example, the priority logic value on the bus, the position of the “0” in the series of “1” bits being dependent on the binary value of the combination recognized by the slave in the group of p bits of its identifier. The master progressively determines on the fly, based on the bits of the frame received, the values of bits of these digital information items.

Abstract: The disclosure provides an HVAC data processing and communication network and a method of manufacturing the same. In an embodiment, the method includes configuring a subnet controller. The subnet controller is configured to assign to a first device associated with the network a first equipment type number based on a first device ID number and a first offset. The subnet controller is configured, in the event that the first device shares a same enclosure with a second device associated with the network, to assign to the second device a second equipment type number based on the first device ID number and a second offset. The subnet controller is configured, in the event that the first device does not share a same enclosure with the second device, to assign to the second device the second equipment type number based on a second device ID number and the second offset.

Abstract: A system and method for determining media to be exported out of a media library is described. In some examples, the system determines a media component to be exported, determines the media component is in the media library for a specific process, and exports the media component after the process is completed.

Abstract: An integrated circuit includes a first configuration terminal, a second configuration terminal, a bus terminal, and an auto addressing circuit coupled to the first and second configuration terminals. The auto addressing circuit is responsive to a data pattern received at the first configuration terminal to assign a node address to an operational circuit, and subsequently to couple the first configuration terminal to the second configuration terminal. The integrated circuit is subsequently responsive to the node address when the node address is received.

Abstract: A power device, such as a UPS, and a method for gathering system information using the power device are provided. In one aspect, a UPS receives system information associated with at least one other device, the system information including configuration management information, stores, in data storage, the system information associated with the at least one other device and provides the system information to an external entity.

Abstract: A method for implementing an addressing scheme may include mapping a digital peripheral function to one or more contiguous configurable blocks in an array of configurable blocks; and assigning a memory address from a plurality of memory addresses to at least one register of each of the one or more contiguous configurable blocks based on an access mode width of the digital peripheral function and a width of each of the one or more contiguous configurable blocks.

Abstract: Aspects of a method and system for an operating system (OS) virtualization-aware network interface card (NIC) are provided. A NIC may provide direct I/O capabilities for each of a plurality of concurrent guest operating systems (GOSs) in a host system. The NIC may comprise a GOS queue for each of the GOSs, where each GOS queue may comprise a transmit (TX) queue, a receive (RX) queue, and an event queue. The NIC may communicate data with a GOS via a corresponding TX queue and RX queue. The NIC may notify a GOS of events such as down link, up link, packet transmission, and packet reception via the corresponding event queue. The NIC may also support unicast, broadcast, and/or multicast communication between GOSs. The NIC may also validate a buffered address when the address corresponds to one of the GOSs operating in the host system.

Abstract: An information processing apparatus with a plurality of USB (universal serial bus) ports to which USB devices can be connected, includes: detection means for detecting the USB port of the plurality of USB ports to which the USB device that is in the course of data communication is connected; and first display control means for displaying on a display unit provided in a position corresponding to the detected USB port the fact that the USB device connected to the detected USB port is in the course of data communication.

Abstract: In a virtualized computer system in which a guest operating system runs on a virtual machine of a virtualized computer system, a computer-implemented method of providing the guest operating system with direct access to a hardware device coupled to the virtualized computer system via a communication interface, the method including: (a) obtaining first configuration register information corresponding to the hardware device, the hardware device connected to the virtualized computer system via the communication interface; (b) creating a passthrough device by copying at least part of the first configuration register information to generate second configuration register information corresponding to the passthrough device; and (c) enabling the guest operating system to directly access the hardware device corresponding to the passthrough device by providing access to the second configuration register information of the passthrough device.