Detachable Memory Patents (Class 711/115)
  • Patent number: 11314907
    Abstract: In some examples, one or more computing devices on a network may receive, from a client computing device, one or more inputs for configuring a simulation, the simulation including at least a first simulator and a second simulator. The one or more computing devices may allocate computing resources including at least a first virtual machine for executing at least one of the first simulator or the second simulator. The one or more computing devices may configure a first simulation controller executable on the first virtual machine for controlling execution of the at least one of the first simulator or the second simulator. The first simulation controller may initiate execution of at least one of the first simulator or the second simulator as part of execution of the co-simulation. In some examples, a result of the co-simulation may be sent to the client computing device.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: April 26, 2022
    Assignee: HITACHI, LTD.
    Inventors: Sujit S Phatak, Herning Chen, Yuan Xiao, Can Wang
  • Patent number: 11295037
    Abstract: Techniques for data scanning and removal for a removable storage device are described herein. An aspect includes a removable storage device comprising an embedded processor configured to boot from an embedded read-only memory (ROM) of the removable storage device. Another aspect includes scanning an internal storage of the removable storage device to identify a first file in the internal storage that matches removal criteria defined in the embedded ROM. Another aspect includes removing the identified first file from the internal storage of the removable storage device.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: April 5, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Michael Cracraft
  • Patent number: 11275826
    Abstract: An apparatus capable of hosting a secure module. The hosting apparatus is configured to provide connectivity to the secure module, and comprises a memory for storing secure module related applications. A processing module is configured to check whether an application chosen or activated by the user of the apparatus is a secure module related application. In case the chosen or activated application is a secure module related application, the processing module is 101 configured to restrict user rights concerning the application.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: March 15, 2022
    Assignee: Nokia Technologies Oy
    Inventor: Mikko Antero Saarisalo
  • Patent number: 11237976
    Abstract: Embodiments of the disclosure relate to a memory system, a memory controller and a meta-information storage device. By providing a memory device configured to store mapping information between a logical address and a physical address, a memory controller configured to control the memory device and control a memory area in which mapping segments including some of the mapping information are stored and a meta-information storage device configured to store meta-information on the memory area, it is possible to provide a memory system, a memory controller and a meta-information storage device capable of processing a command received from a host as quickly as possible even when an SPO occurs.
    Type: Grant
    Filed: November 4, 2019
    Date of Patent: February 1, 2022
    Assignee: SK hynix Inc.
    Inventors: Hye-Mi Kang, Eu-Joon Byun
  • Patent number: 11223739
    Abstract: A printing system includes a printer and an information processing device that includes a processor and a memory storing processor-executable instructions, the instructions being configured to, when executed by the processor, cause the processor to accept a print instruction, in response to accepting the print instruction, determine whether to instruct the printer to start a pre-printing operation based on preparation instruction information, in response to determining to instruct the printer to start the pre-printing operation, transmit the preparation instruction information to the printer, in response to determining to instruct the printer to start the pre-printing operation and transmitting the preparation instruction information to the printer, generate print data based on specified contents data, and transmit print instruction information to the printer.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: January 11, 2022
    Assignee: BROTHER KOGYO KABUSHIKI KAISHA
    Inventor: Kazutaka Yamada
  • Patent number: 11216209
    Abstract: A storage device comprises a storage medium, storage controller, a host interface, and a bridge slot. The storage controller is configured to control read and write operations to the storage medium and operates according to a firmware written by a storage device manufacturer. The bridge slot is configured to receive a removable bridge storing software written by a third-party different from the storage device manufacturer. The removable bridge is configured to intercept a first command sent from the host system to the storage controller, modify the first command according to the software stored on removable bridge, and transmit the first command to the storage controller.
    Type: Grant
    Filed: March 26, 2019
    Date of Patent: January 4, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventor: William Bernard Boyle
  • Patent number: 11209992
    Abstract: Detection of alteration of storage keys used to protect memory includes determining whether a storage key alteration event has occurred within a processor of a computing environment. The determining includes checking whether one or more selected fields of a storage key have been updated. The storage key is associated with a block of memory and controls access to the block of memory. Based on the checking indicating that the one or more selected fields of the storage key have been updated, a storage key alteration event has been detected. Based on determining the storage key alteration event has occurred, a notification is provided.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: December 28, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Timothy Slegel, Jonathan D. Bradbury, Bruce C. Giamei, James H. Mulder, Peter J. Relson
  • Patent number: 11151135
    Abstract: A pre-computed result module computes a result prior to receiving a query. The pre-computed result module includes instructions executed by a processor to assess a pre-computation query to designate each identified database source that contributes to the answer to the pre-computation query and corresponding database source metadata. A metadata signature is computed for each identified database source to create a store of identified database sources and corresponding metadata signatures. The query is evaluated to identify accessed database sources responsive to the query. A current metadata signature for each accessed database source is compared to the metadata signatures to identify each updated database source. Re-computed results are formed for each updated database source. Pre-computed results are utilized for each database source that is not updated. A response is supplied to the query using the re-computed results and the pre-computed results.
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: October 19, 2021
    Assignee: Cloudera, Inc.
    Inventor: Douglas J. Cameron
  • Patent number: 11106829
    Abstract: A chip fingerprint management device includes: a one-time programmable (OTP) memory including a first storage region, the first storage region being readable by hardware and access restricted by software; and an OTP controller which generates a chip fingerprint based on a random number, and programs the generated chip fingerprint into the first storage region in the OTP memory.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: August 31, 2021
    Assignee: INNOGRIT TECHNOLOGIES CO., LTD.
    Inventor: Moyang Chen
  • Patent number: 11074012
    Abstract: A storage device includes: a semiconductor memory; and a memory controller coupled to the semiconductor memory and configured to control the semiconductor memory, wherein the memory controller is configured to store information for translating a logical address into a physical address, and execute a dividing process that includes dividing, upon receiving a computational command, the computational command into a plurality of commands based on the information.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: July 27, 2021
    Assignee: FUJITSU LIMITED
    Inventor: Shinya Kuwamura
  • Patent number: 11068444
    Abstract: Systems and techniques for losslessly reducing input data using a distributed system comprising multiple computers that maintain portions of a data structure that organizes prime data elements based on names of the prime data elements. During operation, a first computer can determine a first name for the element, and send the element to a second computer based on the first name. The second computer can losslessly reduce the element by determining a second name for the element, and using the second name to navigate through a portion of the data structure maintained at the second computer.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: July 20, 2021
    Assignee: Ascava, Inc.
    Inventor: Harshvardhan Sharangpani
  • Patent number: 11038307
    Abstract: In one embodiment, as apparatus includes a cable identifier for attachment to a plug and cable assembly operable to deliver Power over Ethernet (PoE) at a power greater than 90 watts, the plug and cable assembly receivable in a receptacle delivering the PoE. The cable identifier is configured for mating with the receptacle and includes an electrical identifier for use in identifying a power rating of the cable when the plug and cable assembly is inserted into the receptacle. A method and network device are also disclosed herein.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: June 15, 2021
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Paolo Sironi, Simone Vigna, Joel Richard Goergen, Chad M. Jones
  • Patent number: 11030187
    Abstract: Systems and techniques are described for efficient, general-purpose, and potentially decentralized databases, distributed storage systems, version control systems, and/or other types of data repositories. Data is represented in a database system in such a way that any value is represented by a unique identifier which is derived from the value itself. Any database peer in the system will derive an identical identifier from the same logical value. The identifier for a value may be derived using a variety of mechanisms, including, without limitation, a hash function known to all peers in the system. The values may be organized hierarchically as a tree of nodes. Any two peers storing the same logical value will deterministically represent that value with a graph, such as the described “Prolly” tree, having the same topology and hash value, irrespective of possibly differing sequences of mutations which caused each to arrive at the same final value.
    Type: Grant
    Filed: May 17, 2017
    Date of Patent: June 8, 2021
    Assignee: salesforce.com, inc.
    Inventors: Aaron Boodman, Rafael Weinstein, Erik Arvidsson, Chris Masone, Dan Willhite, Benjamin Kalman
  • Patent number: 11017384
    Abstract: A system for provisioning credentials onto an electronic device is provided. The system may include a payment network subsystem, a service provider subsystem, a primary user device, and a secondary user device. The user may select a particular payment card to provision onto the secondary user device by providing an input at the primary user device. A broker module running on the service provider subsystem may then transfer a disabled pass to the secondary user device. Concurrently, the payment network subsystem may direct a trusted service manager module on the service provider subsystem to write credential information onto a secure element within the secondary user device. Once the secure element has been updated, the broker module may provide an activated pass to the secondary user device so that the secondary user device can be used to perform NFC-based financial transactions at a merchant terminal.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: May 25, 2021
    Assignee: Apple Inc.
    Inventors: Jeremy T. Brown, George R. Dicker, Glen W. Steele, Morgan J. Grainger, Zachary A. Rosen
  • Patent number: 10998014
    Abstract: A memory device configured to support multiple memory densities is provided. The memory device includes a first plurality of electrical contacts corresponding to a first command/address channel, a second plurality of electrical contacts corresponding to a second command/address channel, a third plurality of electrical contacts corresponding to a first data bus, a fourth plurality of electrical contacts corresponding to a second data bus, and mode selection circuitry configured to place the memory device in the first mode or the second mode. In the first mode, the first plurality of memory cells is operatively coupled to the first and third pluralities of electrical contacts and the second plurality of memory cells is operatively coupled to the second and fourth plurality of electrical contacts. In the second mode, the first and second pluralities of memory cells are both operatively coupled to the first and third pluralities of electrical contacts.
    Type: Grant
    Filed: October 14, 2019
    Date of Patent: May 4, 2021
    Assignee: Micron Technology, Inc.
    Inventor: Martin Brox
  • Patent number: 10956066
    Abstract: Non-volatile memory having a non-volatile memory array adapted to store a configuration routine for a low power dynamic random access memory (LPDRAM), a memory interface for receiving addresses from an external device for access of data stored in the non-volatile memory array, and an internal controller adapted to communicate with a LPDRAM coupled to the non-volatile memory and configure operational settings of the LPDRAM using the configuration routine, as well as systems containing similar non-volatile memory.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: March 23, 2021
    Assignee: Micron Technology, Inc.
    Inventor: Frankie F. Roohparvar
  • Patent number: 10956273
    Abstract: Various embodiments for managing data in a data deduplication repository in a computing storage environment, by a processor device, are provided. In one embodiment, a method comprises migrating certain deduplication repository data from a host to an object storage by integrating a data offload process with an existing backup management application, for reducing unnecessary deduplication repository data stored on the host.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: March 23, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Joseph W. Dain, Gregory T. Kishi, Gil E. Paz, Renan Jeshua Ugalde Amezcua
  • Patent number: 10949519
    Abstract: A device includes memory and a processor. The device receives biometric information. The device receives location information. The device analyzes the received biometric information with stored biometric information. The device analyzes the received location information with stored location information. The device determines whether the received biometric information matches the stored biometric information. The device determines whether the received location information matches the stored location information. The device sends an electronic communication that indicates whether the received biometric information matches the stored biometric information and whether the received local information matches the stored location information.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: March 16, 2021
    Assignee: VISITLOCK LLC
    Inventor: Kevin Robert Phillips
  • Patent number: 10949106
    Abstract: The present invention provides a method performed by a secure digital (SD) card supporting both an SD mode and a peripheral component interconnect express (PCIe) mode for initializing the SD card. The method comprises: (a) after receiving a first supply voltage through a first voltage supply pin from a host coupled to the SD card, entering the SD mode if the SD card is not in the PCIe mode and a CMD0 command for entering the SD mode is received through a command pin from the host coupled to the SD card; and (b) after receiving the first supply voltage through the first voltage supply pin from the host coupled to the SD card, performing a PCIe linkup process if the SD card is not in the SD mode and a second supply voltage is received through a second voltage supply pin from the host coupled to the SD card. The SD card enters the PCIe mode if the PCIe linkup process succeeds.
    Type: Grant
    Filed: January 18, 2019
    Date of Patent: March 16, 2021
    Assignee: SILICON MOTION INC.
    Inventor: Chao-Kuei Hsieh
  • Patent number: 10929071
    Abstract: An SD emulator card may comprise a processor and a wireless chip. The SD emulator card may be used in a host device with a memory card slot, such as a camera. The host device may communicate with the SD emulator card using standard SD protocol. The SD emulator card may communicate with a portable storage device using a standard communication protocol. The host device may operate as if the SD emulator card were an SD card. However, the data captured by the host device may be stored on the portable storage device. The portable storage device may be a wearable device.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: February 23, 2021
    Assignee: Fasetto, Inc.
    Inventors: Coy Christmas, Luke Malpass
  • Patent number: 10921984
    Abstract: A data storage device includes a nonvolatile memory module, a host communication interface, and control circuitry configured to execute an initialization process with a host system communicatively coupled to the data storage device via the host communication interface, and as part of the initialization process, provide health status information associated with the nonvolatile memory module to the host system using the host communication interface.
    Type: Grant
    Filed: June 4, 2018
    Date of Patent: February 16, 2021
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Eshaan Gupta, Ashish Kumar
  • Patent number: 10922070
    Abstract: A method for performing a download operation is described comprising detecting an updated firmware for installation, transmitting at least one slice of the updated firmware from an updated firmware location to a second firmware location, determining if a synchronization has completed with the at least one slice of the updated firmware and determining if additional slices are to be synchronized when the synchronization has completed with the at least one slice of the updated firmware.
    Type: Grant
    Filed: August 7, 2018
    Date of Patent: February 16, 2021
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Cory Lappi, William Jared Walker, Xin Chen
  • Patent number: 10902886
    Abstract: A memory module includes a plurality of DRAM packages mounted on a printed circuit board. Each DRAM package includes a control die, stacked array dies, and first and second die interconnects coupling the stacked array dies to the control die. The control die includes data signal conduits coupled to the first die interconnects and control signal conduits coupled to the second die interconnects. The control die is configured to receive control signals, and to control the data signal conduits in accordance with the control signals. Each of the DRAM packages is configurable to communicate a respective set of bits of a data signal between a selected die among the stacked array dies and the data conduits in response to the control signals.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: January 26, 2021
    Assignee: NETLIST, INC.
    Inventor: Hyun Lee
  • Patent number: 10838631
    Abstract: Detection of alteration of storage keys used to protect memory includes determining whether a storage key alteration event has occurred within a processor of a computing environment. The determining includes checking whether one or more selected fields of a storage key have been updated. The storage key is associated with a block of memory and controls access to the block of memory. Based on the checking indicating that the one or more selected fields of the storage key have been updated, a storage key alteration event has been detected. Based on determining the storage key alteration event has occurred, a notification is provided.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: November 17, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Timothy Slegel, Jonathan D. Bradbury, Bruce C. Giamei, James H. Mulder, Peter J. Relson
  • Patent number: 10820419
    Abstract: A memory system includes a printed circuit board, at least one memory chip mounted on the printed circuit board, and a memory controller arranged on the printed circuit board and connected to 2N (where N is an integer of 2 or more) channels, the memory controller configured to perform a write operation and a read operation on the at least one memory chip. In the printed circuit board, a first subset of the channels corresponds to a first channel group configured in a point to point topology, and a remaining subset of the channels corresponds to a second channel group configured in a daisy chain topology.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: October 27, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byung-guk Seo, Sun-ki Yun, Su-jin Kim, Hwi-jong Yoo, Young-rok Oh
  • Patent number: 10802744
    Abstract: Disclosed herein are related to a controller, a method, and a system for updating mapping information between a logical address and a physical address of a corresponding region of a memory device. In one aspect, the controller generates a plurality of entries, where each entry indicates an update in the mapping information associated with the corresponding region. The controller generates a plurality of headers, where each header is associated with one or more entries in the corresponding region. The controller receives an instruction to synchronize the mapping information stored on the memory device with the update in the mapping information. The controller generates a copy of the plurality of headers in response to receiving the instruction to synchronize. The controller synchronizes the mapping information stored on the memory device according to the copy of the plurality of headers and the plurality of entries.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: October 13, 2020
    Assignee: Western Digital Technologies, Inc.
    Inventors: Marina Frid, Igor Genshaft
  • Patent number: 10776007
    Abstract: A memory management device of an example of the invention controls writing into and reading from a main memory including a nonvolatile semiconductor memory and a volatile semiconductor memory in response to a writing request and a reading request from a processor. The memory management device includes a coloring information storage unit that stores coloring information generated based on a data characteristic of write target data to be written into at least one of the nonvolatile semiconductor memory and the volatile semiconductor memory, and a writing management unit that references the coloring information to determines a region into which the write target data is written from the nonvolatile semiconductor memory and the volatile semiconductor memory.
    Type: Grant
    Filed: November 11, 2015
    Date of Patent: September 15, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Atsushi Kunimatsu, Masaki Miyagawa, Hiroshi Nozue, Kazuhiro Kawagome, Hiroto Nakai, Hiroyuki Sakamoto, Tsutomu Owa, Tsutomu Unesaki, Reina Nishino, Kenichi Maeda, Mari Takada
  • Patent number: 10776031
    Abstract: Various embodiments comprise apparatuses and methods including a method of reconfiguring partitions in a memory device as directed by a host. The method includes managing commands through a first interface controller to mapped portions of a first memory not having an attribute enhanced set, and mapping portions of a second memory having the attribute enhanced set through a second interface controller. Additional apparatuses and methods are described.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: September 15, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Danilo Caraccio, Emanuele Confalonieri, Federico Tiziani
  • Patent number: 10747863
    Abstract: A device includes memory and a processor. The device receives biometric information. The device receives location information. The device analyzes the received biometric information with stored biometric information. The device analyzes the received location information with stored location information. The device determines whether the received biometric information matches the stored biometric information. The device determines whether the received location information matches the stored location information. The device sends an electronic communication that indicates whether the received biometric information matches the stored biometric information and whether the received local information matches the stored location information.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: August 18, 2020
    Assignee: VISITLOCK LLC
    Inventor: Kevin Robert Phillips
  • Patent number: 10747459
    Abstract: Methods and devices for enabling compatibility of media storage devices with a wide range of external devices are generally provided herein. More specifically, methods and devices disclosed herein allow a single media storage device to be accessed by external devices that are incapable of accesses the same file structure(s) and/or file type(s). A media storage device may include a plurality of logical units, each with one or more partitions. A file system on a first partition of a first logical unit may be selected for compatibility with one external device, while a file system on a second partition of a second logical unit may be selected for compatibility with a second, different external device. The media storage device may present as a fixed disc for further interoperability.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: August 18, 2020
    Assignee: URFLASH LLC
    Inventor: Robert Ruccia
  • Patent number: 10742635
    Abstract: A global userID may be linked to many individual locations. A user may login to the global userID and select an experience environment. The experience environment may provide access to locations associated with the experience environment, such as all locations in a country. The user may switch between experience environments without providing login credentials for each individual location the user wishes to view.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: August 11, 2020
    Assignee: AMERICAN EXPRESS TRAVEL RELATED SERVICES COMPANY, INC.
    Inventors: Debdeep Banerjee, Yatharth Chowdhary, Dinesh Reddy Gudibandi, Gautam Gulati, Prasanth Harpanahalli, Edward L. Morabito, Jr.
  • Patent number: 10734064
    Abstract: A memory control component has control circuitry and a data interface, the data interface to be coupled, via a plurality of data signaling paths, to a respective plurality of memory dies disposed on a memory module. The control circuitry transmits to the memory module a first configuration value that specifies a memory die quantity N that is permitted to range from a first value corresponding to the quantity of the data signaling paths to at least one value less than the first value. Thereafter, the control circuitry transmits a memory read command to the memory module to enable, in accordance with the first configuration value, a quantity N of the memory dies to output read data and enables the data interface to receive the read data via a respective quantity N of the data signaling paths.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: August 4, 2020
    Assignee: Rambus Inc.
    Inventors: Frederick A. Ware, John Eric Linstadt, Kenneth L. Wright
  • Patent number: 10656854
    Abstract: Highly secure portable storage device includes a physical input device, a memory and a controller, all of which reside within or on the device itself. The controller may determine whether the device is in an exclusive or nonexclusive mode, whether the device is in a privileged mode, a locked mode or a protected mode, and whether a request is made to self-transform to a renewed mode. When the request is made and the device is in the nonexclusive mode, the device self-transforms to the renewed mode without requiring communication with the host and without requiring access code verification. When the request is made and the device is in the exclusive mode, the device self-transforms to the renewed mode only when a privileged security access code is verified. Transforming to a renewed mode sets all access codes to null and sets a new encryption key. Other methods and implementations are described.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: May 19, 2020
    Assignee: APRICORN
    Inventors: Paul Cameron Brown, Phuoc Minh Thai, Michael Lee McCandless, Yuhsiang Su
  • Patent number: 10635343
    Abstract: Apparatuses, systems, methods, and computer program products for streamed program commands with periodic garbage collection are disclosed. A controller is configured to set up a data path between the controller and a memory device to initialize an open mode. A controller is configured to perform a plurality of program operations on a memory device in an open mode using a same set up data path. A controller is configured to, in response to exiting an open mode, perform a garbage collection operation on a memory device.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: April 28, 2020
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Ramanathan Muthiah, Balaji Thraksha Venkataramanan, Ramkumar Ramamurthy, Ravi Gaja
  • Patent number: 10635313
    Abstract: An operating method of a semiconductor device and a memory system, each including a multi-connection port, includes: receiving connection information of a first device while connecting to the first device; updating information of a management table by using the connection information; and generating and transmitting a first packet including the connection information of the first device to a second device pre-connected to the memory system.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: April 28, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Tae Park, Hwa-Seok Oh, Jin-Hyeok Choi
  • Patent number: 10634789
    Abstract: The present disclosure describes methods and systems for measuring crosswind speed by optical measurement of laser scintillation. One method includes projecting radiation into a medium, receiving, over time, with a photodetector receiver, a plurality of scintillation patterns of scattered radiation, comparing cumulative a radiation intensity for each received scintillation pattern of the received plurality of scintillation patterns, and measuring a cumulative weighted average cross-movement within the medium using the compared cumulative radiation intensities.
    Type: Grant
    Filed: October 10, 2018
    Date of Patent: April 28, 2020
    Assignee: Torrey Pines Logic, Inc.
    Inventor: Leo Volfson
  • Patent number: 10621321
    Abstract: A storage device includes at least one nonvolatile memory device, a memory controller that controls the at least one nonvolatile memory device, and a fingerprint recognition sensor that recognizes a fingerprint of a user. The at least one nonvolatile memory device includes at least one secure partition area being accessible by a host device when a fingerprint recognized by the fingerprint recognition sensor is the same as an enrolled fingerprint, and a public area being accessible by the host device regardless of a fingerprint recognition operation.
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: April 14, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Jin Park, Ilgyu Jung
  • Patent number: 10613765
    Abstract: A storage device includes a first non-volatile memory comprising a plurality of first banks having a plurality of first addresses and a second non-volatile memory comprising a plurality of second banks having a plurality of second addresses assigned to each according to different assignment policies, and a controller. The plurality of second addresses corresponds to the plurality of first addresses. The second non-volatile memory mirrors data items stored in the first addresses to store them in the second addresses. The controller is configured to receive a command from a host to control the first non-volatile memory and the second non-volatile memory. The controller provides a read command received from the host simultaneously to first and second non-volatile memories, and outputs to the host an earlier one between data provided from the first non-volatile memory and data provided from the second non-volatile memory based on the read command.
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: April 7, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Byoung Geun Kim
  • Patent number: 10558588
    Abstract: A processor includes a decode unit to decode an instruction that is to indicate a page of a protected container memory, and a storage location outside of the protected container memory. An execution unit, in response to the instruction, is to ensure that there are no writable references to the page of the protected container memory while it has a write protected state. The execution unit is to encrypt a copy of the page of the protected container memory. The execution unit is to store the encrypted copy of the page to the storage location outside of the protected container memory, after it has been ensured that there are no writable references. The execution unit is to leave the page of the protected container memory in the write protected state, which is also valid and readable, after the encrypted copy has been stored to the storage location.
    Type: Grant
    Filed: July 17, 2017
    Date of Patent: February 11, 2020
    Assignee: Intel Corporation
    Inventors: Carlos V. Rozas, Mona Vij, Rebekah M. Leslie-Hurd, Krystof C. Zmudzinski, Somnath Chakrabarti, Francis X. Mckeen, Vincent R. Scarlata, Simon P. Johnson, Ilya Alexandrovich, Gilbert Neiger, Vedvyas Shanbhogue, Ittai Anati
  • Patent number: 10553259
    Abstract: A memory device configured to support multiple memory densities is provided. The memory device includes a first plurality of electrical contacts corresponding to a first command/address channel, a second plurality of electrical contacts corresponding to a second command/address channel, a third plurality of electrical contacts corresponding to a first data bus, a fourth plurality of electrical contacts corresponding to a second data bus, and mode selection circuitry configured to place the memory device in the first mode or the second mode. In the first mode, the first plurality of memory cells is operatively coupled to the first and third pluralities of electrical contacts and the second plurality of memory cells is operatively coupled to the second and fourth plurality of electrical contacts. In the second mode, the first and second pluralities of memory cells are both operatively coupled to the first and third pluralities of electrical contacts.
    Type: Grant
    Filed: August 23, 2017
    Date of Patent: February 4, 2020
    Assignee: Micron Technology, Inc.
    Inventor: Martin Brox
  • Patent number: 10552360
    Abstract: According to one embodiment, when an external device is connected, the electronic device detects devices in the external device, and setup of detected devices. When the electronic device is powered, when a power state is restored from a hibernation or a sleep state to a normal state, or when the external device is connected, it is determined whether a first device is included in the detected devices. When the first device is included and when setup of a second device is failed, detection of devices and setup of detected devices are repeated.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: February 4, 2020
    Assignee: Toshiba Client Solutions CO., LTD.
    Inventor: Rinzo Iwamoto
  • Patent number: 10521986
    Abstract: A secure transport device includes a hardware storage, a physical lock coupled to the hardware storage, a data storage residing within the hardware storage, the data storage comprising a destination location comprising a first geophysical location, processor(s), and a computer readable medium comprising programming instructions. The data storage includes a destination location that includes a first geophysical location. Execution of the programming instructions causes the processor(s) to: receive an access request to access the hardware storage; obtain a current location of the secure transport device, the current location including a second geophysical location; and compare the first geophysical location to the second geophysical location. Upon determining that the second geophysical location matches the first geophysical location, a command is sent to unlock the physical lock to allow access to the hardware storage, and the access request and the current location are stored in the data storage.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: December 31, 2019
    Assignee: TP Lab, Inc.
    Inventor: Chi Fai Ho
  • Patent number: 10506709
    Abstract: An electronic circuit includes: a motherboard; an input/output connector including at least one group containing N input/output contacts; a set containing expansion slots having expansion contacts electrically connected to input/output contacts; each input/output contact being identified by an identifier T, each expansion slot being identified by an identifier S, each connected expansion contact being identified by an identifier R, for: each expansion slot of identifier S; and each connected expansion contact of identifier R. Each input/output contact of identifier T is electrically connected to a single expansion contact of identifier R of the expansion slot of identifier S, and the identifier T is calculated according to the following relation: T?[(R+D×S) modulo (N)], where D is fixed in each group and is an integer sub-multiple of the natural number N.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: December 10, 2019
    Assignee: ZODIAC AEROTECHNICS
    Inventor: Zoran Racic
  • Patent number: 10490524
    Abstract: An antenna apparatus includes a radio-frequency chip arranged on a substrate, wherein the radio-frequency chip includes at least one antenna output terminal and the antenna output terminal functions as a first fixing region for an electric conductor. The antenna apparatus further includes a first bond wire connecting in an electrically conducting manner the first fixing region to a second fixing region arranged on the substrate. Furthermore, the antenna apparatus includes a second bond wire connecting in an electrically conducting manner the second fixing region and a third fixing region arranged on the substrate. According to the invention, the first and the second bond wire electrically connected in series form an antenna. In this case, the first and second bond wires are at least regionally spaced apart from the substrate.
    Type: Grant
    Filed: January 5, 2018
    Date of Patent: November 26, 2019
    Assignee: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
    Inventor: Ivan Ndip
  • Patent number: 10489325
    Abstract: A USB Type-C module has a plurality of ground pins including a first ground pin, a first configuration pin, a second configuration pin and a detector. The detector is electrically connected to the first ground pin and configured to detect a voltage value at the first ground pin so as to selectively enable a controller to determine a configuration of a corresponding connector via at least one of the first configuration pin and the second configuration pin.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: November 26, 2019
    Assignee: eEver Technology, Inc.
    Inventors: Yu-Chih Hsieh, Yuan-Bo Chang, Sian-Jia Chen
  • Patent number: 10489056
    Abstract: A queue manager apparatus converts inbound commands of a first width into scalar format commands to be queued in a command queue. Furthermore, the queue manager converts the scalar format commands residing in the command queue into outbound commands of a second width for transmission. Converting inbound commands to scalar format commands and then converting the scalar format commands to a target width for transmission allows the queue manager to advantageously provide efficient and programmable command transmission between arbitrary processing units, regardless of potentially mismatched native command widths.
    Type: Grant
    Filed: November 9, 2017
    Date of Patent: November 26, 2019
    Assignee: NVIDIA Corporation
    Inventor: John Erik Lindholm
  • Patent number: 10468127
    Abstract: A portable data-management system may be easily employed with multiple processing devices by eliminating the need to pre-install additional programs, agents, device drivers, or other software components on the hosts. A portable storage device contains software for a data-management application, which receives and processes test data from a meter that measures an analyte. The portable device may employ an interface protocol that makes the portable device immediately compatible with different operating systems and hardware configurations. Once the portable device is connected to the host, the data-management application can be automatically launched. The convenience and portability of a data-management system may be enhanced by integrating advanced data processing and display features with the portable device. The users may access some advanced presentations of health data without having to launch the data-management application on a separate host.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: November 5, 2019
    Assignee: ASCENSIA DIABETES CARE HOLDINGS AG
    Inventors: Darren Brown, Jun Chen, Igor Gofman, Steven B. Harris, Paul L. Inman, Richard Kates, Qiong Li, Harris Lieber, Paul M. Ripley, Gregory Stefkovic, Hoi-Cheong Steve Sun, Mu Wu, Raymond Yao, Simin Yao
  • Patent number: 10467018
    Abstract: A method of booting a host device includes enabling or disabling a ready boot option within a basic input-output system (BIOS) of a host device. A normal boot is performed to load a first operating system (OS), that is stored in an internal storage of the host device, to a main memory of the host device when the ready boot option is disabled. A boot operation to load a second OS, that is stored in an internal storage of a mobile device, to the main memory of the host device is performed when the ready boot option is enabled. An individualized user environment for the host device, is provided by booting the host device from the mobile device. The individualized user environment is easily realized as the user need only connect the mobile device to a designated USB port of the host device prior to restarting the host device.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: November 5, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Young-Jin Park
  • Patent number: 10466911
    Abstract: A method for control of latency information through logical block addressing is described comprising receiving a computer command, performing a read flow operation on a computer buffer memory based on the computer command; populating at least one metadata frame with data based on logical block address latency information; initiating a serial attached data path transfer for one of transmitting and receiving data to the computer drive and transmitting data to a host based on the second latency.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: November 5, 2019
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Darin Edward Gerhart, Nicholas Edward Ortmeier, Mark David Erickson
  • Patent number: 10459660
    Abstract: A memory module with multiple memory devices includes a buffer system that manages communication between a memory controller and the memory devices. The memory module additionally includes a command input port to receive command and address signals from a controller and, also in support of capacity extensions, a command relay circuit coupled to the command port to convey the commands and addresses from the memory module to another module or modules. Relaying commands and addresses introduces a delay, and the buffer system that manages communication between the memory controller and the memory devices can be configured to time data communication to account for that delay.
    Type: Grant
    Filed: November 4, 2015
    Date of Patent: October 29, 2019
    Assignee: Rambus Inc.
    Inventors: Frederick A. Ware, Scott C. Best