Detachable Memory Patents (Class 711/115)
  • Patent number: 10929071
    Abstract: An SD emulator card may comprise a processor and a wireless chip. The SD emulator card may be used in a host device with a memory card slot, such as a camera. The host device may communicate with the SD emulator card using standard SD protocol. The SD emulator card may communicate with a portable storage device using a standard communication protocol. The host device may operate as if the SD emulator card were an SD card. However, the data captured by the host device may be stored on the portable storage device. The portable storage device may be a wearable device.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: February 23, 2021
    Assignee: Fasetto, Inc.
    Inventors: Coy Christmas, Luke Malpass
  • Patent number: 10922070
    Abstract: A method for performing a download operation is described comprising detecting an updated firmware for installation, transmitting at least one slice of the updated firmware from an updated firmware location to a second firmware location, determining if a synchronization has completed with the at least one slice of the updated firmware and determining if additional slices are to be synchronized when the synchronization has completed with the at least one slice of the updated firmware.
    Type: Grant
    Filed: August 7, 2018
    Date of Patent: February 16, 2021
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Cory Lappi, William Jared Walker, Xin Chen
  • Patent number: 10921984
    Abstract: A data storage device includes a nonvolatile memory module, a host communication interface, and control circuitry configured to execute an initialization process with a host system communicatively coupled to the data storage device via the host communication interface, and as part of the initialization process, provide health status information associated with the nonvolatile memory module to the host system using the host communication interface.
    Type: Grant
    Filed: June 4, 2018
    Date of Patent: February 16, 2021
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Eshaan Gupta, Ashish Kumar
  • Patent number: 10902886
    Abstract: A memory module includes a plurality of DRAM packages mounted on a printed circuit board. Each DRAM package includes a control die, stacked array dies, and first and second die interconnects coupling the stacked array dies to the control die. The control die includes data signal conduits coupled to the first die interconnects and control signal conduits coupled to the second die interconnects. The control die is configured to receive control signals, and to control the data signal conduits in accordance with the control signals. Each of the DRAM packages is configurable to communicate a respective set of bits of a data signal between a selected die among the stacked array dies and the data conduits in response to the control signals.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: January 26, 2021
    Assignee: NETLIST, INC.
    Inventor: Hyun Lee
  • Patent number: 10838631
    Abstract: Detection of alteration of storage keys used to protect memory includes determining whether a storage key alteration event has occurred within a processor of a computing environment. The determining includes checking whether one or more selected fields of a storage key have been updated. The storage key is associated with a block of memory and controls access to the block of memory. Based on the checking indicating that the one or more selected fields of the storage key have been updated, a storage key alteration event has been detected. Based on determining the storage key alteration event has occurred, a notification is provided.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: November 17, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Timothy Slegel, Jonathan D. Bradbury, Bruce C. Giamei, James H. Mulder, Peter J. Relson
  • Patent number: 10820419
    Abstract: A memory system includes a printed circuit board, at least one memory chip mounted on the printed circuit board, and a memory controller arranged on the printed circuit board and connected to 2N (where N is an integer of 2 or more) channels, the memory controller configured to perform a write operation and a read operation on the at least one memory chip. In the printed circuit board, a first subset of the channels corresponds to a first channel group configured in a point to point topology, and a remaining subset of the channels corresponds to a second channel group configured in a daisy chain topology.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: October 27, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byung-guk Seo, Sun-ki Yun, Su-jin Kim, Hwi-jong Yoo, Young-rok Oh
  • Patent number: 10802744
    Abstract: Disclosed herein are related to a controller, a method, and a system for updating mapping information between a logical address and a physical address of a corresponding region of a memory device. In one aspect, the controller generates a plurality of entries, where each entry indicates an update in the mapping information associated with the corresponding region. The controller generates a plurality of headers, where each header is associated with one or more entries in the corresponding region. The controller receives an instruction to synchronize the mapping information stored on the memory device with the update in the mapping information. The controller generates a copy of the plurality of headers in response to receiving the instruction to synchronize. The controller synchronizes the mapping information stored on the memory device according to the copy of the plurality of headers and the plurality of entries.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: October 13, 2020
    Assignee: Western Digital Technologies, Inc.
    Inventors: Marina Frid, Igor Genshaft
  • Patent number: 10776007
    Abstract: A memory management device of an example of the invention controls writing into and reading from a main memory including a nonvolatile semiconductor memory and a volatile semiconductor memory in response to a writing request and a reading request from a processor. The memory management device includes a coloring information storage unit that stores coloring information generated based on a data characteristic of write target data to be written into at least one of the nonvolatile semiconductor memory and the volatile semiconductor memory, and a writing management unit that references the coloring information to determines a region into which the write target data is written from the nonvolatile semiconductor memory and the volatile semiconductor memory.
    Type: Grant
    Filed: November 11, 2015
    Date of Patent: September 15, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Atsushi Kunimatsu, Masaki Miyagawa, Hiroshi Nozue, Kazuhiro Kawagome, Hiroto Nakai, Hiroyuki Sakamoto, Tsutomu Owa, Tsutomu Unesaki, Reina Nishino, Kenichi Maeda, Mari Takada
  • Patent number: 10776031
    Abstract: Various embodiments comprise apparatuses and methods including a method of reconfiguring partitions in a memory device as directed by a host. The method includes managing commands through a first interface controller to mapped portions of a first memory not having an attribute enhanced set, and mapping portions of a second memory having the attribute enhanced set through a second interface controller. Additional apparatuses and methods are described.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: September 15, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Danilo Caraccio, Emanuele Confalonieri, Federico Tiziani
  • Patent number: 10747863
    Abstract: A device includes memory and a processor. The device receives biometric information. The device receives location information. The device analyzes the received biometric information with stored biometric information. The device analyzes the received location information with stored location information. The device determines whether the received biometric information matches the stored biometric information. The device determines whether the received location information matches the stored location information. The device sends an electronic communication that indicates whether the received biometric information matches the stored biometric information and whether the received local information matches the stored location information.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: August 18, 2020
    Assignee: VISITLOCK LLC
    Inventor: Kevin Robert Phillips
  • Patent number: 10747459
    Abstract: Methods and devices for enabling compatibility of media storage devices with a wide range of external devices are generally provided herein. More specifically, methods and devices disclosed herein allow a single media storage device to be accessed by external devices that are incapable of accesses the same file structure(s) and/or file type(s). A media storage device may include a plurality of logical units, each with one or more partitions. A file system on a first partition of a first logical unit may be selected for compatibility with one external device, while a file system on a second partition of a second logical unit may be selected for compatibility with a second, different external device. The media storage device may present as a fixed disc for further interoperability.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: August 18, 2020
    Assignee: URFLASH LLC
    Inventor: Robert Ruccia
  • Patent number: 10742635
    Abstract: A global userID may be linked to many individual locations. A user may login to the global userID and select an experience environment. The experience environment may provide access to locations associated with the experience environment, such as all locations in a country. The user may switch between experience environments without providing login credentials for each individual location the user wishes to view.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: August 11, 2020
    Assignee: AMERICAN EXPRESS TRAVEL RELATED SERVICES COMPANY, INC.
    Inventors: Debdeep Banerjee, Yatharth Chowdhary, Dinesh Reddy Gudibandi, Gautam Gulati, Prasanth Harpanahalli, Edward L. Morabito, Jr.
  • Patent number: 10734064
    Abstract: A memory control component has control circuitry and a data interface, the data interface to be coupled, via a plurality of data signaling paths, to a respective plurality of memory dies disposed on a memory module. The control circuitry transmits to the memory module a first configuration value that specifies a memory die quantity N that is permitted to range from a first value corresponding to the quantity of the data signaling paths to at least one value less than the first value. Thereafter, the control circuitry transmits a memory read command to the memory module to enable, in accordance with the first configuration value, a quantity N of the memory dies to output read data and enables the data interface to receive the read data via a respective quantity N of the data signaling paths.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: August 4, 2020
    Assignee: Rambus Inc.
    Inventors: Frederick A. Ware, John Eric Linstadt, Kenneth L. Wright
  • Patent number: 10656854
    Abstract: Highly secure portable storage device includes a physical input device, a memory and a controller, all of which reside within or on the device itself. The controller may determine whether the device is in an exclusive or nonexclusive mode, whether the device is in a privileged mode, a locked mode or a protected mode, and whether a request is made to self-transform to a renewed mode. When the request is made and the device is in the nonexclusive mode, the device self-transforms to the renewed mode without requiring communication with the host and without requiring access code verification. When the request is made and the device is in the exclusive mode, the device self-transforms to the renewed mode only when a privileged security access code is verified. Transforming to a renewed mode sets all access codes to null and sets a new encryption key. Other methods and implementations are described.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: May 19, 2020
    Assignee: APRICORN
    Inventors: Paul Cameron Brown, Phuoc Minh Thai, Michael Lee McCandless, Yuhsiang Su
  • Patent number: 10635343
    Abstract: Apparatuses, systems, methods, and computer program products for streamed program commands with periodic garbage collection are disclosed. A controller is configured to set up a data path between the controller and a memory device to initialize an open mode. A controller is configured to perform a plurality of program operations on a memory device in an open mode using a same set up data path. A controller is configured to, in response to exiting an open mode, perform a garbage collection operation on a memory device.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: April 28, 2020
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Ramanathan Muthiah, Balaji Thraksha Venkataramanan, Ramkumar Ramamurthy, Ravi Gaja
  • Patent number: 10634789
    Abstract: The present disclosure describes methods and systems for measuring crosswind speed by optical measurement of laser scintillation. One method includes projecting radiation into a medium, receiving, over time, with a photodetector receiver, a plurality of scintillation patterns of scattered radiation, comparing cumulative a radiation intensity for each received scintillation pattern of the received plurality of scintillation patterns, and measuring a cumulative weighted average cross-movement within the medium using the compared cumulative radiation intensities.
    Type: Grant
    Filed: October 10, 2018
    Date of Patent: April 28, 2020
    Assignee: Torrey Pines Logic, Inc.
    Inventor: Leo Volfson
  • Patent number: 10635313
    Abstract: An operating method of a semiconductor device and a memory system, each including a multi-connection port, includes: receiving connection information of a first device while connecting to the first device; updating information of a management table by using the connection information; and generating and transmitting a first packet including the connection information of the first device to a second device pre-connected to the memory system.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: April 28, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Tae Park, Hwa-Seok Oh, Jin-Hyeok Choi
  • Patent number: 10621321
    Abstract: A storage device includes at least one nonvolatile memory device, a memory controller that controls the at least one nonvolatile memory device, and a fingerprint recognition sensor that recognizes a fingerprint of a user. The at least one nonvolatile memory device includes at least one secure partition area being accessible by a host device when a fingerprint recognized by the fingerprint recognition sensor is the same as an enrolled fingerprint, and a public area being accessible by the host device regardless of a fingerprint recognition operation.
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: April 14, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Jin Park, Ilgyu Jung
  • Patent number: 10613765
    Abstract: A storage device includes a first non-volatile memory comprising a plurality of first banks having a plurality of first addresses and a second non-volatile memory comprising a plurality of second banks having a plurality of second addresses assigned to each according to different assignment policies, and a controller. The plurality of second addresses corresponds to the plurality of first addresses. The second non-volatile memory mirrors data items stored in the first addresses to store them in the second addresses. The controller is configured to receive a command from a host to control the first non-volatile memory and the second non-volatile memory. The controller provides a read command received from the host simultaneously to first and second non-volatile memories, and outputs to the host an earlier one between data provided from the first non-volatile memory and data provided from the second non-volatile memory based on the read command.
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: April 7, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Byoung Geun Kim
  • Patent number: 10558588
    Abstract: A processor includes a decode unit to decode an instruction that is to indicate a page of a protected container memory, and a storage location outside of the protected container memory. An execution unit, in response to the instruction, is to ensure that there are no writable references to the page of the protected container memory while it has a write protected state. The execution unit is to encrypt a copy of the page of the protected container memory. The execution unit is to store the encrypted copy of the page to the storage location outside of the protected container memory, after it has been ensured that there are no writable references. The execution unit is to leave the page of the protected container memory in the write protected state, which is also valid and readable, after the encrypted copy has been stored to the storage location.
    Type: Grant
    Filed: July 17, 2017
    Date of Patent: February 11, 2020
    Assignee: Intel Corporation
    Inventors: Carlos V. Rozas, Mona Vij, Rebekah M. Leslie-Hurd, Krystof C. Zmudzinski, Somnath Chakrabarti, Francis X. Mckeen, Vincent R. Scarlata, Simon P. Johnson, Ilya Alexandrovich, Gilbert Neiger, Vedvyas Shanbhogue, Ittai Anati
  • Patent number: 10552360
    Abstract: According to one embodiment, when an external device is connected, the electronic device detects devices in the external device, and setup of detected devices. When the electronic device is powered, when a power state is restored from a hibernation or a sleep state to a normal state, or when the external device is connected, it is determined whether a first device is included in the detected devices. When the first device is included and when setup of a second device is failed, detection of devices and setup of detected devices are repeated.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: February 4, 2020
    Assignee: Toshiba Client Solutions CO., LTD.
    Inventor: Rinzo Iwamoto
  • Patent number: 10553259
    Abstract: A memory device configured to support multiple memory densities is provided. The memory device includes a first plurality of electrical contacts corresponding to a first command/address channel, a second plurality of electrical contacts corresponding to a second command/address channel, a third plurality of electrical contacts corresponding to a first data bus, a fourth plurality of electrical contacts corresponding to a second data bus, and mode selection circuitry configured to place the memory device in the first mode or the second mode. In the first mode, the first plurality of memory cells is operatively coupled to the first and third pluralities of electrical contacts and the second plurality of memory cells is operatively coupled to the second and fourth plurality of electrical contacts. In the second mode, the first and second pluralities of memory cells are both operatively coupled to the first and third pluralities of electrical contacts.
    Type: Grant
    Filed: August 23, 2017
    Date of Patent: February 4, 2020
    Assignee: Micron Technology, Inc.
    Inventor: Martin Brox
  • Patent number: 10521986
    Abstract: A secure transport device includes a hardware storage, a physical lock coupled to the hardware storage, a data storage residing within the hardware storage, the data storage comprising a destination location comprising a first geophysical location, processor(s), and a computer readable medium comprising programming instructions. The data storage includes a destination location that includes a first geophysical location. Execution of the programming instructions causes the processor(s) to: receive an access request to access the hardware storage; obtain a current location of the secure transport device, the current location including a second geophysical location; and compare the first geophysical location to the second geophysical location. Upon determining that the second geophysical location matches the first geophysical location, a command is sent to unlock the physical lock to allow access to the hardware storage, and the access request and the current location are stored in the data storage.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: December 31, 2019
    Assignee: TP Lab, Inc.
    Inventor: Chi Fai Ho
  • Patent number: 10506709
    Abstract: An electronic circuit includes: a motherboard; an input/output connector including at least one group containing N input/output contacts; a set containing expansion slots having expansion contacts electrically connected to input/output contacts; each input/output contact being identified by an identifier T, each expansion slot being identified by an identifier S, each connected expansion contact being identified by an identifier R, for: each expansion slot of identifier S; and each connected expansion contact of identifier R. Each input/output contact of identifier T is electrically connected to a single expansion contact of identifier R of the expansion slot of identifier S, and the identifier T is calculated according to the following relation: T?[(R+D×S) modulo (N)], where D is fixed in each group and is an integer sub-multiple of the natural number N.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: December 10, 2019
    Assignee: ZODIAC AEROTECHNICS
    Inventor: Zoran Racic
  • Patent number: 10489325
    Abstract: A USB Type-C module has a plurality of ground pins including a first ground pin, a first configuration pin, a second configuration pin and a detector. The detector is electrically connected to the first ground pin and configured to detect a voltage value at the first ground pin so as to selectively enable a controller to determine a configuration of a corresponding connector via at least one of the first configuration pin and the second configuration pin.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: November 26, 2019
    Assignee: eEver Technology, Inc.
    Inventors: Yu-Chih Hsieh, Yuan-Bo Chang, Sian-Jia Chen
  • Patent number: 10489056
    Abstract: A queue manager apparatus converts inbound commands of a first width into scalar format commands to be queued in a command queue. Furthermore, the queue manager converts the scalar format commands residing in the command queue into outbound commands of a second width for transmission. Converting inbound commands to scalar format commands and then converting the scalar format commands to a target width for transmission allows the queue manager to advantageously provide efficient and programmable command transmission between arbitrary processing units, regardless of potentially mismatched native command widths.
    Type: Grant
    Filed: November 9, 2017
    Date of Patent: November 26, 2019
    Assignee: NVIDIA Corporation
    Inventor: John Erik Lindholm
  • Patent number: 10490524
    Abstract: An antenna apparatus includes a radio-frequency chip arranged on a substrate, wherein the radio-frequency chip includes at least one antenna output terminal and the antenna output terminal functions as a first fixing region for an electric conductor. The antenna apparatus further includes a first bond wire connecting in an electrically conducting manner the first fixing region to a second fixing region arranged on the substrate. Furthermore, the antenna apparatus includes a second bond wire connecting in an electrically conducting manner the second fixing region and a third fixing region arranged on the substrate. According to the invention, the first and the second bond wire electrically connected in series form an antenna. In this case, the first and second bond wires are at least regionally spaced apart from the substrate.
    Type: Grant
    Filed: January 5, 2018
    Date of Patent: November 26, 2019
    Assignee: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
    Inventor: Ivan Ndip
  • Patent number: 10468127
    Abstract: A portable data-management system may be easily employed with multiple processing devices by eliminating the need to pre-install additional programs, agents, device drivers, or other software components on the hosts. A portable storage device contains software for a data-management application, which receives and processes test data from a meter that measures an analyte. The portable device may employ an interface protocol that makes the portable device immediately compatible with different operating systems and hardware configurations. Once the portable device is connected to the host, the data-management application can be automatically launched. The convenience and portability of a data-management system may be enhanced by integrating advanced data processing and display features with the portable device. The users may access some advanced presentations of health data without having to launch the data-management application on a separate host.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: November 5, 2019
    Assignee: ASCENSIA DIABETES CARE HOLDINGS AG
    Inventors: Darren Brown, Jun Chen, Igor Gofman, Steven B. Harris, Paul L. Inman, Richard Kates, Qiong Li, Harris Lieber, Paul M. Ripley, Gregory Stefkovic, Hoi-Cheong Steve Sun, Mu Wu, Raymond Yao, Simin Yao
  • Patent number: 10467018
    Abstract: A method of booting a host device includes enabling or disabling a ready boot option within a basic input-output system (BIOS) of a host device. A normal boot is performed to load a first operating system (OS), that is stored in an internal storage of the host device, to a main memory of the host device when the ready boot option is disabled. A boot operation to load a second OS, that is stored in an internal storage of a mobile device, to the main memory of the host device is performed when the ready boot option is enabled. An individualized user environment for the host device, is provided by booting the host device from the mobile device. The individualized user environment is easily realized as the user need only connect the mobile device to a designated USB port of the host device prior to restarting the host device.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: November 5, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Young-Jin Park
  • Patent number: 10466911
    Abstract: A method for control of latency information through logical block addressing is described comprising receiving a computer command, performing a read flow operation on a computer buffer memory based on the computer command; populating at least one metadata frame with data based on logical block address latency information; initiating a serial attached data path transfer for one of transmitting and receiving data to the computer drive and transmitting data to a host based on the second latency.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: November 5, 2019
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Darin Edward Gerhart, Nicholas Edward Ortmeier, Mark David Erickson
  • Patent number: 10459660
    Abstract: A memory module with multiple memory devices includes a buffer system that manages communication between a memory controller and the memory devices. The memory module additionally includes a command input port to receive command and address signals from a controller and, also in support of capacity extensions, a command relay circuit coupled to the command port to convey the commands and addresses from the memory module to another module or modules. Relaying commands and addresses introduces a delay, and the buffer system that manages communication between the memory controller and the memory devices can be configured to time data communication to account for that delay.
    Type: Grant
    Filed: November 4, 2015
    Date of Patent: October 29, 2019
    Assignee: Rambus Inc.
    Inventors: Frederick A. Ware, Scott C. Best
  • Patent number: 10445024
    Abstract: A semiconductor integrated card includes an external package, a subscriber identification module (SIM) circuit, a plurality of SIM pins, a storage device and a plurality of memory pins. The SIM circuit is formed inside of the external package and is configured to store subscriber information. The SIM pins are formed on a surface of the external package and are electrically connected to the SIM circuit. The storage device is formed inside of the external package and is separated from the SIM circuit. The storage device includes a nonvolatile memory device. The memory pins are formed on the surface of the external package and are electrically connected to the storage device.
    Type: Grant
    Filed: October 25, 2017
    Date of Patent: October 15, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Hui-Kwon Seo
  • Patent number: 10430333
    Abstract: An embodiment of a semiconductor package apparatus may include technology to provide a first interface between a first storage device and a host device, and provide a second interface directly between the first storage device and a second storage device. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: October 1, 2019
    Inventors: Peng Li, Jawad B. Khan, Sanjeev N. Trika
  • Patent number: 10402140
    Abstract: A portable memory device, for example a universal serial bus (“USB”) flash drive that can inform the user, via a display, device information, for example, its capacity may be full or nearly full without the need to connect to a computer or separate processing device. The portable memory device supports various interconnectors for connecting to USB interfaces of different specifications, including any and all revised USB specifications as determined by the industry standard.
    Type: Grant
    Filed: August 10, 2017
    Date of Patent: September 3, 2019
    Inventor: Steven Mazurek
  • Patent number: 10402352
    Abstract: A semiconductor memory system includes a first semiconductor memory die and a second semiconductor memory die. The first semiconductor memory die includes a primary data interface to receive an input data stream during write operations and to deserialize the input data stream into a first plurality of data streams, and also includes a secondary data interface, coupled to the primary data interface, to transmit the first plurality of data streams. The second semiconductor memory die includes a secondary data interface, coupled to the secondary data interface of the first semiconductor memory die, to receive the first plurality of data streams.
    Type: Grant
    Filed: October 24, 2016
    Date of Patent: September 3, 2019
    Assignee: Rambus Inc.
    Inventors: Frederick A. Ware, Amir Amirkhany, Suresh Rajan, Mohammad Hekmat, Dinesh Patil
  • Patent number: 10367698
    Abstract: Access and regulations systems to facilitate safe and secure access of web content by residents of an institutional facility such as a correctional facility includes an administrator workstation to define authorized and prohibited web content, a resident workstation displaying on a predetermined list of web content, and a server receiving and processing the authorized and prohibited web content and requests made by institutional residents.
    Type: Grant
    Filed: November 2, 2015
    Date of Patent: July 30, 2019
    Assignee: KEEFE GROUP, LLC
    Inventor: Atul Gupta
  • Patent number: 10332568
    Abstract: A memory module includes a module substrate. The module substrate includes a plurality of regions, on which a plurality of memory apparatuses are mounted. A plurality of inductors are formed in the plurality of regions of the memory module substrate, respectively.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: June 25, 2019
    Assignee: SK hynix Inc.
    Inventor: Kyung Hoon Kim
  • Patent number: 10331699
    Abstract: A method and an apparatus for data backup are disclosed. The method includes querying a slave for check information, where the check information is data inserted into a master when data written to the master is copied into the slave in a form of a log; obtaining a time at which the check information is inserted into the master and setting the time as a backup completion time point; and deleting data record(s) that is/are earlier than the backup completion time point from mirrored data, the mirrored data being data that is synchronously written to a defined storage space when the data is written to the master. The method for data backup is easy to implement at a low cost, and provides highly secure data backup.
    Type: Grant
    Filed: January 13, 2016
    Date of Patent: June 25, 2019
    Assignee: Alibaba Group Holding Limited
    Inventors: Yunliang Shi, Huabing Du
  • Patent number: 10318179
    Abstract: A host device includes a first serial peripheral interface (SPI) and a second SPI to communicate with an embedded multimedia card (eMMC) device. The host device has a mode controller that controls the first SPI to toggle between first transmission and first reception modes for command transmission and response reception, respectively. The mode controller controls the second SPI to toggle between second transmission and second reception modes for data transmission and data reception, respectively.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: June 11, 2019
    Assignee: NXP B.V.
    Inventors: Bin Er, Wenwei Jiang, Xiaodong Niu, Yan Song
  • Patent number: 10318201
    Abstract: Systems and methods for managing content in a flash memory. Content or data in a flash memory is overwritten when the write operation only requires bits to be set. This improves performance of the flash and extends the life of the flash memory.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: June 11, 2019
    Assignee: EMC IP Holding Company LLC
    Inventors: Grant R. Wallace, Philip N. Shilane
  • Patent number: 10289603
    Abstract: A system can monitor data usage, including an amount of searchable data used and/or a rate at which the searchable data is manipulated, on a storage allocation in a networked environment. The storage allocation can have a quantity/number of partitions, including at least one partition, configured to store the searchable data. The system can detect that the data usage is beyond a specified threshold and then based at least in part on factors such as network traffic, CPU usage, and/or data usage, the system can modify the storage allocation to increase or decrease a size of the partition and/or the quantity of partitions. Network traffic for the storage allocation can be directed away from the portion of the storage allocation being modified. When modifying the storage allocation is complete, the network traffic can be directed to the modified portion of the storage allocation.
    Type: Grant
    Filed: November 28, 2016
    Date of Patent: May 14, 2019
    Assignee: Amazon TEchnologies, Inc.
    Inventors: Jonathan Michael Goldberg, Asif Mansoor Ali Makhani, Ekechi Karl Edozle Nwokah
  • Patent number: 10291681
    Abstract: A system and method for facilitating directory limit based storage scheme for uploading media segments in multiple directories at one or more media servers. Directory limit parametric information may be signaled in an MPD document for enabling a DASH client device to construct URLs based on the received directory parametric information via a modified/extended SegmentTemplate element of the MPD document.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: May 14, 2019
    Assignee: ERICSSON AB
    Inventors: Raj Nair, Prabhudev Navali
  • Patent number: 10261693
    Abstract: A storage system in one embodiment comprises a plurality of storage devices configured to store user data pages and metadata pages. Each of the user data pages has a logical address and a content-based signature derived from content of that data page, and each of the metadata pages characterizes a plurality of the user data pages and associates the content-based signatures of those user data pages with respective physical blocks in the storage devices. In conjunction with release of logical address space in the storage system, the released logical address space is made available to users in a first order based at least in part on released logical address, and multiple dereferencing operations are accumulated for respective ones of the physical blocks corresponding to the released logical address space. The accumulated dereferencing operations for the physical blocks are executed in a second order that differs from the first order.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: April 16, 2019
    Assignee: EMC IP Holding Company LLC
    Inventors: Zvi Schneider, Anton Kucherov, Uri Shabi
  • Patent number: 10261852
    Abstract: A technique includes accessing error information generated in response to memory errors of a memory device. The error information generated in response to the memory errors of the memory device may then be determined as indicative of a row hammer error for the memory device.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: April 16, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Melvin K. Benedict, Andrew C. Walton
  • Patent number: 10236617
    Abstract: An electrical connector includes a pair of housing units side by side arranged with each other and equipped with the corresponding contacts, respectively. A pair of protection caps are assembled to the corresponding housing units horizontally in opposite directions, respectively. A linking part is mounted upon the pair of caps with a rigid suction region thereof in a symmetrical manner. The linking part is downwardly mounted upon the pair of caps with corresponding standoffs to space the main part of the linking part from the caps in the vertical direction so as not to block the related heat dissipation.
    Type: Grant
    Filed: June 13, 2018
    Date of Patent: March 19, 2019
    Assignee: FOXCONN INTERCONNECT TECHNOLOGY LIMITED
    Inventors: Shuo-Hsiu Hsu, Chang-Long Zheng, Qi-Jin Yi, Fu-Jin Peng
  • Patent number: 10223061
    Abstract: An aspect includes a computer implemented method for display redistribution between a personal display and an external display. The method includes initiating, by a primary device, a wireless connection between a primary device and a secondary device. The primary device includes a primary display and the secondary device includes a secondary display. A confirmation is received at the primary device from the secondary device in response to the initiating. Based on receiving the confirmation, the wireless connection between the primary device and the secondary device is executed. The executing includes utilizing, by the primary device, the secondary display in place of the primary display.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: March 5, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Eli M. Dow, Thomas D. Fitzsimmons, Tynan J. Garrett, Emily M. Metruck, Charles J. Stocker, IV
  • Patent number: 10203924
    Abstract: A display apparatus, a controlling method thereof and a controlling method of a display system are provided. The controlling method of a first display apparatus includes receiving setting information from an external storage medium in response to the first display apparatus being connected to the storage medium; and in response to the first display apparatus being set as a master device according to the setting information, transmitting reproduction time information of image contents to a second display apparatus, synchronizing the second display apparatus with the first display apparatus with respect to the image contents, and reproducing the synchronized image contents.
    Type: Grant
    Filed: October 2, 2015
    Date of Patent: February 12, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin-hyuck Hong, Jae-hwang Lee, Pureunsol Ku
  • Patent number: 10162766
    Abstract: The multi-level storage system and method of deleting first level storage structure pages or records without record locks. The method includes determining whether a record to be deleted from the first level storage structure has any uncommitted write operation, and if the record has an uncommitted write operation, the record is kept in the first level storage structure. Record-moved version information is added to the record to designate the record being moved from the first level storage structure to the second level storage structure. Data change operations are executed for the record based on the record-moved version information without waiting until the record's movement from the first level storage structure to the second level storage structure finishes.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: December 25, 2018
    Assignee: SAP SE
    Inventors: Franz Faerber, Juchang Lee, Ivan Schreter
  • Patent number: 10152237
    Abstract: The present disclosure includes apparatuses and methods related to a non-deterministic memory protocol. An example apparatus can perform operations on the memory device based on commands received from a host according to a protocol, wherein the protocol includes non-deterministic timing of the operations. The memory device can be a non-volatile dual in-line memory module (NVDIMM) device.
    Type: Grant
    Filed: May 17, 2016
    Date of Patent: December 11, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Robert M. Walker, James A. Hall, Jr., Frank F. Ross
  • Patent number: 10127039
    Abstract: A processor saves micro-architectural contexts to increase the efficiency of code execution and power management. A save instruction is executed to store a micro-architectural state and an architectural state of a processor in a common buffer of a memory upon a context switch that suspends the execution of a process. The micro-architectural state contains performance data resulting from the execution of the process. A restore instruction is executed to retrieve the micro-architectural state and the architectural state from the common buffer upon a resumed execution of the process. Power management hardware then uses the micro-architectural state as an intermediate starting point for the resumed execution.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: November 13, 2018
    Assignee: Intel Corporation
    Inventors: Efraim Rotem, Eliezer Weissmann, Michael Mishaeli, Boris Ginzburg, Alon Naveh