Storage Accessing And Control Patents (Class 711/100)
  • Patent number: 12277321
    Abstract: The present disclosure provides a method for supporting an IOPS burst. The method includes: in response to an I/O read/write operation for each storage volume, recording a current I/O read/write time and an I/O quantity of the I/O read/write operation; calculating a time difference between the current I/O read/write time and a previous I/O read/write time, and updating a capacity of the storage volume primary bucket and a capacity of the storage volume burst rate bucket according to the time difference and a preset token inflow bucket rate; determining a state of I/O in the I/O read/write operation according to the I/O quantity and a size relationship among an updated capacity of the storage volume primary bucket, an updated capacity of the storage volume burst rate bucket and a capacity of the storage volume burst capacity bucket; and performing processing on the I/O according to the state of the I/O.
    Type: Grant
    Filed: May 25, 2023
    Date of Patent: April 15, 2025
    Assignee: SUZHOU METABRAIN INTELLIGENT TECHNOLOGY CO., LTD.
    Inventors: Donghe Chen, Peng Zhao, Ruipeng Feng
  • Patent number: 12236997
    Abstract: A semiconductor memory device includes a memory cell array including a plurality of memory cell rows, a row hammer management circuit and a control logic circuit. The row hammer management circuit stores counted values in count cells of each of the plurality of memory cell rows as count data based on an active command applied to the control logic circuit at a first time point, and performs an internal read-update-write operation to read the count data from the count cells of a target memory cell row from among the plurality of memory cell rows, to update the count data that was read to obtain updated count data, and to write the updated count data in the count cells of the target memory cell row in response to a precharge command applied at a second time point after a first command that is applied to the control logic circuit.
    Type: Grant
    Filed: July 24, 2023
    Date of Patent: February 25, 2025
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kiheung Kim, Taeyoung Oh, Jongcheol Kim, Kyungho Lee, Hyongryol Hwang
  • Patent number: 12206552
    Abstract: Various aspects of methods, systems, and use cases for multi-entity (e.g., multi-tenant) edge computing deployments are disclosed. Among other examples, various configurations and features enable the management of resources (e.g., controlling and orchestrating hardware, acceleration, network, processing resource usage), security (e.g., secure execution and communication, isolation, conflicts), and service management (e.g., orchestration, connectivity, workload coordination), in edge computing deployments, such as by a plurality of edge nodes of an edge computing environment configured for executing workloads from among multiple tenants.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: January 21, 2025
    Assignee: Intel Corporation
    Inventors: Francesc Guim Bernat, Kshitij Arun Doshi, Kapil Sood, Tarun Viswanathan
  • Patent number: 12189483
    Abstract: An information processing apparatus comprises a volatile memory and a non-volatile storage capable of storing a main firmware for causing the information processing apparatus to realize the predetermined function and a communication firmware for booting. The information processing apparatus accesses a predetermined server using the communication firmware, obtains recovery firmware, and loads the recovery firmware into a volatile memory. Further, the information processing apparatus obtains an updated main firmware from the predetermined server using the loaded recovery firmware, and updates the main firmware stored in the non-volatile storage.
    Type: Grant
    Filed: November 1, 2022
    Date of Patent: January 7, 2025
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Masumi Tabuki
  • Patent number: 12189992
    Abstract: Disclosed are a method and an apparatus for reading and writing data. The method includes: determining a target data block cluster space a target data block to be read and written belongs to; determining a target storage address corresponding to the target data block according to a starting address of the data block cluster space, a spatial size of the block nodes in the data block cluster space and a block index of the target data block; and performing reading operation or writing operation on the target data block according to the target storage address.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: January 7, 2025
    Assignees: JINGDONG TECHNOLOGY INFORMATION TECHNOLOGY CO., LTD., JINGDONG TECHNOLOGY HOLDING CO., LTD.
    Inventor: Zhentian Tang
  • Patent number: 12188200
    Abstract: An automatic control determination unit determines whether to start automatic dumping control. A dumping control unit generates a first command to rotate a bucket in a dump direction until an inclination of the bucket reaches a predetermined dumping completion angle upon determining to start the automatic dumping control. The dumping control unit generates a second command to rotate a boom in a raising direction during a period until the inclination of the bucket reaches the dumping completion angle from an inclination at the time of start of the automatic dumping control.
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: January 7, 2025
    Assignee: KOMATSU LTD.
    Inventors: Ryuta Okuwaki, Takeshi Oi, Kenji Okamura
  • Patent number: 12189492
    Abstract: A method includes monitoring a first input/output (I/O) load set of the block storage system within a first time period and a second I/O load set within a second time period, wherein the block storage system is configured to back up and restore data in a client and has preconfigured predetermined thresholds. The method further includes determining a change of an I/O load of the block storage system based on the first I/O load set and the second I/O load set. The method further includes determining, based on the change of the I/O load, that an I/O load within a third time period reaches a first predetermined threshold. The method further includes adjusting I/O performance of the block storage system based on the I/O load within the third time period in response to determining that the I/O load within the third time period reaches the first predetermined threshold.
    Type: Grant
    Filed: April 5, 2023
    Date of Patent: January 7, 2025
    Assignee: DELL PRODUCTS L.P.
    Inventors: Cheng Wang, Bing Liu
  • Patent number: 12189831
    Abstract: A secure cartridge-based storage system includes a set of read/write control electronics on a shared controller adapted to removably couple with each of a plurality of storage cartridges. Data blocks within primary non-volatile memory of the cartridge-based storage system collectively comprise a main store with information-theoretic security. The shared controller incorporates various controls for providing selective data access to individual data magazines and/or cartridges as well as for partitioning user data and writing the partitioned data according to an information-theoretic security scheme and reading the partitioned data and reconstructing the user data from the partitioned data.
    Type: Grant
    Filed: October 22, 2020
    Date of Patent: January 7, 2025
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Yasaman Keshtkarjahromi, Riyan Alex Mendonsa
  • Patent number: 12182047
    Abstract: A chip-to-chip interface of a multi-chip module (MCM), including: bidirectional data links for transmitting data signals and a direction indicator bit, wherein the direction indicator bit switches a direction of the bidirectional data links in real-time; a clock link for transmitting a clock signal common to the bidirectional data links, wherein the data and clock links are comprised of conductive traces between the chips and laid out to be of substantially equal length; and a clock driver means having a digitally programmable clock signal delay.
    Type: Grant
    Filed: December 26, 2020
    Date of Patent: December 31, 2024
    Assignee: Intel Corporation
    Inventors: Kameran Azadet, Wee Liew, Ramani Tatikola, Edwin Thaller, Patrick Torta, Yu-Shan Wang, Georg Weber, James Yoder
  • Patent number: 12175290
    Abstract: Disclosed are various embodiments for optimized memory tiering. An ideal tier size for a first memory and an ideal tier size for a second memory can be determined for a process. Then, a host computing device can be identified that can accommodate the ideal tier size for the first memory and the second memory. Subsequently, the process can be assigned to the host computing device.
    Type: Grant
    Filed: July 22, 2021
    Date of Patent: December 24, 2024
    Assignee: VMware LLC
    Inventors: Marcos Kawazoe Aguilera, Renu Raman, Pratap Subrahmanyam, Praveen Vegulla, Rajesh Venkatasubramanian
  • Patent number: 12159133
    Abstract: An information handling system includes a memory and a processor. The memory stores a current basic input/output system (BIOS) firmware image. During a regular boot mode of the information handling, the processor creates a first set of tables associated with the current BIOS firmware image, stores the first tables to the memory, and receives a BIOS firmware update image. During a BIOS update boot mode of the information handling system, the processor creates a second plurality of tables associated with the BIOS firmware update image, and compares the first and second tables. In response to a difference being determined between the first and second tables, the processor aborts the BIOS update boot mode and generate an error log.
    Type: Grant
    Filed: October 21, 2022
    Date of Patent: December 3, 2024
    Assignee: Dell Procucts L.P.
    Inventors: Shekar Babu Suryanarayana, Karunakar Poosapalli, Hung V. Ho, James L. Walker, Tsung-Lin Chuang, Chia-Hao Chang, Te-Lung Lin
  • Patent number: 12135690
    Abstract: A method for processing a system image, which represents an image of a file system. Each file in the file system is assigned an attribute, this attribute representing a last access time to this file, Initially the attributes of all files are set to a predefined value. The system image is executed, and then all attributes being checked. Finally the files are deleted whose attribute has the preset value.
    Type: Grant
    Filed: June 17, 2022
    Date of Patent: November 5, 2024
    Assignee: ROBERT BOSCH GMBH
    Inventor: Thomas Mittelstaedt
  • Patent number: 12118337
    Abstract: Deterministic memory allocation for real-time applications. In an embodiment, bitcode is scanned to detect calls by a memory allocation function to a dummy function. Each call uses parameters comprising an identifier of a memory pool and a size of a data type to be stored in the memory pool. For each detected call, an allocation record, comprising the parameters, is generated. Then, a header file is generated based on the allocation records. The header file may comprise a definition of bucket(s) and a definition of memory pools. Each definition of a memory pool may identify at least one bucket.
    Type: Grant
    Filed: July 7, 2023
    Date of Patent: October 15, 2024
    Assignee: APEX.AI, INC.
    Inventor: Misha Shalem
  • Patent number: 12117866
    Abstract: A system-on-chip (SoC) may comprise a semi-conductor substrate; a first circuitry, disposed on the semi-conductor substrate, provided for a first neural processing unit (NPU) configured to perform operations of an artificial neural network model (ANN); a second circuitry, disposed on the semi-conductor substrate, provided for a second NPU configured to perform operations of an ANN model, each of the first NPU and the second NPU including a plurality of processing elements (PEs), the plurality of PEs including an adder, a multiplier, and an accumulator; and a clock signal supply circuit, disposed on the semi-conductor substrate, configured to output one or more clock signals, wherein a first clock signal among the one or more clock signals may be supplied to the first NPU, and a second clock signal among the one or more clock signals may be supplied to the second NPU.
    Type: Grant
    Filed: September 25, 2023
    Date of Patent: October 15, 2024
    Assignee: DEEPX CO., LTD.
    Inventors: Lok Won Kim, Jin Gun Song, Seong Jin Lee
  • Patent number: 12112093
    Abstract: Certain exemplary embodiments relate to entertainment systems that interact with users so as to provide for social networking and/or other services. In certain exemplary embodiments, an entertainment system is configured to provide jukebox-related and entertainment system mediated services that are accessible from within and from the outside of the location, coordinating social networking services among and between patrons within and outside of the location and also providing for advertisement opportunities. In certain exemplary embodiments, the entertainment system within a location may serve as and/or be connected to a jukebox. The entertainment system within the location may be connected to one or more client devices, one or more displays, one or more bar-top or hand-held gaming devices, etc., in certain exemplary embodiments.
    Type: Grant
    Filed: December 5, 2022
    Date of Patent: October 8, 2024
    Assignee: TOUCHTUNES MUSIC COMPANY, LLC
    Inventors: Dominique Dion, Michael Tooker, Francois Guy, Francois Beaumier, Mounir Khenfir, Loic Gratton, Dominique Bureau, Harun Tunc Yayli
  • Patent number: 12105625
    Abstract: A programmable address generator has an iteration variable generator for generation of an ordered set of iteration variables, which are re-ordered by an iteration variable selection fabric, which delivers the re-ordered iteration variables to one or more address generators. A configurator receives an instruction containing fields which provide configuration constants to the address generator, iteration variable selection fabric, and address generators. After configuration, the address generators provide addresses coupled to a memory. In one example of the invention, the address generators generate an input address, a coefficient address, and an output address for performing convolutional neural network inferences.
    Type: Grant
    Filed: January 29, 2022
    Date of Patent: October 1, 2024
    Assignee: Ceremorphic, Inc.
    Inventors: Lizy Kurian John, Venkat Mattela, Heonchul Park
  • Patent number: 12093231
    Abstract: A database system is operable to execute a query transaction to generate addendum part data updating a segment A target storage node receives a plurality of sets of buffered rows and a plurality of flush requests. The target storage nodes each of a plurality of addendum parts in response to receiving a corresponding one of a plurality of flush requests. The target node assigns a plurality of version numbers to the plurality of addendum parts. A coordinator operator execution module commits only a final addendum part having a most recent version number as the addendum part data for the segment.
    Type: Grant
    Filed: August 28, 2023
    Date of Patent: September 17, 2024
    Assignee: Ocient Holdings LLC
    Inventors: George Kondiles, Andrew Michael Bass, Andrew Park, Finley Jordan Lau, Alyssa Catherine Wagenmaker, Pieter Charles Jas Svenson, Kevin Garner, Susmita Saha, Pavel Yusim
  • Patent number: 12086030
    Abstract: A system and method for offset protection data in a RAID array. A computer system comprises client computers and data storage arrays coupled to one another via a network. A data storage array utilizes solid-state drives and Flash memory cells for data storage. A storage controller within a data storage array is configured to store user data in a first page of a first storage device of the plurality of storage devices; generate intra-device protection data corresponding to the user data, and store the intra-device protection data at a first offset within the first page. The controller is further configured to generate inter-device protection data corresponding to the first page, and store the inter-device protection data at a second offset within a second page in a second storage device of the plurality of storage devices, wherein the first offset is different from the second offset.
    Type: Grant
    Filed: February 13, 2023
    Date of Patent: September 10, 2024
    Assignee: PURE STORAGE, INC.
    Inventors: John Colgrove, John Hayes, Bo Hong, Ethan Miller
  • Patent number: 12078328
    Abstract: A free-standing accessory stand that includes a ground support portion and an enclosure is provided. The enclosure is disposed about a central axis of the accessory stand. The upper surface faces away from the ground support. The accessory stand includes a retractable accessory support that has an outer surface projecting away from the enclosure in a first configuration. A mounting space is provided along the outer surface of the retractable accessory support above the upper surface of the enclosure. The outer surface is retracted in a second configuration.
    Type: Grant
    Filed: February 13, 2023
    Date of Patent: September 3, 2024
    Inventor: Zhun-An Ma
  • Patent number: 12079481
    Abstract: Described are systems and methods related to a memory block erase protocol. An example system includes a memory device having a memory array including a plurality of memory cells. The system further includes a processing device coupled to the memory device. The processing device is to determine a value of a metric associated with the memory array. Responsive to determine that the value of the metric is below a predetermined threshold, the processing device is further to initiate an erase protocol of the memory device. The processing device is further to erase sets of memory cells associated with one or more memory blocks of the memory array. The processing device is further to receive a programming command directed to the first set of memory cells. The processing device is further to perform a programming operation with respect to a set of memory cells responsive to receiving the programming command.
    Type: Grant
    Filed: August 29, 2022
    Date of Patent: September 3, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Chun Sum Yeung, Deping He, Ting Luo, Guang Hu, Jonathan S. Parry
  • Patent number: 12073104
    Abstract: There is provided a memory protection unit configured to maintain region metadata associated with storage regions of off-chip storage and protection metadata associated with each of the storage regions. The protection metadata is stored in the off-chip storage, and the region metadata encodes whether each of the storage regions belongs to a set of protected storage regions or to a set of unprotected storage regions and encodes information indicating corresponding protection metadata associated with each storage region. The memory protection unit is configured to update the region metadata in response to a region update request identifying a given storage region for which the region metadata is to be modified and to dynamically adjust an amount of memory required to store protection metadata associated with the set of protected storage regions in response to the update to the region metadata.
    Type: Grant
    Filed: April 13, 2023
    Date of Patent: August 27, 2024
    Assignee: Arm Limited
    Inventors: Roberto Avanzi, Andreas Lars Sandberg, David Helmut Schall
  • Patent number: 12072812
    Abstract: Disclosed embodiments include an electronic device having a processor core, a memory, a register, and a data load unit to receive a plurality of data elements stored in the memory in response to an instruction. All of the data elements hare the same data size, which is specified by one or more coding bits. The data load unit includes an address generator to generate addresses corresponding to locations in the memory at which the data elements are located, and a formatting unit to format the data elements. The register is configured to store the formatted data elements, and the processor core is configured to receive the formatted data elements from the register.
    Type: Grant
    Filed: April 22, 2021
    Date of Patent: August 27, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Timothy D. Anderson, Joseph Zbiciak, Duc Quang Bui, Abhijeet Chachad, Kai Chirca, Naveen Bhoria, Matthew D. Pierson, Daniel Wu, Ramakrishnan Venkatasubramanian
  • Patent number: 12074944
    Abstract: One embodiment includes a network apparatus at a store for allowing digital amenities to be accessed at the store by a mobile device of a user. The network apparatus includes a network interface, a storage module to keep digital amenities and a computing module. The network interface can be designed to couple to the mobile device at the store, and to a computing device outside the store. The network interface can be designed to recognize the mobile device at the store based on a piece of software related to the store in the mobile device. The computing module can be designed to help the mobile device to access a first digital amenity from the storage module in view of the piece of software. Based on the access, a second digital amenity from the computing device can be pre-stored at the storage module.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: August 27, 2024
    Assignee: IpLContent, LLC
    Inventors: Chi Fai Ho, Peter P. Tong
  • Patent number: 12066931
    Abstract: According to one embodiment, a memory system includes a nonvolatile memory including plural blocks each including plural pages, and a controller. When receiving a write request designating a first logical address and a first block number from the host, the controller determines a first location in a first block having the first block number to which data from the host should be written, and writes the data from the host to the first location in the first block. The controller notifies the host of either an in-block physical address indicative of the first location, or a group of the first logical address, the first block number and the first in-block physical address.
    Type: Grant
    Filed: June 28, 2023
    Date of Patent: August 20, 2024
    Assignee: Kioxia Corporation
    Inventors: Hideki Yoshida, Shinichi Kanno
  • Patent number: 12067356
    Abstract: Provided is a software process that can dynamically identify and display a plurality of category values of an electronic file based on a file name assigned to the electronic file. Thus, the software can automatically populate a user interface with details about content within the electronic file based on the file name. In one example, the method may include receiving an electronic computer file having a file name, identifying a subset of characters within the file name which correspond to a data category, mapping a value of the identified subset of characters to a category value in the data category, displaying an identifier of the electronic file on a user interface, and dynamically populating a predefined field within the user interface corresponding to the data category with the mapped category value.
    Type: Grant
    Filed: June 2, 2022
    Date of Patent: August 20, 2024
    Assignee: SAP SE
    Inventor: Patrick Simon
  • Patent number: 12056375
    Abstract: Apparatuses and methods related to port arbitration of a memory system are described. A memory system can receive a first number of transactions and a second transaction from a first traffic stream and a third number of transactions and a fourth transaction from a second traffic stream. The memory system can process the first number of transactions at least partially concurrently with the third number of transactions. Responsive to a total quantity of transactions of the first number of transactions and the second transaction being at least a threshold quantity of transactions, the second transaction can be processed by the memory system and, subsequent to processing the second transaction, the fourth transaction can be processed by the memory system.
    Type: Grant
    Filed: September 6, 2022
    Date of Patent: August 6, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Patrick A. La Fratta, Shashank Adavally, Jeffrey L. Scott, Robert M. Walker
  • Patent number: 12050903
    Abstract: An OTA master controls a software update for an electronic control unit mounted on a vehicle. The OTA master includes a processor configured to individually receive, from a center, a distribution package of update data for an electronic control unit on which a first-type non-volatile memory having one storage area is mounted and a distribution package of update data for an electronic control unit on which a second-type non-volatile memory having two storage areas is mounted, and transfer the update data to an electronic control unit to be updated with prioritizing the update data for the electronic control unit on which the second-type non-volatile memory is mounted over the update data for the electronic control unit on which the first-type non-volatile memory is mounted.
    Type: Grant
    Filed: June 2, 2022
    Date of Patent: July 30, 2024
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Tomoyasu Ishikawa, Shunsuke Tanimori
  • Patent number: 12050807
    Abstract: A method, computer program product, and computing system for defining a quantity of discrete storage portions within a storage system; entering an expansion mode during which the discrete storage portions are incrementally assigned to at least one processing node until a first assignment level target is achieved; once the first assignment level target is achieved, entering a utilization mode during which the utilization of the assigned discrete portions is increased until a first utilization level target is achieved; and once the first utilization level target is achieved, reentering the expansion mode during which additional discrete storage portions are incrementally assigned to the at least one processing node until a second assignment level target is achieved.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: July 30, 2024
    Assignee: EMC IP Holding Company, LLC
    Inventors: Bruce E. Caram, Vamsi K. Vankamamidi, Philippe Armangau, Ajay Karri
  • Patent number: 12050779
    Abstract: The present disclosure includes apparatuses, methods, and systems for storing non-volatile memory initialization failures. In an example, a method can include initializing a volatile memory die, initializing a first non-volatile memory die in response to initializing the volatile memory die, copying executable instructions from the first non-volatile memory die to the volatile memory die in response to initializing the first non-volatile memory die, initializing the second non-volatile memory die in response to initializing the first non-volatile memory die, and storing a failure record in the first non-volatile memory die in response to an error occurring during the initialization of the second non-volatile memory die.
    Type: Grant
    Filed: August 17, 2022
    Date of Patent: July 30, 2024
    Assignee: Micron Technology, Inc.
    Inventor: Qi Dong
  • Patent number: 12047263
    Abstract: A method for exchanging packets between two nodes of a packet-switched communication network. Each packet comprises a marking field and a reflected marking field. Each node sets the value of the marking field in its outgoing packets to be transmitted to the other node. This value is alternately switched between two alternative marking values every N outgoing packets. While incoming packets are received from the other node, each node also sets the value of the reflected marking field of its outgoing packets according to the value of the marking field of the incoming packets. An observer placed between the two nodes may count the packets whose marking field is equal to any of the marking values and/or the packets whose reflected marking field is equal to any of the marking values, and use N and such counts to provide a packet loss measurement.
    Type: Grant
    Filed: March 2, 2021
    Date of Patent: July 23, 2024
    Assignee: TELECOM ITALIA S.p.A.
    Inventor: Mauro Cociglio
  • Patent number: 12045147
    Abstract: Some users of a data management system (DMS) may use multiple computing environments to replicate and store virtual machines (VM)s, such as for backup and recovery purposes. For example, different replication environments may include one or more private data centers, one or more cloud environments or any combination thereof. A user may schedule a failover procedure for an application. A DMS may perform a failover procedure that reduces downtime and eliminates data loss. The DMS may capture and replicate a snapshot of a VM running on a source computing environment to a target computing environment, power down the VM on the source computing environment, capture and replicate a second snapshot of the VM to the target computing environment, and power on the VM at the target computing environment. As the additional snapshot includes a relatively small amount of data replication at the target computing environment may proceed quickly, reducing downtime.
    Type: Grant
    Filed: October 3, 2022
    Date of Patent: July 23, 2024
    Assignee: Rubrik, Inc.
    Inventors: Abhishek Kumar, Siyuan Sheng, Yiying Yu, Shaswat Chaubey
  • Patent number: 12039852
    Abstract: A pre-disaster banking system including a mobile conditions monitoring center including a vehicle having a system controller including: a device processor and a non-transitory computer readable medium including instructions to perform the following steps: receiving location data from a personal electronic device of a user; receiving forecast data regarding a predicted disaster; making a first determination, based on the received location data and the received forecast data, that the personal electronic device is located in an area that is expected to be affected by the predicted disaster; receiving banking information for the user; making a second determination that the user is scheduled to receive a payroll deposit that could be affected by the predicted disaster; and determining, based on the first determination and the second determination, a banking transaction to be executed for the user at a predetermined time relative to the predicted time of occurrence of the predicted disaster.
    Type: Grant
    Filed: July 31, 2023
    Date of Patent: July 16, 2024
    Assignee: United Services Automobile Association (USAA)
    Inventors: Meredith Beveridge, Michael J. Maciolek, Robert Wiseman Simpson, Daniel Christopher Bitsis, Jr., Bobby Lawrence Mohs, Manfred Amann, Emily Margaret Gray, Donnette Moncrief Brown
  • Patent number: 12026123
    Abstract: A system and method for data discovery. A method includes performing a scan of a plurality of snapshots, each snapshot corresponding to a respective disk of a plurality of disks; identifying a plurality of data store files in the plurality of disks based on file metadata found during the scan; and detecting at least one data store based on the identified plurality of data store files, wherein each of the at least one data store is in a disk of the plurality of disks including one of the plurality of data store files.
    Type: Grant
    Filed: January 13, 2022
    Date of Patent: July 2, 2024
    Assignee: Cyera, Ltd.
    Inventors: Yotam Segev, Itamar Bar-Ilan, Yonatan Itai, Shay Makayes, Shani Beracha, Omer Duchovne, Itay Fainshtein
  • Patent number: 12019566
    Abstract: Arbitrating atomic memory operations, including: receiving, by a media controller, a plurality of atomic memory operations; determining, by an atomics controller associated with the media controller, based on one or more arbitration rules, an ordering for issuing the plurality of atomic memory operations; and issuing the plurality of atomic memory operations to a memory module according to the ordering.
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: June 25, 2024
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: Sergey Blagodurov, Johnathan Alsop, Jagadish B. Kotra, Marko Scrbak, Ganesh Dasika
  • Patent number: 12013805
    Abstract: An apparatus includes a communication apparatus and a second controller. The communication apparatus includes a memory to store a program, a reception buffer to save reception data, a transfer destination buffer to receive transfer reception data and a first controller to erase the reception data when the reception data are transferred to the transfer destination buffer, and execute a hardware reset of erasing the program and executing an initialization process upon detecting abnormality. The second controller checks, after transmitting the data to the communication apparatus, whether the transmitted data are saved in the reception buffer after an elapse of a predetermined period of time shorter than a period of time till the hardware reset upon occurrence of abnormality in transferring the data. The second controller causes the communication apparatus to execute a software reset when at least some proportion of the transmitted data are saved in the reception buffer.
    Type: Grant
    Filed: December 14, 2022
    Date of Patent: June 18, 2024
    Assignee: DENSO TEN Limited
    Inventors: Kazuki Fujita, Katsutomo Sasakura
  • Patent number: 11995042
    Abstract: Upon completing replicating a file set from a source to destination, a snapshot taken of the file set is maintained at the source. The file set includes a namespace file having metadata and other files having content data. Verification is started on the file set replicated to the destination. While the verification is in-progress, a next replication cycle is started. Upon detecting corruption in the namespace file, the next replication cycle is paused and any changes to the file set are rolled back. The snapshot being maintained at the source is fetched. The namespace file having the corruption is replaced with the namespace file from the snapshot being maintained at the source. Other files in the file set having the content data are not replaced.
    Type: Grant
    Filed: January 11, 2023
    Date of Patent: May 28, 2024
    Assignee: Dell Products L.P.
    Inventors: Mukesh Kumar Sharma, Murthy V Mamidi
  • Patent number: 11989311
    Abstract: According to one embodiment, a magnetic disk device includes a disk, a head writing data to the disk and reading data from the disk, and a controller managing a key generation of a cryptographic key, based on generation confirmation information which is generated by the cryptographic key managed by an external device and transferred from the external device, and which is unable to generate the cryptographic key.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: May 21, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Hironori Nakanishi, Kana Furuhashi
  • Patent number: 11968267
    Abstract: A virtualization server may include a memory and a processor cooperating therewith to operate a virtual session controller configured to assign virtual sessions to a plurality of different client devices. Each virtual session may be running on a virtual machine from among a plurality of different virtual machines and having a respective user profile associated therewith stored at a cloud computing service, and the cloud computing service may be distributed over a plurality of different geographic locations and configured to store the user profiles and backups thereof at different geographic locations. The controller may further receive the user profiles from the cloud computing service and, as client devices are assigned virtual sessions on different virtual machines, roam the user profiles to the different virtual machines, and synchronize local profile changes during the virtual sessions on different virtual machines back to the user profiles stored at the cloud computing service.
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: April 23, 2024
    Assignee: Citrix Systems, Inc.
    Inventors: Leo C Singleton, IV, Avijit Gahtori
  • Patent number: 11966632
    Abstract: Methods, systems, and devices are described to indicate, in an entry of logical to physical (L2P) mapping information stored at a host system, whether data associated with the entry is sequential to other data associated with a next entry or a previous entry. Each entry may have a third field, which may indicate whether the data is sequential. Based on the third field, the host system may determine whether data to be read from a memory system is sequential. The host system may transmit one read command to the memory system if the data is sequential, where the read command may include at least a portion of an L2P entry associated with the data. Similarly, based on the third field, the memory system may determine whether the data to be read is sequential, and may read additional, sequential data if the memory system determines that the data is sequential.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: April 23, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Roberto Izzi, Nicola Colella, Luca Porzio, Marco Onorato
  • Patent number: 11967396
    Abstract: A multi-rank system includes multiple circuit ranks communicating over a common data line to multiple data receivers, each corresponding to one or more of the ranks and each having a corresponding reference voltage generator and clock timing adjustment circuit, such that a rank to communicate on the shared data line is switched without reconfiguring outputs of either the reference voltage generators or the clock timing adjustment circuits.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: April 23, 2024
    Assignee: NVIDIA CORP.
    Inventors: Wen-Hung Lo, Michael Ivan Halfen, Abhishek Dhir, Jaewon Lee
  • Patent number: 11960411
    Abstract: A memory system may include: a nonvolatile memory device; and a controller suitable for generating first map information which maps physical addresses of the nonvolatile memory device to logical addresses received from a host, selecting some segments of the first map information as second map information, and outputting the second map information to the host, the controller may determine whether the second map information is updated, and may determine updated map segments as third map information, and the controller may output information to the host indicating the third map information corresponding to a command received from the host.
    Type: Grant
    Filed: May 8, 2023
    Date of Patent: April 16, 2024
    Assignee: SK hynix Inc.
    Inventor: Eu-Joon Byun
  • Patent number: 11960744
    Abstract: A semiconductor device includes a memory partition. The semiconductor device further includes a plurality of registers. A first register of the plurality of registers, when in operation, controls an operation associated with the memory partition. The semiconductor device additionally includes a memory controller. When in operation, the memory controller accesses a first location of the memory partition concurrently with accessing the first register.
    Type: Grant
    Filed: February 1, 2021
    Date of Patent: April 16, 2024
    Assignee: Micron Technology, Inc.
    Inventor: Hari Giduturi
  • Patent number: 11960933
    Abstract: A method includes receiving, by a producer thread of a plurality of producer threads, an offer request associated with an item. The producer thread increases a sequence and determines (i) a chunk identifier of a memory chunk from a pool of memory chunks and (ii) a first slot position in the memory chunk to offer the item. The producer thread also writes the item into the memory chunk at the first slot position. Then, a first consumer thread of a plurality of consumer threads determines the first slot position of the item and consumes the item at the first slot position. A second consumer thread consumes another item at a second slot position in the memory chunk and recycles the memory chunk.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: April 16, 2024
    Assignee: RED HAT, INC.
    Inventor: Francesco Nigro
  • Patent number: 11960767
    Abstract: A method includes receiving, by a data storage device, a read command. The method further includes reading a first set of outer code stored to a magnetic recording medium of the data storage device and storing the first set of outer code to memory. The method further includes receiving a write command to write data to the magnetic recording medium and writing a second set of outer code to the magnetic recording medium in connection with the write command.
    Type: Grant
    Filed: March 8, 2022
    Date of Patent: April 16, 2024
    Assignee: Seagate Technology LLC
    Inventors: Ryan P. McCallister, Ara Patapoutian, Mark A. Gaertner, Ian Davies
  • Patent number: 11947688
    Abstract: A computer system with multiple security levels, the system comprising a high-power processing device (130), a low-power processing device (110), and an interface unit (120) comprising functions for moving classified information between the high-power device (130) and the low-power device (110) according to formal rules for confidentiality and/or integrity. Additional security aspects, e.g. availability, may readily be accommodated. A method for implementing multiple levels of security along a number of independent security axes on the system is also disclosed.
    Type: Grant
    Filed: March 7, 2023
    Date of Patent: April 2, 2024
    Assignee: CUPP Computing AS
    Inventor: Omar Nathaniel Ely
  • Patent number: 11948009
    Abstract: A method and a device for operating instance resources are provided. The method includes receiving an operation request, acquiring an instance resource associated with the target resource according to an instance arranging property, executing the operation on the instance resource associated with the target resource, and transmitting an operation response. The operation request includes a type of an operation and a target resource.
    Type: Grant
    Filed: September 22, 2017
    Date of Patent: April 2, 2024
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Junjie Zhao
  • Patent number: 11938897
    Abstract: An on-vehicle device is mounted on a vehicle, and includes: a processing unit; a determination unit configured to determine whether or not the vehicle is in a predetermined stop state; and a secure area that is accessible from the processing unit when the processing unit has output predetermined information. The secure area has, stored therein, control information that allows an external device to control the on-vehicle device. When the determination unit has made a positive determination, the processing unit accesses the secure area and performs an acquisition process of acquiring the control information from the secure area.
    Type: Grant
    Filed: June 12, 2018
    Date of Patent: March 26, 2024
    Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., AUTONETWORKS TECHNOLOGIES, LTD., SUMITOMO WIRING SYSTEMS, LTD.
    Inventors: Akihiro Ogawa, Hirofumi Urayama, Takeshi Hagihara, Yasuhiro Yabuuchi
  • Patent number: 11930112
    Abstract: Multi-path end-to-end encryption in a storage system, includes: receiving, by a storage system through a first path, a first write request for first data to be stored in a dataset, where the first data is encrypted with a first encryption key associated with requests received from the first path; decrypting the first data utilizing the first encryption key; encrypting the first data using a storage system encryption key; storing the first data in the dataset; receiving, by the storage system through a second path, a second write request for second data to be stored in the dataset, where the second data is encrypted with a second encryption key associated with requests received from the second path; decrypting the second data utilizing the second encryption key; encrypting the second data using the storage system encryption key; and storing the second data in the dataset.
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: March 12, 2024
    Assignee: PURE STORAGE, INC.
    Inventors: Ronald Karr, Constantine Sapuntzakis, John Colgrove
  • Patent number: 11922033
    Abstract: A method for distributed file deletion or truncation, performed by a storage system, is provided. The method includes determining, by an authority owning an inode of a file, which authorities own data portions to be deleted, responsive to a request for the file deletion or truncation. The method includes recording, by the authority owning the inode, the file deletion or truncation in a first memory, and deleting, in background by the authorities that own the data portions to be deleted, the data portions in one of a first memory or a second memory. A system and computer readable media are also provided.
    Type: Grant
    Filed: July 14, 2022
    Date of Patent: March 5, 2024
    Assignee: PURE STORAGE, INC.
    Inventors: Robert Lee, Igor Ostrovsky, Shuyi Shao, Peter Vajgel
  • Patent number: 11914881
    Abstract: A data migration method and an apparatus are provided. The method is as follows: sending, by a first storage system, a location update request to a location server, where the location update request is used to indicate the location server to update location information of a first bucket from being located in a second storage system to being located in the first storage system; migrating data in a first bucket from the second storage system; receiving a data access request, where the data access request is used to access the data in the first bucket; and determining based on a type of the data access request and a migration status of the data, that the first storage system or the second storage system processes the data access request.
    Type: Grant
    Filed: January 8, 2021
    Date of Patent: February 27, 2024
    Assignee: Huawei Cloud Computing Technologies Co., Ltd.
    Inventors: Feng Xu, Yu Zhang, Ling Lin, Chen Ling, Lei Huang