Abstract: The present disclosure provides a system and method for implementing extensible hardware configuration using memory. A memory containing an Info Block is provided. The Info Block contains a set of descriptors, which comprises an address part and a data part. The OTP Engine reads each valid descriptor stored in the Info Block, and writes the data in the data part into the memory location specified by the address part. The OTP Engine interacts with the Info Block by accessing the Info Block Controller registers via the central system bus.

Abstract: A system and method are disclosed for an event lock storage device. The storage device includes a user partition and an event partition (which may be associated with an event). The storage device receives data from a host device, and stores the data in the user partition. In response to receiving an indication of an event, the storage device may designate the data as part of the event partition. The event partition may include a set of access rules that is different from the user partition, such as more restrictive rules for modification or deletion of a file containing the data.

Abstract: The present disclosure discloses a method and network device for achieving enhanced performance with multiple CPU cores in a network device having a symmetric multiprocessing architecture. The disclosed method allows for storing, by each central processing unit (CPU) core, a non-atomic data structure, which is specific to each networking CPU core, in a memory shared by the plurality of CPU cores. Also, the memory is not associated with any locking mechanism. In response to a data packet is received by a particular CPU core, the disclosed system will update a value of the non-atomic data structure corresponding to the particular CPU core. The data structure may be a counter or a fragment table. Further, a dedicated CPU core is allocated to process only data packets received from other CPU cores, and is responsible for dynamically responding to queries receives from a control plane process.

Abstract: A portable media system with a host computer system and method of operation thereof includes: accessing a public partition of the portable media system for a virus blocker for activation on the host computer system, the portable media system having a private partition for storing a file; sending a command from the virus blocker on the host computer system to open the private partition in the portable media system when the virus blocker is downloaded on the host computer system; blocking transfer of a virus between the host computer system and the portable media system with the virus blocker executing on the host computer system; and sending a command from the virus blocker on the host computer system to close the private partition when the virus blocker terminates activity on the host computer system.

Abstract: In one embodiment, the present invention includes a method for receiving a lock message for an address in a processor from a quiesce master of a system. This lock message indicates that a requester agent of the system is to enter a locking phase with respect to the address. Responsive to receipt of this message, logic of the processor can write an entry in a tracking buffer of the processor for the address and thereafter allow a transaction to be sent from the processor via an interconnect if an address of the transaction does not match any address stored in the tracking buffer. Other embodiments are described and claimed.

Abstract: In one of the storage control apparatuses in the remote copy system which performs asynchronous remote copy between the storage control apparatuses, virtual logical volumes complying with Thin Provisioning are adopted as journal volumes to which journals are written. The controller in the one of the storage control apparatuses assigns a smaller actual area based on the storage apparatus than in case of assignment to the entire area of the journal volume, and adds a journal to the assigned actual area. If a new journal cannot be added, the controller performs wraparound, that is, overwrites the oldest journal in the assigned actual area by the new journal.

Abstract: A system includes a memory device including a real memory and a tracking mechanism configured to track relationships between multiple virtual memory addresses and real memory. The system further includes a processor configured to perform the below method and/or execute the below computer program product. One method includes mapping a first virtual memory address to a real memory in a memory device and mapping a second virtual memory address to the real memory. Here, the first virtual memory address is authorized to modify data in the real memory and the second virtual memory address is not authorized to modify the data in the real memory. One computer storage medium includes a computer program product for performing the above method.

Abstract: Management of storage used by pageable guests of a computing environment is facilitated. A query instruction is provided that details information regarding the storage location indicated in the query. It specifies whether the storage location, if protected, is protected by host-level protection or guest-level protection.

Abstract: A method for managing data in a memory of a computer. The method includes the steps of: prohibiting a specified memory area in a memory from being accessed temporarily or intermittently; and attaching, to first data, a first mark indicating that the first data has been read when a page fault has occurred as a result of an access by any process to read on the first data; where the first data is present in a specified memory area prohibited from being accessed; and where at least one of the steps is carried out using a computer device.

Abstract: A virtual capacity acquisition unit acquires a size of virtual capacity of a save data area from an application. A storage capacity acquisition unit acquires a size of save data of the application. A writing control unit prohibits the application from writing the save data exceeding the virtual capacity in a recording device. A free space acquisition unit acquires a size of free space of the recoding device, and the writing control unit prohibits the writing of save data whose size is larger than that of the free space.

Abstract: A multiple application smart card (102) uses hardware firewalls (130) and an internal communications scheme to isolate applications from different service providers. A first application (116) from a first service provider is stored within a first supplemental security domain (SSD) (126) of a memory device on the multiple application smart card (102). A second application (116) from a second service provider is stored within a second SSD (128) of the memory device. A hardware firewall (130) is located between the first and second applications (116) of the first and second SSDs (128). The hardware firewall (130) prevents direct data access between the first and second applications (116) of the first and second SSDs (128).

Abstract: A modular data and storage management system. The system includes a time variance interface that provides for storage into a storage media of data that is received over time. The time variance interface of the modular data and storage management system provides for retrieval, from the storage media, of an indication of the data corresponding to a user specified date. The retrieved indication of the data provides a user with an option to access specific information relative to the data, such as content of files that are included in the data.

Abstract: A microcomputer includes a CPU, a protection information storage configured to store memory protection information specifying an access permission or a prohibited state to a memory space by a program executed by the CPU, a memory access control apparatus configured to determine whether or not to allow a memory access request from the CPU according to the memory protection information, and a reset apparatus configured to invalidate the memory protection information stored in the protection information storage according to a reset request signal output from the CPU to a switching of programs executed by the CPU, the reset request signal being based on a state of execution of the program by the CPU. The reset apparatus sets all valid bit storing fields of a plurality of protection setting registers of the protection information storage to invalid state in response to the reset request signal output by the CPU.

Abstract: A first virtual memory address is mapped to a real memory in a memory device, and a second virtual memory address is mapped to the real memory. Here, the first virtual memory address is authorized to modify data in the real memory and the second virtual memory address is not authorized to modify the data in the real memory.

Abstract: Embodiments of a Content Addressable Memory (CAM) enabling high-speed search and invalidate operations and methods of operation thereof are disclosed. In one embodiment, the CAM includes a CAM cell array including a number of CAM cells and a valid bit cell configured to generate a match indicator, and blocking circuitry configured to block an output of the valid bit cell from altering the match indicator during an invalidate process of a search and invalidate operation. Preferably, the output of the valid bit cell is blocked from affecting the match indicator for the CAM cell array beginning at a start of the invalidate process and continuing until an end of the search and invalidate operation.

Abstract: A disclosed example apparatus includes an interface (702, 726) to receive a request to access a memory (602a) of a memory module (600) and a data store status monitor (730) to determine a status of the memory. The example apparatus also includes a message output subsystem (732) to, when the memory is busy, respond to the request with a negative acknowledgement indicating that the request to access the memory is not grantable.

Abstract: Systems and methods are described for validating storage media and/or media drives in a storage library using a hidden drive pool and a non-hidden media pool. For example, a storage library can be instructed to perform media/drive validation (MDV) on a selected pool of physical storage media using a selected pool of drive resources. Embodiments handle the pools so that, at least during performance of MDV, the drive resources in the drive pool are not visible to the host applications, but the storage media is still visible and can still be accessed by the host application. For example, the MDV can be performed in such a way that the host application cannot task a drive being used for validation, but the host application can perform operations on storage media in the media validation pool. Further, some embodiments operate in the context of storage library complex-wide validation pools.

Abstract: Durable atomic transactions for non-volatile media are described. A processor includes an interface to a non-volatile storage medium and a functional unit to perform instructions associated with an atomic transaction. The instructions are to update data at a set of addresses in the non-volatile storage medium atomically. The functional unit is operable to perform a first instruction to create the atomic transaction that declares a size of the data to be updated atomically. The functional unit is also operable to perform a second instruction to start execution of the atomic transaction. The functional unit is further operable to perform a third instruction to commit the atomic transaction to the set of addresses in the non-volatile storage medium, wherein the updated data is not visible to other functional units of the processing device until the atomic transaction is complete.

Abstract: An integrated circuit (122) includes an on-chip boot ROM (132) holding boot code, a non-volatile security identification element (140) having non-volatile information determining a less secure type or more secure type, and a processor (130). The processor (130) is coupled to the on-chip boot ROM (132) and to the non-volatile security identification element (140) to selectively execute boot code depending on the non-volatile information of the non-volatile security identification element (140). Other technology such as processors, methods of operation, processes of manufacture, wireless communications apparatus, and wireless handsets are also disclosed.

Abstract: A system and method for auditing memory cards. A memory card is received in a card reader in communication with a computing device. The memory card is scanned utilizing a computing device. A determination is made whether content in the memory card is acceptable or unacceptable. A first volume name of the memory card is rewritten to the second volume name in response to determining the content in the memory card is acceptable.

Abstract: A judgment apparatus includes a processor that executes a procedure, the procedure including obtaining a plurality of pieces of data having a certain relationship with a specific number or more of pieces of data included in a first data group, in the case that a piece of data included in a second data group different from the first data group does not have the certain relationship with the specific number or more of pieces of data included in the second data group, judging whether the piece of data has the certain relationship with the specific number or more of pieces of data included in the obtained plurality of pieces of data, and storing the piece of data in a storage device in the case that the piece of data is judged to have the given relationship with the specific number or more pieces of data.

Abstract: The embodiments described herein are directed to efficient logging and checkpointing of metadata managed by a volume layer of a storage input/output (I/O) stack executing on one or more nodes of a cluster. The metadata managed by the volume layer, i.e., the volume metadata, is illustratively organized as a multi-level dense tree metadata structure, wherein each level of the dense tree metadata structure (dense tree) includes volume metadata entries for storing the volume metadata. Each volume metadata entry may be a descriptor that embodies one of a plurality of types, including a data entry and an index entry, and a hole (i.e., absence of data) entry.

Abstract: A data access system includes a storage device, an instruction management device, and a host device. The host device is configured to transmit an access instruction associated with an access operation directed to an intended physical address of the storage device to the instruction management device, which compares the access instruction with a specified instruction list. When the instruction management device determines that the access instruction conforms with an instruction included in the specified instruction list, the instruction management device is configured to generate a modified access instruction associated with an access operation directed to a target physical address that is different from the intended physical address of the storage device.

Abstract: Secure memory repartitioning technologies are described. A processor includes a processor core and a memory controller coupled between the processor core and main memory. The main memory includes a memory range including a section of convertible pages are convertible to secure pages or non-secure pages. The processor core, in response to a page conversion instruction, is to determine from the instruction a convertible page in the memory range to be converted and convert the convertible page to be at least one of a secure page or a non-secure page. The memory range may also include a hardware reserved section are convertible in response to a section conversion instruction.

Abstract: A bus system includes a functional unit to which a unit identifier is assigned, a memory module for storage of data that has a storage region, and a bus. The functional unit is connected to the memory module via the bus. The storage region is configured such that one or more multiple global authorized identifiers are assigned thereto, so that the functional unit only has reading or writing access to the storage region if the unit identifier assigned to the functional unit corresponds to one of the global authorized identifiers assigned to the storage region.

Abstract: According to an embodiment, an information processing apparatus includes a secure OS, a non-secure OS, and a monitor. The monitor is configured to switch between the OSs. The secure OS includes a memory protection setting controller, a processing determination controller, and a secure device access controller. The memory protection setting controller is configured to set a protection address in a memory for each certain processing. The processing determination controller is configured to receive an access type, a physical address of an access destination, and data to be written, acquire a list of processing, and determine a type of processing to be performed. The secure device access controller is configured to receive the access type, the physical address of an access destination, and data to be written, and access a peripheral identified by the physical address.

Abstract: A technique for transferring data in a digital signal processing system is described. In one example, the digital signal processing system comprises a number of fixed function accelerators, each connected to a memory access controller and each configured to read data from a memory device, perform one or more operations on the data, and write data to the memory device. To avoid hardwiring the fixed function accelerators together, and to provide a configurable digital signal processing system, a multi-threaded processor controls the transfer of data between the fixed function accelerators and the memory. Each processor thread is allocated to a memory access channel, and the threads are configured to detect an occurrence of an event and, responsive to this, control the memory access controller to enable a selected fixed function accelerator to read data from or write data to the memory device via its memory access channel.

Abstract: A method for protecting page-level metadata in a storage system is provided. The method includes providing in a page table first protection data, receiving a command to read data from a page of the storage system corresponding to the page table, and comparing first protection data to second protection data. If the first protection data is different than the second protection data, then the method includes identifying third protection data in the storage system and comparing the third protection data to the first protection data. If the third protection data is different than the first protection data, then the method includes determining that the page-level metadata is inconsistent.

Abstract: A predetermined number of erasable blocks positioned at a start of a volume area in a semiconductor memory card are provided so as to include volume management information. A user area following the volume management information includes a plurality of clusters. A size of a partition control area from a master boot record & partition table sector to a partition boot sector is determined so that the plurality of clusters in the user area are not arranged so as to straddle erasable block boundaries. Since cluster boundaries and erasable block boundaries in the user area are aligned, there is no need to perform wasteful processing in which two erasable blocks are erased to rewrite one cluster.

Abstract: Managing access requests to a device is provided. The operations may include determining that a device stack corresponds to the device that is remote to the server and is connected locally to a client that is remote to the server, the device stack comprising one or more device objects; attaching a device access restriction object on top of the device stack; facilitating restriction of access to the one or more device objects from sessions different from a session associated with the device; receiving, at the device access restriction object, an access request to the device; and determining, at the device access restriction object, whether the access request is allowed access to the device. The access request may be allowed if a session from which the access request is received is a predetermined session.

Abstract: Provided is an intrusion detection system configured to detect anomalies indicative of a zero-day attack by statistically analyzing substantially all traffic on a network in real-time. The intrusion detection system, in some aspects, includes a network interface; one or more processors communicatively coupled to the network interface; system memory communicatively coupled to the processors. The system memory, in some aspects, stores instructions that when executed by the processors cause the processors to perform steps including: buffering network data from the network interface in the system memory; retrieving the network data buffered in the system memory; applying each of a plurality of statistical or machine-learning intrusion-detection models to the retrieved network data; aggregating intrusion-likelihood scores from each of the intrusion-detection models in an aggregate score, and upon the aggregate score exceeding a threshold, outputting an alert.

Abstract: A memory protection unit includes at least a first access control unit and a second access control unit programmed for controlling an access to a memory device. Further a method to operate a processing system comprising multiple processing devices and multiple memory protection units associated to the multiple processing devices. The access to the memory by a processing device is approved if first access control unit and second access control unit of the memory protection associated to the processing device approves the access and access is rejected if first access control unit or second access control unit rejects the access. The first access control unit is programmable by the associated processing device alone and the programming of the second access control unit is readable by an additional processing device which is to be used in a system with multiple programming devices, not the associate processing device.

Abstract: An apparatus and method for improving the efficiency with which speculative critical sections are executed within a transactional memory architecture. For example, a method in accordance with one embodiment comprises: waiting to execute a speculative critical section of program code until a lock is freed by a current transaction; responsively executing the speculative critical section to completion upon detecting that the lock has been freed, regardless of whether the lock is held by another transaction during the execution of the speculative critical section; once execution of the speculative critical section is complete, determining whether the lock is taken; and if the lock is not taken, then committing the speculative critical section and, if the lock is taken, then aborting the speculative critical section.

Abstract: A device of one embodiment includes a host device including a first memory unit and host controller, and memory device. The host controller controls input/output accesses to the first memory unit. The memory device includes a nonvolatile semiconductor memory, second memory unit, protection circuit, and device controller. The second memory unit temporarily stores data to be transferred between the first memory unit and the nonvolatile semiconductor memory. The protection circuit protects data to be transferred from the second memory unit to the first memory unit by converting the data into an incomprehensible format. The device controller switches according to a control program whether or not to protect the data by the protection circuit.

Abstract: Methods and apparatus to improve throughput and efficiency in memory devices are described. In one embodiment, a memory controller may include scheduler logic to issue read or write requests to a memory device in an optimal fashion, e.g., to maximize bandwidth and/or reduce latency. Other embodiments are also disclosed and claimed.

Abstract: A storage management method includes: determining whether receives a creation request for creating a group storage space from one user group, wherein the creation request comprises an identity of the user group and a request size of the group storage space. Assigning a group storage space with the request size to the user group and assigning a corresponding storage gateway address to the user group. Setting an administrator identity of the group storage space and permissions of an administrator with the administrator identity. In addition, creating or deleting sub-group storage spaces and personal storage spaces in the group storage space in response to operations of the administrator.

Abstract: A first processor and a second processor are configured to communicate secure inter-processor communications (IPCs) with each other. The first processor effects secure IPCs and non-secure IPCs using a first memory management unit (MMU) to route the secure and non-secure IPCs via a memory system. The first MMU accesses a first page table stored in the memory system to route the secure IPCs and accesses a second page table stored in the memory system to route the non-secure IPCs. The second processor effects at least secure IPCs using a second MMU to route the secure IPCs via the memory system. The second MMU accesses the second page table to route the secure IPCs.

Abstract: Provided are techniques for allocating logical memory corresponding to a logical partition in a computing system; generating a S/W PFT data structure corresponding to a first page of the logical memory, wherein the S/W PFT data structure comprises a field indicating that the corresponding first page of logical memory is a klock page; transmitting a request for a page of physical memory and the corresponding S/W PFT data structure to a hypervisor; allocating physical memory corresponding to the request; and, in response to a pageout request, paging out available logical memory corresponding to the logical partition that does not indicate that the corresponding page is a klock page prior to paging out the first page.

Abstract: A method for managing a storage device including identifying a lock timing for the storage device when coupling to a device, transitioning the storage device into a locked state in response to detecting the storage device decoupling from the device, and configuring the storage device to remain in the locked state if the storage device is re-coupled to the device after the lock timing has elapsed.

Abstract: A system for providing write-protection functionality to a memory device includes: a memory device including configurable registers controlling write and erase operations in the memory device; a system interface; a filter logic device in electrical communication with the memory device and further in communication with the system interface; and a power on reset circuit in communication with the system interface and the filter logic device, wherein the power on reset circuit asserts a reset signal to the system interface on startup of the system, further wherein, while the reset signal is asserted to the system interface, the filter logic device modifies the configurable registers to prevent all further write and erase operations to the memory device and then the power on reset circuit de-asserts the reset signal to the system interface enabling communication between the system interface and the memory device.

Abstract: In general, embodiments of the invention include methods and apparatuses for securely storing computer system data. Embodiments of the invention encrypt and decrypt SATA data transparently to software layers. That makes it unnecessary to make any software modifications to the file system, device drivers, operating system, or application. Encryption key management is performed either remotely on a centralized Remote Management System or locally. Embodiments of the invention implement background disk backups using snapshots. Additional security features that are included in embodiments of the invention include virus scanning, a virtual/network drive, a RAM drive and a port selector that provides prioritized and/or background access to SATA mass storage to a secure subsystem.

Abstract: Methods, systems, and machine readable medium for multi-thread safe system level modeling simulation (SLMS) of a target system on a host system. An example of a SLMS is a SYSTEMC simulation. During the SLMS, SLMS processes are executed in parallel via a plurality of threads. SLMS processes represent functional behaviors of components within the target system, such as functional behaviors of processor cores. Deferred execution may be used to defer execution of operations of SLMS processes that access a shared resource. Multi-thread safe direct memory interface (DMI) access may be used by a SLMS process to access a region of the memory in a multi-thread safe manner. Access to regions of the memory may also be guarded if they are at risk of being in a transient state when being accessed by more than one SLMS process.

Abstract: According to one embodiment, a semiconductor device includes a processor, and a memory device. The memory device has a nonvolatile semiconductor storage device and is configured to serve as a main memory for the processor. When the processor executes a plurality of programs, the processor manages pieces of information required to execute the programs as worksets for the respective programs, and creates tables, which hold relationships between pieces of information required for the respective worksets and addresses of the pieces of information in the memory device, for the respective worksets. The processor accesses to the memory device with reference to the corresponding tables for the respective worksets.

Abstract: A main data storage system has a main computer-implemented storage control and data storage, and a user interface, the main storage control in communication with a local computer-implemented storage control of a local data storage system with local data storage. In response to a request to increase data storage from the user interface, the main storage control determines whether the main data storage is out of space. If so, the main storage control sends a command to the local storage control to create data space in local data storage. The local storage control creates the data space and associates the data space with the main storage control; and, in response to the local storage control creating data space in the local data storage and notifying the main storage control, the main storage control updates its metadata with respect to the data space.

Abstract: A method and system for accessing enhanced functionality on a storage device is disclosed. A hijack command is sent to the storage device that includes an identifier (such as a signature or an address). The storage device determines whether to hijack one or more subsequently commands by analyzing the subsequently commands using the identifier. For example, the storage device may analyze the subsequently received commands to determine whether the signature is in the payload of the subsequently received commands. As another example, the storage device may compare the address in the subsequently received commands with the address in the hijack command to determine whether to hijack the subsequently received commands.

Abstract: A computer system image is executed on a computing node over a network. A system specification file transmitted over the network specifies the computer system image by specifying components of the computer system image. The components include an operating system and at least one resource. The system specification file also contains a signature associated with the resource. A resource is determined to be authorized to be incorporated into the computer system image by verifying the signature. A computer system image can then be formed based on the components specified by the system specification file and executed locally.

Abstract: A method is used in managing accesses to storage objects. Access I/Os being directed to at least one storage object are received into a first queue that operates on a first in first out basis. In accordance with the first in first out basis, a batch of the access I/Os is created from the first queue. The batch is transferred to a second queue that is controlled by ordering logic. The batch in the second queue is ordered in accordance with the ordering logic. All of the access I/Os from the second queue are processed in order, before any additional access I/Os are added to the second queue.

Abstract: A non-volatile memory device and a method for programming the same are disclosed. The non-volatile memory device includes first and second memory blocks, each of which includes a plurality of memory cells, each memory cell including a plurality of regions in which data is written, corresponding regions of the plurality of memory cells constituting a page; a data write unit, upon receiving a write signal and an address allocation signal, configured to write first data in a first page of the first memory block, and write second data in a first page of the second memory block; and a copy-back unit, upon receiving a chip idle signal and a copy-back control signal, configured to write the first data written in the first memory block into a second page of the second memory block.

Abstract: A managed memory in which multiple computing entities each have a corresponding entity-specific portion that is subject to garbage collection. An immutable buffer is located outside of managed memory. For a given computing entity, the corresponding managed memory portion contains entity-specific objects that can be accessed by a specific computing entity, but not by the other multiple computing entities. For one or more of the entity-specific managed memory portions, the portion also includes a reference to shared memory, such as an immutable buffer. The reference is structured to be ignored by the garbage collector, though the reference may appear just as a normal object in the managed memory portion. Thus, a unified memory access model is made possible in which the methods for a computing entity to access a regular object in managed memory is similar to how the computing entity accesses shared memory.

Abstract: In this wireless communication device, a storage unit stores writing identification information relating to permission and prohibition of writing. An acquisition unit acquires device identification information that uniquely specifies an arbitrary wireless communication device from the arbitrary wireless communication device. A determination unit determines permission or prohibition of writing to a recording medium on the basis of the device identification information acquired by the acquisition unit and the writing identification information stored in the storage unit when a communication protocol of a session layer that performs writing to and readout from the recording medium in sector units is selected. A recording medium control unit controls permission and prohibition of writing to the recording medium on the basis of a result determined by the determination unit.