Resetting Patents (Class 711/166)
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Patent number: 8037280Abstract: A system and related method of operation for migrating the memory of a virtual machine from one NUMA node to another. Once the VM is migrated to a new node, migration of memory pages is performed while giving priority to the most utilized pages, so that access to these pages becomes local as soon as possible. Various heuristics are described to enable different implementations for different situations or scenarios.Type: GrantFiled: June 11, 2008Date of Patent: October 11, 2011Assignee: VMware, Inc.Inventors: Vivek Pandey, Ole Agesen, Alex Garthwaite, Carl Waldspurger, Rajesh Venkatasubramanian
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Publication number: 20110239070Abstract: A method of testing a processing includes performing a test of at least one logic block of a processor of a data processing system; receiving an interrupt; stopping the performing the test for the processor to respond to the interrupt, wherein the stopping the performing the test includes storing test data of the test to a memory prior to the processor responding to the interrupt; and after the processor responds to the interrupt, resuming performing the test, wherein the resuming performing the test includes retrieving the test data from the memory and using the retrieved test data for the resuming performing the test.Type: ApplicationFiled: March 26, 2010Publication date: September 29, 2011Inventor: Gary R. Morrison
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Publication number: 20110231714Abstract: According to one embodiment, a contents data recording apparatus includes a storage module and a data delete module. The storage module stores encoded first-system and second-system contents data. The data delete module deletes either the first-system contents data or second-system contents data from the storage module based on a predetermined condition after the first-system and second-system contents data has been stored in the storage module.Type: ApplicationFiled: February 2, 2011Publication date: September 22, 2011Inventor: Shingo IIDA
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Publication number: 20110225384Abstract: Methods and apparatus may operate to receive allocation requests from a processor configured to manage memory comprising a non-volatile memory device configurable as a plurality of blocks comprising a plurality of sectors, assign partial page blocks from the plurality of blocks for memory storage, fill some of the sectors by storing data bits associated with the allocation request in the at least one of the plurality of sectors, determine that the sectors are full, assigning a full page block from the plurality of blocks, and transfer the data bits associated with the allocation request from the partial page blocks to the full page block. Other apparatus, systems, and methods are disclosed.Type: ApplicationFiled: May 26, 2011Publication date: September 15, 2011Inventors: Viet Ly, Michael Murray
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Publication number: 20110225361Abstract: A dispersed storage device manages deletion of data objects stored within a dispersed storage network by receiving a data delete request to delete a data object stored throughout a set of dispersed storage units within a dispersed network memory of the dispersed storage network, determining a deletion policy for the data object and selectively generating and transmitting, based on the deletion policy, a delete command to the set of dispersed storage units.Type: ApplicationFiled: May 13, 2010Publication date: September 15, 2011Applicant: CLEVERSAFE, INC.Inventors: JASON K. RESCH, S. CHRISTOPHER GLADWIN, ANDREW BAPTIST
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Patent number: 8018617Abstract: A method is presented of erasing, in a document data processing device, a stored information pattern on a rewritable data carrier that is accessible by a data processing facility of the document data processing device. The document data processing device includes primary processes for processing document data, wherein data may be stored on the data carrier, and secondary processes for erasing stored data, through overwriting a selected storage area of the carrier by a shredding pattern. According to the method, the primary and secondary processes are run asynchronously, e.g., the secondary processes are run in background, in order not to hinder the primary processes. In a particular embodiment, an initial shredding run is made directly after a file is no longer used, and additional shredding runs are made in background.Type: GrantFiled: December 20, 2004Date of Patent: September 13, 2011Assignee: OCE-Technologies B.V.Inventors: Johannes Kortenoeven, Jeroen J. Döpp, Jantinus Woering, Johannes E. Spijkerbosch, Bas H. Peeters
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Patent number: 8001319Abstract: A semiconductor storage apparatus is coupled with a system bus to receive a write request accompanied with first and second blocks of data, which are stored in nonvolatile semiconductor memories. A control device sends a first erase command to one of the nonvolatile memories to initiate a first internal erase operation of data within the nonvolatile memories. After the first erase command has been sent, the control device sends a second erase command to another one of the nonvolatile memories, to initiate a second internal erase operation of data within the other nonvolatile memory.Type: GrantFiled: May 15, 2009Date of Patent: August 16, 2011Assignee: Solid State Storage Solutions, Inc.Inventors: Kenichi Kaki, Kunihiro Katayama, Takashi Tsunehiro
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Publication number: 20110197045Abstract: According to the embodiments, a memory system includes a nonvolatile semiconductor memory and a writing-loop-count monitoring unit that monitors a loop count of an applied voltage to the nonvolatile semiconductor memory required for data writing of the nonvolatile semiconductor memory as a writing loop count. Moreover, the memory system includes a management table for managing the writing loop count in block unit that is a unit of data erasing and a life managing unit that determines a degraded state of the nonvolatile semiconductor memory based on the management table.Type: ApplicationFiled: September 20, 2010Publication date: August 11, 2011Applicant: Kabushiki Kaisha ToshibaInventor: Shinken OKAMOTO
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Publication number: 20110191563Abstract: A method for concurrently converting a standard volume to a thin-provisioned volume includes initially establishing metadata for a thin-provisioned volume. The method then updates the metadata for the thin-provisioned volume to point to extents residing in a standard volume. The method then suspends I/O to metadata for the standard volume. Upon suspending the I/O, the method migrates control of the extents in the standard volume from a standard-volume control algorithm to a thin-provisioned-volume control algorithm. The method then resumes the I/O to the metadata for the thin-provisioned volume. Using this technique, standard volumes may be rapidly converted to thin-provisioned volumes while minimally disrupting I/O to the volumes. A corresponding apparatus and computer program product are also disclosed and claimed herein.Type: ApplicationFiled: February 2, 2010Publication date: August 4, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Mario F. Acedo, Paul A. Jennas, Jason L. Peipelman, Richard A. Ripberger, Matthew J. Ward
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Publication number: 20110185144Abstract: A method for queuing update buffers to enhance garbage collection. The method includes running an application thread and providing, for the application thread, a data structure including current and finished update buffer slots. The method includes providing an update buffer for the application thread and storing a pointer to the update buffer in the current update buffer slot. The method includes storing null in the finished update buffer slot and, with the application thread, writing to the update buffer. The thread may write a pointer to the filled update buffer in the finished update buffer slot after the buffer is filled. The method includes using a garbage collector thread to inspect the finished update buffer slot and claim filled buffers and change the pointer to null. The thread then obtains an empty update buffer and updates the current update buffer slot to point to the new buffer.Type: ApplicationFiled: January 26, 2010Publication date: July 28, 2011Applicant: SUN MICROSYSTEMS, INC.Inventors: Antonios Printezis, Paul H. Hohensee
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Publication number: 20110185404Abstract: A method, system, and computer program product for staged user identifier deletion are provided. The method includes checking a status of a user identifier in response to a triggering event. In response to determining that the status of the user identifier indicates a marked for deletion status, a notification action is performed. The method also includes monitoring a time value to determine whether a time for deletion associated with the user identifier with the marked for deletion status has been reached, and automatically deleting the user identifier with the marked for deletion status in response to determining that the time for deletion has been reached.Type: ApplicationFiled: January 27, 2010Publication date: July 28, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Casimer M. DeCusatis, Rajaram B. Krishnamurthy, Brian J. Neugebauer, Michael Onghena, Anuradha Rao, Naseer S. Siddique
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Publication number: 20110185143Abstract: A memory reset system including a first memory socket and a second memory socket. A reset signal generator can generate a reset signal to the first memory socket. A dampener circuit can receive the reset signal from the reset signal generator and transmit a dampened reset signal to the second memory socket.Type: ApplicationFiled: January 25, 2010Publication date: July 28, 2011Inventor: Robert C. Brooks
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Patent number: 7987331Abstract: A reset generator for resetting at least one register in a register bank. The register generator comprises a scan mode input terminal configured to input a scan mode signal, a system reset input terminal configured to input a system reset signal, a secure reset output terminal configured to output a secure reset signal and a combination logic unit configured to combine the scan mode signal and the system reset signal. The combination is such that when the scan mode of the at least one register is activated, the secure reset signal is immediately activated for resetting the at least one register. The activation of the secure reset signal is independent of the system reset signal. The secure reset signal is deactivated when the system reset signal is deactivated and the secure reset signal follows the activation/deactivation cycles of the system reset signal after deactivation.Type: GrantFiled: November 15, 2007Date of Patent: July 26, 2011Assignee: Infineon Technologies AGInventor: Simone Borri
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Patent number: 7987329Abstract: A storage system is utilized to its fullest storage capacity by setting a write inhibitive attribute to a desired storage area of the storage system. The storage system has a logical volume in which data is stored and a control device which controls access to the data stored in the logical volume. A first area of a desired size is set in the logical volume, and an access control attribute is set to the first area. In response to a request made by a computer to perform access to the logical volume, the control device notifies the computer that the control device does not perform the access when an area designated by the access request contains at least a part of the first area and the access control attribute set to the first area inhibits the type of the access requested.Type: GrantFiled: December 2, 2008Date of Patent: July 26, 2011Assignee: Hitachi, Ltd.Inventors: Shunji Kawamura, Hisao Homma, Yasuyuki Nagasoe
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Publication number: 20110179244Abstract: A storage apparatus is disclosed which includes: a memory configured to have a plurality of pages to which data can be written in units of a page, the memory being further configured to have a plurality of pages of write data stored into each page in multi-valued form; and a control section configured to select pages to which to write the data from among the plurality of pages of the memory, the control section being further configured to write to the selected pages of the memory the data of at least two bits in multi-valued form for a plurality of pages including the selected pages; wherein, when writing the plurality of pages of the write data, the control section puts the write data into multi-valued form per page before writing the data to a plurality of different unused pages of the memory on a page-by-page basis.Type: ApplicationFiled: January 12, 2011Publication date: July 21, 2011Applicant: SONY CORPORATIONInventors: Toshifumi Nishiura, Nobuhiro Kaneko, Hideaki Okubo
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Publication number: 20110179314Abstract: Method and system of error logging. At least some of the illustrative embodiments are methods including detecting assertion of an error pin by a processor system, (comprising at least a main processor and a chipset, the assertion of the error pin an indication to reboot the processor system) the detecting by a reset circuit, notifying a management processor (distinct from the main processor) that the error pin is asserted (the notifying by the reset circuit), writing to a plurality of registers in the chipset (the writing by the management processor), de-asserting a reset pin of the main processor, and then executing by the main processor an error-handling code to generate an error log.Type: ApplicationFiled: January 21, 2010Publication date: July 21, 2011Inventors: Nehal K. PATEL, Andrew C. Walton, Kenneth C. Duisenberg
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Patent number: 7979593Abstract: A library is reset as needed in a manner non-disruptive to a host system providing a host command to a drive interfacing with the host system on behalf of the library during a reset of the library. To this end, the drive confirms a receipt of a host command to the host system on behalf of the library in response to the drive receiving the host command from the host system, and the library commands the drive to transmit the host command to the library subsequent to a reset of the library based on the drive receiving the host command from the host system during the reset of the library.Type: GrantFiled: June 8, 2005Date of Patent: July 12, 2011Assignee: International Business Machines CorporationInventors: Brian G. Goodman, Leonard G. Jesionowski
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Patent number: 7975119Abstract: A storage device having prioritized-erasure capabilities including: a memory for storing data, the memory having at least one flash unit, wherein each flash unit has a plurality of blocks; and a controller configured: to write the data into the plurality of blocks; to assign an erasure-priority to each block, wherein the erasure-priority correlates with an erasure-priority of the data; and to erase the data in each block according to the erasure-priority of each block upon receiving an emergency-erase command. Preferably, the controller is configured to perform the writing of the data into the plurality of blocks in an arbitrary order in a first flash unit, and the writing into subsequent flash units is performed in correlation with the order in the first flash unit. Preferably, the erasing includes aborting erasure, before completing the erasure, for at least some of the plurality of blocks.Type: GrantFiled: May 3, 2007Date of Patent: July 5, 2011Assignee: SanDisk IL LtdInventor: Eran Erez
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Publication number: 20110161614Abstract: A computer-implemented method of detecting memory that may be reclaimed from application data objects that are no longer in use. When at least a first virtual memory region is newly committed for heap block storage, a pre-leak detection scan of other virtual memory regions can be performed to identify at least one non-pointer data item in the other virtual memory regions, the non-pointer data item comprising data that corresponds to an address of a memory location within the first virtual memory region, but that is not a memory pointer. A leak detection scan can be performed to identify potential memory pointers, wherein the identified non-pointer data item is excluded from the identified potential memory pointers. A list of leaked heap blocks can be output. Each leaked heap block can exclusively comprise memory locations that do not have a corresponding potential memory pointer.Type: ApplicationFiled: December 30, 2009Publication date: June 30, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Kirk J. Krauss
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Publication number: 20110161615Abstract: One or more embodiments provide a technique of improving the conventional thread-local garbage collection (GC) so as to avoid fragmentation. A memory management device having a plurality of processors implementing transactional memory includes a write barrier processing unit which, when performing write barrier in response to initiation of a pointer write operation, registers an object that is located outside of a local area and that has a pointer pointing to an object located in the local area in a write log so as to set it as a target of conflict detection, and a garbage collector which, provided that no conflict is detected, copies a live shared object in the local area to the outside of the local area and collects any unwanted object irrespective of whether it is shared or not.Type: ApplicationFiled: December 22, 2010Publication date: June 30, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Rei Odaira
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Patent number: 7970804Abstract: A journaling file allocation table (FAT) file system includes an FAT file system module, a storage device and a driver. The FAT file system module includes a journaling module and receives a file operation instruction sent by an operating system. The storage device has an FAT file system and an FAT journaling cache. The driver is coupled to the FAT file system module, the journaling module and the storage device in order to access the storage device. When the FAT file system stored in the storage device is a journaling FAT file system, the FAT file system module enables the journaling module to receive and execute the file operation instruction sent by the operating system and to accordingly produce a corresponding file operation instruction to the driver for performing a journaling file operation on the storage device.Type: GrantFiled: August 21, 2008Date of Patent: June 28, 2011Assignee: Sunplus MMobile Inc.Inventors: Chih-Chuan Tang, Hung-Lin Chou
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Publication number: 20110153690Abstract: A memory allocation message for each primary memory allocation in a primary memory made by a primary processor is received at a hardware memory management module. A representation of each primary memory allocation is allocated within a second memory in response to each memory allocation message. A determination is made, based upon the allocated representations of each primary memory allocation within the second memory, to free a primary memory allocation in the primary memory. A memory free message is sent to the primary processor instructing the primary processor to free the primary memory allocation in the primary memory.Type: ApplicationFiled: December 23, 2009Publication date: June 23, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Joseph H. Allen, Moshe M. E. Matsa, David Z. Maze, Jeffrey M. Peters
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Publication number: 20110153691Abstract: A memory allocation message for each primary memory allocation in a primary memory made by a primary processor is received at a hardware memory management module, including an indication of whether a finalizer routine is associated with each primary memory allocation. A representation of each primary memory allocation is allocated within a second memory in response to each memory allocation message, including the indication of whether there is the associated finalizer routine. A determination is made, based upon the allocated representations of each primary memory allocation within the second memory, to free a primary memory allocation in the primary memory. A call object finalizer message is sent to the primary processor instructing the primary processor to call the finalizer routine associated with the primary memory allocation in the primary memory in response to determining that the primary memory allocation has the associated finalizer routine.Type: ApplicationFiled: December 23, 2009Publication date: June 23, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Joseph H. Allen, Moshe M. E. Matsa
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Publication number: 20110138144Abstract: A computer in a disk node executes a data management program. A deduplication-eligible data unit detection module detects a data unit whose deduplication grace period after last write time has expired. A deduplication address fetch module interacts with an index server to obtain a deduplication address associated with a unique value of data stored in a constituent storage space allocated to the data unit that is found to be deduplication-eligible. A constituent storage space deallocation module stores the obtained deduplication address in a data unit record memory, together with information indicating the detected data unit. Simultaneously a constituent storage space deallocation module releases the allocated constituent storage space from the detected data unit.Type: ApplicationFiled: December 3, 2010Publication date: June 9, 2011Applicant: FUJITSU LIMITEDInventors: Masahisa TAMURA, Yasuo Noguchi, Kazutaka Ogihara, Tetsutaro Maruyama, Yoshihiro Tsuchiya, Takashi Watanabe, Tatsuo Kumano, Kazuichi Oe
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Publication number: 20110138105Abstract: Enhanced write performance for non-volatile memories including a memory system that includes a receiver for receiving a data rate of a data sequence to be written to a non-volatile flash memory device. The memory system also includes a physical page selector for selecting a physical address of an invalid previously written memory page from a group of physical addresses of invalid previously written memory pages located on the non-volatile memory device, and for determining if the number of free bits in the invalid previously written memory page at the selected physical address is greater than or equal to the data rate. The memory system also includes a transmitter for outputting the selected physical address of the invalid previously written memory page, the outputting in response to the physical page selector determining that the number of free bits is greater than or equal to the data rate.Type: ApplicationFiled: December 4, 2009Publication date: June 9, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michele M. Franceschini, Ashish Jagmohan, Luis A. Lastras-Montano, Mayank Sharma
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Patent number: 7949865Abstract: A method for mounting volumes to a storage server in a storage system, including, speeding up initialization of the storage server by staging volume mounting in two or more stages. The method further includes mounting at least one of the volumes when a request for accessing the volume is received.Type: GrantFiled: September 19, 2007Date of Patent: May 24, 2011Assignee: Network Appliance, Inc.Inventor: Sandeep Yadav
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Publication number: 20110119461Abstract: A method, in one embodiment, can include allowing storage allocation of data of a file system within an object based storage system. Furthermore, the method can include determining if storage allocation usage for the file system is below a threshold. If the storage allocation usage for the file system is not below the threshold, a client is requested to flush its dirty data associated with the file system. After requesting a client flush, the method can include determining the storage allocation usage for the file system. In addition, the method can include determining periodically if the storage allocation usage has reached a quota. If the quota is reached, the quota is enforced for the data of the file system.Type: ApplicationFiled: November 16, 2009Publication date: May 19, 2011Applicant: SYMANTEC CORPORATIONInventors: Samir Desai, Shriram Wankhade
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Publication number: 20110119462Abstract: A method of maintaining a solid-state drive so that free space within memory blocks of the drive becomes free usable space to the drive. The drive comprises cells organized in pages that are organized in memory blocks in which at least user files are stored. A defragmentation utility is executed to cause at least some of the memory blocks that are partially filled with data and contain file fragments to be combined or aligned and to cause at least some of the memory blocks that contain only invalid data to be combined or aligned. A block consolidation utility is then executed to eliminate at least some of the partially-filled blocks by consolidating the file fragments into a fewer number of the memory blocks. The consolidation utility also increases the number of memory blocks that contain only invalid memory. All of the memory blocks containing only invalid data are then erased.Type: ApplicationFiled: November 12, 2010Publication date: May 19, 2011Applicant: OCZ Technology Group, Inc.Inventors: Anthony Leach, Franz Michael Schuette
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Publication number: 20110113212Abstract: A system for accessing a memory card is provided. The system includes a control unit having a control pin and a processor. The processor senses a card-insertion signal from a socket via the control pin for indicating whether the memory card has been inserted into the socket. The processor provides a power control signal via the control pin to supply an operating voltage to the memory card when the sensed card-insertion signal indicates that the memory card has been inserted into the socket. The processor detects whether a write protection function of the memory card is present via the control pin.Type: ApplicationFiled: January 17, 2011Publication date: May 12, 2011Applicant: MEDIATEK INC.Inventors: Ming-Hsun Chi, Cheng Liang Chang
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Publication number: 20110113182Abstract: Devices, systems, and methods are disclosed which relate to devices utilizing time-sensitive memory storage. The time-sensitive memory storage acts as normal device memory, allowing the user of the device to store files or other data to it; however the information stored on the time-sensitive memory storage is automatically erased, based on some storage time period. A limited amount of persistent storage is used for names and message headers.Type: ApplicationFiled: November 6, 2009Publication date: May 12, 2011Applicant: AT&T INTELLECTUAL PROPERTY I, L.P.Inventor: Gustavo De Los Reyes
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Publication number: 20110107044Abstract: A source system comprises memory and a processor executing code to cause at least some of the memory to be migrated over a network to a target system. The processor causes the memory to be migrated by migrating some of the memory while a guest continues to write the memory, halts execution of the guest, and completes a remainder of the memory migration.Type: ApplicationFiled: October 30, 2009Publication date: May 5, 2011Inventors: Paul J. YOUNG, Raun Boardman, Karen L. Noel
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Publication number: 20110107144Abstract: A storage controller changes a block size to carry out a shredding process. A data shredder uses a large block size BSZ1 set by a block size setting part to write shredding data in a storage area of a disk drive and erase data stored therein. An error arising during the writing operation of the shredding data is detected by an error detecting part. When the error is detected, the block size setting part sets the block size smaller by one stage than the initial block size to the data shredder. Every time the error arises, the block size used in the shredding process is diminished. Thus, the number of times of writings of the shredding data is reduced as much as possible to improve a processing speed and erase the data of a wide range as much as possible.Type: ApplicationFiled: January 10, 2011Publication date: May 5, 2011Inventor: Mao OHARA
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Patent number: 7937547Abstract: High performance, enterprise-level data protection system and method provides efficient block-level incremental snapshots of primary storage devices, and instant availability of such snapshots in immediately mountable form that can be directly used in place of the primary storage device. Related systems and applications are described, including an “Enterprise Image Destination” (EID) for backup images; a mirroring technique whereby a replacement physical primary facility may be created while working with a second storage unit as the primary source file system; and a technique for eliminating redundant data in backup images when multiple systems with partially common contents (e.g., operating system files, common databases, application executables, etc.) are being backed up. A number of examples showing “Fast Application Restore” (FAR) with the use of the invention are also provided.Type: GrantFiled: June 23, 2006Date of Patent: May 3, 2011Assignee: Syncsort IncorporatedInventors: Peter Chi-Hsiung Liu, Soubir Acharya
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Publication number: 20110093677Abstract: A Write-Once Read-Many (WORM) memory controller receives data from a processing system that is addressed to a location in a storage device, stores the data and a tag at the location, receives second data from the processing system that is addressed to the location, determines that the location includes the tag, and prevents the second data from being stored at the location based upon the presence of the tag. A WORM memory device sends a reply to a controller in response to an initialization command. The reply includes an address number that corresponds with the storage capacity of the WORM memory device. The WORM memory device sends another reply to another controller in response to another initialization command. The initialization commands are different from each other. The other initialization reply includes an address number of zero.Type: ApplicationFiled: October 20, 2009Publication date: April 21, 2011Applicant: DELL PRODUCTS, LPInventors: Jacob Cherian, Farzad Khosrowpour, Marco A. Peereboom
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Publication number: 20110093678Abstract: A control unit (main CPU 10 of a head unit 1) of an onboard system decides as to whether an issuing condition of an initialization command set and stored in a storage unit is satisfied at an initial start after the assembly of a portable storage device (DVD drive 20) or at an initial start after mounting the device in a vehicle, and transmits the initialization command to the portable storage device when satisfied.Type: ApplicationFiled: May 14, 2009Publication date: April 21, 2011Inventor: Kazuo Miyata
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Publication number: 20110082995Abstract: An information processing apparatus includes a storage unit configured to include a plurality of storage areas, a receiving unit configured to receive updating data for updating data stored in the storage unit, and a control unit configured to update the data stored in the storage unit based on the received updating data, wherein when the receiving unit receives the updating data for updating a portion of data stored in a first storage area among the plurality of storage areas, the control unit deletes data stored in a second storage area among the plurality of storage areas, writes the data stored in the first storage area in the second storage area, deletes the data in the first storage area, and then updates the data in the first storage area using the updating data received by the receiving unit and the data written in the second storage area.Type: ApplicationFiled: September 29, 2010Publication date: April 7, 2011Applicant: CANON KABUSHIKI KAISHAInventor: Hisashi Enomoto
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Publication number: 20110078402Abstract: A memory system includes a non-volatile semiconductor memory that includes a plurality of blocks, each of the blocks being a data erasing unit; an erasing time monitoring unit that monitors time required for erasing data from the non-volatile semiconductor memory; a management table for managing the erasing time on a unit of each of the blocks; and a wear-leveling control unit that levels number of rewriting across the blocks based on the management table. The memory system accommodates variations among lots, individual pieces, and blocks, thereby performing highly-accurate wear leveling.Type: ApplicationFiled: April 1, 2010Publication date: March 31, 2011Applicant: Kabushiki Kaisha ToshibaInventor: Takeaki SATO
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Publication number: 20110078392Abstract: Techniques for writing to memory using adaptive write techniques. An adaptive write technique includes receiving at a computer a message including a plurality of symbols. The message is written to a memory. The writing to memory includes performing for each symbol in the message: writing a data value to a memory location in the memory and reading contents of the memory location after the data value has been written. The data value is determined at the computer in response to the symbol and to the contents of any memory locations previously read as part of writing the message to the memory. It is determined at the computer if the contents of the memory locations reflect the message. The writing is restarted at the computer in response to determining that the contents of the memory locations do not reflect the message.Type: ApplicationFiled: September 28, 2009Publication date: March 31, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Stefanie Chiras, Michele Franceschini, John P. Karidis, Luis A. Lastras, Mayank Sharma
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Publication number: 20110078403Abstract: A method for erasing data of a terminal includes: receiving a data erasing request from a management server; deleting data corresponding to an erasing range node according to a value of a flag bit of the erasing range node in an erasable list; and deleting the erasing range node from the erasable list.Type: ApplicationFiled: December 3, 2010Publication date: March 31, 2011Applicant: HUAWEI TECHNOLOGIES CO., LTD.Inventor: Yue SONG
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Patent number: 7908425Abstract: In a read method for a memory device, a bit line is set with data in a first memory cell; and the data on the bit line is stored in a register. The data in the register is transferred to a data bus while setting the bit line with data in a second memory cell. In another read method for a memory device, a bit line of a first memory cell is initialized and the bit line is pre-charged with a pre-charge voltage. Data in a memory cell on the bit line is developed, and a register corresponding to the bit line is initialized. The data on the bit line is stored in the register. The data in the register is output externally while performing the initializing, pre-charging, making and initializing to set the bit line with data in a second memory cell.Type: GrantFiled: June 27, 2008Date of Patent: March 15, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Jin-Yub Lee, Sang-Won Hwang
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Publication number: 20110060973Abstract: Various embodiments of the present invention provide systems and methods for data processing retries. As an example, a data processing retry circuit is discussed that includes a stepped erasure window register, and an erasure flag set circuit. The stepped erasure window register includes: an erasure flag location, an erasure flag length, and a step size. The erasure flag set circuit is operable to assert a first erasure flag beginning at the erasure flag location and having the erasure flag length at a first time. In addition, the erasure flag set circuit is operable to assert a second erasure flag beginning at the erasure flag location plus the step size, and having the erasure flag length at a second time.Type: ApplicationFiled: September 9, 2009Publication date: March 10, 2011Inventors: Shaohua Yang, Weijun Tan, Yuan Xing Lee
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Patent number: 7895394Abstract: A processor of a storage controller receives an erasure process request relating to data stored in a storage unit, from a host computer, via a data I/O interface, detects a logical storage extent which is different to the logical storage extent allocated to the storage unit and which can be allocated, allocates the logical storage extent thus detected to the storage unit, sends a notification indicating that access to the storage unit is possible, to the host computer which is the source of the request, and then executes erasure of the data in the logical storage extent that is associated with the storage unit forming the erasure object, and sends a data erasure notification to the management computer when the data has been erased.Type: GrantFiled: January 2, 2008Date of Patent: February 22, 2011Assignee: Hitachi, Ltd.Inventors: Noriko Nakajima, Yuichi Taguchi, Jun Mizuno
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Publication number: 20110040866Abstract: A method of data management for efficiently storing and retrieving data in response to user access requests. The method includes receiving a request from at least one client for a title not resident in a storage server, where the title includes a play track having a plurality of chapters. The retrieval from a secondary storage device of play track portions proximate chapter delineation points is initiated, and bandwidth capacity and quality-of-service (QoS) parameters associated with the secondary storage device is determined. In the case of a client request to begin presentation of the title at one of the chapters, streaming of retrieved portions of the play track chapter to the client is initiated, masking latency associated with the secondary storage device is provided, and retrieval of at least unretrieved portions of the play track chapter and subsequent play track portions from the secondary storage device is initiated.Type: ApplicationFiled: October 26, 2010Publication date: February 17, 2011Applicant: COMCAST IP HOLDINGS I, LLCInventors: Clement G. Taylor, Danny Chin, Jesse S. Lerman, Christopher W.B. Goode
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Publication number: 20110022778Abstract: Described embodiments provide a method of recovering storage space on a solid state disk (SSD). An index and valid page count are determined for each block of a segment of an SSD. If the valid page count of at least one block in the segment is zero, a quick clean is performed. A quick clean deallocates blocks having zero valid pages and places them in a queue for erasure. Otherwise, a deep clean is performed. A deep clean determines a compaction ratio, N-M, wherein N is a number of partially valid blocks and M is a number of free blocks required to compact the valid data from the N partially valid blocks into M entirely valid blocks. At least one data structure of the SSD is modified to refer to the M entirely valid blocks, and the N partially valid blocks are placed in the queue for erasure.Type: ApplicationFiled: July 24, 2009Publication date: January 27, 2011Inventors: Mark R. Schibilla, Randy J. Reiter
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Publication number: 20110016152Abstract: Data segments are logically organized in groups in a data repository. Each segment is stored at an index in the data repository. In association with a write request, a hash algorithm is applied to the data segment to generate a group identifier. Each group is identifiable by a corresponding group identifier. The group identifier is applied to a hash tree to determine whether a corresponding group in the data repository exists. Each existing group in the data repository corresponds to a leaf of the hash tree. If no corresponding group exists in the data repository, the data segment is stored in a new group in the data repository. However, if a corresponding group exists, the group is further searched to determine if a data segment matching the data segment to be stored is already stored. The data segment can be stored in accordance with the results of the search.Type: ApplicationFiled: July 16, 2009Publication date: January 20, 2011Applicant: LSI CorporationInventors: Vladimir Popovski, Nelson Nahum
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Patent number: 7873808Abstract: A method and system for synchronizing direct access storage volumes designated as managed by storage management software with direct access storage volumes available to a computer system. An identifier of a volume is provided. The volume is connected to and available to a computer system, and is not managed by storage management software. A best fit between the identifier and generic identification patterns is determined based on ratings. The database record that includes the best fitting identification pattern is identified. Management options that facilitate managing the volume by the storage management software are retrieved from the database record. The volume is automatically added to a set of volumes being managed by the storage management software. The adding of the volume includes designating the volume as being managed by the storage management software and providing the management options to the storage management software.Type: GrantFiled: January 3, 2008Date of Patent: January 18, 2011Assignee: International Business Machines CorporationInventor: Simon David Stewart
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Patent number: 7870378Abstract: A boot up method makes an electronic system boot up by a processor according to a boot code in a NAND flash memory and includes the following steps. First, the flash memory storing a boot code or boot codes is provided. Next, a first boot code is copied to an XIP memory in response to a hardware reset signal. Then, the processor executes the first boot code in the XIP memory and thus makes the system boot up. Next, whether the system boots up successfully is judged after a time delay. When the system fails to boot up, the system is reset and a second boot code is copied to the XIP memory. Thereafter, the processor executes the second boot code in the XIP memory and thus boots up the system. If the system still fails to boot up, the above-mentioned steps are repeated until the system boots up successfully.Type: GrantFiled: October 3, 2007Date of Patent: January 11, 2011Assignee: Magic Pixel Inc.Inventors: Yu-Hao Kuo, Chi-Houn Ma, Yu-Ting Cheng, Chun-Chieh Huang, Hua-Lin Chang
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Publication number: 20110004738Abstract: A data storage device for storing and managing data includes a data memory, an input unit, a data writer, and a data deleter. The data memory stores data. The data memory includes a preferential deletion area for storing data which needs to be preferentially deleted. The input unit accepts input data. The data writer stores the input data in the data memory. The data deleter deletes data stored in the data memory. The data deleter starts to delete data stored in the preferential deletion area before starting to delete data stored in the data memory other than the preferential deletion area when a predefined condition is satisfied.Type: ApplicationFiled: December 17, 2009Publication date: January 6, 2011Applicant: FUJITSU LIMITEDInventors: Kouichi YASAKI, Isamu YAMADA
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Publication number: 20110004725Abstract: According to one embodiment, a data storage device, includes: a recording medium, statuses of storage areas of the recording medium being managed by groups; a managing table storage module storing a managing table in which bit information pieces are associated to indexes representing the groups, the bit information pieces indicating the statuses of the storage areas initially set to an erased status; a transfer controller storing, upon receiving a write command, data in the storage areas; and a controller updates the bit information pieces of one of the groups to which the storage areas belongs to a stored status. Upon receiving an erase command, the transfer controller overwrites the storage areas by predetermined data. The main controller is configured to update the bit information pieces to the erased status.Type: ApplicationFiled: June 30, 2010Publication date: January 6, 2011Applicant: TOSHIBA STORAGE DEVICE CORPORATIONInventor: Shigeyoshi TANAKA
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Publication number: 20100332716Abstract: Storing metadata that is disjoint from corresponding data by storing the metadata to the same address as the corresponding data but in a different address space. A metadata store instruction includes a storage address for the metadata. The storage address is the same address as that for data corresponding to the metadata, but the storage address when used for the metadata is implemented in a metadata address space while the storage address, when used for the corresponding data is implemented in a different data address space. As a result of executing the metadata store instruction, the metadata is stored at the storage address. A metadata load instruction includes the storage address for the metadata. As a result of executing the metadata load instruction, the metadata stored at the address is received. Some embodiments may further implement a metadata clear instruction which clears any entries in the metadata address space.Type: ApplicationFiled: June 26, 2009Publication date: December 30, 2010Applicant: MICROSOFT CORPORATIONInventors: Gad Sheaffer, David Callahan, Jan Gray, Ali-Reza Adl-Tabatabai, Shlomo Raikin