Abstract: A mechanism is provided for isolation of device namespace to allow duplicate or common names in root volume group workload partitions. The mechanism creates a scratch file system that contains enough information to create an execution environment for a workload partition and information about which physical volumes to use for the root volume group file systems. The mechanism then populates the root file systems on a disk in the global space. The mechanism boots the workload partition from the scratch file system and configures the devices to be exported to the workload partition based information in the scratch file system. The mechanism then renames the logical volume names to the traditional names. The mechanism then temporarily mounts the root volume group file system onto the scratch file system.

Abstract: Hypervisor managed memory paging is provided in a data processing system having multiple logical partitions. The data processing system includes a shared memory pool defined within physical memory. The shared memory pool includes a volume of physical memory with dynamically adjustable sub-volumes or sets of physical pages associated with the multiple logical partitions. Each sub-volume or set is associated with a particular logical partition and includes mapped logical memory pages for that logical partition. A hypervisor memory manager interfaces the multiple logical partitions and the shared memory pool, and manages access to logical memory pages within the shared memory pool. The hypervisor memory manager further manages page-out and page-in of logical memory pages from the shared memory pool to one or more external paging devices. This page-out and page-in managing by the hypervisor memory manager is transparent to the multiple logical partitions.

Abstract: An apparatus of the present invention includes partition selection circuitry configured to selectably provide individual access to multiple ones of a plurality of partitions of a data storage component by a host device without multiple partition support. The apparatus can also include the data storage component and/or the host device. The partition selection circuitry uses a logical block addressing (LBA) address generated by the host device, and an operating mode indicator indicative of a particular partition, to allow the partitions of the data storage component to be accessed by the host device without multiple partition support. Methods implemented by the apparatus are also disclosed.

Abstract: Methods and systems to wear level a non-volatile memory device across partitions. In an embodiment, a memory device performs background operations to swap host addressable memory partitions with a spare memory partition outside of the host address space. In one embodiment, the background inter-partition wear leveling operations are appended to a user erase operations.

Abstract: A method includes determining an amount of memory space in a memory device available for memory mirroring. The method further includes presenting the available memory space to an operating system. The method further includes selecting at least a portion of the amount of memory space to be used for memory mirroring with the operating system. The method further includes adding a non-selected portion of the available memory to memory space available to the operating system during operation. An associated system and machine readable medium are also disclosed.

Abstract: A memory configuring method for a memory storage apparatus is provided, wherein a rewritable non-volatile memory module of the memory storage apparatus has a plurality of physical blocks. The method includes receiving a plurality of query commands from a host system, identifying a pattern corresponding to the query commands and recognizing a type of an operating system executed on the host system. The method further includes configuring the rewritable non-volatile memory module according to the type of the operating system and announcing a configuration of the memory storage apparatus to the host system. Accordingly, the method can configure the non-volatile memory module according different operating systems, and thereby the memory storage apparatus can successfully receive commands and re-set according to user's demand.

Abstract: A memory configuring method for a memory storage apparatus is provided, wherein a rewritable non-volatile memory module of the memory storage apparatus has a plurality of physical blocks. The method includes recording pattern information corresponding to a plurality of various operation system platforms in an initial session table. The method also includes receiving a plurality of handshaking query commands from a host system, identifying a pattern corresponding to the handshaking query commands and recognizing a type of an operation system executed on the host system according the pattern corresponding to the handshaking query commands and the patter information stored in the initial session table. The method further includes configuring the rewritable non-volatile memory module according to the type of the operation system and announcing a configuration of the memory storage apparatus to the host system.

Abstract: A memory mapping system for compactly mapping dissimilar memory systems and methods for manufacturing and using same. The mapping system maps a source memory system into a destination memory system by partitioning the source memory system and disposing memory contents within the partitioned source memory system into the destination memory system. In one embodiment, the mapping system factorizes a source data width of the source memory system in terms of a destination data width of the destination memory system to form at least one data sub-width. A source memory sub-region is defined for each data sub-width. The memory contents associated with each source memory sub-region are disposed within the destination memory system in a side-by-side manner across selected destination memory registers of the destination memory system. The mapping system thereby can compactly map the memory contents into the destination memory system without a loss of valuable memory space.

Abstract: A method for data storage includes representing logical volumes by respective sets of pointers to physical partitions in which data used by the logical volumes is stored. One or more of the logical volumes are defined as provisionally deleted. A subset of the provisionally-deleted logical volumes is selected such that each logical volume in the subset has one or more private physical partitions whose data is used exclusively by that logical volume. One or more of the private physical partitions of the logical volumes in the subset are released for reallocation to another logical volume.

Abstract: A replicated virtual cartridge is received into a media vault of a first virtual tape library and appears in a shadow library. The virtual cartridge is visible to a backup application via the shadow library to allow the backup application to perform a copy operation on the virtual cartridge.

Abstract: A file server has a conversion table that stores therein, in a corresponding manner, logical addresses specified by a higher-level layer and physical addresses specified by a disk driver that are address information indicative of a storage area in a disk device. The file server accesses the disk device with a storage area indicated by a physical address as an access destination and counts up the number of access requests to each storage area in a given period of time for each of the logical addresses. The file server then updates the conversion table such that the physical addresses are lined up in a descending order of the logical addresses of a higher number of the access requests counted. Thereafter, the file server changes storage areas of data stored in the storage device based on the conversion table updated.

Abstract: A system, method, computer program product, and program storage device for storing trace information of a program is disclosed. Upon entering or calling a subroutine, a memory buffer is created. Whenever a nested subroutine is called inside the subroutine, a subordinate memory buffer is created. Upon completion of a subroutine execution, a corresponding memory buffer is deleted. When encountering an event (e.g., an error, a defect, a failure, a warning) during execution, all data in currently existing memory buffers are transferred to a secondary memory storage device (e.g., a disk).

Abstract: Memory management by garbage collection involves a memory area that is allocated in a computer. Data is created in the memory area in accordance with a program executed by a processor of the computer, and it is checked whether or not data necessary to execute the program exists in the memory area to be released, in response to an explicit instruction to release the memory area. As a result of the check, if data necessary to execute the program does not exist in the memory area, the memory area is released. As a result of the check, if data necessary to execute the program exists in the memory area, the data is moved to a memory area different from the memory area to be released.

Abstract: Described are a system and method of presenting virtual arrays in a storage network. A physical storage array is partitioned into a plurality of virtual arrays. Each virtual array has logical units of storage. Each virtual array is associated with a virtual array management interface by which a management application executing remotely on a host can address communications separately to that virtual array for managing the logical units of storage of that virtual array.

Abstract: A block management method for managing a mapping relationship between a plurality of logical blocks and a plurality of physical blocks of a flash memory is provided. The block management method includes: grouping the logical blocks into a plurality of logical zones; recording the mapping relationship between each logical block in each logical zone and all the data physical blocks among the physical blocks in a corresponding logical zone table in unit of the logical zones; and recording all the no-data physical blocks among the physical blocks with a single no-data physical block table. Thereby, the logical blocks can be mapped to all the physical blocks so that frequent access to specific physical blocks can be avoided when a user writes data into a specific logical zone frequently, and accordingly the lifespan of the flash memory can be prolonged.

Abstract: Methods and apparatus for associating partitions in a computing device are disclosed. An example method includes, loading an operating system (O/S) kernel partition (kernel partition) and identifying one or more root filesystem (rootfs) partitions that are compatible with the loaded kernel partition. In the example method, the one or more compatible rootfs partitions are identified by comparing a set of compatibility bits of the loaded kernel partition with respective sets of compatibility bits of a plurality of rootfs partitions of the computing device. The example method still further includes selecting a rootfs partition from the one or more identified compatible rootfs partitions and loading the selected rootfs partition.

Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, manage metadata for virtual volumes. In some implementations, a method and system include defining multiple metadata blocks in a persistent storage, including information that links a virtual address space to the storage system, where the defining includes, for at least one of the multiple metadata blocks, determining multiple output addresses corresponding to the storage system, and writing the multiple output addresses and an identifier corresponding to the multiple metadata blocks in a metadata block in the persistent storage. In some implementations, a method and system include reading the multiple metadata blocks into the memory from the persistent storage, including identifying the metadata block based on the identifier; receiving an input address of the virtual address space; and obtaining a corresponding output address to the storage system using the multiple metadata blocks in the memory.

Abstract: Described are embodiments of an invention for allocating storage space in a storage system for critical data sets. The computing environment includes at least one server including a processor and memory. The server is coupled to storage. The memory further includes a storage manager including an allocation module and an alert module. The storage manager defines a common area for storing non-critical data sets and critical data sets in the storage group. The storage manager also defines a critical reserve area for storing only critical data sets in the first storage group. A predefined percentage of available storage space is reserved for the critical reserve area. The predefined percentage of available space is determined by comparing the available storage space within the critical reserve area to the storage space in the storage group.

Abstract: An indirection system in a shingled storage device is described that uses an algorithm to map LBAs to DBAs based on a predetermined rule or assumption and then handles as exceptions LBAs that are not mapped according to the rule. The assumed rule is that a fixed-length set of sequential host LBAs are located at the start of an I-track. Embodiments of the invention use two tables to provide the mapping of LBAs to DBAs. The mapping assumed by the rule is embodied in the LBA Block Address Table (LBAT) which gives the corresponding I-track address for each LBA Block. The LBA exceptions are recorded using an Exception Pointer Table (EPT), which gives the pointer to the corresponding variable length Exception List for each LBA Block. The indexing into the LBAT and the EPT is derived from the LBA by a simple arithmetic operation.

Abstract: Techniques for improving performance of a shared storage environment are disclosed. In one particular exemplary embodiment, the techniques may be realized as a method for improving performance of a shared storage environment comprising determining a unit of shared storage utilized by an environment to be migrated, retrieving a storage management memory structure of a source computing platform for the unit of the shared storage, transferring the storage management memory structure to a target computing platform, and building a portion of storage management memory for the target computing platform utilizing the transferred storage management memory structure.

Abstract: Various technologies and techniques are disclosed for providing type stability techniques to enhance contention management. A reference counting mechanism is provided that enables transactions to safely examine states of other transactions. Contention management is facilitated using the reference counting mechanism. When a conflict is detected between two transactions, owning transaction information is obtained. A reference count of the owning transaction is incremented. The system ensures that the correct transaction was incremented. If the owning transaction is still a conflicting transaction, then a contention management decision is made to determine proper resolution. When the decision is made, the reference count on the owning transaction is decremented by the conflicting transaction. When each transaction completes, the reference counts it holds to itself is decremented. Data structures cannot be deallocated until their reference count is zero.

Abstract: The present disclosure includes methods and devices for operating a solid state drive. One method embodiment includes mirroring programming operations such that data associated with a programming operation is programmed to two or more locations in memory of the solid state drive. The method also includes ceasing to mirror programming operations upon an occurrence of a particular event.

Abstract: Systems and techniques of the management of the allocation of a plurality of memory elements stored within a plurality of lockless list structures are presented. These lockless list structures (such as Slists) may be made accessible within an operating system environment of a multicore processor—and may be partitioned within the system. Memory elements may also be partitioned among these lockless list structures. When a core processor (or other processing element) makes a request for allocating a memory element to itself, the system and/or method may search among the lockless list structures for an available memory element. When a suitable and/or available memory element is found, the system may allocate the available memory element to requesting core processor. Dynamically balancing of memory elements may occur according to a suitable balancing metric, such as maintain substantial numerical equality of memory elements or avoid over-allocation of resources.

Abstract: The present invention provides a method of establishing a hard disk physical partition. First of all, it selects a sector in which the head of the hard disk physical partition is located, and establishes a user available partition of the hard disk within the range of the hard disk physical volume from the sector, the other portion of the hard disk becomes a protected partition of the hard disk, finally constitutes one hard disk physical partition. After entering into the hard disk physical partition, only the user available partition can be accessed, the protected partition is invisible to the user. It can establish the different hard disk physical partition in the different position of the hard disk through selecting the sector where the head of the hard disk is located.

Abstract: A memory management and writing method for managing a memory module is provided. The memory module has a plurality of memory units and a plurality of data input/output buses corresponding to the memory units. The method includes configuring a plurality of logical units, dividing each of the logical units as a plurality of logical parts, and mapping the logical parts of each of the logical units to physical blocks of the memory units. The method also includes respectively establishing mapping tables corresponding to the data input/output buses, and only using one of the data input/output buses to write data from a host system into the corresponding memory unit according to the mapping table corresponding to the data input/output bus. Accordingly, the method can effectively increase the speed of writing data into the memory module.

Abstract: A method of storing data in a flash memory data storage device that includes a plurality of memory chips is disclosed. The method includes determining a number of memory chips in the data storage device, defining, via a host coupled to the data storage device, a first partition of the data storage device, where the first partition includes a first subset of the plurality of memory chips and defining a second partition of the data storage device via a host coupled to the data storage device, where the second partition includes a second subset of the plurality of memory chips. First data is written to the first partition while reading data from the second partition, and first data is written to the second partition while reading data from the first partition.

Abstract: A system and method for configuring storage resources for database storage are disclosed. A method may include mapping at least one first tablespace having a first block size to at least one first logical unit. The method may also include mapping the at least one first tablespace and the at least one first logical unit to a first cache having a size equal to the first block size. In addition, the method may include mapping at least one second tablespace having a second block size to at least one second logical unit. The method may further include mapping the at least one second tablespace and the at least one second logical unit to a second cache having a size equal to the second block size.

Abstract: The subject matter disclosed herein describes a method of allocating and persisting memory in an industrial controller without requiring a battery backup or a large capacitive storage system. Each data object is identified as static or dynamic. Static objects are further classified by whether frequent access of that data object is required. Each of the data objects is stored in non-volatile memory. The dynamic data objects and static data objects requiring frequent access are stored in volatile memory. A record of static data objects is maintained in non-volatile memory and a record of dynamic data objects is maintained in volatile memory. Upon power loss, the present value of each dynamic data object is copied to non-volatile memory. When power is restored, the values of both the dynamic data objects and the static data objects that require frequent access at run-time are copied from non-volatile memory to volatile memory.

Abstract: One embodiment sets forth an interface circuit configured to manage refresh command sequences that includes a system interface adapted to receive a refresh command from a memory controller, clock frequency detection circuitry configured to determine the timing for issuing staggered refresh commands to two or more memory devices coupled to the interface circuit based on the refresh command received from the memory controller, and at least two refresh command sequence outputs configured to generate the staggered refresh commands for the two or more memory devices.

Abstract: Disclosed are a method of and a system for enabling a program running on a logical partition, of a logically partitioned data processing system, to access directly resources of the data processing system. The method comprising the steps of, said program transforming a first address for a resource of a specific type on the data processing system, to a second address, within an address space allocated to said logical partition; and said program using said second address space to access a resource of said specific type allocated to said logical partition. In this way, the present invention may be used to enable a program running within a partition's address space to access IO devices directly, thus avoiding the overhead of making a hypervisor call.

Abstract: The present disclosure includes boot partitions in memory devices and systems, and methods associated therewith. One or more embodiments include an array of memory cells, wherein the array includes a boot partition and a number of additional partitions. Sequential logical unit identifiers are associated with the additional partitions, and a logical unit identifier that is not in sequence with the sequential logical unit identifiers is associated with the boot partition.

Abstract: Disclosed is a method and apparatus for allowing a user to select, from a plurality of partitions on a memory device, which partitions may be visible to hosts connecting to the memory device.

Abstract: The invention provides hardware based techniques for switching processing tasks of software programs for execution on a multi-core processor. Invented techniques involve a hardware logic based controller for assigning, adaptive to program processing loads, tasks for processing by cores of a multi-core fabric as well as configuring a set of multiplexers to appropriately interconnect cores of the fabric and program task specific segments at fabric memories, to arrange efficient inter-task communication as well as transferring of activating and de-activating task memory images among the multi-core fabric. The invention thereby provides an efficient, hardware-automated runtime operating system for multi-core processors, minimizing any need to use processing capacity of the cores for traditional operating system software functions.

Abstract: In a data processing system having a plurality of resources and plurality of partitions, each partition including one or more resources of the plurality of resources, a method includes receiving an access request to a target resource of the plurality of resources; using a first set of transaction attributes of the access request to determine a partition identifier for the access request in which the partition identifier indicates a partition of the plurality of partitions which includes the target resource; using the partition identifier to determine access permissions for the partition indicated by the partition identifier; and based on the access permissions, determining whether or not the access request is permitted.

Abstract: Various systems and methods for performing tiering-aware data defragmentation. One method can involve receiving tiering information from a storage device that comprises multiple tiers. The information specifies a tiering attribute and tiering attribute value for the tiers. The method involves establishing zones that have zone attribute values corresponding to the received tiering attribute values. The method then involves storing a given block in a particular zone in response to detecting that a block attribute value of the block corresponds to a zone attribute value for the zone.

Abstract: A hybrid memory system is provided that combines the advantages of NAND flash memory devices with the advantages of NOR flashes memory devices. The system includes a NAND flash memory portion to provide mass storage and fast programming/erasure capabilities of conventional NAND flash memory devices. The system further comprises a NOR flash memory portion to provide code storage and fast random reading capabilities of conventional NOR flash memory devices. Accordingly, the hybrid memory system provides both mass storage and code storage along with fast programming/erasure speeds and fast random access speeds.

Abstract: A computing device, computer readable storage medium, and method for migration of a physical machine to a virtual machine are disclosed. The computing device executes an operating system installer and generates a virtual disk image at a temporary location. The computing device copies data from one or more existing partitions on a storage device to the virtual disk image, wherein the one or more existing partitions include an existing operating system and associated data. The virtual disk image is stored at a temporary location. The one or more existing partitions are then replaced with a new partition on the storage device. A new operating system is installed on the new partition. The virtual disk image is moved to the new partition from the temporary location. The virtual disk image can then be loaded into a virtual machine that runs on the new operating system.

Abstract: A storage system includes at least one storage device on which are provided data storage volumes and an extended storage volume. The data storage volumes include a first data storage volume that is implemented with a data protection mechanism, and a second data storage volume that is implemented without the data protection mechanism. Also, an extended storage volume is provided that is initially un-allocated to any of the data storage volumes. A controller dynamically allocates at least one portion of the extended storage volume to the particular data storage volume to dynamically expand storage capacity of the particular data storage volume.

Abstract: In some embodiments, an apparatus includes a register having a first portion and a second portion. The first portion of the register has multiple bits and the second portion of the register has multiple bits. Each bit from the multiple bits of the first portion of the register is associated with a bit from the multiple bits of the second portion of the register such that a bit from the multiple bits of the first portion of the register is set for its associated bit from the multiple bits of the second portion of the register to be written.

Abstract: In one embodiment, the present invention includes a semiconductor die such as a system on a chip (SoC) that includes a logic analyzer with a built-in trace buffer to store information communicated between on-die agents at speed and to provide the information to an off-die agent at a slower speed. Other embodiments are described and claimed.

Abstract: A mechanism is provided for assigning memory to on-chip cache coherence domains. The mechanism assigns caches within a processing unit to coherence domains. The mechanism then assigns chunks of memory to the coherence domains. The mechanism monitors applications running on cores within the processing unit to identify needs of the applications. The mechanism may then reassign memory chunks to the cache coherence domains based on the needs of the applications running in the coherence domains. When a memory controller receives the cache miss, the memory controller may look up the address in a lookup table that maps memory chunks to cache coherence domains. Snoop requests are sent to caches within the coherence domain. If a cache line is found in a cache within the coherence domain, the cache line is returned to the originating cache by the cache containing the cache line either directly or through the memory controller.

Abstract: Various aspects of a data volume or other shared resource are determined and updated dynamically for purposes such as to provide guaranteed qualities of service. For example, the number of partitions in a data volume and/or the way in which data is stored across those partitions can be updated dynamically without significantly impacting the customer using the volume. The data stored to the volume can be striped or otherwise distributed across a number of logical areas, which then can be distributed across the partitions. Separate mappings can be used for the data in each logical area, and the logical areas in each partition, such that when moving a logical area only a single mapping has to be updated, regardless of the amount of data in that logical area. Further, logical areas can be moved between partitions without the need to repartition or redistributed the data in the data volume.

Abstract: A multi-bank memory system includes one or more levels of logical memory hierarchy to increase the available random cyclic transaction rate of the memory system. The memory system includes a plurality of multi-bank partitions, each having a corresponding partition interface. Each partition interface accesses the corresponding multi-bank partition at a first frequency. A global interface may access the partition interfaces at a second frequency, which is equal to the first frequency times the number of partition interfaces. Alternately, a plurality of cluster interfaces may access corresponding groups of the partition interfaces, wherein each cluster interface accesses the corresponding group of partition interfaces at a second frequency that is faster than the first frequency. A global interface accesses the cluster interfaces at a third frequency that is greater than the second frequency.

Abstract: A host device includes a first file system, and a storage device includes a plurality of memory units and a plurality of controllers. While the host device is operative coupled to the storage device, the host device creates a second file system corresponding to the storage device and copies host content from the first file system to the second file system. The second file system is segmented into a plurality of segments, each of the plurality of segments being uniquely associated with a particular one of the plurality of controllers. The host device selects a data transfer rate to write the host content from the second file system to the storage device.

Abstract: This memory management system has: (a) a logical partition management unit that manages allocation and release of a virtual memory used by an application in a logical address space; (b) a physical partition management unit that manages allocation and release of small size parts into which a physical memory is divided in a physical address space; and (c) a converter unit that converts an address between the logical address space and the physical address space.

Abstract: A technique that supports improved debugging of kernel loadable modules (KLMs) that involves allocating a first portion of a memory and detecting a first kernel loadable module (KLM) requesting an allocation of at least a portion of the memory. The first KLM is then loaded into the first portion of the memory and a first identifier is associated with the first KLM and the first portion. The access of a second portion of the memory by the first KLM, the second portion being distinct from the first portion is detected and an indication that the first KLM has accessed the second portion is generated.

Abstract: An apparatus of an aspect includes a prefetch cache line address predictor to receive a cache line address and to predict a next cache line address to be prefetched. The next cache line address may indicate a cache line having at least 64-bytes of instructions. The prefetch cache line address predictor may have a cache line target history storage to store a cache line target history for each of multiple most recent corresponding cache lines. Each cache line target history may indicate whether the corresponding cache line had a sequential cache line target or a non-sequential cache line target. The cache line address predictor may also have a cache line target history predictor. The cache line target history predictor may predict whether the next cache line address is a sequential cache line address or a non-sequential cache line address, based on the cache line target history for the most recent cache lines.

Abstract: Systems and methods for performing parallel multi-level data computations in a storage system are provided. One system includes a memory storing data, multiple caches, and a processor. The processor is configured to perform the method below. One method includes determining the total amount of data in the memory, dividing the amount of data by each cache capacity to determine the number of nodes needed for processing the data in the memory, and automatically creating the nodes. Here, the nodes form a tree structure including multiple levels where the lowest level includes a first number of nodes equal to the amount of data divided by the cache memory capacity. Also, each lowest level node is configured to process an amount of data equal to the cache memory capacity and each level above the lowest level is configured to include one or more nodes for receiving an input from lower level nodes.

Abstract: Embodiments of systems, apparatuses, and methods for a circular buffer in a redundant virtualization environment are disclosed. In one embodiment, an apparatus includes a head indicator storage location, an outgoing tail indicator storage location, a buffer tail storage location, and fetch hardware. The head indicator, outgoing tail indicators, and buffer tail indicators are to indicate a head, outgoing tail, and buffer tail, respectively, of a circular buffer. The fetch hardware is to fetch from the head of the circular buffer and advance the head no further than the outgoing tail. The buffer tail is to be filled by software and advanced no further than the head.

Abstract: Flash memory stored data modification is described. In embodiments, a flash memory system includes flash memory and a memory controller that manages data write and erase operations to the flash memory. The flash memory includes a first flash memory region of single-write flash memory cells that are each configured for a data write operation and a corresponding erase operation before a subsequent data write operation. The flash memory also includes a second flash memory region of multiple-write flash memory cells that are each configured for multiple data write operations before an erase operation.