Memory Configuring Patents (Class 711/170)
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Patent number: 12288586Abstract: To reduce data disturbs and lower current requirements of a 3D NAND memory die, a multi-block plane of non-volatile memory cells has its source line separated into multiple source line regions by introduction of isolation trenches. The plane structure for the NAND memory is maintained, but is broken into multi-block sub-planes, each with an independently biasable source line.Type: GrantFiled: September 26, 2022Date of Patent: April 29, 2025Assignee: Sandisk Technologies, Inc.Inventors: Ramy Nashed Bassely Said, Jiahui Yuan, Lito De La Rama
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Patent number: 12287978Abstract: According to an embodiment of the present technology, an electronic device may include a host device including: an application requesting to write data; and a file system configured to generate, in response to the request of the application, a log regarding a property of data, and allocate a section corresponding to the data based on the log; and a storage device comprising: a memory device including a plurality of memory dies; and a memory controller configured to control the memory device to receive the data and the log of the data from the host device, and sequentially store the data in a physical zone corresponding to the section.Type: GrantFiled: September 11, 2023Date of Patent: April 29, 2025Assignee: SK hynix Inc.Inventor: Soon Yeal Yang
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Patent number: 12287730Abstract: A device and related method, the device including memory and processing circuitry. The memory includes sets of source memory bands and a defragmentation destination memory band. Each set of source memory bands includes source memory bands and at least one portion of each source memory band stores valid data. The processing circuitry determines a merit score corresponding to each source memory band based on one or more characteristics of portions of data of each corresponding source memory band and determines, for each set of source memory bands, a respective source memory band that corresponds to a second-highest merit score. The processing circuitry identifies a set of source memory bands that includes a source memory band corresponding to a highest second-highest merit score and stores at least one portion of valid data from the source memory bands of the identified set of source memory bands to the defragmentation destination memory band.Type: GrantFiled: December 22, 2023Date of Patent: April 29, 2025Assignee: SK Hynix NAND Product Solutions Corp.Inventors: Darshan Mallapur Vishwanath, David Carlton, Jonathan Hughes
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Patent number: 12282689Abstract: A technique is directed to providing dynamic redundant array of independent disks (RAID) transformation which involves measuring a set of storage array parameters for an existing RAID configuration residing in a storage array. The technique further involves identifying a new RAID configuration to use in place of the existing RAID configuration based on the measured set of storage array parameters. The technique further involves, after the new RAID configuration is identified, transforming the existing RAID configuration into the new RAID configuration.Type: GrantFiled: July 25, 2022Date of Patent: April 22, 2025Assignee: Dell Products L.P.Inventors: Vamsi K. Vankamamidi, Amitai Alkalay, Thomas Dibb
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Patent number: 12282677Abstract: Techniques are provided for object store mirroring. Data within a storage tier of a node may be determined as being data to tier out to a primary object store based upon a property of the data. A first object is generated to comprise the data. A second object is generated to comprise the data. The first object is transmitted to the primary data store for storage in parallel with the second object being transmitted to a mirror object store for storage. Tiering of the data is designated as successful once acknowledgements are received from both the primary object that the first object was stored and the mirror object store that the second object was stored.Type: GrantFiled: March 20, 2023Date of Patent: April 22, 2025Assignee: NetApp, Inc.Inventors: Anil Paul Thoppil, Cheryl Marie Thompson, Qinghua Zheng, Jeevan Hunsur Eswara, Nicholas Gerald Zehender, Ronak Girishbhai Ghadiya, Sridevi Jantli
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Patent number: 12282796Abstract: Apparatus for performing group computing in a safety-critical operating environment (SCOE) includes a primary computing device, wherein the primary computing device includes a processor and a memory communicatively connected to the processor. The memory contains instructions configuring the processor to receive task data, determine a group computing need by comparing the task data against a preset group computing criterion, determine a hardware allocation as a function of the group computing need, create a virtual environment using a secondary computing device communicatively connected to the primary computing device, as a function of the hardware allocation, allocate at least a portion of the task data to the at least a secondary computing device, as a function of the group computing need, wherein the at least a portion of the task data is executed by the secondary computing device, and receive from the at least a secondary computing device a processing result.Type: GrantFiled: October 9, 2024Date of Patent: April 22, 2025Assignee: Parry Labs, LLCInventors: David Walsh, Charles Adams
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Patent number: 12277322Abstract: A method of operating a solid state drive (SSD) is provided. The method includes generating, by a controller provided in the SSD, a free block list indicating a plurality of free super blocks, wherein adjacent free super blocks of the plurality of free super blocks correspond to different dies of a plurality of dies provided in the SSD; and allocating, by the controller, a free super block from among the plurality of free super blocks indicated by the free block list for each of a host write operation and a garbage collection write operation, according to a sequence of the plurality of free super blocks indicated by the free block list.Type: GrantFiled: December 7, 2022Date of Patent: April 15, 2025Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Suman Prakash Balakrishnan, Anantha Sharma, Tushar Tukaram Patil, Rakesh Balakrishnan
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Patent number: 12277035Abstract: Embodiments of the present disclosure provide a method, an electronic device, and a computer program product for storage performance expansion. The method includes acquiring, from a client, backup settings of a user for backing up data in a storage system and the user's priority. The method further includes determining, based on the user's priority, an input/output (I/O) specification of the storage system that is able to be allocated to the client. The method further includes determining, based on the backup settings, a time period in which a peak value of an I/O load of the storage system occurs. The method further includes increasing I/O performance of the storage system in response to that the peak value is greater than an upper limit of the I/O specification. The embodiments of the present disclosure can solve the I/O peak problem more effectively without interrupting a data backup or restoration service.Type: GrantFiled: April 5, 2023Date of Patent: April 15, 2025Assignee: DELL PRODUCTS L.P.Inventors: Bing Liu, Cheng Wang
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Patent number: 12277329Abstract: A method and system track memory allocation and release activities to detect memory leak, buffer overflow, and release type mismatch errors in a computing system. The memory tracker computes the necessary size of the allocated memory block and calls operating system provided functions to allocate and release raw memory blocks. Raw memory blocks are formatted into allocated memory blocks. An indexed data structure stores the allocated memory blocks. The user memory address is used as the index key value. The memory blocks are removed from the indexed data structure when the programs release the memory. The memory blocks remaining in the indexed data structure are considered memory leaks when the memory tracker terminates. The memory tracker adds bytes to the end of memory blocks for the integrity check and detects possible buffer overflow errors. Memory allocation type is added in the allocated memory blocks for release type mismatch errors.Type: GrantFiled: December 7, 2022Date of Patent: April 15, 2025Assignee: LipingData CorporationInventor: Liping Dai
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Patent number: 12277331Abstract: A data storage device includes a memory device and a memory controller. The memory device includes multiple memory blocks. The memory blocks includes one or more spare memory blocks that are not written with data and one or more predetermined memory blocks that are configured as a buffer for receiving data from a host device. The memory controller is coupled to the memory device and configured to access the memory device. The memory controller is configured to determine a setting value of a number of said one or more predetermined memory blocks according to a number of currently remaining spare memory block(s), a number of the predetermined memory block(s) that has/have been written with data among said one or more predetermined memory blocks and a predetermined threshold, and configure the number of the predetermined memory block(s) as the buffer according to the setting value.Type: GrantFiled: July 10, 2023Date of Patent: April 15, 2025Assignee: Silicon Motion, Inc.Inventor: Po-Lin Wu
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Patent number: 12277330Abstract: A data storage device includes a memory device and a memory controller. The memory device includes multiple memory blocks which include one or more spare memory blocks not written with data and one or more predetermined memory blocks that are configured as a buffer for receiving data from a host device. The memory controller obtains a total number of remaining erasable count of the memory blocks and determines a setting value of a number of said one or more predetermined memory blocks according to a number of currently remaining spare memory block(s), a number of the predetermined memory block(s) that has/have been written with data among said one or more predetermined memory blocks, a predetermined threshold and the total number of remaining erasable count of the memory blocks, and configures the number of the predetermined memory block(s) as the buffer according to the setting value.Type: GrantFiled: July 7, 2023Date of Patent: April 15, 2025Assignee: Silicon Motion, Inc.Inventor: Po-Lin Wu
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Patent number: 12271323Abstract: An electronic device includes: a storage device including multiple segments configured to store data; a buffer memory configured to store segment attributes corresponding to the multiple segments, respectively; and one processor electrically connected to the storage device and the buffer memory. The one processor is configured to: determine, based on two or more parameters related to a data requested to be written, a data attribute; store the data requested to be written in a segment of the multiple segments, the segment being corresponding to the data attribute among the multiple segments; store a segment attribute of the segment, which is determined based on the data attribute in the buffer memory; update the data attribute, based on a data modification time of the data requested to be written; and update the segment attribute, based on the updated data attribute.Type: GrantFiled: May 23, 2023Date of Patent: April 8, 2025Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sungjong Seo, Yeongjin Gil, Hyeongjun Kim, Woojoong Lee
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Patent number: 12271295Abstract: A method of controlling a memory and an electronic device performing the method are provided. The electronic device includes a memory configured to store instructions executable by the processor; and at least one processor configured to execute the instructions to: determine a use state of the electronic device corresponding to an available area of the memory, determine a temperature of the electronic device, determine a memory parameter based on the use state and the temperature, and convert a used area of the memory into the available area based on the memory parameter.Type: GrantFiled: March 8, 2023Date of Patent: April 8, 2025Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Dongho Kim, Jiman Kwon, Jaehyeon Park, Geonhee Back, Dongwook Lee, Daehyun Cho
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Patent number: 12271607Abstract: In an embodiment a method includes modifying or suppressing one or more data values of a non-volatile memory, wherein the one or more data values are stored in a first sector of the non-volatile memory, wherein the first sector is designated as a current sector by one or more selection values stored in the non-volatile memory, wherein modifying or suppressing comprises writing the one or more data values into a second sector of the non-volatile memory, and wherein the second sector is designated as an alternate sector by the one or more selection values.Type: GrantFiled: May 16, 2023Date of Patent: April 8, 2025Assignee: STMicroelectronics (Alps) SASInventor: Jawad Benhammadi
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Patent number: 12265651Abstract: An information processing device includes a guest OS and a host OS that accesses a sector group in response to an access request from the guest OS. The host OS includes: an access log analyzer that generates, by reference to a sector-group database, a sector-group access log from the access request; a sector-group access determiner that determines, based on the sector-group access log, whether the access request seeks to access the sector group related to an application; and a manager that updates, based on a developer definition policy, a sector-group access rule database and the sector-group database if it is determined that the access request seeks to access the sector group and the guest OS makes a change to an application storage area.Type: GrantFiled: February 2, 2023Date of Patent: April 1, 2025Assignee: PANASONIC AUTOMOTIVE SYSTEMS CO., LTD.Inventors: Tomonori Mitsugi, Yoshiharu Imamoto
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Patent number: 12259793Abstract: Memory management processes allocate and recycle pages of replication data pointer (RDP) metadata space in shared memory. When the RDP page currently allocated to an IO thread becomes full, that RDP page is released, and a new RDP page is allocated to the IO thread. The released page eventually becomes fragmented and is added to a list of RDP pages that are ranked based on partial fullness. An IO thread that needs a new RDP page is allocated a mostly empty RDP page from the ranked list, if such a page is available. Otherwise, a new completely empty RDP page is allocated to the IO thread. Use of the ranked lists reduces latency associated with allocation of new RDP pages. Contention between IO threads for RDP metadata space is reduced because each IO thread has exclusive rights to the free RDP metadata space in its currently allocated page.Type: GrantFiled: March 29, 2023Date of Patent: March 25, 2025Assignee: Dell Products L.P.Inventors: Nicholas Von Hein, Michael Ferrari, Kevin Tobin, Gu Huang, Akshay Srivastava
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Patent number: 12260111Abstract: A system including sensors of an advanced driver assistance system and a data recorder. The data recorder has: a volatile memory; a non-volatile memory configured with a file system region and a buffer region; and a processor configured to implement a file system mounted in the file system region. The data recorder records outputs from the sensors via the volatile memory into the buffer region in a cyclic way and, in response to an event, retrieve sensor data from the buffer region and store the sensor data into files organized under the file system mounted in the file system region.Type: GrantFiled: March 31, 2021Date of Patent: March 25, 2025Assignee: Micron Technology, Inc.Inventor: Gil Golov
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Patent number: 12260110Abstract: Disclosed is a system comprising a memory device and a processing device, operatively coupled with the memory device, to perform operations including identifying a group of memory cells corresponding to a first range of logical block addresses (LBAs). The operations performed by the processing device further include receiving a memory access command with respect to the group of memory cells. The operations performed by the processing device further include responsive to determining that a data structure associated with the group of memory cells references a second range of LBAs, blocking the memory access command; responsive to determining that the first range of LBAs does not include each LBA of the second range of LBAs, performing, on the group of memory cells, a trim operation; and responsive to determining that the data structure indicates the completion of the trim operation, performing a memory access operation specified by the memory access command.Type: GrantFiled: December 5, 2023Date of Patent: March 25, 2025Assignee: Micron Technology, Inc.Inventors: Yueh-Hung Chen, Fangfang Zhu, Horia Simionescu, Chih-Kuo Kao, Jiangli Zhu
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Patent number: 12248433Abstract: A method for use in a storage system, comprising: identifying snapshot storage space consumption information that corresponds to a snapshot storage space; identifying a snapshot management metric that is associated with the snapshot storage space, the snapshot management metric being identified based on the snapshot storage space consumption information; and outputting an indication of the snapshot management metric for presentation to a user.Type: GrantFiled: November 17, 2023Date of Patent: March 11, 2025Assignee: Dell Products L.P.Inventors: Mahadev Agasar, Hemanth Dasan
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Patent number: 12248680Abstract: Systems and methods for implementing maintenance operations on storage devices in place of drive-based maintenance operations are disclosed. According to an aspect, a system includes a storage controller configured to receive a plurality of media scan configurations for maintenance from a plurality of storage devices. The data maintenance algorithms implemented across storage device and storage controller is also configured to tune and/or disable drive-based maintenance routines on one or more of the plurality of storage devices. Further, the BMC and/or storage controller is configured to perform controller-based maintenance operations in replacement of the drive-based maintenance routines of the one or more of the plurality of storage devices based on the received plurality of media scan configurations.Type: GrantFiled: June 30, 2022Date of Patent: March 11, 2025Assignee: Lenovo Global Technology (United States) Inc.Inventors: David Cosby, Wilson Velez, Patrick Caporale, Zezhi Hu
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Patent number: 12250293Abstract: An example system includes a processor to partition an arithmetic circuit representing a homomorphically encrypted (HE) code into a number of execution blocks. The processor can generate, for each of the number of execution blocks, manifests describing access patterns for a number of different machine environments. The processor can then dynamically execute the HE code by selecting successive blocks to execute based on an access pattern calculated for the execution block corresponding to a detected current machine environment.Type: GrantFiled: September 28, 2022Date of Patent: March 11, 2025Assignee: International Business Machines CorporationInventors: Nir Drucker, Hayim Shaul
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Patent number: 12242409Abstract: Systems and methods of communicating use device level throttling. Some embodiments relate to a method of communicating in a network. The systems and methods can provide a first communication associated with a device for issuance, issue the first communication if a queue depth value for the device is less than an issued communication value, and listing the first communication on a pend list for the device if a queue depth value for the device is less than the issued communication value.Type: GrantFiled: October 18, 2022Date of Patent: March 4, 2025Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITEDInventor: Arun Prakash Jana
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Patent number: 12242354Abstract: A data center for data backup and replication, including a pool of multiple storage units for storing a journal of I/O write commands issued at respective times, wherein the journal spans a history window of a pre-specified time length, and a journal manager for dynamically allocating more storage units for storing the journal as the journal size increases, and for dynamically releasing storage units as the journal size decreases.Type: GrantFiled: October 2, 2023Date of Patent: March 4, 2025Assignee: Hewlett Packard Enterprise Development LPInventors: Tomer Ben-Or, Gil Barash, Chen Burshan, Yair Manor
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Patent number: 12242389Abstract: An application-level memory control group of a first application may be created when the first application is opened. An anonymous page of the first application is added to a least recently used linked list of the application-level memory control group, and a file page of the first application is added to a global least recently used linked list. An application-level memory control group is created in a dimension of an application, and an anonymous page of the application is managed in a refined manner. In addition, a file page of the application-level memory control group may be managed based on a global least recently used linked list.Type: GrantFiled: October 26, 2021Date of Patent: March 4, 2025Assignee: HUAWEI DEVICE CO., LTD.Inventors: Wei Han, Chang Xie, Qinxu Pan, Jian Chen, Qiang Gao, Song Liu, Jinxuan Fang, Yuanfeng Hu, Xiangbing Tang, Weilai Zhou, Cai Sun, Zuoyu Wu, Qing Xia, Wei Du, Biao He, Fa Wang, Chengke Wang, Ziyue Luo, Zongfeng Li, Xu Wang, Xiyu Zhou, Yu Liu, Tao Li, Long Jin, Di Fang
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Patent number: 12242757Abstract: A method, computer program product, and computing system for receiving a first set of input/output (IO) requests for one or more storage objects. One or more IO properties may be extracted from the first set of IO requests. Metadata may be associated with the one or more storage objects using one or more machine learning models based upon, at least in part, the one or more IO properties extracted from the first set of IO requests, thus defining storage object metadata. One or more IO processing rules may be enabled based upon, at least in part, the storage object metadata. A subsequent set of IO requests may be received. Processing of the subsequent set of IO requests on the one or more storage objects may be optimized based upon, at least in part, the storage object metadata and the one or more IO processing rules associated with the one or more storage objects.Type: GrantFiled: July 23, 2021Date of Patent: March 4, 2025Assignee: EMC IP Holding Company, LLCInventors: Shaul Dar, Ranjith Reddy Basireddy, Rajesh Alevoor Kini
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Patent number: 12236140Abstract: A storage system includes a storage device, a processor, and a storage unit. The processor provides a volume configured on the storage device to a mainframe server. The processor manages data handled by an open-architecture server, using a first slot having a first slot length as a unit, in the volume, and manages data handled by the mainframe server, using a second slot having a second slot length shorter than the first slot length as a unit, the first slot storing therein a predetermined number of the second slots, in the volume. The processor performs a process using one of the first slot and the second slot as a unit, depending on the type of the process.Type: GrantFiled: September 14, 2023Date of Patent: February 25, 2025Assignee: HITACHI VANTARA, LTD.Inventors: Tsuyoshi Nishino, Tomohiro Yoshizawa, Masahiro Ide
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Patent number: 12235743Abstract: A storage system with storage drives and a processing device establishes resiliency groups of storage system resources. The storage system determines an explicit trade-off between data survivability over resource failures and data capacity efficiency, for the resiliency groups. Responsive to adding at least one storage drive, the storage system establishes re-formed resiliency groups according to the explicit trade-off, without decreasing data survivability. The storage system may bias to have more and narrower resiliency groups to increase mean time to data loss.Type: GrantFiled: August 20, 2021Date of Patent: February 25, 2025Assignee: PURE STORAGE, INC.Inventors: Robert Lee, Hari Kannan
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Patent number: 12236270Abstract: An integrated circuit includes a plurality of control circuits and a resource controller. Each of the control circuits is configured to send a work request, execute a work procedure according to an authorization code corresponding to the work procedure, and generate a completion signal after the work procedure is completed. The resource controller includes a storage circuit stores a plurality of index values; a processor circuit updates, according to each of the completion signals, a status of the index value associated with the authorization code corresponding to the work procedure; and a conversion circuit configured to, in response to each of the work requests, output, when a status of at least one of the index values is resource-available, an authorization code associated with one index value whose status is resource-available.Type: GrantFiled: October 7, 2021Date of Patent: February 25, 2025Assignee: REALTEK SEMICONDUCTOR CORP.Inventor: Tsan-Lin Chen
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Patent number: 12235800Abstract: Apparatuses, systems, and methods for using defrag levels to reduce data loss are provided herein. In a number of embodiments of the present disclosure, a method can include setting a first defrag level for a memory device, determining if a buffer is full while performing defrag operations on the memory device according to the first defrag level, setting a second defrag level for the memory device in response to determining the buffer is full while performing defrag operations according to the first defrag level.Type: GrantFiled: November 2, 2022Date of Patent: February 25, 2025Assignee: Micron Technology, Inc.Inventors: Minjian Wu, Hui Wang
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Patent number: 12235875Abstract: Described herein are techniques for improving transfer of metadata from a metadata database to a database stored in a data system, such as a data warehouse. The metadata may be written into the metadata database with a version stamp, which is monotonic increasing register value, and a partition identifier, which can be generated using attribute values of the metadata. A plurality of readers can scan the metadata database based on version stamp and partition identifier values to export the metadata to a cloud storage location. From the cloud storage location, the exported data can be auto ingested into the database, which includes a journal and snapshot table.Type: GrantFiled: August 28, 2023Date of Patent: February 25, 2025Assignee: Snowflake Inc.Inventors: Dhiraj Gupta, Subramanian Muralidhar
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Patent number: 12235900Abstract: A computer-implemented data structure for a singly linked list for data exchange between a write process and at least one read process. The data structure includes a first pointer data structure and a second pointer data structure, wherein the first pointer data structure points to the oldest element in the list, and the second pointer data structure points to the next writable element in the list. The data structure also includes a third pointer data structure, a fourth pointer data structure, and a fifth pointer data structure, wherein the third pointer data structure has a corresponding first counter, the fourth pointer data structure has a corresponding second counter, and the fifth pointer data structure has a corresponding counter.Type: GrantFiled: November 17, 2023Date of Patent: February 25, 2025Assignee: ROBERT BOSCH GMBHInventors: Richard Fabian, Tilman Sinning
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Patent number: 12229423Abstract: A data storage device processes a mixed workload including a plurality of superblocks to be written to and read from a plurality of memory dies, where each of the plurality of superblocks to be apportioned among the plurality of memory dies. The data storage device writes a first data stripe associated with a first superblock to the plurality of memory dies according to a sequential write pattern, and reads the first data stripe associated with the first superblock from the plurality of memory dies according to a sequential read pattern. The sequential write pattern causes the controller to write to the plurality of memory dies in a first order of memory dies. The sequential read pattern causes the controller to read from the plurality of memory dies in a second order of memory dies different from the first order of memory dies, thereby reducing read collisions.Type: GrantFiled: July 6, 2023Date of Patent: February 18, 2025Assignee: Sandisk Technologies, Inc.Inventors: Neil Hutchison, Haining Liu, Jerry Lo, Sergey Anatolievich Gorobets
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Patent number: 12229139Abstract: The technologies described herein are generally directed toward retrieving data from streaming storage. In an embodiment, a method can include receiving an application data request that identifies application data to be retrieved from a sequence of stored data chunks that correspond to a stored stream of data. The method can further include, based on the application data request, estimating a first estimated location of the application data, with the first estimated location including an identified chunk of a sequence of chunks. Further, the method can include, based on the application data request and a characteristic of the identified chunk, retrieving, by the system, a first data block that is estimated to comprise the application data, resulting in a first retrieved data block.Type: GrantFiled: June 30, 2023Date of Patent: February 18, 2025Assignee: Dell Products, L.P.Inventors: Yurun Wu, Jiang Cao, Lu Lei, Willa Lang Yuan, Jian Gong, Lemonie Mengchi Li, Xiaoxiao Mao, Shu Jiang, Kalyan Gunda, Ao Sun
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Patent number: 12231508Abstract: Persistent storage may contain a list of discovery commands, the discovery commands respectively associated with lists of network addresses. A discovery validation application, when executed by one or more processors, may be configured to: read, from the persistent storage, the list of discovery commands and the lists of network addresses; for each discovery command in the list of discovery commands, transmit, by way of one or more proxy servers deployed external to the system, the discovery command to each network address in the respectively associated list of network addresses; receive, by way of the one or more proxy servers, discovery results respectively corresponding to each of the discovery commands that were transmitted, wherein the discovery results either indicate success or failure of the discovery commands; and write, to the persistent storage, the discovery results.Type: GrantFiled: July 12, 2022Date of Patent: February 18, 2025Assignee: ServiceNow, Inc.Inventors: Abhishek Kumar, Tal Ben Ari, Renan Coelho Silva, Sreenevas Subramaniam, Manish Satish Vimla Kumar
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Patent number: 12231524Abstract: The present disclosure relates to a communication scheme and system for combining an IoT technology with a 5G communication system for supporting a higher data transfer rate beyond a 4G system. The present disclosure may be applied to intelligent services (e.g. smart home, smart building, smart city, smart car or connected car, health care, digital education, retail, and security and safety services) on the basis of a 5G communication technology and an IoT-related technology. The present disclosure provides a method and an apparatus for supporting compression and decompression of an Ethernet header.Type: GrantFiled: October 11, 2019Date of Patent: February 18, 2025Assignee: Samsung Electronics Co., Ltd.Inventors: Donggun Kim, Soenghun Kim, Anil Agiwal, Sangkyu Baek, Jaehyuk Jang
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Patent number: 12222863Abstract: An apparatus in an illustrative embodiment comprises at least one processing device, with the processing device being configured to receive in a storage system from a host device an indication of a data size utilized in a multi-path layer of the host device to select paths for delivery of input-output operations to different storage controllers of the storage system, to determine in the storage system a prefetch data size based at least in part on the data size indication received from the host device, and responsive to detection in the storage system of sequential data reads in input-output operations received from the host device, to prefetch from one or more backend storage devices of the storage system, into a memory associated with a particular one of the storage controllers of the storage system, an amount of data that is determined based at least in part on the prefetch data size.Type: GrantFiled: December 28, 2023Date of Patent: February 11, 2025Assignee: Dell Products L.P.Inventors: Ramesh Doddaiah, Arieh Don, Sanjib Mallick, Vinay G. Rao
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Patent number: 12217802Abstract: A non-volatile memory device includes a meta area having a first region storing first initial data, and second regions storing second initial data, different from each other; a user area configured to store user data; an initialization register configured to store the first initial data or update the second initial data in whole or in part; and control logic configured to perform a read operation, a program operation, or an erase operation using the initial data stored in the initialization register.Type: GrantFiled: January 19, 2022Date of Patent: February 4, 2025Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jooyong Park, Sangwon Park, Dongjin Shin, Suchang Jeon, Seungyong Choi
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Patent number: 12217051Abstract: A Universal Serial Bus (USB) device configured to build a program, in a host machine, on an alternative CPU architecture. The USB device comprises a USB interface adapted to be communicatively coupled to the host machine. The USB device further comprises a memory module configured to store a package to build on, in the host machine, the alternative CPU architecture. The USB device further comprises a System-on-a-Chip (SoC) configured to access the stored package from the memory module. The SoC is further configured to, when a connection between the USB interface and the host machine is established, automatically run the stored package in the host machine.Type: GrantFiled: December 22, 2022Date of Patent: February 4, 2025Assignee: Red Hat, Inc.Inventors: Ian McLeod, Eric Curtin, Pierre-Yves Chibon
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Patent number: 12216615Abstract: An illustrative distributed storage system detects a request to resize an online volume that provides persistent storage for a containerized application running in a container system, wherein the online volume is backed by a virtual block device created in device namespace using a device mapper virtualization of data blocks of one or more storage devices. The distributed storage system performs, in response to the request, a resize process to resize the online volume. The resizing of the online volume includes resizing the virtual block device. In some examples, a file system implemented on the virtual block device is also resized while the online volume is online. The storage system may manage inflight IOs over the virtual block device and the online volume such that the resize process is performed without error.Type: GrantFiled: November 17, 2022Date of Patent: February 4, 2025Assignee: Pure Storage, Inc.Inventors: Prabir Paul, Lakshmi Narasimhan Sundararajan, Nikhil Subhash Bhupale, Vinod Jayaraman, Goutham Rao
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Patent number: 12216932Abstract: A processor includes a memory subunit that includes a status register and an execution engine unit to: randomly select a load operation to monitor; determine a re-order buffer identifier of the load operation; and transmit the re-order buffer identifier to the memory subsystem. Responsive to receipt of the re-order buffer identifier, the first memory subunit is to store a piece of information, related to a status of the load operation, in the status register. The processor also includes logic to, responsive to detection of retirement of the load operation, store memory information in memory-related fields of a record of a memory buffer. The memory information includes auxiliary information (AUX) and access latency information, wherein one of the auxiliary information or the access latency information includes the piece of information, from the status register, stored in a particular field of the memory-related fields.Type: GrantFiled: June 1, 2023Date of Patent: February 4, 2025Assignee: Intel CorporationInventors: Ahmad Yasin, Michael Chynoweth, Rajshree Chabukswar, Muhammad Taher
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Patent number: 12216911Abstract: A redundant array of independent disks (raid) array can include one or more virtual disks representing a raid configuration of the raid array. Each of the one or more virtual disks includes a number of physical extents (PEs), where a first PE and a second PE of the PEs have a same size. The first PE is located at a first storage disk of a first storage node of a cluster and the second PE is located at a second storage disk of a second storage node of the cluster.Type: GrantFiled: May 7, 2021Date of Patent: February 4, 2025Assignee: EMC IP HOLDING COMPANY LLCInventors: Paul Nehse, Michael Thiels, Devendra Kulkarni
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Patent number: 12216788Abstract: Systems and methods for the meta-estimation of data structures representing identifiers are disclosed. The system maintain one or more data records comprising one or more identifiers and one or more attributes. Using the data records, the system can generate a first data structure, such as a probabilistic data structure, that represents the plurality of data records. The first data structure can have a plurality of registers. The system can identify a subset of the plurality of registers that are equal to a predetermined value, and generate a second data structure that represents the subset of the plurality of registers. The system can then store the second data structure as a meta-estimation of the first, and can utilize the second data structure in further processing operations.Type: GrantFiled: October 5, 2021Date of Patent: February 4, 2025Assignee: GOOGLE LLCInventors: Preston Wooju Lee, Craig William Wright, Joseph Sean Cahill Goodknight Knightbrook, Evgeny Skvortsov
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Patent number: 12216910Abstract: A resilient software Redundant Array of Independent Disk (RAID)/management communication system includes a chassis housing a software RAID subsystem coupled to a plurality of storage devices that are also coupled to a management subsystem. The software RAID subsystem designates a first storage device in the plurality of storage devices as a primary storage device and a second storage device in the plurality of storage devices as a secondary storage device, and uses the respective storage device memory subsystem in the first storage device to transmit first management communications with the management subsystem. If the software RAID subsystem determines that the first storage device is unavailable, it uses the respective storage device memory subsystem in the second storage device to transmit second management communications with the management subsystem.Type: GrantFiled: July 31, 2023Date of Patent: February 4, 2025Assignee: Dell Products L.P.Inventors: Nikhith Ganigarakoppal Kantharaju, Sumalatha Pagadala, Sushmitha Naik, Dharma Bhushan Ramaiah, Vineeth Radhakrishnan, Shinose Abdul Rahiman, Rama Rao Bisa
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Patent number: 12216904Abstract: The present disclosure relates to utilizing a buffer management system to efficiently manage and deallocate memory buffers utilized by multiple processing roles on computer hardware devices. For example, the buffer management system utilizes distributed decentralized memory buffer monitoring in connection with augmented buffer pointers to deallocate memory buffers accurately and efficiently. In this manner, the buffer management system provides an efficient approach for multiple processing roles to consume source data stored in a memory buffer and to deallocate the buffer only after all roles have finished using it.Type: GrantFiled: March 8, 2024Date of Patent: February 4, 2025Assignee: Microsoft Technology Licensing, LLCInventors: Yi Yuan, Narayanan Ravichandran, Robert Groza, Jr., Yevgeny Yankilevich, Hari Daas Angepat
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Patent number: 12216929Abstract: A storage system includes multiple storage nodes. Each storage node includes a first storage device of a first type and a second storage device of a second type, and a performance level of the first storage device is higher than the second storage device. The globe cache includes a first tier comprising the first storage device in each storage node, and a second tier comprising the second storage device in each storage node. The first tier is for storing data with a high access frequency, and the second tier is for storing data with a low access frequency. The management node monitors an access frequency of target data stored in the first tier. When the access frequency of the target data is lower than a threshold, the management node instructs the first storage node to migrate the target data from the first tier to the second tier.Type: GrantFiled: December 3, 2023Date of Patent: February 4, 2025Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Wenlin Cui, Keji Huang, Peng Zhang, Siwei Luo
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Patent number: 12216576Abstract: An apparatus comprises a memory having a data cache stored therein and a control circuit operably coupled thereto. The control circuit is configured to update that data cache in accordance with a scheduled update time. In the latter regards, by one approach, the control circuit computes selected entries for the data cache prior to the scheduled update time pursuant to a prioritization scheme to provide a substitute data cache. At the scheduled update time, the control circuit switches the substitute data cache for the data cache such that data queries made subsequent to the scheduled update time access the substitute data cache and not the data cache.Type: GrantFiled: August 3, 2022Date of Patent: February 4, 2025Assignee: Walmart Apollo, LLCInventors: Raikirat Sohi, Mayur Saxena, Sandeep Singh
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Patent number: 12210875Abstract: A first set of instructions, which is provided access to a first address space, is scheduled for execution at a first hardware thread of a processor. Prior to executing an instruction of a second set of instructions, which accesses a second address space, at the first hardware thread, a determination is made that the second address space is accessible from a second hardware thread of the processor.Type: GrantFiled: August 28, 2023Date of Patent: January 28, 2025Assignee: Amazon Technologies, Inc.Inventors: Amit Shah, Jan Hendrik Schoenherr, Karimallah Ahmed Mohammed Raslan, Marius Hillenbrand, Filippo Sironi
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Patent number: 12210986Abstract: Occupancy data over time is received for each of several spaces within a building from occupancy sensors that are disposed within each of the spaces. An occupancy value is determined for each of at least some of the several spaces based on the received occupancy data, each occupancy value representative of a percent of time that the respective space was occupied over an identified period of time. The space that had a highest occupancy value over the identified period of time is identified. A utilization value is determined for each of the spaces, wherein the utilization value is representative of a ratio of the occupancy value of the respective space and the highest occupancy value. An operation of the building is changed based at least in part on the utilization value of at least one of the plurality of spaces.Type: GrantFiled: March 17, 2023Date of Patent: January 28, 2025Assignee: Honeywell International Inc.Inventors: Petr Endel, Ondrej Holub, Karel Marik
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Patent number: 12210446Abstract: An embodiment of an integrated circuit may comprise circuitry communicatively coupled to two or more sub-non-uniform memory access clusters (SNCs) to allocate a specified memory space in the two or more SNCs in accordance with a SNC memory allocation policy indicated from a request to initialize the specified memory space. An embodiment of an apparatus may comprise decode circuitry to decode a single instruction, the single instruction to include a field for an opcode, and execution circuitry to execute the decoded instruction according to the opcode to provide an indicated SNC memory allocation policy (e.g., a SNC policy hint). Other embodiments are disclosed and claimed.Type: GrantFiled: June 21, 2021Date of Patent: January 28, 2025Assignee: Intel CorporationInventors: Zhe Wang, Lingxiang Xiang, Christopher J. Hughes
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Patent number: 12204446Abstract: A buffer/interface device of a memory node reads a block of data (e.g., page). As each unit of data (e.g., cache line sized) of the block is read, it is compared against one or more predefined patterns (e.g., all 0's, all 1's, etc.). If the block (page) is only storing one of the predefined patterns, a flag in the page table entry for the block is set to indicate the block is only storing one of the predefined patterns. The physical memory the block was occupying may then be deallocated so other data may be stored using those physical memory addresses.Type: GrantFiled: April 27, 2023Date of Patent: January 21, 2025Assignee: Rambus Inc.Inventors: Evan Lawrence Erickson, Christopher Haywood