Virtual Machine Memory Addressing Patents (Class 711/6)
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Patent number: 8869145Abstract: Method and system is provided to correlate a virtual hard disk file or a pass through disk to a storage drive that is presented to a user via a virtual machine. A data structure is generated that associates a virtual hard disk path or a pass through disk identifier with a unique identifier of a virtual storage controller and a location of the drive as maintained by an operating system of a computing system where the virtual machine is executed. The unique identifier and the location are then used to correlate a storage drive to a virtual hard disk path or a pass through disk.Type: GrantFiled: April 28, 2011Date of Patent: October 21, 2014Assignee: NetApp, Inc.Inventors: Anagha Barve, Mohandas Gopal, Vineeth Karinta
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Patent number: 8856436Abstract: According to one embodiment, a method for accessing host data records stored on a VTS system includes receiving a mount request to access at least one host data record on a VTS system, determining a number of host compressed data records per physical block on a sequential access storage medium, determining a PBID that corresponds to the requested at least one host data record, accessing a physical block on the sequential access storage medium corresponding to the PBID, and outputting the physical block without outputting an entire logical volume that the physical block is stored to. In another embodiment, a VTS system includes random access storage, sequential access storage, support for at least one virtual volume, a storage manager having logic for determining a PBID that corresponds to a SLBID, and logic for performing the above described method. Other methods are also described.Type: GrantFiled: May 30, 2012Date of Patent: October 7, 2014Assignee: International Business Machines CorporationInventor: Jonathan W. Peake
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Patent number: 8850146Abstract: A virtual machine may use a first one or more volumes in which one or more virtual disk image files are stored. The virtual machine may also use data stored in a second one or more volumes, where the virtual machine is configured to bypass a hypervisor to access the second one or more volumes. A time consistent backup of the virtual machine, including both the virtual disk image files of the first one or more volumes and the data of the second one or more volumes, may be created.Type: GrantFiled: July 27, 2012Date of Patent: September 30, 2014Assignee: Symantec CorporationInventor: Udayan Majumdar
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Patent number: 8850105Abstract: A method, to be executed by an application program according to an embodiment, for controlling a memory system provided with a nonvolatile memory includes: acquiring an unused memory area from an operating system installed in an information processing apparatus provided with the memory system; prohibiting the acquired unused memory area from being used by any application program other than the above application program; acquiring the address of the acquired unused memory area; and notifying the address of the acquired unused memory area to the memory system. In the method according to an embodiment for controlling a memory system, prohibition state put by the prohibiting is preserved until receiving a change instruction.Type: GrantFiled: March 14, 2012Date of Patent: September 30, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Toshikatsu Hida, Michiko Noguchi
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Publication number: 20140281117Abstract: Memory page de-duplication in a computer system that includes a plurality of virtual machine partitions managed by a hypervisor, where each virtual machine is assigned a different dedicated memory partition, may include: identifying, by the hypervisor, a plurality of identical memory pages in memory of one or more dedicated memory partitions; assigning, by the hypervisor, one of the identical memory pages as a master page; mapping, for each virtual machine having an identical memory page, each of the identical memory pages to the master page; and directing, by the hypervisor, reads of the memory page to the master page.Type: ApplicationFiled: March 14, 2013Publication date: September 18, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: David A. Hepkin, Stuart Z. Jacobs, Bruce Mealey, Naresh Nayar, Wade B. Ouren
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Publication number: 20140281118Abstract: Memory page de-duplication in a computer system that includes a plurality of virtual machine partitions managed by a hypervisor, where each virtual machine is assigned a different dedicated memory partition, may include: identifying, by the hypervisor, a plurality of identical memory pages in memory of one or more dedicated memory partitions; assigning, by the hypervisor, one of the identical memory pages as a master page; mapping, for each virtual machine having an identical memory page, each of the identical memory pages to the master page; and directing, by the hypervisor, reads of the memory page to the master page.Type: ApplicationFiled: March 15, 2013Publication date: September 18, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: David A. Hepkin, Stuart Z. Jacobs, Bruce Mealey, Naresh Nayar, Wade B. Ouren
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Patent number: 8838874Abstract: A method, an article of manufacture, and system for heapifying an object. The method includes: storing, in a working set, a first address of a certain object in a stack frame, copying the certain object into the heap area and holding a second address of the certain object in the heap area, following each stack frame to find a pointer pointing to the first address stored in the working set, converting the address that the pointer points to into the second address, proceeding to a next stack frame, where the address conversion includes storing an address of another object in the working set if the converted address is stored as a value of a field of the other object in the stack frame, and terminating the process in response to a lack of pointers found in the stack frame to point to the addresses stored in the working set.Type: GrantFiled: November 2, 2011Date of Patent: September 16, 2014Assignee: International Business Machines CorporationInventors: Hiroshi Horii, Kiyokuni Kawachiya
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Patent number: 8838913Abstract: A system and method for locating a memory page in a guest virtual machine are provided. An execution event is triggered, in response to a request to allocate a first memory page in a virtual machine. A processor sends an indication to a hypervisor that the first memory page has been allocated in the virtual machine, in response to the triggering of the execution event. Responsive to receiving the indication, a security virtual machine appropriates control, via the hypervisor, of the first memory page allocated in the virtual machine and inserts program code in the first memory page. The processor executes the program code. The security virtual machine relinquishes control of the first memory page allocated in the virtual machine, in response to determining the program code has completed execution.Type: GrantFiled: September 15, 2009Date of Patent: September 16, 2014Assignee: Symantec CorporationInventor: Matthew Conover
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Patent number: 8838902Abstract: Embodiments of the invention relate to optimizing the storage of data in a multi-cache level environment. In one aspect, data is classified into primary and secondary cache sections. Data is differentiated based on an inherent sharing characteristic of the data within a system comprising virtual machines. The data is then placed into the classified sections of the cache storage layer and/or persistent data, reflective of how the data is shared among virtual disk images access by virtual machines.Type: GrantFiled: October 15, 2012Date of Patent: September 16, 2014Assignee: International Business Machines CorporationInventors: Dean Hildebrand, Anna S. Povzner, Renu Tewari
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Publication number: 20140258586Abstract: A computer system and a method are provided that reduce the amount of time and computing resources that are required to perform a hardware table walk (HWTW) in the event that a translation lookaside buffer (TLB) miss occurs. If a TLB miss occurs when performing a stage 2 (S2) HWTW to find the PA at which a stage 1 (S1) page table is stored, the MMU uses the IPA to predict the corresponding PA, thereby avoiding the need to perform any of the S2 table lookups. This greatly reduces the number of lookups that need to be performed when performing these types of HWTW read transactions, which greatly reduces processing overhead and performance penalties associated with performing these types of transactions.Type: ApplicationFiled: March 5, 2013Publication date: September 11, 2014Applicant: QUALCOMM IncorporatedInventors: Thomas Zeng, Azzedine Touzni, Tzung Ren Tzeng, Phil J. Bostley
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Patent number: 8831993Abstract: Techniques for sharing virtual machine (VM) resources are provided. A relative location for a resource within a VM is created; the relative location dynamically resolves to a particular physical location when a principal requests access to the resource at runtime. The principal is located outside an environment associated with the VM. Authentication and access restrictions are dynamically enforced against the requests made by the principal before a connection is permitted between the principal and the resource (the resource located within the environment of the VM).Type: GrantFiled: March 19, 2010Date of Patent: September 9, 2014Assignee: Novell, Inc.Inventors: Lloyd Leon Burch, Prakash Umasankar Mukkara, Douglas Garry Earl
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Patent number: 8832351Abstract: In a computing system including a processor and virtualization software including a guest operating system (OS) that utilizes a guest domain access control register (DACR) containing domain access information and guest page tables including first level page tables (L1 page tables) and second level page tables (L2 page tables), which guest page tables contain: (a) domain identifiers used to obtain domain access information from the guest DACR and (b) access permission information, wherein the domain access information and the access permission information are combined to provide an effective guest access permission, in accordance with one embodiment, a method for providing shadow page tables and processor DACR settings that virtualize processor memory protection includes: the virtualization software providing a shadow page table wherein: (a) domain identifiers in the shadow page table are used to identify domain access information in the processor DACR that are mapped from the domain access information in theType: GrantFiled: December 13, 2010Date of Patent: September 9, 2014Assignee: VMware, Inc.Inventors: Harvey Tuch, Prashanth P. Bungale, Scott W. Devine, Lawrence S. Rogel
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Patent number: 8832352Abstract: A system and method for protecting secure data from virtual machine clones are disclosed. In accordance with one embodiment, a hypervisor transmits a message to a guest operating system hosted by a first virtual machine, where the message identifies a memory location for a secure datum. After the transmission of the message, when the hypervisor receives a direct-copy command to clone the first virtual machine, the hypervisor creates a second virtual machine via direct copy, where the second virtual machine is not provided access to the secure memory location during its creation.Type: GrantFiled: May 30, 2012Date of Patent: September 9, 2014Assignee: Red Hat Israel, Ltd.Inventors: Michael Tsirkin, Dor Laor
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Patent number: 8825936Abstract: Disclosed is a method of operating a data storage system. The method comprises generating first metadata describing storage of a volume of data in a first storage volume, storing the volume of data within a second storage volume, generating second metadata describing storage of the volume of data in the second storage volume, and processing the first metadata and the second metadata to increase sparseness of the volume of data stored in the second storage volume.Type: GrantFiled: November 16, 2009Date of Patent: September 2, 2014Assignee: Quantum CorporationInventors: Gregory L. Wade, J. Mitchell Haile
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Publication number: 20140244891Abstract: Systems and methods for providing dynamic topology information to virtual machines hosted by a multi-processor computer system supporting non-uniform memory access (NUMA). An example method may comprise assigning, by a hypervisor executing on a computer system, unique identifiers to a plurality of memory blocks residing on a plurality of physical nodes; determining that a memory block has been moved from a first physical node to a second physical node; determining memory access latency values to the second physical node by a plurality of virtual processors of the computer system; and updating, using a unique identifier of the memory block, a data structure storing memory access latency information, with the memory access latency values for the memory block.Type: ApplicationFiled: February 26, 2013Publication date: August 28, 2014Applicant: RED HAT ISRAEL, LTD.Inventors: Michael Tsirkin, Andrea Arcangeli
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Publication number: 20140237158Abstract: A mechanism is provided for managing the translation look-aside buffer (TLB) of an emulated computer, in which an extension to the TLB is provided so as to improve virtual address translation capacity for the emulated central processing unit (CPU).Type: ApplicationFiled: May 1, 2012Publication date: August 21, 2014Applicant: International Business Machines CorporationInventor: Matthew L. Evans
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Patent number: 8813071Abstract: Efficient and effective storage reclamation systems and methods are presented. In one embodiment, a storage reclamation method comprises: receiving an indication from a virtual machine that a reclamation opportunity for reclamation of a physical storage resource is available; and performing a reclamation process of the physical storage resource in accordance with the indication from the virtual machine that the reclamation opportunity is available, wherein the reclamation process is performed while the virtual machine is running. The indication can be received from a virtual communication protocol (e.g., can include an in-band communication protocol, out-of band communication protocol, a socket based communication protocol or a serial character device communication protocol).Type: GrantFiled: January 31, 2011Date of Patent: August 19, 2014Assignee: Symantec CorporationInventor: Venkata Ratnam Tatavarty
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Patent number: 8813076Abstract: Various systems, processes, and products may be used to update virtual machines. In particular implementations, a system, process, and product for updating virtual machines may include the ability to determine whether a change to a portion of an operating system for a virtual machine is available and identify a virtual machine using the operating system. The system, process, and product may also include the ability to determine when the virtual machine is modifiable and update the portion of the operating system for the virtual machine when it is modifiable.Type: GrantFiled: November 17, 2011Date of Patent: August 19, 2014Assignee: International Business Machines CorporationInventors: Ray W. Anderson, James A. Pafumi, Jacob J. Rosales, Vasu Vallabhaneni
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Patent number: 8812766Abstract: File mapping and converting for dynamic disk personalization for multiple platforms are provided. A volatile file operation is detected in a first platform. The file supported by the first platform. A determination is made that the file is sharable with a second platform. The volatile operation is performed on the file in the first platform and the modified file is converted to a second file supported by the second platform. The modified file and second file are stored in a personalized disk for a user. The personalized disk is used to modify base images for VMs of the user when the user accesses the first platform or second platform. The modified file is available within the first platform and the second file is available within the second platform.Type: GrantFiled: August 29, 2011Date of Patent: August 19, 2014Assignee: Novell, Inc.Inventors: Nathaniel Brent Kranendonk, Jason Allen Sabin, Lloyd Leon Burch, Jeremy Ray Brown, Kal A. Larsen, Michael John Jorgensen
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Patent number: 8806104Abstract: In one embodiment, a processor includes an access logic to determine whether an access request from a virtual machine is to a device access page associated with a device of the processor and if so, to re-map the access request to a virtual device page in a system memory associated with the VM, based at least in part on information stored in a control register of the processor. Other embodiments are described and claimed.Type: GrantFiled: September 25, 2012Date of Patent: August 12, 2014Assignee: Intel CorporationInventors: Vedvyas Shanbhogue, Stephan J. Robinson
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Patent number: 8806172Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.Type: GrantFiled: March 15, 2013Date of Patent: August 12, 2014Assignee: Intel CorporationInventors: Jason W. Brandt, Sanjoy K. Mondal, Richard A. Uhlig, Gilbert Neiger, Robert T. George
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Patent number: 8799620Abstract: Embodiments of the invention are generally directed to systems, methods, and apparatuses for linear to physical address translation with support for page attributes. In some embodiments, a system receives an instruction to translate a memory pointer to a physical memory address for a memory location. The system may return the physical memory address and one or more page attributes. Other embodiments are described and claimed.Type: GrantFiled: June 1, 2007Date of Patent: August 5, 2014Assignee: Intel CorporationInventors: Ohad Falik, Ben-Zion Friedman, Jack Doweck, Eliezer Weissmann, James B. Crossland
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Patent number: 8799554Abstract: In this disclosure, techniques are described for more efficiently sharing resources across multiple virtual machine instances. For example, techniques are disclosed for allowing additional virtual machine instances to be supported by a single computing system by more efficiently allocating memory to virtual machine instances by providing page swapping in a virtualized environment and/or predictive page swapping. In one embodiment, a virtual memory manager swaps pages predicatively in and/or out of a paging pool based on information from a central processing unit (“CPU”) scheduler. In one embodiment, the CPU scheduler provides scheduling information for virtual machine instances to the virtual memory manager, where the scheduling information allows the virtual memory manager to determine when a virtual machine is scheduled to become active or inactive. The virtual memory manager can then swap-in or swap-out memory pages.Type: GrantFiled: October 27, 2010Date of Patent: August 5, 2014Assignee: Amazon Technologies, Inc.Inventors: Pradeep Vincent, William Lewis
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Patent number: 8800008Abstract: Various hardware and software configurations are described herein which provide improved security and control over protected data. In some embodiments, a computer includes a main motherboard card coupled to all input/output devices connected to the computer, and a trusted operating system operates on the main motherboard which includes an access control module for controlling access to the protected data in accordance with rules. The trusted operating system stores the protected data in an unprotected form only on the memory devices on the main motherboard. The computer may also have a computer card coupled to the main motherboard via a PCI bus, on which is operating a guest operating system session for handling requests for data from software applications on the computer.Type: GrantFiled: June 1, 2007Date of Patent: August 5, 2014Assignee: Intellectual Ventures II LLCInventors: Daniel Joseph Sturtevant, Christopher Lalancette
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Patent number: 8799592Abstract: A computer system with a memory containing a first guest operating system, including a first portion of the memory and a second guest operating system, including a second portion of the memory. The memory further contains an address exchange module for exchanging memory address handles, a data mover for moving data between the first and second portions of the memory, and an emulated input output memory management unit for controlling the data mover. Instructions in the memory cause the processor to: register accessible memory with the emulated input output memory management unit, write address handles to the address exchange module, read the address handles from the address exchange module, and move the data into the second portion of the memory.Type: GrantFiled: April 10, 2012Date of Patent: August 5, 2014Assignee: International Business Machines CorporationInventors: Gerd Bayer, Marco Kraemer, Hoang-Nam Nguyen, Christoph Raisch, Stefan Usenbinz
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Patent number: 8793461Abstract: A storage system comprises a storage medium including a plurality of physical storage areas. The storage system controls a host computer to recognize a logical volume having a plurality of virtual storage areas, reads the data from the physical storage area assigned to the virtual storage area of the logical volume, determines whether or not the read data includes only the specific pattern data, and cancels the assignment of the physical storage area to the virtual storage area if the read data includes only the specific pattern data.Type: GrantFiled: November 21, 2008Date of Patent: July 29, 2014Assignee: Hitachi, Ltd.Inventors: Daisuke Orikasa, Yutaka Takata, Shintaro Inoue
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Patent number: 8793428Abstract: A system for identifying an exiting process and removing traces and shadow page table pages corresponding to the process' page table pages. An accessed minimum virtual address is maintained corresponding to an address space. In one embodiment, whenever a page table entry corresponding to the accessed minimum virtual address changes from present to not present, the process is determined to be exiting and removal of corresponding trace and shadow page table pages is begun. In a second embodiment, consecutive present to not-present PTE transitions are tracked for guest page tables on a per address space basis. When at least two guest page tables each has at least four consecutive present to not-present PTE transitions, a next present to not-present PTE transition event in the address space leads to the corresponding guest page table trace being dropped and the shadow page table page being removed.Type: GrantFiled: January 22, 2013Date of Patent: July 29, 2014Assignee: VMware, Inc.Inventors: Qasim Ali, Raviprasad Mummidi, Kiran Tati
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Patent number: 8793465Abstract: Method and system for correcting misalignment between a virtual storage device block and a storage device block is provided. To align the blocks, an alignment module adjusts a logical block address and updates virtual storage device information such that a virtual machine can use a virtual storage device with the aligned blocks.Type: GrantFiled: March 9, 2010Date of Patent: July 29, 2014Assignee: Netapp, Inc.Inventors: Eric P. Forgette, Jonathan H. Dascenzo
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Patent number: 8793427Abstract: Remote memory can be used for a number idle pages located on a virtual machine. A number of idle pages can be sent to the remote memory according to a placement policy, where the placement policy can include a number of weighting factors. A hypervisor on a computing device can record a local size and a remote page fault frequency of the number of virtual machines. The hypervisor can scan local memory to determine the number of idle pages and a number of idle virtual machines. The number of idle pages, including a page map and a remote address destination for each idle page, can be sent to the remote memory by the hypervisor. The number of virtual machines can be analyzed to determine a per-virtual machine local memory allocation.Type: GrantFiled: February 10, 2011Date of Patent: July 29, 2014Assignee: Hewlett-Packard Development Company, L.P.Inventors: Kevin T. Lim, Jichuan Chang, Jose Renato G. Santos, Yoshio Turner, Parthasarathy Ranganathan
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Patent number: 8788790Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.Type: GrantFiled: December 7, 2012Date of Patent: July 22, 2014Assignee: Intel CorporationInventors: Jason W Brandt, Sanjoy K Mondal, Richard A Uhlig, Gilbert Neiger, Robert T George
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Patent number: 8788763Abstract: An apparatus and system for protecting memory of a virtual guest includes initializing a virtual guest on a host computing system. The host computing system includes a virtual machine manager that manages operation of the virtual guest. The virtual guest includes a distinct operating environment executing in a virtual operation platform provided by the virtual machine manager. The method includes receiving an allocation of run-time memory for the virtual guest, the allocation of run-time memory comprising a portion of run-time memory of the host computing system. The method includes setting, by the virtual guest, at least a portion of the allocation of run-time memory to be inaccessible by the virtual machine manager.Type: GrantFiled: May 29, 2012Date of Patent: July 22, 2014Assignee: International Business Machines CorporationInventors: Christopher J. Arges, Nathan D. Fontenot, Ryan P. Grimm, Joel H. Schopp, Michael T. Strosaker
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Patent number: 8789042Abstract: A processor includes guest mode control registers supporting guest mode operating behavior defined by guest context specified in the guest mode control registers. Root mode control registers support root mode operating behavior defined by root context specified in the root mode control registers. The guest context and the root context are simultaneously active to support virtualization of hardware resources such that multiple operating systems supporting multiple applications are executed by the hardware resources.Type: GrantFiled: September 27, 2010Date of Patent: July 22, 2014Assignee: MIPS Technologies, Inc.Inventor: James Robert Howard Hakewill
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Patent number: 8788739Abstract: A system and method is illustrated for comparing a target memory address and a local memory size using a hypervisor module that resides upon a compute blade, the comparison based upon a unit of digital information for the target memory address and an additional unit of digital information for the local memory size. Additionally, the system and method utilizes swapping of a local virtual memory page with a remote virtual memory page using a swapping module that resides on the hypervisor module, the swapping based upon the comparing of the target memory address and the local memory size. Further, the system and method is implemented to transmit the local virtual memory page to a memory blade using a transmission module that resides upon the compute blade.Type: GrantFiled: June 29, 2009Date of Patent: July 22, 2014Assignee: Hewlett-Packard Development Company, L.P.Inventors: Jichuan Chang, Kevin Lim, Partha Ranganathan
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Publication number: 20140201421Abstract: Embodiments of systems, apparatuses, and methods for performing guest logical memory address to host physical memory address translation are described. In some embodiments, a system receives the guest logical memory address and determines an index page reference from the guest logical memory address. The system further retrieves a page index corresponding to the virtual machine. In addition, the system retrieves a first part of the host physical memory address from index page using the page index and a second part of the host physical memory address from the guest logical memory address. The system generates the host physical memory address from the first and second parts of the host physical memory address.Type: ApplicationFiled: December 22, 2011Publication date: July 17, 2014Inventor: Sebastian Schoenberg
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Patent number: 8782351Abstract: The method for protecting memory of a virtual guest includes initializing a virtual guest on a host computing system. The host computing system includes a virtual machine manager that manages operation of the virtual guest. The virtual guest includes a distinct operating environment executing in a virtual operation platform provided by the virtual machine manager. The method includes receiving an allocation of run-time memory for the virtual guest, the allocation of run-time memory comprising a portion of run-time memory of the host computing system. The method includes setting, by the virtual guest, at least a portion of the allocation of run-time memory to be inaccessible by the virtual machine manager.Type: GrantFiled: October 13, 2011Date of Patent: July 15, 2014Assignee: International Business Machines CorporationInventors: Christopher J. Arges, Nathan D. Fontenot, Ryan P. Grimm, Joel H. Schopp, Michael T. Strosaker
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Patent number: 8782322Abstract: A computer implemented method, data processing system, and computer program product for automated ranking of target server partitions based on current workload partition performance state. When a violation of a stack tier policy for the virtualized process collection in a source logical partition is detected, the stack tier comprising the virtualized process collection is examined to determine a scalability of the stack tier. A set of logical partitions are examined to identify target logical partitions for the migration event, wherein the target logical partitions are compatible for migrating the virtualized process collection based on the scalability of the stack tier. A performance state of the virtualized process collection is analyzed, and the target logical partitions for selection in the migration event are ranked based on the performance states of the virtualized process collection and the stack tier policy.Type: GrantFiled: June 21, 2007Date of Patent: July 15, 2014Assignee: International Business Machines CorporationInventors: John Richard Houlihan, Dilton Monroo McGowan, II
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Patent number: 8782323Abstract: A method for accessing data stored in a distributed storage system is provided. The method comprises determining whether a copy of first data is stored in a distributed cache system, where data in the distributed cache system is stored in free storage space of the distributed storage system; accessing the copy of the first data from the distributed cache system if the copy of the first data is stored in a first data storage medium at a first computing system in a network; and requesting a second computing system in the network to access the copy of the first data from the distributed cache system if the copy of the first data is stored in a second data storage medium at the second computing system. If the copy of the first data is not stored in the distributed cache system, the first data is accessed from the distributed storage system.Type: GrantFiled: October 30, 2009Date of Patent: July 15, 2014Assignee: International Business Machines CorporationInventors: Alex Glikson, Shay Goikhman, Benny Rochwerger
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Patent number: 8776054Abstract: Lack of freedom in the operation of terminals has been a problem. On the other hand, there has been concern that allowing freedom of operation would negatively impact systems. A virtual computer device is provided with a memory unit and a CPU. The CPU executes an access program, which has the CPU input from or output to the memory unit in accordance with a received input/output request, and a VM monitor which implements a virtual computer in the CPU. Under the control of the VM monitor, the CPU executes a VM program which sends a input/output request to the access program, and via the access program, has the CPU input from or output to the storage device.Type: GrantFiled: June 12, 2009Date of Patent: July 8, 2014Assignee: NEC CorporationInventor: Hideyuki Takahashi
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Patent number: 8775716Abstract: A computer-implemented method for defragmenting virtual machine prefetch data. The method may include obtaining prefetch information associated with prefetch data of a virtual machine. The method may also include defragmenting, based on the prefetch information, the prefetch data on physical storage. The prefetch information may include a starting location and length of the prefetch data on a virtual disk. The prefetch information may include a geometry specification of the virtual disk. Defragmenting on physical storage may include placing the prefetch data contiguously on physical storage, placing the prefetch data in a fast-access segment of physical storage, and/or ordering the prefetch data according to the order in which it is accessed at system or application startup.Type: GrantFiled: November 8, 2012Date of Patent: July 8, 2014Assignee: Symantec CorporationInventors: Randall R. Cook, Brian Hernacki, Sourabh Satish, William E. Sobel
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Patent number: 8775715Abstract: A system and method for protecting secure data from virtual machine clones are disclosed. In accordance with one embodiment, a hypervisor receives a message from a guest operating system hosted by a first virtual machine, where the message identifies a memory location (e.g., of main memory, of a storage device, etc.) for a secure datum. After the hypervisor receives a direct-copy command to clone the first virtual machine, the hypervisor creates a second virtual machine via direct copy, where the second virtual machine is not provided access to the secure memory location during its creation.Type: GrantFiled: May 30, 2012Date of Patent: July 8, 2014Assignee: Red Hat Israel, Ltd.Inventors: Michael Tsirkin, Dor Laor
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Publication number: 20140189195Abstract: Virtualization software can improve the effectiveness of a guest application running inside a virtual machine (VM) by providing information to the guest application indicative of a memory condition of the VM. The memory condition is indicative of an availability of memory resources to the guest application. When guest physical memory can be reserved by a balloon application running in the (VM), providing memory condition data indicative of the memory condition provides more accurate information regarding the availability of memory resources to the guest application than could be provided by the guest operating system of the VM.Type: ApplicationFiled: March 4, 2014Publication date: July 3, 2014Applicant: VMware, Inc.Inventors: Xiaoxin CHEN, Carl A. WALDSPURGER, Anil RAO
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Publication number: 20140189194Abstract: Methods and apparatus relating to low overhead paged memory runtime protection are described. In an embodiment, permission information for guest physical mapping are received prior to utilization of paged memory by an Operating System (OS) based on the guest physical mapping. The permission information is provided through an Extended Page Table (EPT). Other embodiments are also described.Type: ApplicationFiled: December 29, 2012Publication date: July 3, 2014Inventors: RAVI L. SAHITA, XIAONING LI, MANOHAR R. CASTELINO
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Patent number: 8769184Abstract: The prioritization of large memory page mapping is a function of the access bits in the L1 page table. In a first phase of operation, the number of set access bits in each of the L1 page tables is counted periodically and a current count value is calculated therefrom. During the first phase, no pages are mapped large even if identified as such. After the first phase, the current count value is used to prioritize among potential large memory pages to determine which pages to map large. The system continues to calculate the current count value even after the first phase ends. When using hardware assist, the access bits in the nested page tables are used and when using software MMU, the access bits in the shadow page tables are used for large page prioritization.Type: GrantFiled: January 29, 2013Date of Patent: July 1, 2014Assignee: VMware, Inc.Inventors: Qasim Ali, Ravisprasad Mummidi, Vivek Pandey, Kiran Tati
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Patent number: 8769183Abstract: A method for mirroring virtual machines from a primary host to a secondary host. The method includes tracking changes for each of a plurality of memory pages and processor states for one or more primary host virtual machines. Responsive to an occurrence of a checkpoint, the primary host virtual machines are stopped. A determination is made if each of the memory pages is frequently changed. In response to the memory page being frequently changed, the frequently changed memory page is marked as being writeable and copied to a buffer. In response to the memory page being infrequently changed, the infrequently changed memory page is marked as being read only. The one or more primary host virtual machines are resumed. A copy of the memory pages, the buffer and changes to the processor states are transmitted to the secondary host.Type: GrantFiled: September 15, 2012Date of Patent: July 1, 2014Assignee: International Business Machines CorporationInventors: Graham Hunter, James Mulcahy
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Patent number: 8769241Abstract: Systems and techniques relating to storage technologies are described. A described technique includes operating drives such as a solid state drive (SSD) and a disk drive, where the SSD and the disk drive are virtualized as a single logical drive having a logical address space, where the logical drive maps logical block addresses to the SSD and to the disk drive. The technique includes determining, based on a file to be written to the logical drive, a target logical address that corresponds to one of the SSD and the disk drive, and writing the file to the logical drive at the target logical address to effect storage on one of the SSD and the disk drive.Type: GrantFiled: November 19, 2010Date of Patent: July 1, 2014Assignee: Marvell World Trade Ltd.Inventors: Hsing-Yi Chiang, Xinhai Kang, Qun Zhao
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Publication number: 20140181360Abstract: An enhanced dynamic address translation facility product is created such that, in one embodiment, a virtual address to be translated and an initial origin address of a translation table of the hierarchy of translation tables are obtained. Dynamic address translation of the virtual address proceeds. In response to a translation interruption having occurred during dynamic address translation, bits are stored in a translation exception qualifier (TXQ) field to indicate that the exception was either a host DAT exception having occurred while running a host program or a host DAT exception having occurred while running a guest program. The TXQ is further capable of indicating that the exception was associated with a host virtual address derived from a guest page frame real address or a guest segment frame absolute address. The TXQ is further capable of indicating that a larger or smaller host frame size is preferred to back a guest frame.Type: ApplicationFiled: February 27, 2014Publication date: June 26, 2014Applicant: International Business Machines CorporationInventors: Dan F Greiner, Lisa C Heller, Damian L Osisek, Erwin Pfeffer
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Publication number: 20140181359Abstract: An information processing apparatus running multiple virtual machines includes a correspondence information storage section configured to store correspondence information between a virtual address and a physical address, the correspondence information being used by a second virtual machine when executing a procedure relevant to a first virtual machine; a correspondence information processing section configured to invalidate the correspondence information in response to an occurrence of a panic in the first virtual machine; and a preservation section configured to preserve content of a memory area allocated to the second virtual machine into a storage device.Type: ApplicationFiled: February 26, 2014Publication date: June 26, 2014Applicant: FUJITSU LIMITEDInventors: Xiaoyang ZHANG, Fumiaki YAMANA, Kenji GOTSUBO, Hiroyuki IZUI
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Patent number: 8762126Abstract: Analyzing simulated operation of a computer including loading user-defined dynamically linked analysis libraries that each include specifications of events to be traced for analysis, including: executing, in separate hardware threads, one trace buffer handler for each analysis library, and associating, with each trace buffer handler, one or more analysis functions; translating static binary instructions for the simulated computer into binary instructions for the executing computer, including: inserting, into the translation, implementing code for each specification of an event to be traced and inserting, into the translation for each static instruction, a memory address of a separate static instruction buffer; executing the translation, including executing the implementing code and generating, in a trace buffer, one or more trace records for each specified event; and processing the trace buffer, including calling analysis functions and associating by the analysis functions through the separate static instructType: GrantFiled: January 5, 2011Date of Patent: June 24, 2014Assignee: International Business Machines CorporationInventors: Patrick J. Bohrer, Ahmed Gheith, James L. Peterson
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Publication number: 20140173169Abstract: Embodiments of an invention for controlling access to groups of memory pages in a virtualized environment are disclosed. In one embodiment, a processor includes a virtualization unit and a memory management unit. The virtualization unit is to transfer control of the processor to a virtual machine. The memory management unit is to perform, in response to an attempt to execute on the virtual machine an instruction stored on a first page, a page walk through a paging structure to find a second page and to allow access to the second page without exiting the virtual machine based at least in part on a bit being set in a leaf level entry corresponding to the second page in the paging structure and a corresponding bit being set in each entry corresponding to the first page in each level of the paging structure.Type: ApplicationFiled: December 17, 2012Publication date: June 19, 2014Inventors: Baohong Liu, Ritu Sood, Kuo-Lang Tseng, Duke Tallam
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Patent number: 8751724Abstract: Embodiments of the present invention provide a method, system and computer program product for dynamic main memory reconfiguration in virtual memory management. In an embodiment of the invention, a method for dynamic main memory reconfiguration in virtual memory management can include receiving a memory access directive in a host computer, determining a low free space condition in a memory allocation to satisfy the memory access directive, augmenting the memory allocation with a mapping to additional memory in the host computer in lieu of page swapping in response to the low free space condition, and satisfying the memory access directive. Additionally, the method can include determining an excess free space condition in the memory allocation and removing from the memory allocation a selection of allocated memory in the host computer.Type: GrantFiled: September 20, 2011Date of Patent: June 10, 2014Assignee: International Business Machines CorporationInventor: Aravinda Prasad