For Range (epo) Patents (Class 711/E12.101)
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Patent number: 10701097Abstract: A non-transitory processor-readable medium stores code that represents instructions that, when executed at a processor, cause the processor to access an attack description; intercept a data set from an application via an application programming interface (API), where the intercepted data set is based on an attack data set and where the attack data set is used to test for a security vulnerability in the application; correlate, using a Hamming distance, the intercepted data set with the attack description using a correlation type identifier; and report the security vulnerability for the application in response to the intercepted data set based at least in part on a result of the correlation.Type: GrantFiled: December 20, 2011Date of Patent: June 30, 2020Assignee: MICRO FOCUS LLCInventors: Matias Madou, Brian V. Chess, Sean Patrick Fay
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Patent number: 10509750Abstract: Systems and methods for controlling multi-function general purpose input/output (GPIO) pins in a management controller stack, such as a baseboard management controller (BMC) stack. The system includes a management controller, which includes multiple pins. The management controller provides multiple functionalities, and each of the functionalities is related to at least one of the pins. In operation, the management controller provides a graphic user interface, which shows the functionalities, allowing the user to input an instruction to select one of the functionalities. Upon receiving the selected functionality, for each of the pins related to the selected functionality, the management controller sets a value of a corresponding register to indicate a functional status of the pin, such that the pins may provide the selected functionality based on the value of the corresponding registers.Type: GrantFiled: July 24, 2017Date of Patent: December 17, 2019Assignee: AMERICAN MEGATRENDS INTERNATIONAL, LLCInventors: Pavithra Sachidanandam, Rajeswari Ravichandran, Baskar Parthiban, Rajamanickam T, Senathipathy Thangavel, Arvind Bisht
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Patent number: 9984231Abstract: Various embodiments include methods implemented on a computing device for analyzing a program executing within a virtual environment on the computing device. The methods may include determining whether the program is attempting to detect whether it is being executed within the virtual environment, and analyzing the program within a protected mode of the computing device in response to determining that the program is attempting to detect whether it is being executed within the virtual environment.Type: GrantFiled: November 11, 2015Date of Patent: May 29, 2018Assignee: QUALCOMM IncorporatedInventors: Mastooreh Salajegheh, Rajarshi Gupta, Nayeem Islam
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Patent number: 9961102Abstract: Particular embodiments described herein provide for an electronic device that can be configured to receive a function call for a function, determine a current stack pointer value for the function call, and determine if the current stack pointer value is within a pre-defined range. The electronic device can include a stack pivoting logging module to log a plurality of function calls. The electronic device can also include a stack pivoting detection module to analyze the log of the plurality of function calls to determine, for each of the plurality of function calls, if the current stack pointer value is within a pre-defined range.Type: GrantFiled: September 24, 2014Date of Patent: May 1, 2018Assignee: McAfee, LLCInventors: Xiaoning Li, Lixin Lu, Lu Deng
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Patent number: 8452934Abstract: A method of controlling data access to non-volatile memory is disclosed. The method includes storing a data file in a non-volatile memory. The non-volatile memory includes a memory array including a plurality of address ranges one or more of which corresponding to a protected portion of the memory array and one or more of which corresponding to an unprotected portion of the memory array. The method also includes communicating to a host device an indication that a memory request with respect to the protected portion of the memory array is denied. The indication is communicated for instructing the host device to avoid a timeout when the memory request is denied.Type: GrantFiled: December 16, 2008Date of Patent: May 28, 2013Assignee: Sandisk Technologies Inc.Inventors: Fabrice Jogand-Coulomb, Robert Chang, Po Yuan, Mei Yan, Xian Jun Liu
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Patent number: 8209499Abstract: A method of read-set and write-set management distinguishes between shared and non-shared memory regions. A shared memory region, used by a transactional memory application, which may be shared by one or more concurrent transactions is identified. A non-shared memory region, used by the transactional memory application, which is not shared by the one or more concurrent transactions is identified. A subset of a read-set and a write-set that access the shared memory region is checked for conflicts with the one or more concurrent transactions at a first granularity. A subset of the read-set and the write-set that access the non-shared memory region is checked for conflicts with the one or more concurrent transactions at a second granularity. The first granularity is finer than the second granularity.Type: GrantFiled: January 15, 2010Date of Patent: June 26, 2012Assignee: Oracle America, Inc.Inventor: Yuan C. Chou
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Patent number: 8060707Abstract: A method, system and computer program product for minimizing read response time in a storage subsystem including a plurality of resources is provided. A middle logical block address (LBA) is calculated for a read request. A preferred resource of the plurality of resources is determined by calculating a minimum seek time based on a closest position to a last position of a head at each resource of the plurality of resources, estimated from the middle LBA. The read request is directed to at least one of the preferred resource or an alternative resource.Type: GrantFiled: May 22, 2008Date of Patent: November 15, 2011Assignee: International Business Machines CorporationInventors: Matthew John Fairhurst, Robert Akira Kubo, Justin Thomson Miller
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Patent number: 7707365Abstract: A memory address monitoring device for monitoring a memory includes an address determining module and an identification determining module. A first process has a first process identification and issues a request address to access the memory. The memory saves data of a second process between a beginning address and an ending address of the memory. The second process has a second process identification. In this device, the address determining module receives the request address and determines whether the request address is located between the beginning address and the ending address to generate an address determining result. The identification determining module receives the address determining result, the first process identification and the second process identification, and compares the first process identification with the second process identification to generate an identification determining result when the address determining result is true.Type: GrantFiled: January 12, 2006Date of Patent: April 27, 2010Assignee: Via Technologies, Inc.Inventors: Tingkun Yeh, Amanda Chou