Programmable Calculator With Power Saving Feature Patents (Class 713/321)
  • Patent number: 10303457
    Abstract: Techniques for initiating update operations are described. In implementations, updates are gathered for a computing device, and grouped based on whether the updates involve a device restart and/or shutdown operation to be installed. Thus, updates that involve a restart can be installed as a group, such as part of a single update and restart operation. In at least some implementations, an update and restart operation for installing updates can be scheduled. A user can be notified of the upcoming update and restart operation, such as via notifications presented in various ways on a computing device. When a scheduled time for an update and restart operation arrives for a device, a variety of factors can be considered in determining whether to initiate the operation. For instance, user presence information and device state information can be considered.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: May 28, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Gautam Thapar, Jimin Li, Shiaf Ramlan
  • Patent number: 10275377
    Abstract: The present disclosure describes apparatuses and techniques for dynamic boot image streaming. In some aspects a memory controller that is streaming multiple boot images from a first memory to a second memory is stalled, a descriptor for streaming one of the multiple boot images from the first memory to a non-contiguous memory location is generated while the memory controller is stalled, and the memory controller is resumed effective to cause the memory controller to stream, based on the descriptor generated while the memory controller is stalled, the second boot image to the non-contiguous memory location.
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: April 30, 2019
    Assignee: Marvell World Trade Ltd.
    Inventors: Vamsi Krishna Baratam, Tolga Nihat Aytek
  • Patent number: 10257785
    Abstract: Disclosed are: a communication technique combining, with IoT technology, a 5G communication system for supporting a data transmission rate higher than that of a 4G system, and subsequent systems; and a system therefor. The disclosed communication technique and system therefor can be applied to intelligent services (for example, services related to a smart home, a smart building, a smart city, a smart car or a connected car, health care, digital education, retail business, security, safety and the like) on the basis of 5G communication technology and IoT-related technology.
    Type: Grant
    Filed: November 25, 2015
    Date of Patent: April 9, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Rak-ie Kim, Kyoung-Soo Cho
  • Patent number: 10248181
    Abstract: In one embodiment, the present invention includes a processor having multiple domains including at least a core domain and a non-core domain that is transparent to an operating system (OS). The non-core domain can be controlled by a driver. In turn, the processor further includes a memory interconnect to interconnect the core domain and the non-core domain to a memory coupled to the processor. Still further, a power controller, which may be within the processor, can control a frequency of the memory interconnect based on memory boundedness of a workload being executed on the non-core domain. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 16, 2016
    Date of Patent: April 2, 2019
    Assignee: Intel Corporation
    Inventors: Avinash N. Ananthakrishnan, Inder M. Sodhi, Efraim Rotem, Doron Rajwan, Eliezer Weissmann, Ryan Wells
  • Patent number: 10193330
    Abstract: Disclosed examples provide control boards with power systems that include a safety system with a protection circuit to selectively connect or disconnect first and second DC to DC converters to or from a DC input signal according to the DC input signal and a monitor signal, and a monitor circuit to provide the monitor signal according to the first and second DC to DC converter output signals.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: January 29, 2019
    Assignee: Rockwell Automation Technologies, Inc.
    Inventors: William A. Bartz, Michael W. Wielebski, Mark F. Pieronek, Joseph D. Riley
  • Patent number: 10146733
    Abstract: A periodic control window is embedded in a link layer data stream to be sent over a serial data link, where the control window is configured to provide physical layer information including information for use in initiating state transitions on the data link. The link layer data can be sent during a link transmitting state of the data link and the control window can interrupt the sending of flits. In one aspect, the information includes link width transition data indicating an attempt to change the number of active lanes on the link.
    Type: Grant
    Filed: May 27, 2016
    Date of Patent: December 4, 2018
    Assignee: Intel Corporation
    Inventors: Venkatraman Iyer, Darren S. Jue, Robert G. Blankenship, Fulvio Spagna, Debendra Das Sharma, Jeffrey C. Swanson
  • Patent number: 10101788
    Abstract: In an embodiment, an integrated circuit includes multiple instances of a component (e.g. a processor) and a control circuit. The instances may be configured to operate in various modes. Some of the modes are incapable of presenting a worst-case load on the power supply. The control circuit may be configured to monitor the instances and detect the modes in which the instances are operating. Based on the monitoring, the control circuit may request to recover a portion of the voltage margin established for worst-case conditions in the instances. If the instances are to change modes, they may be configured to request mode change from the control circuit. If the mode change causes an increase in the current supply voltage magnitude (e.g. to restore some of the recovered voltage margin), the control circuit may cause the restore and permit it to complete prior to granting the mode change.
    Type: Grant
    Filed: February 15, 2017
    Date of Patent: October 16, 2018
    Assignee: Apple Inc.
    Inventors: John H. Mylius, Conrad H. Ziesler, Daniel C. Murray, Jong-Suk Lee, Rohit Kumar
  • Patent number: 10101797
    Abstract: Methods and apparatus relating to efficient and/or robust link power management of a UART (Universal Asynchronous Receiver/Transmitter) interface are described. In an embodiment, logic causes a link to enter into a low power consumption state in response to a message exchange over data lines of a UART (Universal Asynchronous Receiver/Transmitter) interface. The message exchange over the data lines of the UART interface is followed by a modification to one or more flow control signals coupled to the UART interface. Other embodiments are also disclosed.
    Type: Grant
    Filed: September 27, 2014
    Date of Patent: October 16, 2018
    Assignee: Intel Corporation
    Inventors: Amit Barak, David I. Poisner, Yuval Elad, Herbert Liondas
  • Patent number: 10078611
    Abstract: Aspects include computing devices and methods implemented by computing devices for smart of handling input/output interrupts associated with device setting levels. Various aspects may include receiving a hardware input/output interrupt from a hardware interface, updating an adjusted feature setting level, determining whether the adjusted feature setting level equals a feature setting level limit, and changing an interrupt service routine address stored at a first location of a hardware input/output register corresponding with an interrupt service routine associated with the hardware input/output interrupt to a first data in response to determining that the adjusted feature setting level of the computing device equals the adjusted feature setting level limit.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: September 18, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Surendra Paravada, Madhu Yashwanth Boenapalli, Venu Madhav Mokkapati
  • Patent number: 10067551
    Abstract: Technologies for analyzing power state transitions of a processor of computing device including determining, by the computing device, a power state entered by the processor of the computing device and a duration of the power state entered based on power state records, wherein the power state records comprise transition data indicative of transitions of a processor of the computing device between power states. The computing device further determines an accuracy of a power state selection of the processor of the computing device based on the determined power state entered and target residency data for the processor. The target residency data identifies, for each power state of a plurality of power states of the processor, an amount of time required in the corresponding power state to result in a conservation of power.
    Type: Grant
    Filed: July 19, 2016
    Date of Patent: September 4, 2018
    Assignee: Intel Corporation
    Inventors: Robert P. Knight, Gautam Upadhyaya, Min Yeol Lim, Neha Sharma
  • Patent number: 10055369
    Abstract: Systems, apparatuses, and methods for coalescing interrupts temporally for later processing are described. An interrupt controller in a computing system maintains a timer for tracking an amount of time remaining after receiving an interrupt before a processor is awakened to service the interrupt. For a received interrupt with a latency tolerance greater than a threshold, the interrupt controller compares a value currently stored in the timer and the latency tolerance selected based on class. The smaller value is retained in the timer. When the timer expires, the interrupt controller sends wakeup indications to one or more processors and indications of the waiting interrupts.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: August 21, 2018
    Assignee: Apple Inc.
    Inventors: Charles E. Tucker, Erik P. Machnicki, Fan Wu, John H. Kelm
  • Patent number: 10049624
    Abstract: Systems and methods for controlling the lighted display of a mobile device are disclosed. The backlight of or active power supplied to a display is reduced or deactivated after a certain period based on the application running on the mobile device, rather than being a uniform deactivation time. The system and method can be used on a variety of mobile devices having a display screen.
    Type: Grant
    Filed: May 9, 2016
    Date of Patent: August 14, 2018
    Assignee: Google LLC
    Inventors: Marco Nelissen, Mathias Marc Agopian
  • Patent number: 10007505
    Abstract: Techniques for initiating update operations are described. In implementations, updates are gathered for a computing device, and grouped based on whether the updates involve a device restart and/or shutdown operation to be installed. Thus, updates that involve a restart can be installed as a group, such as part of a single update and restart operation. In at least some implementations, an update and restart operation for installing updates can be scheduled. A user can be notified of the upcoming update and restart operation, such as via notifications presented in various ways on a computing device. When a scheduled time for an update and restart operation arrives for a device, a variety of factors can be considered in determining whether to initiate the operation. For instance, user presence information and device state information can be considered.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: June 26, 2018
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Gautam Thapar, Jimin Li, Shiaf Ramlan
  • Patent number: 9977529
    Abstract: A method and a user device for controlling a mode of a digitizer are provided. The method and the user device includes detecting an input unit by scanning the digitizer, measuring at least one parameter corresponding to the input unit, and controlling switching of the digitizer to a mode according to a result of the measurement of the at least one parameter.
    Type: Grant
    Filed: June 24, 2014
    Date of Patent: May 22, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joo-Hoon Lee, Sung-Ha Park, Jin-Hong Jeong
  • Patent number: 9958929
    Abstract: An information processing apparatus to which an external device is attachable includes an initialization unit configured to, when the information processing apparatus is activated from a power-off state, execute initialization of the external device, and not to, when the information processing apparatus is returned from a power-saving state, execute the initialization of the external device.
    Type: Grant
    Filed: January 15, 2016
    Date of Patent: May 1, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventor: Shinichi Kanematsu
  • Patent number: 9952895
    Abstract: A method is provided for handling interrupts in a processor, the interrupts including regular interrupts having a range of priorities and a pseudo non-maskable interrupt (PNMI) that is of a higher priority than any of the regular interrupts. The method includes the steps of obtaining an interrupt vector corresponding to a received interrupt, and if the received interrupt is a regular interrupt, enabling interrupts in the processor so that a PNMI can be received while handling the regular interrupt, executing a regular interrupt handler using the interrupt vector, and disabling interrupts in the processor. On the other hand, if the received interrupt is a PNMI, a PNMI interrupt handler is executed using the interrupt vector as an input thereto.
    Type: Grant
    Filed: October 7, 2015
    Date of Patent: April 24, 2018
    Assignee: VMware, Inc.
    Inventors: Andrei Warkentin, Irfan Ulla Khan, Cyprien Laplace, Harvey Tuch, Alexander Fainkichen
  • Patent number: 9952990
    Abstract: A method is provided for handling interrupts in a processor, the interrupts including regular interrupts having a range of priorities and a pseudo non-maskable interrupt (PNMI) that is of a higher priority than any of the regular interrupts. The method includes obtaining an interrupt vector corresponding to a received interrupt, and if the received interrupt is a PNMI, executing a PNMI interrupt handler. If the received interrupt is a regular interrupt, the method further comprises reading a mask flag that indicates whether regular interrupts are enabled in an interrupt controller and further: if the mask flag indicates that regular interrupts are enabled, enabling interrupts in the processor so that a PNMI can be received while handling the regular interrupt, executing, a regular interrupt handler, and disabling interrupts in the processor; and if the mask flag indicates that regular interrupts are disabled, saving the interrupt vector for subsequent handling.
    Type: Grant
    Filed: October 7, 2015
    Date of Patent: April 24, 2018
    Assignee: VMware, Inc.
    Inventors: Andrei Warkentin, Irfan Ulla Khan, Cyprien Laplace, Harvey Tuch, Alexander Fainkichen
  • Patent number: 9924059
    Abstract: An apparatus having a power-saving function includes first circuitry to control a transition of a power control state of the apparatus between a power-saving mode and a normal operating mode, and a communication interface to connect with an operating device to receive a user instruction from the operating device. The operating device includes second circuitry to control a transition of a power control state of the operating device between the power-saving mode and the normal operating mode. The first circuitry determines whether a combination of the power control state of the apparatus and the power control state of the operating device indicates occurrence of a trouble to the apparatus, and sends a notification to the operating device based on a determination.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: March 20, 2018
    Assignee: RICOH COMPANY, LTD.
    Inventor: Noriyuki Uehara
  • Patent number: 9904559
    Abstract: When an information processing apparatus is requested to transfer to a system interruption state, the information processing apparatus determines whether to compress data at each page, and generates a hibernation image configured of compressed data and non-compressed data. In an operating system activation period, the information processing apparatus determines whether to execute hibernation activation processing before initializing a memory management mechanism. In a case where the information processing apparatus executes the hibernation activation processing, the information processing apparatus reduces a size of the memory management region up to the size required for the initialization of the kernel, and reads the compressed data in parallel with initialization of hardware. After initializing the kernel, the information processing apparatus reads the non-compressed data in parallel with decompression of the compressed data.
    Type: Grant
    Filed: October 23, 2013
    Date of Patent: February 27, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventor: Kensuke Kato
  • Patent number: 9880894
    Abstract: Examples for an intelligent watchdog timer for a computing device are described herein. The watchdog timer operates a watchdog counter that repetitively counts a watchdog count interval from an initial value to a final value. The watchdog counter is continually reset if the device is functioning properly. If the watchdog timer is allowed to reach a final count value, a processor reset is initiated. Several components operate to detect the current mode of operation of the processor or an operating system, and predict, in part based on user context, when different power states may occur. The components also forecast when the watchdog timer is scheduled to reach the final count value. Based on the forecasts of when the watchdog timer will reach the final count value and the predictions of future power states of the processor or operating system, the watchdog counter is selectively disabled or reset.
    Type: Grant
    Filed: July 8, 2015
    Date of Patent: January 30, 2018
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Bin Wang, Robert Yu Zhu, Qipeng Wu, Dejun Zhang, Pengxiang Zhao, Ying N. Chin
  • Patent number: 9865233
    Abstract: Some embodiments describe techniques that relate to hybrid graphics display power management. In one embodiment, data corresponding to one or more image frames of a video stream are stored in a local frame buffer. A display device (e.g., an LCD) may then be driven based on the stored data in the local frame buffer or a video stream from a graphics controller. Other embodiments are also described.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: January 9, 2018
    Assignee: Intel Corporation
    Inventors: Seh W. Kwa, James P. Kardach
  • Patent number: 9857863
    Abstract: A display apparatus includes an image display unit that enables a user to visually recognize an image and transmits external scenery therethrough, a first battery, a second battery, a communication unit, and a control unit that switches a power source between the first battery and the second battery. The control unit causes an operation mode of the display apparatus to transition from a normal operation mode to a battery replacement mode in which power consumption of the image display unit and the communication unit is lower than that in the normal operation mode in a case where the power source is changed from the first battery to the second battery. The communication unit is maintained in a communicable state in the battery replacement mode.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: January 2, 2018
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Shinichi Kobayashi
  • Patent number: 9852602
    Abstract: Methods and a computing device are disclosed. A computing device may aggregate a number of inputs indicative of a presence or an absence of a human being within a proximity of the computing device. A source of at least one of the inputs may be a human presence sensor. A source of other inputs may provide an indication of the presence of a human being with corresponding estimated probabilities or corresponding estimated reliabilities which may provide an estimate of an accuracy of respective indications. In some embodiments, if any of the number of inputs indicate the presence of a human being, the computing device may determine that a human being is present. In other embodiments, if a corresponding estimated probability or reliability of an input is less than a predetermined value, then the input may be discarded when determining whether a human being is present.
    Type: Grant
    Filed: April 6, 2017
    Date of Patent: December 26, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Gavin Gear, Nikhil Subramanian, Kevin Paulson, Jason Scott, Milos Petrbok
  • Patent number: 9846560
    Abstract: An information processing apparatus capable of changing a state of power supply to respective parts of the apparatus with less user operation. When a sleep recovery button is depressed in a power saving mode, a button depression time is measured, and whether a length of the measure depression time exceeds a threshold value is determined. If the depression time exceeds the threshold value, a normal power mode is selected as power mode after transition. If the depression time does not exceed the threshold value, another power saving mode is selected as power mode after transition. According to the selected power mode, a state of power supply to respective parts of the apparatus is changed.
    Type: Grant
    Filed: May 29, 2014
    Date of Patent: December 19, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Kazuhiro Koga
  • Patent number: 9836734
    Abstract: Systems and methods are disclosed herein for providing an electronic receipt for a vending machine transaction. Upon conclusion of a vending machine transaction a screen on the vending machine displays an optically encoded electronic receipt. The optically encoded electronic receipt may encode a transaction identifier and may additionally encode details of the transaction. The vending machine may also transmit transaction data to a server. A user computing device may scan the optically encoded electronic receipt and retrieve a transaction identifier. Using the transaction identifier, the user computing device may request transaction data from the server either directly or by way of a server owned or controlled by a different entity. Additional content, such as advertisements may be transmitted with or for display with transaction data.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: December 5, 2017
    Assignee: WAL-MART STORES, INC.
    Inventors: Stuart Argue, Anthony Emile Marcar
  • Patent number: 9836110
    Abstract: A microcontroller-based electronic device and its operating methods are operable to learn a critical voltage value for a microprocessor control unit residing in the microcontroller-based electronic device. The microprocessor control unit receives power from a battery. An exemplary embodiment detects an operating voltage provided to the microprocessor control unit by a supplemental power reservoir after removal of the battery, stores information corresponding to a value of the operating voltage in a nonvolatile memory, repeats the detecting and the saving information as the operating voltage decays in response to a discharge of the supplemental power reservoir, and determines the actual minimum operating voltage for the microprocessor control unit based on a last one of the stored information corresponding to the value of the operating voltage. A learned critical voltage value is based upon the defined actual minimum operating voltage.
    Type: Grant
    Filed: February 25, 2010
    Date of Patent: December 5, 2017
    Assignee: EchoStar Technologies L.L.C.
    Inventor: Jeremy Mickelsen
  • Patent number: 9824716
    Abstract: A checking unit configured to check whether or not each of the plurality of storage devices is a speed-changeable storage device capable of processing data at a plurality of rotation speeds, and a control unit configured to set a storage device among the plurality of storage devices that is checked to be the speed-changeable storage device to a first state operating at a first rotation speed that is a first threshold or less in a case where a data access to the storage device does not occur are included, whereby effective power saving can be realized in a simple manner.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: November 21, 2017
    Assignee: FUJITSU LIMITED
    Inventor: Atsushi Igashira
  • Patent number: 9785875
    Abstract: Provided is an image forming apparatus that enables use in a state even in a case where failure happens in a first storage device. The first storage device has a plurality of partitions that store data for each various function in connection with image formation. A second storage device stores an application program for executing the various function in about image formation. The second storage device has the same partition as the partition of the first storage device. A control part performs mounting process for each partition of the first storage device at the time of a start process. Next, the control part reads the application program in the second storage device. Also, control part performs mounting process for the same partition of the second storage device as the failed partition when the mounting process either of partitions fails.
    Type: Grant
    Filed: July 16, 2015
    Date of Patent: October 10, 2017
    Assignee: KYOCERA Document Solutions Inc.
    Inventor: Kenichiro Nitta
  • Patent number: 9778729
    Abstract: An EEE function when an electricity saving function is enabled and a PHY communication rate setting method need to be taken into consideration. In relation to communication with an external apparatus by a communication unit, an information processing apparatus determines whether a power saving function of realizing power saving of the communication unit by stopping some of functions of the communication unit while establishing a link is enabled. In accordance with the result of the determination, a communication rate when the information processing apparatus operates in a power saving mode is decided.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: October 3, 2017
    Assignee: Canon Kabushiki Kaisha
    Inventor: Kazuaki Maruhashi
  • Patent number: 9762224
    Abstract: A timing prediction circuit and method which relate to the field of circuit technologies and may be used to predict a timing margin of a to-be-predicted digital circuit, which are used to resolve a problem that a large quantity of devices are used to predict a probability that a timing error occurs in a to-be-predicted digital circuit. The timing prediction circuit includes a combinational logic circuit, a delay circuit, a sampling circuit, and a control circuit, where the sampling circuit includes N samplers, and an input end of each sampler is separately connected to an output end of the combinational logic circuit using the delay circuit, and an output end of each sampler is connected to an input end of the control circuit, where N is an integer equal, and N?2. The present invention can be used to predict a timing margin of a to-be-predicted digital circuit.
    Type: Grant
    Filed: March 1, 2016
    Date of Patent: September 12, 2017
    Assignee: Huawei Technologies Co., Ltd.
    Inventor: Tao Huang
  • Patent number: 9753518
    Abstract: An electronic apparatus and a display control method are described. The electronic apparatus includes a first display unit having a first visible part for displaying a first image; a first detecting unit for detecting a first parameter for indicating a relative distance between a target object and the first visible part; and a processing unit for generating an image to be displayed and for controlling the display of the first display unit according to at least the first parameter. When the first display unit is in a first state, if the relative distance is less than or equal to a threshold distance according to the first parameter, the processing unit controls the first display unit to switch from the first status to a second state, and the power consumption of the first display unit in the first state is lower than a power consumption in the second status.
    Type: Grant
    Filed: December 29, 2014
    Date of Patent: September 5, 2017
    Assignee: LENOVO (BEIJING) CO., LTD.
    Inventors: Xiaoyu Zhou, Xiaoming Liu, Yiqiang Yan
  • Patent number: 9733690
    Abstract: According to an embodiment, a communication device includes a register and a controller. The register receives data from an external device via an input data line. In a first state in which the communication device is able to receive the data, when a condition in which the data is not sent to the input data line continues for a certain period of time, the controller controls to switch state of the communication device to a second state in which power consumption is less than in the first state.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: August 15, 2017
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Koichi Fujisaki, Tetsuro Kimura, Tatsunori Kanai, Junichi Segawa, Masaya Tarui, Satoshi Shirai, Hiroyoshi Haruki, Yusuke Shirota, Akihiro Shibata, Shiyo Yoshimura
  • Patent number: 9686881
    Abstract: A server includes a chassis having a base and a cover, a switch mounted on the chassis, and a motherboard. The motherboard includes a control circuit and a power-on pin. The control circuit includes a switch unit, and the switch unit includes a first buffer, a switch chip and a jumper. When the cover is detached from the base, the switch outputs a first signal to the first buffer, and the first buffer outputs the first signal to the switch chip. The switch chip outputs the first signal to the power-on pin, and the server is powered off. When the base is covered by the cover, the switch outputs a third signal to the first buffer and the first buffer outputs the third signal to the switch chip. The switch chip outputs the third signal to the power-on pin, and the server is powered on.
    Type: Grant
    Filed: June 10, 2015
    Date of Patent: June 20, 2017
    Assignees: HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Meng-Liang Yang
  • Patent number: 9665399
    Abstract: A power management system controlling power for a plurality of functional blocks included in a system-on-chip includes a plurality of programmable nano controllers, an instruction memory and a signal map memory. The instruction memory is shared by the nano controllers and stores a plurality of instructions that are used by the nano controllers. The signal map memory is shared by the nano controllers and stores a plurality of signals that are provided to the functional blocks and are controlled by the nano controllers. A first nano controller among the plurality of nano controllers is programmed as a central sequencer. Second through n-th nano controllers among the plurality of nano controllers are programmed as first sub-sequencers that are dependent on the first nano controller.
    Type: Grant
    Filed: May 13, 2015
    Date of Patent: May 30, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Ook Song, Jae-Gon Lee
  • Patent number: 9652967
    Abstract: Methods and a computing device are disclosed. A computing device may aggregate a number of inputs indicative of a presence or an absence of a human being within a proximity of the computing device. A source of at least one of the inputs may be a human presence sensor. A source of other inputs may provide an indication of the presence of a human being with corresponding estimated probabilities or corresponding estimated reliabilities which may provide an estimate of an accuracy of respective indications. In some embodiments, if any of the number of inputs indicate the presence of a human being, the computing device may determine that a human being is present. In other embodiments, if a corresponding estimated probability or reliability of an input is less than a predetermined value, then the input may be discarded when determining whether a human being is present.
    Type: Grant
    Filed: December 3, 2015
    Date of Patent: May 16, 2017
    Assignee: Microsoft Technology Licensing LLC.
    Inventors: Gavin Gear, Nikhil Subramanian, Kevin Paulson, Jason Scott, Milos Petrbok
  • Patent number: 9626136
    Abstract: An image forming apparatus comprising: a receiver for receiving a print job; a printing unit; a storage unit; an input interface for receiving a print execution command from a user; a power source for supplying an electric power; and a controller configured to: control the power source to stop or reduce the power supply to the printing unit when the receiver has not received a next print job within an after-printing standby time from completion of the printing; and control the power source to stop or reduce the power supply to the printing unit when the print job is a print-execution-command-input required print job requiring the print execution command and the receiver has not received a next print job within an after-print-job-receipt standby time from the receipt of the print-execution-command-input required print job, the after-print-job-receipt standby time being longer than the after-printing standby time.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: April 18, 2017
    Assignee: BROTHER KOGYO KABUSHIKI KAISHA
    Inventor: Taisuke Tsuchiya
  • Patent number: 9612646
    Abstract: A touch sensing display device supporting a pixel driving period and a touch driving period in each frame period. The device comprises a display panel having data lines and touch sensing lines, the data lines coupled to pixels of the display panel. A data driving circuit drives data signals onto the data lines during the pixel driving period of the frame period. A touch readout circuit generates touch data of signals of the touch sensing lines during the touch driving period of the frame period, the touch driving period distinct of the pixel driving period. A supply voltage of the data driving circuit can be cut off during the touch driving period, and a supply voltage of the touch readout circuit can be cut off during the pixel driving period.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: April 4, 2017
    Assignee: LG Display Co., Ltd.
    Inventors: Namkyun Cho, Keuksang Kwon
  • Patent number: 9606605
    Abstract: In an embodiment, an integrated circuit includes multiple instances of a component (e.g. a processor) and a control circuit. The instances may be configured to operate in various modes. Some of the modes are incapable of presenting a worst-case load on the power supply. The control circuit may be configured to monitor the instances and detect the modes in which the instances are operating. Based on the monitoring, the control circuit may request to recover a portion of the voltage margin established for worst-case conditions in the instances. If the instances are to change modes, they may be configured to request mode change from the control circuit. If the mode change causes an increase in the current supply voltage magnitude (e.g. to restore some of the recovered voltage margin), the control circuit may cause the restore and permit it to complete prior to granting the mode change.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: March 28, 2017
    Assignee: Apple Inc.
    Inventors: John H. Mylius, Conrad H. Ziesler, Daniel C. Murray, Jong-Suk Lee, Rohit Kumar
  • Patent number: 9582282
    Abstract: A data processing apparatus has prefetch circuitry for prefetching cache lines of instructions into an instruction cache. A prefetch lookup table is provided for storing prefetch entries, with each entry corresponding to a region of a memory address space and identifying at least one block of one or more cache lines within the corresponding region from which processing circuitry accessed an instruction on a previous occasion. When the processing circuitry executes an instruction from a new region, the prefetch circuitry looks up the table, and if it stores a prefetch entry for the new region, then the at least one block identified by the corresponding entry is prefetched into the cache.
    Type: Grant
    Filed: July 17, 2014
    Date of Patent: February 28, 2017
    Assignee: ARM Limited
    Inventors: Mitchell Bryan Hayenga, Christopher Daniel Emmons
  • Patent number: 9575535
    Abstract: An integrated circuit and an operation method thereof are provided. The integrated circuit includes a voltage detecting unit, a central processing unit, a memory unit and a control unit. The voltage detecting unit detects a system voltage and correspondingly outputs a voltage state signal. The central processing unit has at least one register. When the system voltage is downed to a voltage level lower than or equal to a brown-out voltage and greater than a reset low voltage, the control unit stores values of the registers into the memory unit.
    Type: Grant
    Filed: July 1, 2014
    Date of Patent: February 21, 2017
    Assignee: Nuvoton Technology Corporation
    Inventor: Cheng-Chih Wang
  • Patent number: 9568976
    Abstract: The semiconductor device has a touch panel controller, a processor and a display driver. The semiconductor device is arranged so as to reduce an electric power uselessly consumed while the action of the display driver is stopped or suspended and further, and an electric power uselessly consumed by the touch-detecting action for recovery of the display driver from the state of the action being stopped or suspended. The processor built in the semiconductor device together with the touch panel controller and the display driver returns to its workable state from Sleep state each time a given length of time elapses, and then causes the touch panel to perform a touch-detecting action. When the processor cannot acquire a result of judgment as “being touched”, it returns to Sleep state again, and waits for the given length of time to elapse.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: February 14, 2017
    Assignee: Synaptics Japan GK
    Inventors: Akihito Akai, Tsuyoshi Kuroiwa, Tatsuya Ishii
  • Patent number: 9541986
    Abstract: A computing device, such as a mobile communication device, is provided that adjusts, based on user interaction with the device, sleep times for a display to enter a sleep mode restricting use of a graphical user interface. The device includes a display providing the graphical user interface and a processor. The processor is configured to cause the display to enter the sleep mode after a sleep time without receiving any user inputs, increase the sleep time responsive to a user input received within a predetermined period of time after entry of the sleep mode and decrease the sleep time responsive to another user input directing the display to enter the sleep mode before passage of the sleep time. The processor may execute similar processes to adjust a plurality of sleep times associated with different applications and different functions within an application.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: January 10, 2017
    Assignee: Google Inc.
    Inventor: Florian Rohrweck
  • Patent number: 9511784
    Abstract: An in-car information display system includes a power storage device including a storage battery charged with direct-current power obtained by converting electric power from an overhead wire, a plurality of display devices that operate by receiving supply of direct-current power from the power storage device and provide a guidance display related to a service of a train to passengers, and a terminal device that operates by receiving the supply of the direct-current power from the power storage device and delivers to the display devices information for guidance display that is information used for the guidance display. The power storage device switches a power supply operation to the display devices according to a residual capacity of the storage battery and reduces a total amount of electric power supplied to each of the display devices.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: December 6, 2016
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Masao Oki, Satoru Ohashi, Hideo Sawazaki
  • Patent number: 9459684
    Abstract: For one disclosed embodiment, data corresponding to an idle duration for one or more downstream devices may be received. Power may be managed based at least in part on the received data. Other embodiments are also disclosed.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: October 4, 2016
    Assignee: Intel Corporation
    Inventors: Robert E. Gough, Seh W. Kwa, Neil W. Songer, Jaya L. Jeyaseelan, Barnes Cooper
  • Patent number: 9395788
    Abstract: Technologies for analyzing power state transitions of a processor of computing device including determining, by the computing device, a power state entered by the processor of the computing device and a duration of the power state entered based on power state records, wherein the power state records comprise transition data indicative of transitions of a processor of the computing device between power states. The computing device further determines an accuracy of a power state selection of the processor of the computing device based on the determined power state entered and target residency data for the processor. The target residency data identifies, for each power state of a plurality of power states of the processor, an amount of time required in the corresponding power state to result in a conservation of power.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: July 19, 2016
    Assignee: Intel Corporation
    Inventors: Robert P. Knight, Gautam Upadhyaya, Min Yeol Lim, Neha Sharma
  • Patent number: 9342123
    Abstract: Techniques for determining the voltage to be supplied to a core of a central processing unit are provided. A core of a central processing unit is monitored for errors. The voltage to be supplied to the core is determined based on the monitored errors. The voltage supplied to the core is altered based on the determined voltage.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: May 17, 2016
    Assignee: Hewlett Packard Enterprise Development LP
    Inventor: Anys Bacha
  • Patent number: 9325172
    Abstract: A power supply control apparatus comprises a receiving unit configured to receive data sent from an external device via a network, a control unit configured to process the data received by the receiving unit, a switching unit configured to switch between supply and disconnection of power from a first power supply unit to the receiving unit and to the control unit, and a mechanical switch configured to switch between supply and disconnection of power from a second power supply unit to the control unit. If the apparatus receives data from the external device in a power state in which power is supplied from the first power supply unit to the receiving unit and power to the control unit is stopped, the apparatus controls to supply power from the first power supply unit to the control unit without turning on the mechanical switch.
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: April 26, 2016
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Ryotaro Okuzono
  • Patent number: 9318896
    Abstract: Fault-tolerant power control in a computer system is described. In an example, a power controller to control power applied to an enclosure having a plurality of computing devices includes: first and second alternating current (AC) primary power meters respectively measuring first and second input power feeds to the enclosure; a first alternative power meter to measuring power supplied by the first input power feed; a second alternative power meter to measure power supplied by the second input power feed; a first controller coupled to the first primary power meter and the second alternative power meter; and a second controller coupled to the second primary power meter and the first alternative power meter; wherein the first controller is coupled to the second controller.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: April 19, 2016
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Alan L. Goodrum, Clifford A. McCarthy
  • Patent number: 9317088
    Abstract: A power on circuit is connected between a video graphics array (VGA) connector of a display and a super input output (SIO) chip of a motherboard. The power on circuit includes first to fourth electronic switches and a timer. When a power button of the display is pressed, a serial data line pin of the VGA connector outputs a high level signal to turn on the first electronic switch, the second electronic switch is turned on, the fourth electronic switch is turned on, and the timer outputs a periodic pulse signal. When the pulse signal outputted from the timer is at a high level, the third electronic switch is turned on, the SIO chip receives a low level signal from the fourth and third electronic switches, and the motherboard is turned on.
    Type: Grant
    Filed: November 13, 2013
    Date of Patent: April 19, 2016
    Assignee: ScienBiziP Consulting (Shenzhen) Co., Ltd.
    Inventors: Jin-Liang Xiong, Yong-Zhao Huang
  • Patent number: 9304578
    Abstract: A control device according to embodiments comprises a data-copying unit, a data-processing instructing unit, and a power-control unit. The data-copying unit copies data in a first memory to a second memory of which power consumption is less than power consumption of the first memory. The data is to be processed at a first data processing unit. The data-processing instructing unit instructs the first data processing unit to process the data copied to the second memory. The power-control unit switches power for the first memory from a first power to a second power while the first data processing unit is processing the data copied to the second memory. The first power is power supplied to the first memory at a time when the data is copied from the first memory to the second memory. The second power is lower than the first power.
    Type: Grant
    Filed: September 5, 2013
    Date of Patent: April 5, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yusuke Shirota, Tatsunori Kanai, Tetsuro Kimura, Haruhiko Toyama, Koichi Fujisaki, Junichi Segawa, Masaya Tarui, Satoshi Shirai, Hiroyoshi Haruki, Akihiro Shibata