Power Conservation Patents (Class 713/320)
  • Patent number: 10671140
    Abstract: The present disclosure relates to a method and an apparatus for reducing power consumption of a terminal device. In some embodiments, the apparatus includes processing circuitry and interface circuitry. In various embodiments, the terminal device receives wireless communication service from a network. The processing circuitry releases wireless network connection of the terminal device from the network in response to an instruction for reducing the power consumption of the terminal device. The processing circuitry further adjusts a subset of communication parameters from first settings to second settings to reduce the power consumption of the terminal device. The communication parameters are associated with a baseband processing device in the terminal device. The processing circuitry also reestablishes the wireless network connection of the terminal device to the network.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: June 2, 2020
    Assignee: Beijing Xiaomi Mobile Software Co., Ltd.
    Inventors: Weiyan Ge, Xiaolong Zi
  • Patent number: 10667210
    Abstract: RF repeaters may be used to extend coverage of an IoT system. Further, small base stations, commonly referred to as small cells, may be use to provide local coverage. When small cells are used, the issue of power consumption is addressed as these systems could often be remotely located and may be running off of battery power or some renewable power source.
    Type: Grant
    Filed: July 6, 2018
    Date of Patent: May 26, 2020
    Assignee: NEXTIVITY, INC.
    Inventor: Michiel Petrus Lotter
  • Patent number: 10666076
    Abstract: Techniques are described for implementing automated control systems for target battery systems based at least in part on battery state information gathered from active excitation of the batteries, such as to maximize battery life while performing other battery power use activities. The excitation of a target battery system may occur while it is in use, by repeatedly introducing small defined variations as input to the battery system while the battery system is otherwise used to supply or receive electricity. Corresponding small variations in output of the battery system from the excitation activities are then measured by hardware sensors, aggregated and analyzed to generate a current model of the internal state of the one or more batteries, and then used to assist in controlling further operations of the battery system, including in some cases to update a previously existing model of the battery system.
    Type: Grant
    Filed: August 14, 2018
    Date of Patent: May 26, 2020
    Assignee: Veritone Alpha, Inc.
    Inventors: Wolf Kohn, Jordan Makansi, Yanfang Shen
  • Patent number: 10660042
    Abstract: A method, a user equipment, a 5G core network device, an apparatus, and a computer program product for wireless communication are provided. Battery life and network efficiency of the user equipment are improved through the usage of a polled-mode power saving technique, wherein the user equipment periodically awakens to poll the 5G core network device regarding whether a communication is available for the user equipment. If the communication is available, the user equipment receives the communication. If the communication is delayed, the user equipment performs discontinuous reception to save power until the communication is available. If the communication is unavailable, the user equipment resumes a sleep mode.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: May 19, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Santosh Paul Abraham, Miguel Griot
  • Patent number: 10649518
    Abstract: A GPU performs dynamic power level management by switching between pre-defined power levels having distinct clock and voltage levels. The dynamic power level management includes identifying a first performance metric associated with processing workloads at the for a consecutive number of measurement cycles. In some embodiments, the consecutive number of measurement cycles includes a current measurement cycle and at least one previous measurement cycle. Based on a determination that the consecutive number of measurement cycles exceeds a minimum hysteresis number, an estimated optimization is determined to be applied to the GPU for a future measurement cycle. A power level setting at the GPU for the future measurement cycle is adjusted based on the estimated optimization. By considering performance metrics including, for example, different processing workloads and hardware configurations, the GPU is able to dynamically adapt its power settings to the particular workload that it is currently processing.
    Type: Grant
    Filed: January 26, 2017
    Date of Patent: May 12, 2020
    Assignee: ATI TECHNOLOGIES ULC
    Inventors: Soon Kyu Kwon, Jun Huang, Shahriar Pezeshgi, Alexander Sabino Duenas
  • Patent number: 10649516
    Abstract: An information processing apparatus that can avoid an IEEE802.1X re-authentication process due to a communication speed setting change made at the time of transitioning to the power-saving state and realize both of security and power-saving. Fixed link speed with which both a MFP 100 and a communication apparatuses are compatible is set on the basis of acquired pieces of link speed setting information about the MFP 100 and the communication apparatus. Then, 100 Mbps lower than 1000 Mbps is fixedly set on the basis of acquired power-saving setting information about the MFP 100 when the power-saving setting is effective, and EEE is enabled.
    Type: Grant
    Filed: April 3, 2017
    Date of Patent: May 12, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Shigeki Hasui
  • Patent number: 10650112
    Abstract: Systems, apparatuses, and methods for efficiently implementing clock gating circuitry. A multi-bit clock gating cell is placed on the die of an integrated circuit and replaces at least two single-bit clock gating cells that were to be placed on the die. Each single-bit clock gating cell receives a single clock enable signal and generates a single gated clock signal. Each multi-bit clock gating cell receives multiple clock enable signals and generates multiple gated clock signals based on a single common received clock signal. Conditions for determining whether two or more single-bit clock gating cells are replaced by a multi-bit clock gating cell include a distance between two single-bit clock gating cells, a load driven by any one of the two single-bit clock gating cells and an activity level of a common single clock received by at least two single-bit clock gating cells is above a respective threshold.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: May 12, 2020
    Assignee: Apple Inc.
    Inventor: Harsha Krishnamurthy
  • Patent number: 10645269
    Abstract: A communication apparatus includes a power source, a power switch, a wireless communication unit that establishes a wireless communication with a selected external apparatus from among a plurality of external apparatuses including a first external apparatus and a second external apparatus, and a control unit that controls the communication apparatus. In a first state where an operation state of the power switch is OFF, the wireless communication unit establishes a wireless communication with the first external apparatus and does not establish a wireless communication with the second external apparatus. In a second state where the operation state of the power switch is ON and power supply from the power source to at least the control unit is limited, the wireless communication unit establishes a wireless communication with the first and the second external apparatuses.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: May 5, 2020
    Assignee: Canon Kabushiki Kaisha
    Inventor: Toshiyuki Takagi
  • Patent number: 10635674
    Abstract: Embodiments provide a migration instruction that effectuates the migration of a pluggable database from a source database server instance to a destination database server instance. Upon receiving the migration instruction, the migrating pluggable database is opened at the destination instance. Connections are terminated at the source instance at a rate that is determined based on statistics maintained for one or more of: the migrating pluggable database, the source instance, the destination instance, a container database, etc. Furthermore, once the migration instruction is received, a certain amount of time is provided before the source instance flushes the dirty buffers for the migrating pluggable database from the buffer cache of the source instance. The delay in flushing dirty buffers from buffer cache allows the source instance to provide data blocks, of the migrating pluggable database, directly to the destination database server instance from the cache.
    Type: Grant
    Filed: April 7, 2016
    Date of Patent: April 28, 2020
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Sanket Jain, Kumar Rajamani, Jaebock Lee, Nicolas Michael, Yixiao Shen, Giridhar Ravipati
  • Patent number: 10620646
    Abstract: A method for managing the electrical consumption of an on-board device in a vehicle including an electric power supply battery, the device having a virtual battery, corresponding to a maximum energy quota available to keep the device active, the method includes determining a level of charge of the virtual battery depending on the level of charge of the electric power supply battery, and, in a discharge situation of the electric power supply battery: determining a probable duration of the discharge situation, calculating a score for the benefit of keeping the device active depending on at least one parameter of the vehicle and/or of the user, and, determining an instruction to keep the device active or to stop the device depending on the score and on the probable duration of the discharge situation, and stopping the on-board device if the stop instruction is determined.
    Type: Grant
    Filed: March 15, 2018
    Date of Patent: April 14, 2020
    Assignees: Continental Automotive France, Continental Automotive GmbH
    Inventor: Jean-Philippe Boyer
  • Patent number: 10620794
    Abstract: An electronic device with a display and a touch-sensitive surface displays a first authentication user interface on the display, the first authentication user interface including a text entry field for entering a text-based authentication code; detects a first input by a user on the touch-sensitive surface while displaying the first authentication user interface; in response to detecting the first input, displays a second authentication user interface on the display, distinct from the first authentication user interface, the second authentication user interface configured for entering a gesture-based authentication code; while displaying the second authentication user interface, detects one or more gestures by the user at locations on the touch-sensitive surface that correspond to locations on the second authentication user interface; and authenticates the user in accordance with a determination that the detected one or more gestures correspond to a gesture-based authentication code for the user.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: April 14, 2020
    Assignee: Apple Inc.
    Inventors: Stephen Hayden Cotterill, Jake M. Logan, Oleksandr Kuvshynov, Erik M. Cressall, Brandon J. Casey, Jeffrey Paul McCurdy Hultquist
  • Patent number: 10623200
    Abstract: An encoding process for bus data utilizes data from multiple data line groups on a multi-byte wide bus where each group has an associated DBI line. The process leverages the expanded encoding space for the multiple groups and associated multiple DBI bits. This process may be expanded to four bytes, eight bytes, etc.
    Type: Grant
    Filed: November 14, 2018
    Date of Patent: April 14, 2020
    Assignee: NVIDIA Corp.
    Inventors: John Wilson, Sunil Sudhakaran
  • Patent number: 10620991
    Abstract: An apparatus in one embodiment comprises a processing platform that includes a plurality of processing devices each comprising a processor coupled to a memory. The processing platform is configured to implement at least a portion of at least a first cloud-based system. The processing platform further comprises a workload profiler configured to create an initial profile for a workload in response to a user migration request, a workload transformation engine configured to transform the initial profile into a multi-cloud migration profile, wherein the multi-cloud migration profile comprises a plan for migrating the workload, a workload data bus configured to migrate data pertaining to the workload in accordance with the multi-cloud migration profile, and a service transition bus configured to migrate one or more services pertaining to the workload in accordance with the multi-cloud migration profile.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: April 14, 2020
    Assignee: VirtuStream IP Holding Company
    Inventors: Maik A. Lindner, Eloy F. Macha
  • Patent number: 10621008
    Abstract: A management method for a multi-core processor includes determining a plurality of candidate processor configurations with computing performances greater than a current computing performance corresponding to a current processor configuration, in which each of the candidate processor configurations comprises an active processor core number and a processor frequency; selecting one of the candidate processor configurations according to power consumptions corresponding to the candidate processor configurations to serve as an updating processor configuration; and executing tasks according to the active processor core number and the processor frequency of the updating processor configuration.
    Type: Grant
    Filed: August 28, 2016
    Date of Patent: April 14, 2020
    Assignee: HTC Corporation
    Inventors: Chun-Ming Huang, You-Lung Hsueh
  • Patent number: 10621131
    Abstract: A bridge connecting apparatus comprises: a connection state control part that controls a first connection state between the bridge connecting apparatus and the other bridge connecting apparatus; and a connection state monitoring part that monitors the first connection state recognized on the connection state control part and a second connection state between the first device recognized on the OS and the second device. The connection state monitoring part instructs to the connection state control part so that the first connection state does not come into connection when it is detected that the first connection state is at non-connection. The connection state control part controls so that the first connection state does not come into connection according to the instruction from the connection state monitoring part.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: April 14, 2020
    Assignee: NEC CORPORATION
    Inventor: Junichi Higuchi
  • Patent number: 10621135
    Abstract: In one or more embodiments, one or more systems, methods, and/or processes may receive a first signal from information handling system firmware; may provide, based at least on the first signal, each of first multiple reset assertion signals to each of respective multiple Peripheral Component Interconnect Express (PCIe) risers, each of the multiple PCIe risers including multiple PCIe slots; may receive second multiple reset assertion signals from respective multiple dies, each of the multiple dies includes at least one processing core and at least one PCIe root complex; may receive a second signal from the information handling system firmware; may determine that the second multiple reset assertion signals and the second signal were received; and may, after determining that the second multiple signals and the second signal were received, provide each of third multiple reset de-assertion signals to a respective PCIe riser of the multiple PCIe risers.
    Type: Grant
    Filed: April 26, 2018
    Date of Patent: April 14, 2020
    Assignee: Dell Products L.P.
    Inventors: Anh Dinh Luong, Jeffrey Leighton Kennedy
  • Patent number: 10620682
    Abstract: In one embodiment, a processor includes: one or more cores to execute instructions; a first request register to store hardware performance state control information for a first core of the one or more cores obtained from an operating system; a second request register to store hardware performance state control override information, the hardware performance state control override information to be received from a management controller coupled to the processor; and a power controller coupled to the one or more cores to control a performance state of the first core based at least in part on the hardware performance state override information when at least one override indicator of the second request register is set. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: April 14, 2020
    Assignee: Intel Corporation
    Inventors: Nikhil Gupta, Israel Hirsh, Esfir Natanzon, Nir Rosenzweig, Efraim Rotem, Guy M. Therien, Ankush Varma, Eliezer Weissmann
  • Patent number: 10614251
    Abstract: A firmware includes a firmware module for copying a digitally signed binary file that includes a firmware globally unique identifier (GUID), tool GUIDs, and feature GUIDs to an Advanced Configuration and Power Management interface (ACPI) table (the Firmware Enabled Tool Registry (FETR) table). If the FETR table is stored in memory, a firmware tool determines whether a digital signature of the signed binary file can be verified. If the digital signature can be verified, the firmware tool determines if the firmware GUID stored in the FETR table matches a firmware GUID stored in another ACPI table. If the firmware GUIDs match, the firmware tool determines whether its tool GUID matches a tool GUID stored in the FETR table. The firmware tool can continue to execute if the tool GUIDs match. Firmware tool features are enabled if feature GUIDs in the FETR table match feature GUIDs of the firmware tool.
    Type: Grant
    Filed: February 18, 2019
    Date of Patent: April 7, 2020
    Assignee: AMERICAN MEGATRENDS INTERNATIONAL, LLC
    Inventors: Stefano Righi, Paul Anthony Rhea
  • Patent number: 10613611
    Abstract: Apparatuses, methods and storage medium associated with current control for a multicore processor are disclosed herein. In embodiments, a multicore processor may include a plurality of analog current comparators, each analog current comparator to measure current utilization by a corresponding one of the cores of the multicore processor. The multicore processor may include one or more processors, devices, and/or circuitry to cause the cores to individually throttle based on measurements from the corresponding analog current comparators. In some embodiments, a memory device of the multicore processor may store instructions executable to operate a plurality power management agents to determine whether to send throttle requests based on a plurality of histories of the current measurements of the cores, respectively.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: April 7, 2020
    Assignee: Intel Corporation
    Inventors: Alexander Gendler, Efraim Rotem, Nir Rosenzweig, Krishnakanth V. Sistla, Ashish V. Choubal, Ankush Varma
  • Patent number: 10613866
    Abstract: A method, apparatus, and CRM that detect repetition of an out-of-order execution schedule for a group of instructions executed by an out-of-order processor. Data indicative of at least one performance metric for an instance of execution of said group of instructions by the out-of-order processor is determined. The determined data are compared with previous data of the at least one performance metric for at least one previous instance of execution of the group of instructions by the out-of-order processor. Repetition of the out-of-order execution schedule is detected dependent on the comparison.
    Type: Grant
    Filed: April 4, 2017
    Date of Patent: April 7, 2020
    Assignee: The Regents of the University of Michigan
    Inventors: Shruti Padmanabha, Andrew Lukefahr, Reetuparna Das, Scott Mahlke
  • Patent number: 10606493
    Abstract: A system and method is provided for managing memory allocated to a virtual machine running on a host platform. An exemplary method includes continuously calculating the amount of free physical memory of the host platform by subtracting the amount of physical memory currently used consumed by the host operating system from the total size of the physical memory on the host platform. Moreover, using the calculated amount of free physical memory, the method includes dynamically adjusting an overall limit of the physical memory that can be allocated to the virtual machine running on the host platform, and then allocating to the virtual machine an amount this allocated physical memory so that active pages can be stored in the allocated memory and directly accessed during operation by the virtual machine.
    Type: Grant
    Filed: April 14, 2017
    Date of Patent: March 31, 2020
    Assignee: Parallels International GmbH
    Inventors: Aleksandr Kartashov, Iurii Ovchinnikov, Nikolay Dobrovolskiy, Serguei M. Beloussov
  • Patent number: 10606663
    Abstract: Examples of techniques for processor mode switching are disclosed. In one example implementation according to aspects of the present disclosure, a computer-implemented method for processor mode switching to cause a processing system to switch a mode of a processor of a plurality of processors, wherein each processor of the plurality of processors is one of an active processor or an inactive processor, and wherein each active processor is in one of a first mode and a second mode may include: setting a processor threshold; determining whether a number of active processors exceeds the processor threshold; and responsive to determining that the number of active processors exceeds the processor threshold, switching the mode of the processor from the first mode to the second mode.
    Type: Grant
    Filed: January 17, 2017
    Date of Patent: March 31, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Peter D. Driever
  • Patent number: 10601519
    Abstract: A receiver circuit with low power consumption and a method for reducing power consumption of a receiver system are provided. The method for reducing power consumption of the receiver system comprises steps of: providing a signal receiver module; intermittently enabling/disabling the signal receiver module when a microprocessor is in a sleep mode; detecting whether the signal receiver module receives a signal when the signal receiver module is enabled; and waking the microprocessor up to decode the received signal if the signal receiver module receives the signal.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: March 24, 2020
    Assignee: GENERALPLUS TECHNOLOGY INC.
    Inventor: Li Sheng Lo
  • Patent number: 10601187
    Abstract: An electrical power distribution unit for overload prevention is provided. The power distribution unit has a plurality of electrical power outlet sockets each for receiving a power plug and a power distribution system for supplying electrical power to each of the sockets. The power distribution unit includes an excess power detector for detecting an aggregate power drawn from the plurality of sockets and for actuating a disabling mechanism for disabling power supply for a subset of the sockets in response to the detected aggregate power exceeding a predetermined first threshold, wherein the subset of the sockets are sockets that are detected as currently not drawing power.
    Type: Grant
    Filed: June 20, 2017
    Date of Patent: March 24, 2020
    Assignee: International Business Machines Corporation
    Inventors: James Hewitt, Colin I. Holyoake, Richard Postlethwaite, Caroline J. Thomas
  • Patent number: 10600388
    Abstract: A method, a mobile device, and a computer program product for managing display brightness of a mobile device. The method includes detecting a first temperature value of a mobile device and determining, by a processor, if the first temperature value is greater than a threshold temperature value. In response to determining that the first temperature value is greater than the threshold temperature value, video data is retrieved for several video frames. The method further includes determining if the video data contains a transition from a first video frame to a second video frame that includes a change in light level that is greater than a light level threshold. In response to determining that the video data contains the change in light level, the display is triggered to reduce a first light level associated with the second video frame to a second light level when the second video frame is displayed.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: March 24, 2020
    Assignee: Motorola Mobility LLC
    Inventors: Martin R. Pais, John C. Pincenti, Ying Zhang, Lan Li
  • Patent number: 10599203
    Abstract: A computer system includes two or more subsystems. In one example, a first subsystem is executing a multimedia application using data stored in a first storage device. A copy of the data is also stored in a second storage device associated with a second subsystem. The second subsystem may be a dedicated multimedia player controller. When the first subsystem is to enter a sleep state, the second subsystem may continue to process the multimedia data stored in the second storage device. The second subsystem may also use the same audio port that the first subsystem was using before it enters the sleep state. Appropriate transition point may be determined by the second subsystem to ease audio disruption.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: March 24, 2020
    Assignee: Intel Corporation
    Inventors: Hong W. Wong, Wah Yiu Kwong
  • Patent number: 10599637
    Abstract: Responsive to determining an in-memory image of a metadata disk block, a buffer is generated in memory and includes metadata updates made to the metadata disk block. Metadata updates to the disk block by a first transaction are recorded and stored in the buffer. Transfer of metadata updates that are logically complete, but remain in an active transaction list stored in the buffer, are delayed to a completed transaction list, scheduled to be written to a log file on disk at a subsequent time. A determination is made as to whether the metadata disk block is deleted by a second transaction following the first, and responsive to determining the metadata disk block is to be deleted and the metadata updates of the second transaction transfer to the completed transaction list, preventing the writing of the metadata updates to the log file and the metadata disk block to disk.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: March 24, 2020
    Assignee: International Buisness Machines Corporation
    Inventor: Scott T. Marcotte
  • Patent number: 10592126
    Abstract: A memory management method is provided according to an exemplary embodiment of the disclosure. The method includes: receiving a plurality of commands from a host system; counting a newest idle time corresponding to the commands and a past average command-receiving-time-interval corresponding to the commands; and dynamically changing a work mode of a memory storage device from a first work mode to a second work mode if the newest idle time is larger than a first threshold value and the past average command-receiving-time-interval is larger than a second threshold value. Therefore, a power consumption of the memory storage device can be reduced and a work mode of the memory storage device may not be changed too frequently.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: March 17, 2020
    Assignee: Hefei Core Storage Electronic Limited
    Inventors: Hao-Zhi Lee, Hui Xie, Meng Xiao, Ren Jun Tang, Dong Sheng Guan
  • Patent number: 10591979
    Abstract: Techniques for battery management of a device having multiple batteries are described herein. In one or more implementations, management for increased battery reliability involves assessing a combination of factors that influence a control policy for multiple batteries in a battery system. Based on the assessment, values of control parameters for power management of the battery system are set to reflect a tradeoff between performance and reliability. Then, at least one of battery utilization or charge current distribution is controlled in dependence upon the values that are set. Control of the battery system can be based in part upon differences in cycle counts for multiple batteries of a battery system for a device, such that cycle counts of the multiple batteries are managed for improved reliability.
    Type: Grant
    Filed: April 3, 2015
    Date of Patent: March 17, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Karan Kacker, Daniel Joseph Dummer, Wei Guo, Stephen Clifford Cooper, Ceceli Ann Wilhelmi, Minsoo Kim
  • Patent number: 10591975
    Abstract: Systems and methods are disclosed for managing memory access for low-power use cases of a system on chip. One such method comprises booting a system on chip (SoC) comprising a plurality of SoC processing devices. A trusted channel is created to a secure non-volatile random access memory (NVRAM). The method determines a power-saving software program to be executed on the SoC by one of the plurality of SoC processing devices. A software image associated with the power-saving software program is loaded to the secure NVRAM. In response to loading the software image to the secure NVRAM, each of the plurality of SoC processing devices except the one executing the software image from the secure NVRAM are powered down.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: March 17, 2020
    Assignee: Qualcomm Incorporated
    Inventors: Yanru Li, Azzedine Touzni, Dexter Tamio Chun
  • Patent number: 10579131
    Abstract: An electronic device includes a system-on-chip (SoC) including at least one component, a memory, and a processor functionally connected to the SoC and the memory. The processor is configured to apply a default voltage for driving the at least one component at a specific frequency. The processor is also configured to determine whether data on an offset voltage corresponding to the at least one component and the specific frequency is stored. The processor is further configured to apply the offset voltage, being different from the default voltage, to the at least one component when the data on the offset voltage is stored. Other embodiments are possible.
    Type: Grant
    Filed: November 16, 2017
    Date of Patent: March 3, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jaecheol Kim, Jinkyu Kim, Dongwoo Kim, Jeongho Kim, Jaesoo Chaung, Jongshik Ha, Heetae Oh, Hyeokseon Yu, Seungyoung Lee, Wooyoung Choi, Jaewoong Han, Mangun Hur
  • Patent number: 10579132
    Abstract: Power consumption by a first host included in a plurality of hosts in a clustered computing system, where each of the hosts executes one or more applications, is managed by detecting that a utilization level of the first host falls below a threshold value and, responsive to the detecting, migrating one or more applications executing on the first host to a second host. After the migration is completed, the first host is caused to consume less power while remaining powered on.
    Type: Grant
    Filed: February 5, 2018
    Date of Patent: March 3, 2020
    Assignee: VMware, Inc.
    Inventors: Parth Shah, Madhuri Yechuri
  • Patent number: 10581998
    Abstract: A method for Bluetooth communication includes: in Bluetooth communication, allocating bandwidth resources as a first bandwidth resource for communication with a data source device and a second bandwidth resource for communication with a slave device; in the communication with the data source device, receiving and caching data from the data source device; in the communication with the slave device, determining whether the volume of the cached data is less than a first threshold; and if the data volume of the cached data is less than the first threshold, using at least a portion of the second bandwidth resource for the communication with the data source device.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: March 3, 2020
    Assignee: SMARTECH WORLDWIDE LIMITED
    Inventors: Mid Wang, Yunhe Fu, Tony Xie
  • Patent number: 10581946
    Abstract: A first aspect of the present invention concerns a method for controlling a multimedia application on a terminal, in particular a mobile terminal, wherein multimedia data are received from a remote source and are processed for being presented on a display of the terminal, comprising the steps of: a) detecting an operating state of at least one service component of the terminal concerning the presentation of the data of the multimedia application; b) generating an item of state information characterizing the operating state of the at least one service component; c) generating a message, comprising: the state information, and/or an item of information characterizing the state information, which characterizes the data density that can be processed as a maximum prescribed by the operating state of the service component for presenting the multimedia data, and/or an instruction to the remote source with respect to the adaptation of the data and/or transmission of the data to the terminal, in order to adapt the data
    Type: Grant
    Filed: August 7, 2015
    Date of Patent: March 3, 2020
    Assignee: Unify GmbH & Co. KG
    Inventors: J├╝rgen Totzke, Karl Klug, Viktor Ransmayr
  • Patent number: 10579130
    Abstract: A storage device includes a storage unit, a communication port configured to perform serial communication with an external device, and a controller configured to access the storage unit based on a command communicated from the external device through the communication port, and set the communication port to a power-saving mode before the communication port receives any signal for synchronization.
    Type: Grant
    Filed: March 13, 2019
    Date of Patent: March 3, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Nobuyuki Myouga
  • Patent number: 10573273
    Abstract: A method and a device for determining a device placement to optimize techniques, such as power management techniques, are described. The method, executed in a processor of a mobile device, comprises gathering data from at least one sensor associated with the mobile device. Based on the data gathered from the sensor, a device placement indicative of at least one of an orientation and a position the mobile device may be determined. Further, details pertaining to the device placement may be integrated with secondary classification data comprising at least one of historical data, device orientation data, and device motion data. Based on the integrated details, it may be inferred whether a user is engaged with the mobile device. When a user is not engaged with the mobile device, a brightness of the display is lowered in at least one stage to optimize power consumption and user experience.
    Type: Grant
    Filed: June 13, 2018
    Date of Patent: February 25, 2020
    Assignee: MAPSTED CORP.
    Inventors: Sean Huberman, Paramvir Singh Nagpal
  • Patent number: 10565145
    Abstract: A USB hub includes a plurality of downstream ports; at least one dual mode port, the dual mode port configured to be switchable from a downstream port to an upstream port; and host detection circuitry for detecting whether, when operating as an upstream port, a host is connected.
    Type: Grant
    Filed: December 9, 2017
    Date of Patent: February 18, 2020
    Assignee: MICROCHIP TECHNOLOGY INCORPORATED
    Inventors: Brigham Steele, Atish Ghosh
  • Patent number: 10565405
    Abstract: A smart card may include data storage and transmission circuitry, a plurality of voltage controllers to supply operational power to card circuitry, a plurality of oscillators to supply an internal clock for the card, and power management circuitry. The power management circuitry may be configured to shut down the oscillators and at least one, but not all, voltage controllers during a period after a data transmission is completed.
    Type: Grant
    Filed: February 14, 2017
    Date of Patent: February 18, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyuck-Jun Cho, Donald Na, Seung-Hwan Baek, Jae-Keun Oh, Kee-Moon Chun
  • Patent number: 10558768
    Abstract: A method for use in deploying computers into a data center includes calculating in a computer an expected peak power draw for a plurality of computers. The expected peak power draw for the plurality of computers is less than a sum of individual expected peak power draws for each computer from the plurality of computers.
    Type: Grant
    Filed: April 16, 2018
    Date of Patent: February 11, 2020
    Assignee: Google LLC
    Inventors: Wolf-Dietrich Weber, Xiaobo Fan, Luiz Andre Barroso
  • Patent number: 10551905
    Abstract: A data-transmission-format conversion circuit has a first data transmission interface, a second data transmission interface, and a control circuit. The control circuit is coupled to the first data transmission interface and the second data transmission interface for processing data-format conversions between the first data transmission interface and the second data transmission interface. The control circuit is further used to control the second data transmission interface to switch from a first corresponding power mode to a second corresponding power mode when the first data transmission interface is switched from a first power mode to a second power mode. The control circuit is further used to control the second data transmission interface to switch from the first corresponding power mode to a third corresponding power mode when the first data transmission interface is switched from the first power mode to a third power mode.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: February 4, 2020
    Assignee: Realtek Semiconductor Corp.
    Inventors: Cheng-Yuan Hsiao, Sung-Kao Liu, Yi-Ting Chien, Wei-Hung Chuang, Chih-Yu Hsu
  • Patent number: 10551895
    Abstract: An image forming apparatus that enters a first power state in which a predetermined function is executable and a second power state in which the predetermined function is not executable includes a detection unit configured to detect an object; a return unit that a user operates in order to shift the image forming apparatus from the second power state to the first power state; a notification unit configured to, in a case where an object has been detected by the detection unit, notify a user of a position of the return unit; and a power-source control unit configured to, in a case where the return unit has been operated by the user, shift the image forming apparatus from the second power state to the first power state.
    Type: Grant
    Filed: December 3, 2013
    Date of Patent: February 4, 2020
    Assignee: Canon Kabushiki Kaisha
    Inventor: Junnosuke Yokoyama
  • Patent number: 10552285
    Abstract: A memory subsystem manages memory I/O impedance compensation by the memory device monitoring a need for impedance compensation. Instead of a memory controller regularly sending a signal to have the memory device update the impedance compensation when a change is not needed, the memory device can indicate when it is ready to perform an impedance compensation change. The memory controller can send an impedance compensation signal to the memory device in response to a compensation flag set by the memory or in response to determining that a sensor value has changed in excess of a threshold.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: February 4, 2020
    Assignee: Intel Corporation
    Inventors: James A. McCall, Kuljit S. Bains
  • Patent number: 10554519
    Abstract: In a large scale computing system, a supervisory system is utilized to monitor the operations and requests of multiple components, and to manage such requests so that overall power considerations for the entire system are considered. The supervisory system has the ability to identify requests and aggregations of simultaneous requests that will create an adverse power effect, and to apply overall control methodologies which will help to minimize these adverse effects.
    Type: Grant
    Filed: February 8, 2016
    Date of Patent: February 4, 2020
    Assignee: CRAY INC.
    Inventors: Matthew Kappel, David Rush, Steve Martin, Jim Robanske
  • Patent number: 10545869
    Abstract: A power button override allows a persistent memory enabled platform to preserve data in persistent memory before initiating shutdown in a manner that is transparent to the user. The power button override prevents shutdown until all of the volatile cache and any other data in the platform has been flushed to persistent memory.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: January 28, 2020
    Assignee: Intel Corporation
    Inventors: Pronay Dutta, Christopher Lake, Patrick James, Paul Crutcher
  • Patent number: 10545556
    Abstract: An IC includes logic groups each including a launch and a capture FF with a logic cloud in between. A power switch is in series with a power supply node of the logic groups. The logic groups have a clock-gating and power control (PCGC) block for dynamically generating a power supply enable (PS_EN) signal output coupled to a control node of the power switch and a clock output (CLK_OUT) signal coupled to a clock input of the launch or capture FF for clocking the logic groups. The PCGC blocks receive an EN signal and a CLK_IN signal and dynamically generate the PS_EN signal and CLK_OUT signals. During clock cycles at least one logic group(s) does not contribute to an intended logic result for the IC the CLK_OUT signal disables switching of at least a portion of the logic group(s) while the PS_EN signal turns off power to the logic group(s).
    Type: Grant
    Filed: May 10, 2017
    Date of Patent: January 28, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Rama Venkatasubramanian, Jose Flores, Ivan Santos
  • Patent number: 10548099
    Abstract: A system for wireless power delivery including one or more transmitters and receivers. A method for wireless power delivery, preferably including: determining transmitter-receiver proximity; determining transmission parameter values, preferably including determining initial parameter values, evaluating candidate transmission parameter values, performing one or more local optimum searches, and/or performing one or more global optimum searches; and transmitting power based on the transmission parameter values.
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: January 28, 2020
    Assignee: Supply, Inc.
    Inventors: Gustavo Navarro, Varun Ramaswamy, Christopher Joseph Davlantes
  • Patent number: 10534736
    Abstract: A system includes a display subsystem. The display subsystem includes a shared buffer having allocated portions, each allocated to one of a plurality of display threads, each display thread associated with a display peripheral. The display subsystem also includes a direct memory access (DMA) engine configured to receive a request from a main processor to deallocate an amount of space from a first allocated portion associated with a first display thread. In response to receiving the request, the DMA engine deallocates the amount of space from the first allocated portion and shifts the allocated portions of at least some of other display threads to maintain contiguity of the allocated portions and concatenate free space at an end of the shared buffer.
    Type: Grant
    Filed: December 31, 2018
    Date of Patent: January 14, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Anish Reghunath, Brian Chae, Jay Scott Salinger, Chunheng Luo
  • Patent number: 10534645
    Abstract: The present disclosure relates to a method and system for executing processes in Virtual Storage Area Network by an array controller. The array controller receives a request for executing a process in VSAN, calculates a time duration for execution of the received process, compares calculated time duration with a predefined time duration, where the received process is divided into a first part and a second part if the calculated time duration exceeds the pre-defined time duration, executes the first part of the received process and assigns the second part of received process to a management server for execution, where the management server comprises a plurality of processing units dedicated for executing the second part of the received process.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: January 14, 2020
    Assignee: Wipro Limited
    Inventors: Rishav Das, Karanjit Singh
  • Patent number: 10534597
    Abstract: An information processing apparatus that is capable of matching setting values among a plurality of devices of which energization states are controllable independently. A receiving unit a request from an information processor, which is provided with a plurality of devices of which energization states are controllable independently and performs an information process according to set data, for update information about set data concerning a device being in an energized state. A determination unit determines whether the set data concerning the requested update information is relevant to set data concerning a device being in a non-energized state. A control unit controls whether the update information about the set data concerning the device being in the energized state is given in a response according to the determination result by the determination unit and to transmit the response to the information processor.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: January 14, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Hidetaka Nakahara
  • Patent number: 10521375
    Abstract: A controller for a memory system is disclosed. The controller includes logic configured to execute host requests and memory management operations. The memory management operations have a plurality of memory command cycles. The logic is configured to suspend the memory management operation upon completion of a memory command cycle in the plurality of memory command cycles before a final stage when a host read request is received during execution of the memory management operation, and configured to continue the memory management operation when a host request other than a read request is received during execution of the memory management operation.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: December 31, 2019
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventor: Ting-Yu Liu