Power Conservation Patents (Class 713/320)
  • Patent number: 12287976
    Abstract: Data movement for reducing an environmental load in a hierarchical storage is appropriately determined. A storage system includes an upper-level storage device and a management device. The management device is configured to determine, for each file stored in the upper-level storage device, based on a size of a target file and an access frequency of the target file, and the power consumption information, whether power consumption for holding the target file is to be reduced by moving the target file to the lower-level storage device, and output, when it is determined that the power consumption for holding the target file is to be reduced by moving the target file to the lower-level storage device, an instruction to move the target file from the upper-level storage device to the lower-level storage device.
    Type: Grant
    Filed: September 5, 2023
    Date of Patent: April 29, 2025
    Assignee: Hitachi Vantara, Ltd.
    Inventor: Yukiya Maeda
  • Patent number: 12282900
    Abstract: A system, method, and computer-readable medium are disclosed for attesting determining computer system fan usage and maintenance. A determination is made as to the architectural diagram or layout of a computer system. The diagram or layout shows components and fans that support the components. The architectural diagram or layout, where each virtual section shows a fan and the components. Operational load is determined for each virtual section over a period of time. A threshold value for particular periods to time, where the threshold value either is to low load periods or as to periods to increase or decrease speed of the fan to address operational load of the components.
    Type: Grant
    Filed: January 22, 2021
    Date of Patent: April 22, 2025
    Assignee: Dell Products L.P.
    Inventor: Parminder Singh Sethi
  • Patent number: 12282369
    Abstract: The present application relates to a power-off protection method and apparatus, a device, and a storage medium. The main technical solution includes: in response to power sourcing equipment (PSE) being about to stop supplying power to a power device (PD) within a predetermined time, sending a first link layer discovery protocol (LLDP) message to the PD; receiving a second LLDP message, which is replied by the PD according to the first LLDP message; and powering off the PD according to the second LLDP message. The present application can not only avoid the interruption of the current tasks of a PD as much as possible, but can also record power-off reasons, so as to facilitate tracing to maintain the normal operation of a device, thereby ensuring the security of data and the device.
    Type: Grant
    Filed: June 16, 2023
    Date of Patent: April 22, 2025
    Assignee: Suzhou MetaBrain Intelligent Technology Co., Ltd.
    Inventors: Hung Hsin Chen, Bo Hsiung Chi, Yen Cheng Lu
  • Patent number: 12277017
    Abstract: The present disclosure includes apparatuses and methods related to modifying an operating mode in memory. An example apparatus can include a memory array and a controller coupled to the memory array, wherein the controller includes a register configured to receive a mode register write command and write a value indicative of an operating mode in which the apparatus has reduced power consumption relative to a normal operating mode.
    Type: Grant
    Filed: October 31, 2022
    Date of Patent: April 15, 2025
    Inventor: Alberto Troia
  • Patent number: 12277020
    Abstract: One or more components of a computing device are run by default in a boost mode state. The one or more components continue to run in the boost mode state until the boost mode state is no longer sustainable, e.g., due to power consumption of the one or more components or temperature of the one or more components. The one or more components are switched to a reduced power state (e.g., a non-boost mode state) in response to the boost mode state no longer being sustainable. When operating the one or more components in the boost mode state again becomes sustainable due to power consumption or temperature of the one or more components, the one or more components are returned to the default boost mode state.
    Type: Grant
    Filed: December 24, 2021
    Date of Patent: April 15, 2025
    Assignees: Advanced Micro Devices, Inc, ATI Technologies ULC
    Inventors: Joseph Lee Greathouse, Adam Neil Calder Clark, Stephen Kushnir
  • Patent number: 12277016
    Abstract: A system, method, apparatus and device for adjusting power consumption, and a medium are provided. The system includes a Power Supply Unit (PSU) and a Complex Programmable Logic Device (CPLD). An input end of the PSU is connected to a server, and the PSU is configured to receive an initial electrical signal of the server in real time, and determine a current power supply condition according to the initial electrical signal to obtain a final electrical signal. The CPLD is connected to an output end of the PSU, and the CPLD is configured to receive the final electrical signal, increase a power of the server when the final electrical signal is a signal representing that the current power supply condition is high output power, and decrease the power of the server when the final electrical signal is a signal representing that the current power supply condition is low output power.
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: April 15, 2025
    Assignee: SUZHOU METABRAIN INTELLIGENT TECHNOLOGY CO., LTD.
    Inventors: Wenchao Ma, Ruidong Li
  • Patent number: 12273995
    Abstract: The present invention relates to a power module comprising: an upper ceramic substrate (300); a PCB substrate (400) disposed spaced apart from the upper ceramic substrate (300); a plurality of semiconductor chips (G1, G2, G3, G4) spaced apart from each other, arranged in parallel, and mounted on the lower surface of the upper ceramic substrate (300); and a plurality of capacitors (310) mounted on the top surface of the PCB substrate (400) to correspond to locations between the semiconductor chips (G1, G2, G3, G4). The present invention has the advantage of forming a short current path through which the semiconductor chips and the capacitors are connected, thereby increasing a circuit stabilization effect.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: April 8, 2025
    Assignee: AMOSENSE CO., LTD.
    Inventors: Taejung Kim, Wonsan Na, Baegeun Lee, Bohyeon Han
  • Patent number: 12271300
    Abstract: A data storage device and method are provided for performing an action on an area of memory to satisfy a host-provided target operating condition. In one embodiment, a controller of the data storage device is configured to: receive, from a host, an identification of an area of the memory and a target operating condition for the area of the memory; monitor the area of the memory to determine whether the area of the memory satisfies the target operating condition; and in response to determining that the area of the memory does not satisfy the target operating condition, perform an action on the area of the memory to attempt to cause the area of the memory to satisfy the target operating condition. Other embodiments are provided, and each of the embodiments can be used alone or in combination.
    Type: Grant
    Filed: July 26, 2023
    Date of Patent: April 8, 2025
    Assignee: Sandisk Technologies, Inc.
    Inventors: Eyal Hamo, Sagi Taragan, Dvorah Freedman
  • Patent number: 12265468
    Abstract: A method for performing access management of a memory device in a predetermined communications architecture with aid of automatic parameter setting and associated apparatus are provided. The method includes: utilizing the memory controller to set at least one write booster static parameter of a write booster function of the memory device; utilizing the memory controller to perform device initialization corresponding to at least one initialization phase of the memory device; and after completing the device initialization corresponding to the at least one initialization phase, performing at least one adaptive flag-setting operation, for setting at least one write booster flag among a plurality of write booster flags of the write booster function, wherein the at least one write booster flag includes a first write booster flag acting as a write booster switch. The adaptive flag-setting operation includes setting the first write booster flag to enable the write booster function by default.
    Type: Grant
    Filed: September 4, 2023
    Date of Patent: April 1, 2025
    Assignee: Silicon Motion, Inc.
    Inventors: Lu-Ting Wu, Shen-Ting Chiu, Te-Kai Wang, Po-Lin Wu
  • Patent number: 12260257
    Abstract: Technologies for offloading acceleration task scheduling operations to accelerator sleds include a compute device to receive a request from a compute sled to accelerate the execution of a job, which includes a set of tasks. The compute device is also to analyze the request to generate metadata indicative of the tasks within the job, a type of acceleration associated with each task, and a data dependency between the tasks.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: March 25, 2025
    Assignee: Intel Corporation
    Inventors: Susanne M. Balle, Francesc Guim Bernat, Slawomir Putyrski, Joe Grecco, Henry Mitchel, Rahul Khanna, Evan Custodio
  • Patent number: 12248357
    Abstract: Embodiments pertain to reducing power consumption in a computing system comprising one or more deterministic processors. A controller generates a plurality of control signals for a voltage regulator to regulate a supply voltage of a respective one of the one or more deterministic processors. A power management module determines an initial profile for power consumption and performance of an algorithm executed on the respective deterministic processor having an initial value for the supply voltage and an initial value for a clock frequency. The power management module further determines a target profile for power consumption and performance of the algorithm executed on the respective deterministic processor. The controller modifies the plurality of control signals based on the initial profile and the target profile. The respective deterministic processor executes the algorithm while the supply voltage is dynamically modified by the voltage regulator based on the modified plurality of control signals.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: March 11, 2025
    Assignee: GROQ, Inc.
    Inventors: Omar Ahmad, Geert Rosseel
  • Patent number: 12242324
    Abstract: A system power consumption control method includes: determining that an electronic device has entered a first mode; determining, by the electronic device, a power loss amount of a battery and a communication count of background processes, where the power loss amount is a decrease of power with respect to power at a first moment, the first moment is a moment at which the electronic device enters the first mode, and the communication count is used for indicating a total communication count of all processes currently running in the background with other devices since power-on of the electronic device; and when the power loss amount reaches a preset power threshold and the communication count reaches a preset communication count, disabling, by the electronic device, a network communication connection.
    Type: Grant
    Filed: April 24, 2022
    Date of Patent: March 4, 2025
    Assignee: Honor Device Co., Ltd.
    Inventor: Jianbin Qiu
  • Patent number: 12242319
    Abstract: An interface card includes a circuit board, a device mounted on the circuit board, and a PMIC mounted on the circuit board. The PMIC includes a PMIC processor communicatively coupled to a host processor of a host system. The PMIC processor is configured to receive an input voltage signal from a power supply that is external to the interface card. The PMIC processor generates at least one output voltage signal based on the input voltage signal. The at least one output voltage signal is supplied to the device. A power enable signal originating from the host processor is detected. The power enable signal is detected at a GPIO connector of the PMIC. The PMIC processor deactivates generation of the at least one output voltage signal based on the power enable signal.
    Type: Grant
    Filed: September 23, 2021
    Date of Patent: March 4, 2025
    Assignee: Intel Corporation
    Inventors: Shailendra Singh Chauhan, Arunthathi Chandrabose
  • Patent number: 12242322
    Abstract: The present disclosure provides a system for intelligently sampling information, such as location, activities, etc. on device. Sampling and uploading of background context is optimized using machine learning, such that battery usage is reduced, and quality of metrics based on the reported information is maintained or improved. A policy is generated based on the machine learning, the policy dictating how scanning and upload rates should change in response to conditions on the device.
    Type: Grant
    Filed: September 7, 2023
    Date of Patent: March 4, 2025
    Assignee: Google LLC
    Inventors: Alexander Varshavsky, Bhaskar Mehta, Brian Coopersmith, Giovanni Botta
  • Patent number: 12235781
    Abstract: A driver device of a data interface includes an input/output (I/O) interface, a power interface, a transmitter circuit, and a switching unit. The I/O interface is configured to couple to a load device. The power interface is configured to provide a power supply for transmitting data via the I/O interface. The transmitter circuit is coupled to the I/O interface and to the power interface and is configured to be powered by the power supply and provide an output signal to the load device via the I/O interface in a transmitter mode. The switching unit is coupled to the power interface and is configured to switch off the power interface for the transmitter circuit when the transmitter circuit is operating in a low power state. The transmitter circuit has a power consumption level below a threshold power level in the low power state.
    Type: Grant
    Filed: December 30, 2022
    Date of Patent: February 25, 2025
    Assignee: PARADE TECHNOLOGIES, LTD.
    Inventors: YingFan Lee, Mengchuan Gao, Yuanping Chen, Min She, Hongquan Wang
  • Patent number: 12228983
    Abstract: Systems and methods are provided that may be implemented to control operation of a power supply unit (PSU) during a low power state. The disclosed systems and methods may be implemented to control operation of a PSU relay included within the PSU, while the information handling system is operating in a low power state, e.g., such as the modern standby (S0ix) state. The disclosed systems and methods may also be implemented to provide intelligent PSU relay control that may be utilized to control operation of the PSU relay when the information handling system is entering, operating within, and exiting the modern standby (S0ix) state. This intelligent PSU relay control may include at least two operating modes: a modern standby mode and a normal mode of operation, and may be implemented to ensure that the PSU relay remains off during modern standby and returns to normal relay operation upon exiting modern standby.
    Type: Grant
    Filed: April 13, 2023
    Date of Patent: February 18, 2025
    Assignee: Dell Products L.P.
    Inventors: Edward Douglas Knapton, Yung-Chang Chang, Ya-Tang Hsieh
  • Patent number: 12229444
    Abstract: Methods, systems, and devices for command scheduling for a memory system are described. A memory system may be configured to analyze a received command during an initialization procedure for one or more components. In some examples, the memory system may initialize an interface and one or more processing elements as part of an initialization procedure upon transitioning from a first power mode to a second power mode. Accordingly, the command may be analyzed while the processing elements are being initialized such that, upon the processing elements being fully initialized, the command may be processed (e.g., executed).
    Type: Grant
    Filed: August 22, 2022
    Date of Patent: February 18, 2025
    Assignee: Micron Technology, Inc.
    Inventors: Domenico Francesco De Angelis, Crescenzo Attanasio, Carminantonio Manganelli
  • Patent number: 12222796
    Abstract: A control method, system and device for a power consumption upper limit of a server, and a readable storage medium, includes: determining, according to a server policy, a power consumption upper limit of a management engine (ME) to be a first expected upper limit; acquiring actual power consumption of a server; comparing the current actual power consumption with the first expected upper limit and a second expected upper limit; and if the current actual power consumption is greater than the first expected upper limit and does not exceed the second expected upper limit, lowering a current power consumption upper limit until the current actual power consumption is lowered such that same does not exceed the first expected upper limit.
    Type: Grant
    Filed: February 23, 2021
    Date of Patent: February 11, 2025
    Assignee: SHANDONG YINGXIN COMPUTER TECHNOLOGIES CO., LTD.
    Inventors: Yihai Duan, Fan Shao
  • Patent number: 12222363
    Abstract: A method and a system for impact detection in a stationary vehicle are provided. The method includes putting a telematics device into a sleep mode and performing a first micro wakeup. In response to determining that a first value read from a sensor during the micro wakeup is greater than a noise threshold, increasing a frequency of the micro wakeups and a sampling rate of the sensor. The method also includes reading a second value from the sensor during a second wakeup, performing a regular wakeup, and sending the first and second values during the regular wakeup.
    Type: Grant
    Filed: September 20, 2022
    Date of Patent: February 11, 2025
    Assignee: Geotab Inc.
    Inventors: Robert Spencer Hockin, Paul Philip Ciolek, Xiaohui Yu
  • Patent number: 12210909
    Abstract: Methods, systems, and computer-readable storage media for executing, within the container orchestration system, the application using one or more resource units, each resource unit including an application container and an ancillary container, the ancillary container executing a set of GPU metric exporters, receiving, from the application and for each resource unit, a GPU metric including a GPU utilization associated with a respective resource unit, determining, for each resource unit, a custom GPU metric based on a respective GPU metric, the custom GPU metric aggregating values of the respective GPU metric over a time period, determining, by an autoscaler, an average GPU metric based on one or more custom GPU metrics, and selectively scaling, by the autoscaler, the application within the container orchestration system based on the average GPU metric by adjusting a number of resource units executing the application.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: January 28, 2025
    Assignee: SAP SE
    Inventor: Peng Ni
  • Patent number: 12204775
    Abstract: A storage system with reduced power consumption includes a storage apparatus that saves data in accordance with a data input/output request from a host or outputs the saved data, the storage system including a plurality of components each configured to operate in a first power mode or at least one second lower power mode in a switchable manner, a condition monitoring module monitoring each of the plurality of components, and a power mode control module that determines a power mode of at least one component to be the second power mode, according to a processing load related to each of the plurality of components and which corresponds to a result of monitoring by the condition monitoring module, and operates the at least one particular component in the power saving mode, in which the plurality of components perform mutual control with the storage apparatus in accordance with the data input/output request.
    Type: Grant
    Filed: March 19, 2024
    Date of Patent: January 21, 2025
    Assignee: HITACHI, LTD.
    Inventors: Masahiro Tsuruya, Tomohiro Yoshihara, Norio Shimozono
  • Patent number: 12204792
    Abstract: Methods, systems, and devices for adaptive throughput monitoring are described. In some examples, a memory system may be associated with one or more clocks that are each associated with a respective subcomponent. When the memory system receives a plurality of commands, the memory system may determine a throughput of the commands. Based on the determined throughput, the memory system may adjust a rate of one or more of the clocks.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: January 21, 2025
    Assignee: Micron Technology, Inc.
    Inventors: Reshmi Basu, David Aaron Palmer, Jonathan S. Parry
  • Patent number: 12206551
    Abstract: A power control device includes a supply power prediction unit that determines excess or deficiency of a power supply state according to a power supply and demand situation for each server deployed in a data center that changes at least one of a total number of servers operating in the data center and a power setting of each server in operation so as to eliminate excess or deficiency of the power supply state. The power control unit further changes disposition on a server of a service program operating on each server depending on the power supply state.
    Type: Grant
    Filed: January 12, 2021
    Date of Patent: January 21, 2025
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Koichi Hara, Eriko Iwasa
  • Patent number: 12204912
    Abstract: Apparatus and methods for booting and using a single CPU socket as a multi-CPU partitioned platform. The single CPU socket includes a plurality of core tiles that a partitioned into a plurality of virtual clusters comprising CPU sub-sockets. Each of the CPU sub-sockets in coupled to an Input-Output (IO) tile having an integrated boot support block and comprising a plurality of IO interfaces including at least one IO interface configured to receive boot signals for booting the sub-sockets and an IO interface to access boot firmware stored in a firmware storage device coupled to the IO interface. The integrated boot support block is configured to facilitate booting of each of the plurality of CPU sub-sockets using a shared set of boot resources coupled to the plurality of IO interfaces.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: January 21, 2025
    Assignee: Intel Corporation
    Inventors: Bharat S. Pillilli, Johan Van De Groenendaal
  • Patent number: 12204952
    Abstract: Systems and methods for thermal management of computing systems are provided. The systems and methods described herein guarantee a thermal envelope of a computing system while preserving the compute and render performance capabilities of the computing system by implementing a thermal-aware scheduling policy, adjusting an amount of available memory bandwidth to computing resources, adjusting an amount of memory utilization by one or more applications executed by the computing resources, and/or allocating cache to workloads based on memory demands.
    Type: Grant
    Filed: March 24, 2022
    Date of Patent: January 21, 2025
    Assignee: Honeywell International s.r.o.
    Inventors: Pavel Zaykov, Peter Mathia
  • Patent number: 12204394
    Abstract: Methods and apparatus for precise power cycle management in data storage devices are provided. One such apparatus is a data storage device that includes a non-volatile memory (NVM) and a processor coupled to the NVM. In such case, the processor is configured to determine a first peak power for a first power phase, operate the DSD at a first DSD power consumption that is less than the first peak power for the first power phase, determine a second peak power for a second power phase based on a residual power equal to a difference between a preselected average power threshold and the first DSD power consumption, and operate the DSD at a second DSD power consumption that is less than the second peak power for the second power phase.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: January 21, 2025
    Assignee: Western Digital Technologies, Inc.
    Inventors: Yoseph Hassan, Dmitry Vaysman, Julian Vlaiko, Shay Benisty
  • Patent number: 12197267
    Abstract: A system, method and apparatus for configuring a person detection sensor. The person detection sensor may limit its transmissions in accordance with a pre-configured dwell time. The person detection sensor may receive a new dwell time from a personal communication device. When the new dwell time is received, it is stored in memory and is then used to regulate the number of transmissions of the person detection sensor in accordance with the new dwell time.
    Type: Grant
    Filed: November 9, 2023
    Date of Patent: January 14, 2025
    Assignee: Ecolink Intelligent Technology, Inc.
    Inventors: Brandon Gruber, George Seelman
  • Patent number: 12200098
    Abstract: A power supply device is used to provide power to an encryption and decryption device of a security system, including a safety power supply device, which is used to supply the supply voltage according to the system voltage; a regulated voltage source, which is used to provide a regulated voltage; and a voltage selection device, which is electrically connected with the safety power supply device, the stable voltage source and the encryption and decryption device. During the startup period of the security system, or, after the startup period of the security system and the encryption/decryption device performs encryption/decryption, only the supply voltage is selected as the driving voltage of the encryption/decryption device. After the startup period of the security system and the encryption and decryption device does not perform encryption and decryption, the voltage only the regulated voltage is selected as the driving voltage of the encryption and decryption device.
    Type: Grant
    Filed: September 20, 2022
    Date of Patent: January 14, 2025
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventors: Po-Hsuan Huang, Chung Ming Hsieh
  • Patent number: 12197308
    Abstract: On-circuit utilization monitoring may be performed for a systolic array. A current utilization measurement may be determined for processing elements of a systolic array and compared with a prior utilization measurement. Based on the comparison, a throttling recommendation may be provided to a management component to determine whether to perform the throttling recommendation.
    Type: Grant
    Filed: November 6, 2020
    Date of Patent: January 14, 2025
    Assignee: Amazon Technologies, Inc.
    Inventors: Thomas A Volpe, Ron Diamant
  • Patent number: 12176711
    Abstract: Disclosed techniques relate to orchestrating power consumption reductions across a number of hosts. A current value for an aggregate power threshold of a plurality of hosts may be identified. During a first time period, an aggregate power consumption of the plurality of hosts may be managed using the current value for the aggregate power threshold. A triggering event indicating a modification to the aggregate power threshold is needed may be detected. A new value for the aggregate power threshold may be determined based on the triggering event. During a second time period, the aggregate power consumption of the plurality of hosts may be managed using the new value for the aggregate power threshold.
    Type: Grant
    Filed: June 21, 2023
    Date of Patent: December 24, 2024
    Assignee: Oracle International Corporation
    Inventors: Roy Mehdi Zeighami, Sumeet Kochar, Jonathan Luke Herman, Mark Lee Huang
  • Patent number: 12176706
    Abstract: A method of power management of one or more line modules in a network device includes obtaining a power rating of a line module of the one or more line modules; determining, based on the power rating, one or more of a current threshold and a shutdown voltage for the line module; and providing the current threshold and the shutdown voltage to the line module for storage thereon, wherein the line module is configured to monitor the current threshold and the shutdown voltage and operate based thereon.
    Type: Grant
    Filed: February 6, 2024
    Date of Patent: December 24, 2024
    Assignee: Ciena Corporation
    Inventors: Michael J. Wingrove, Matthew William Connolly
  • Patent number: 12164961
    Abstract: This disclosure provide various techniques for decreasing the amount of energy consumed on an electronic device by one or more background processes. By implementing a fast energy accounting engine that may quickly detect changes in energy usage by the background processes and report the changes to a dynamic activity scheduler, a system may decrease the overall energy consumed by the one or more background processes.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: December 10, 2024
    Assignee: Apple Inc.
    Inventors: Conor J. O'Reilly, Arjun S. Vasudevan, Gina B Lu, Kartik R. Venkatraman, Abhinav Pathak
  • Patent number: 12164365
    Abstract: An apparatus and method for efficiently managing power consumption among multiple, replicated functional blocks of an integrated circuit. An integrated circuit includes multiple, replicated functional blocks that use separate power domains. Data of a given type is stored in an interleaved manner among at least two of the multiple functional blocks. In one implementation, a prior static allocation determines that only a subset of the functional blocks store the data of the given type. In another implementation, each of the functional blocks stores the data of the given type, and when an idle state has occurred, data of the given type is moved between the multiple functional blocks until one or more functional blocks no longer store data of the given type. When a transition to the idle state has occurred, the functional blocks that do not store the data of the given type are transitioned to a sleep state.
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: December 10, 2024
    Assignees: Advanced Micro Devices, Inc, ATI Technologies ULC
    Inventors: Gia Tung Phan, Ashish Jain, Shang Yang
  • Patent number: 12164448
    Abstract: Various embodiments include methods and devices for implementing a Peripheral Component Interconnect Express (PCIe) link state transition by a computing device. Embodiments may include comprising retrieving, by a PCIe controller, PCIe link configuration data from a memory for a PCIe link in a fast recovery low power state of a link training status and state machine (LTSSM), and re-initializing, by the PCIe controller, the PCIe link using the PCIe link configuration data retrieved from the memory. Embodiments may further include maintaining the PCIe link configuration data in the memory for the PCIe link in the fast recovery low power state of the LTSSM by providing auxiliary power to PCIe configuration registers for the PCIe controller.
    Type: Grant
    Filed: August 22, 2022
    Date of Patent: December 10, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Ravindranath Doddi, Santhosh Reddy Akavaram, Prakhar Srivastava
  • Patent number: 12164278
    Abstract: Techniques described herein relate to methods and systems for thermal management of a thermal environment. The method may include using thermal data items from computing devices and time series analysis to predict future thermal values for the thermal data items; performing a clustering analysis using the predicted future thermal values to assign cluster labels to the computing devices; using the cluster labels and the predicted future thermal values to assign predicted thermal status labels to the computing devices; assigning a confidence value to the predicted thermal status labels and ranking the computing devices based on the confidence values; performing an analysis to determine a thermal data item contributing to the assigned thermal status; and sending the results to a thermal environment administrator.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: December 10, 2024
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Rahul Deo Vishwakarma, Hemant Gaikwad, Ashish Singh
  • Patent number: 12158776
    Abstract: A dock for a mobile device includes a housing; a mobile device connector disposed at least partially within the housing; a power source connector for coupling a power source to the dock, wherein the power source connector is electrically coupled to the mobile device connector; a controller disposed in the housing for facilitating data transfer between the mobile device and a data device, wherein the controller is electrically coupled to the mobile device connector; a data device connector for coupling the data device to the dock, wherein the data device connector is electrically coupled to the controller; wherein the controller, data device connector, power source connector, and mobile device connector are configured for simultaneously providing data transfer between the mobile device and the data device and charging the mobile device using the power source with a charging current of at least 1 Amp.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: December 3, 2024
    Assignee: National Products, Inc.
    Inventors: Jeffrey D. Carnevali, Scott Anderson
  • Patent number: 12147286
    Abstract: Power management circuitry in the solid state drive monitors activity on the plurality of media channels to coordinate an active period and an idle period using credits to manage a power budget for the solid state drive. The power management circuitry to coordinate active and idle periods across components in a workload pipeline in the solid state drive for a given performance target to obtain an optimal power and thermal profile.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: November 19, 2024
    Assignee: Intel Corporation
    Inventors: Anoop Mukker, Romesh Trivedi, Suresh Nagarajan
  • Patent number: 12140671
    Abstract: A scanning imaging sensor is configured to sense an environment through which a vehicle is moving. A method for determining one or velocities associated with objects in the environment includes generating features from the first set of scan lines and the second set of scan lines, the two sets corresponding to two instances in time. The method further includes generating a collection of candidate velocities based on feature locations and time differences, the features selected pairwise with one from the first set and another from the second set. Furthermore, the method includes analyzing the distribution of candidate velocities, for example, by identifying one or more modes from the collection of the candidate velocities.
    Type: Grant
    Filed: October 7, 2020
    Date of Patent: November 12, 2024
    Assignee: Luminar Technologies, Inc.
    Inventors: Pranav Maheshwari, Meseret R. Gebre, Shubham C. Khilari, Vahid R. Ramezani
  • Patent number: 12135601
    Abstract: A data processor includes a plurality of requestors, a plurality of responders, and a data fabric. The data fabric is for routing requests between the plurality of requestors and the plurality of responders and has a plurality of non-operational power states including a normal C-state and a light-weight C-state. The light-weight C-state has lower entry and exit latencies than the normal C-state. The data fabric monitors traffic through the data fabric and places the data fabric in the light-weight C-state in response to detecting an idle traffic state.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: November 5, 2024
    Assignees: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Benjamin Tsien, Alexander J. Branover, Dilip Jha, James R. Magro, MingLiang Lin, Kostantinos Danny Christidis, Hui Zhou
  • Patent number: 12135528
    Abstract: Methods and systems for power management are disclosed. The disclosed power management may facilitate the use of different components that may have different electrical current capacity limitations. The current capacity limitations may be based on, for example, physical limitations of the components, regulatory limitations, organizational limitations, and/or other considerations. It may not be desirable to exceed the current capacity limitations. By implementing the disclosed power management methods, systems, and/or devices, operation of devices may be less likely to result in the current drawn through devices such as power cables exceeding the current capacity limitations even while other devices operably connected to the cables do not have such current capacity limitations.
    Type: Grant
    Filed: October 6, 2021
    Date of Patent: November 5, 2024
    Assignee: Dell Products L.P.
    Inventors: Geoffrey Allen Dillon, Craig Anthony Klein
  • Patent number: 12130687
    Abstract: A computer-implemented method of controlling power consumption in a multi-processor computing device comprises: determining whether a first processor is operating in a high-power regime or a low-power regime; selecting a first set of control rules that includes a first subset of control rules that apply when the first processor is operating in the high-power regime and a second subset of control rules that apply when the first processor is operating in the low-power regime; determining one or more power settings for the first processor based on the first set of control rules; and causing the first processor to perform one or more operations based on the one or more power settings.
    Type: Grant
    Filed: October 6, 2022
    Date of Patent: October 29, 2024
    Assignee: NVIDIA CORPORATION
    Inventors: Thomas E. Dewey, Michael Irwin, Simon Lai, Sau Yan Keith Li
  • Patent number: 12130685
    Abstract: An electronic device includes a communication device to receive a command from another electronic device while the electronic device is in a power saving state, where the command is different from a wake command; and a processor to transition the electronic device from the power saving state to: a partial wake state when the command indicates a first operation; and a full wake state when the command indicates a second operation.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: October 29, 2024
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Isaac Lagnado, Christopher Charles Mohrman
  • Patent number: 12124712
    Abstract: A storage system includes a storage controller and a plurality of storage drives. The storage controller holds power management information for managing power supplied to the storage system and power consumption of an operating mounted device of the storage system, and definition information for defining a relationship between power states and power consumption of the plurality of storage drives. The storage controller determines a power budget that can be supplied to the plurality of storage drives, based on the power management information according to a change in a configuration of the storage system, and determines a power state of each of the plurality of storage drives based on the power budget and the definition information.
    Type: Grant
    Filed: March 7, 2023
    Date of Patent: October 22, 2024
    Assignee: Hitachi, Ltd.
    Inventors: Naoya Okada, Kentaro Shimada, Yuki Kotake, Yukiyoshi Takamura
  • Patent number: 12117885
    Abstract: Systems and methods are disclosed for electronic device power consumption grading. In some examples, similar electronic devices may consume different amounts of power due to variations in components of the electronic devices. The components can include electrical components (e.g., discrete circuits, integrated circuits, etc.), mechanical components (e.g., motors, traces, etc.), electro-mechanical components (e.g., switches, motors, piezoelectric devices, etc.). Power consumption information for specific components can be determined and a power consumption grading for the specific electronic device can be determined from the power consumption information. A user may then utilize the power consumption grading to optimize a usage of the electronic device.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: October 15, 2024
    Inventors: Li Hong Zhang, Mark A. Gaertner
  • Patent number: 12117881
    Abstract: Methods, apparatus, and processor-readable storage media for automated power-related device usage determinations using artificial intelligence techniques are provided herein. An example computer-implemented method includes determining power-related information for one or more devices by processing utilization data associated with the device(s) using artificial intelligence techniques; determining, based at least in part on the power-related information, multiple instances of inactivity and durations thereof for the device(s); determining at least one particular duration of inactivity for the device(s) based at least in part on a number of occurrences of each of the determined durations of instances of inactivity; generating, based at least in part on the at least one particular duration of inactivity, one or more sleep mode configuration modification recommendations for the device(s); and performing one or more automated actions based on the one or more sleep mode configuration modification recommendations.
    Type: Grant
    Filed: February 7, 2023
    Date of Patent: October 15, 2024
    Assignee: Dell Products L.P.
    Inventors: Parminder Singh Sethi, Lakshmi Nalam, Vasanth Sathyanarayanan
  • Patent number: 12105661
    Abstract: An electronic device is provided. The electronic device includes a first power management integrated circuit (PMIC) with a first fault controller connected to a first node and a first interface circuit connected to a second node; a second PMIC with a second fault controller connected to the first node and a second interface circuit connected to the second node; and a third PMIC with a third fault controller connected to the first node and a third interface circuit connected to the second node. The first fault controller is configured to, during a power on sequence or a power off sequence, detect a change in a voltage level of the first node. The first interface circuit is configured to communicate with any one or any combination of the second interface circuit and communication and the third interface circuit based on the change in the voltage level of the first node.
    Type: Grant
    Filed: June 17, 2022
    Date of Patent: October 1, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Minshik Seok, Siyoung Ok, Jaekyu Jang, Seungjae Lee, Younghoon Lee, Jeehye Lee, Sangjoo Jun
  • Patent number: 12099730
    Abstract: A data storage system with intelligent power management includes a plurality of data storage devices and a controller. Each data storage device is capable of operating in one of (N+1) power saving functions where N is an integer larger than 1. The (N+1) power saving functions sequentially correspond to from the 0th to the Nth power saving levels. The controller reads a user-setting power saving level (I) where I is an integer index ranging from 0 to N. The controller reads a current power saving level (J) of a current power saving function of one of the plurality of data storage devices where J is an integer index ranging from 0 to N. The controller controls said one data storage device to operate in one power saving function among the (N+1) power saving functions according to the user-setting power saving level (I) and the current power saving level (J).
    Type: Grant
    Filed: May 23, 2023
    Date of Patent: September 24, 2024
    Assignee: PROMISE TECHNOLOGY, INC.
    Inventors: Zhi-Yu Wu, Cheng-Chou Wang, Che-Jen Wang
  • Patent number: 12099392
    Abstract: A dynamic power consumption estimation method includes recording a statistical value of each of n target signals of a to-be-measured target in a unit time, where the target signal is a clock signal obtained after clock gating and the statistical value is a quantity of times toggling, or the target signal is a clock gating signal and the statistical value is a quantity of enable cycles, and calculating the dynamic power consumption of the to-be-measured target in the unit time based on the statistical value of each of the n target signals in the unit time.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: September 24, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Wei Wei, Zhou Zhou, Yuwei Pu
  • Patent number: 12095575
    Abstract: A server for regulating power from a Power-over-Ethernet switch to a plurality of vision sensors includes the following operations. An evaluation of individual contributions that each of the plurality of vision sensors makes to operational efficiency of the vision system is performed. Information indicative of a degradation condition to the plurality of vision sensors is received from the plurality of vision sensors. An amount of power needed to be supplied from the switch to alleviate the degradation condition of the plurality of vision sensors is estimated based upon the information indicative of the degradation condition. A determination is made that a total amount of power supplied from the switch exceeds an available amount of power capable of being supplied from the switch. Power from the switch to the plurality of vision sensors is individually regulated in real-time using a prioritization determined according to the evaluation.
    Type: Grant
    Filed: March 30, 2022
    Date of Patent: September 17, 2024
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Aaron K. Baughman, Debra Scott, Michael Egger, Christian Eggenberger
  • Patent number: 12093108
    Abstract: Provided are a memory control method and an electronic device performing the method. A memory control method according to an embodiment may include measuring an internal temperature of a processor by a thermal manage unit, predicting a leakage current of a first memory based on the internal temperature and a voltage applied to the first memory, and controlling the operation of the first memory. The processor may access a second memory following accessing the first memory.
    Type: Grant
    Filed: February 15, 2023
    Date of Patent: September 17, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myungkee Lee, Chiwoong Byun