Power Sequencing Patents (Class 713/330)
  • Patent number: 10289519
    Abstract: A rack management system and a rack management method thereof are disclosed; wherein the storage management system is used for managing a plurality of chassis. The storage management system includes a rack, a resistor cable, a power supply module, a detection module, and a processing module. The rack has a plurality of storage portions for disposing the plurality of chassis respectively. The resistor cable is disposed in the rack for corresponding to each storage space. The power supply module is used for supplying a power signal to the resistor cable. When the plurality of chassis is disposed in the plurality of storage portions, the detection module detects the resistor cable to generate a plurality of detection signals. The processing module records locations of the plurality of chassis based on the plurality of detection signals.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: May 14, 2019
    Assignee: Wiwynn Corporation
    Inventors: Pei-Ling Yu, Shih-Tang Shen, Bing-Kun Syu
  • Patent number: 10289429
    Abstract: Embodiments of a multiple sign controller are generally described herein. Many embodiments include a multiple sign controller system. In some embodiments, the multiple sign controller can comprise a computer, a single instance of an operating system configured to run on the computer, two or more virtual sign controller instances, one or more physical communication ports coupled to the computer, and two or more virtual ports configured to run on the single instance of the operating system. In many embodiments, a first virtual port of the two or more virtual ports can be associated with a first virtual sign controller instance of the two or more virtual sign controller instances. Other embodiments may be described and claimed.
    Type: Grant
    Filed: January 28, 2016
    Date of Patent: May 14, 2019
    Inventor: Robert Charles Stadjuhar, Jr.
  • Patent number: 10209767
    Abstract: In one embodiment, an integrated circuit includes a power management architecture in which one or more pipelines are actively powered and clocked when data is provided for processing, but which are clock gated and in retention when there is no data to be processed. When data is provided to the pipeline, supply voltage may be actively provided to initial stages of the pipeline and the clocks may be ungated when the voltage is stable enough for operation. Subsequent stages of the pipeline may be sequentially provided power and clocks as the data progresses through the pipeline. Initial stages may be clock gated and power may be deactivated when additional data is not provided for processing. Accordingly, when the pipeline is viewed as a whole, power may be seen as rolling forward ahead of the data processing, and power may be inhibited in a similar rolling fashion.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: February 19, 2019
    Assignee: Apple Inc.
    Inventors: Joseph T. DiBene, II, David A. Hartley, Inder M. Sodhi
  • Patent number: 10185382
    Abstract: Described is an apparatus comprising: first and second processing cores; and a PCU which is operable to: generate a first VID for an off-die regulator external to the apparatus, the first VID resulting in a first power supply for the first processing core; and generate a second VID different from the first VID, the second VID resulting in a second power supply for the second processing core. Described is an apparatus comprising: a plurality of power-gate transistors controllable by a digital bus, the plurality of power-gate transistors operable to provide a first power supply to a processing core, and to receive a second power supply as input; an ADC to receive the first power supply and to generate a digital output representative of the first power supply; and a controller to receive the digital output representative and to generate the digital bus for controlling the plurality of power-gate transistors.
    Type: Grant
    Filed: October 12, 2016
    Date of Patent: January 22, 2019
    Assignee: Intel Corporation
    Inventors: Ramnarayanan Muthukaruppan, Harish K. Krishnamurthy, Mohit Verma, Pradipta Patra, Uday Bhaskar Kadali
  • Patent number: 9929659
    Abstract: A driver circuit for synchronous rectifier electronic switches, such as SR MOSFETs in resonant converters controls a pair of synchronous rectifier electronic switches to apply thereto a drive voltage to switch the synchronous rectifier electronic switches on and off synchronously with a converter current. The driver circuit includes a programming module to produce a first signal indicative of the figure of merit of the synchronous rectifier electronic switches, and, optionally, a current sensing module to produce a second signal indicative of the output current of the synchronous rectifier electronic switches. An output module is included to generate a value for the drive voltage which is a function of the first signal indicative of the figure of merit and, optionally, of the second signal indicative of the output current of the synchronous rectifier electronic switches.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: March 27, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventors: Maurizio Foresta, Alberto Iorio
  • Patent number: 9923372
    Abstract: A system includes energy modules configured to output power to an energy management bus based on load demands. A power storage device is configured to compensate for power transients at the energy management bus. The system also includes control circuitry configured to process sensor data to determine load sharing curves for the energy modules based on load demands, align the energy modules to output power based on the load sharing curves to the energy management bus, and provide power to one or more loads at one or more predetermined voltages.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: March 20, 2018
    Assignee: TOYOTA MOTOR ENGINEERING & MANUFACTURING NORTH AMERICA, INC.
    Inventors: Masanori Ishigaki, Atsushi Iwai
  • Patent number: 9860945
    Abstract: Power consumption in a start-up circuit for a LED-based light bulb may be reduced by digitally switching a transistor of the start-up circuit coupled to the input voltage. When the transistor is digitally switched between on and off, a reduced amount of power is dissipated by the transistor, because it may not enter a saturation region of operation where the resistance of the transistor between drain and source terminals increases. The transistor may be coupled to a voltage regulator for generating one or more output voltages, including a supply voltage for a host controller IC. The transistor may be switched on and off by a digital signal generated by logic circuitry, which may decide to switch the transistor on and off based on a voltage level at an output of the voltage regulator.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: January 2, 2018
    Assignee: PHILIPS LIGHTING HOLDING B.V.
    Inventors: Erik J. Mentze, Karl Thompson
  • Patent number: 9846472
    Abstract: A firmware update method is provided for use in an information processing system powered by a power system. The power system is powered by an external power source and the power system includes a rechargeable battery and a controller. The method includes checking a power status of the rechargeable battery through the controller in response to a firmware update procedure. A power status of the rechargeable battery is determined to be sufficient to perform the firmware update procedure, and an insufficiency of the external power source to power the power system is determined. Power for the firmware update procedure is limited, through the controller, to the rechargeable battery.
    Type: Grant
    Filed: January 6, 2016
    Date of Patent: December 19, 2017
    Assignee: International Business Machines Corporation
    Inventors: Hank C H Chung, Lin C. Hsing
  • Patent number: 9760452
    Abstract: A method for providing backup power to power loads. The method includes a computer processor identifying an indication of a power failure to a computing system. The method further includes identifying a first active power load that is imposed on the computing system by one or more computing devices in the computing system. The method further includes responding to the power failure by activating a first IPU that is connected to the first active power load, identifying a power duration threshold for the first active power load, and determining whether a duration of power stored in the first IPU is less than the identified power duration. The method further includes responding to the determination that the duration of power stored in the first IPU is less than the identified power duration threshold of the first active power load by initiating a shutdown protocol for the first active power load.
    Type: Grant
    Filed: August 6, 2015
    Date of Patent: September 12, 2017
    Assignee: International Business Machines Corporation
    Inventors: Peter W. Kelly, Shankar KM, Mahendra Krishna Mavilla Venkata, Kiruthikalakshmi Periasamy
  • Patent number: 9735563
    Abstract: An apparatus includes a power supply configured to supply power and a first electrical circuit breaker electrically coupled to the power supply. The apparatus includes a first electrical circuit electrically coupled to receive power from the power supply through the first electrical circuit breaker. The apparatus includes a second electrical circuit breaker electrically coupled to the power supply and a second electrical circuit. During operation of the apparatus, in response to detection that at least one of the current and the voltage of the power has exceeded the operating threshold for the first electrical circuit, the power supply and the first electrical circuit breaker are configured to power off, wherein the shutting off of the power supply prevents supplying the power from the power supply to the second electrical circuit breaker that is electrically coupled to the second electrical circuit to receive the power from the power supply.
    Type: Grant
    Filed: April 24, 2014
    Date of Patent: August 15, 2017
    Assignee: Lenovo Enterprise Solutions (Singapore) PTE. LTD.
    Inventors: Wei Tien Chen, George Cheng, Yulianti Darmanto, Peter Cy Huang, JunHom Lin, WJ Tseng
  • Patent number: 9727113
    Abstract: The present application discloses a computing device that can provide a low-power, highly capable computing platform for computational imaging. The computing device can include one or more processing units, for example one or more vector processors and one or more hardware accelerators, an intelligent memory fabric, a peripheral device, and a power management module. The computing device can communicate with external devices, such as one or more image sensors, an accelerometer, a gyroscope, or any other suitable sensor devices.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: August 8, 2017
    Assignee: LINEAR ALGEBRA TECHNOLOGIES LIMITED
    Inventors: Brendan Barry, Richard Richmond, Fergal Connor, David Moloney
  • Patent number: 9722414
    Abstract: A method includes supplying power from a power supply to a first electrical circuit breaker. The method includes detecting whether at least one of a current and a voltage of the power has exceeded an operating threshold for the first electrical circuit. The method includes, in response to detecting that at least one of the current and the voltage of the power has exceeded the operating threshold for the first electrical circuit, shutting off the power supply and the first electrical circuit breaker. The method includes in response to detecting that at least one of the current and the voltage of the power has not exceeded the operating threshold for the first electrical circuit, supplying the power from the power supply to the second electrical circuit breaker that is electrically coupled to the second electrical circuit.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: August 1, 2017
    Assignee: Lenovo Enterprise Solutions (Singapore) PTE. LTD.
    Inventors: Wei Tien Chen, George Cheng, Yulianti Darmanto, Peter C Y Huang, JunHom Lin, W J Tseng
  • Patent number: 9684359
    Abstract: A storage device for connection with a host device via an interface bus, includes a storage unit and a storage controller configured to control access to the storage unit and receive a power disable signal from the host device. The storage controller includes a plurality of processing units, each of which receives an interrupt signal to initiate power disable processing, in response to assertion of the power disable signal.
    Type: Grant
    Filed: August 4, 2015
    Date of Patent: June 20, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shinji Kunishige
  • Patent number: 9575530
    Abstract: A board includes a functional module, and further includes n switch modules, where first ends of the n switch modules are connected to the functional module, and second ends of the n switch modules are connected to n main power interface units respectively, where n is an integer greater than or equal to 2; and a power supply selecting module connected to control ends of the n switch modules, where the power supply selecting module is configured to detect residual power of the n main power interface units, select, from main power interface units with residual power greater than or equal to rated power of the board, a main power interface unit with lowest residual power as a power supply interface unit, and control a switch module connected to the power supply interface unit to be switched on.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: February 21, 2017
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Wenzong Cao, Zhe Li, Pinhua Zhu
  • Patent number: 9444288
    Abstract: If a failure has occurred on the backbone-power-transmission-network side, i.e., the electric-power system, and if the power supply to a power-distributing/transforming substation is stopped, a power-distributing feeder is cut off from the electric-power system. Moreover, a monitor/control apparatus transmits a single-operation-permitting permission signal to a distributed power-source system which is connected to the cut-off power-distributing feeder. Here, the distributed power-source system supplies its power to the power-distributing feeder only during a time-interval in which the system is receiving the permission signal. A general load and an important load, which are connected to the power-distributing feeder, find it possible to continue their activities by taking advantage of this power.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: September 13, 2016
    Assignee: Hitachi, Ltd.
    Inventors: Yasuo Sato, Takafumi Ebara, Masahiro Watanabe
  • Patent number: 9444280
    Abstract: An uninterruptable power supply (UPS) system/method providing power line conditioning and power factor correction (PFC) that incorporates centralized battery backup energy storage architecture is disclosed. The system generally comprises an AC-DC power supply with active PFC (power factor correction) function, a battery transfer switch, an isolated battery charger placed between the utility power source and battery strings, battery strings connecting the battery charger and the battery transfer switch, EMI/Lightning circuitry that provides lighting/line surge protection as well noise suppression functions, and a controller monitoring the quality of the utility power source. Uninterruptable power for data centers is achieved in this context via use of the battery strings, battery transfer switch, battery charger, and controller system configuration. Disclosed methods associated with this system generally permit the UPS to operate in a distributed fashion in support of computing systems within data centers.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: September 13, 2016
    Assignee: LITE-ON, INC.
    Inventor: Victor K. J. Lee
  • Patent number: 9417820
    Abstract: A hybrid drive and associated methods provide low-overhead storage of a hibernation file in the hybrid hard disk drive. During operation, the hybrid drive allocates a portion of solid-state memory in the drive that is large enough to accommodate a hibernation file associated with a host device of the hybrid drive. In addition to the erased memory blocks that are normally present during operation of the hybrid drive, the portion of solid-state memory allocated for accommodating the hibernation file may include over-provisioned memory blocks, blocks used to store a previous hibernation file that has been trimmed, and/or non-dirty blocks.
    Type: Grant
    Filed: December 6, 2012
    Date of Patent: August 16, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Richard M. Ehrlich, Eric R. Dunn, Fernando A. Zayas, Thorsten Schmidt
  • Patent number: 9397567
    Abstract: A method and apparatus for augmenting an external voltage regulator with a shunt integrated voltage regulator is disclosed. In one embodiment, an integrated circuit (IC) includes a load circuit coupled to a supply voltage node. The supply voltage node is electrically coupled to receive a supply voltage from an external voltage regulator. The IC also includes a shunt integrated voltage regulator coupled to the supply voltage node and implemented on the same IC die as the load circuit. If the supply voltage falls below a specified value (e.g., to increased current demand), the integrated voltage regulator may begin supplying current to the load. This may cause the supply voltage to return to within its specified range of the specified value, while allowing the external voltage regulator sufficient time to respond to the increased current demand. Thus, voltage droops on the supply voltage node may be minimized.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: July 19, 2016
    Assignee: Apple Inc.
    Inventors: Shawn Searles, Emerson S Fang
  • Patent number: 9377804
    Abstract: In one embodiment, an apparatus comprises a capacitor and a die. The die comprises a resistor switch coupled between a power line and the capacitor, wherein the resistor switch has an adjustable resistance, and the power line and the capacitor are both external to the die. The die also comprises a circuit configured to receive power from the power line.
    Type: Grant
    Filed: April 10, 2014
    Date of Patent: June 28, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Ryan Michael Coutts, Mikhail Popovich
  • Patent number: 9274899
    Abstract: A mechanism for providing non-volatile memory for suspend-to-RAM in a computer system. A method includes searching for a checkpoint message in a memory upon receipt of notification of restoring of power in a system. The checkpoint message is a confirmation of storing of state of a storage device prior to loss of the power in the system. The method also includes determining whether the checkpoint message indicates that the system reached the power integrity checkpoint. The power integrity checkpoint is a confirmation of the storing of the state of other device prior to the loss of the power in the system. The other device is different from the storage device. The method further includes restoring operating conditions of the system when it is determined that the system has reached the power integrity checkpoint.
    Type: Grant
    Filed: July 11, 2013
    Date of Patent: March 1, 2016
    Assignee: Red Hat, Inc.
    Inventor: Taejun Heo
  • Patent number: 9255581
    Abstract: A fan control system and a method thereof are applicable to a computer device. The system includes a fan, a board management unit, a power control module and a rotation speed switching module. The fan is driven by a control power and a rotation speed control signal. The board management unit provides a fan enabling signal, a rotation speed switching signal and a first fan rotation speed signal in a standby state. The power control module receives the fan enabling signal to determine whether to provide the control power to the fan, and switches between an auxiliary power or a main power served as the control power to the fan. The rotation speed switching module receives the rotation speed switching signal to accordingly switch between the first fan rotation speed signal or a second fan rotation speed signal served as the rotation speed control signal to the fan.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: February 9, 2016
    Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventor: Chia-Hsiang Chen
  • Patent number: 9250896
    Abstract: According to one embodiment, a method includes receiving, at a host, an instruction to execute a command that instructs at least one system at a site and in communication with the host via one or more fiber channels to each execute a script, the script being for automatically shutting down components of the at least one system in an order defined by the script, and issuing the command to the at least one system at the site via the one or more fiber channels.
    Type: Grant
    Filed: October 24, 2013
    Date of Patent: February 2, 2016
    Assignee: International Business Machines Corporation
    Inventors: Christopher L. Grimes, Gerard N. Kimbuende, Rex R. Newton, David J. Reich
  • Patent number: 9244508
    Abstract: An electronic device includes a power input unit through which power from an external power source can be input, a battery connector that is electrically connectable to a battery, a device connector that is electrically connectable to a removable external device, and a power controller that controls supply of power to the external device from the external power source and the battery. When the external device is connected to the connector, the power controller stops supplying power from the power input unit and supplies power from the battery to the external device, before supplying power from the external power source to the external device.
    Type: Grant
    Filed: January 23, 2013
    Date of Patent: January 26, 2016
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventor: Satoshi Horie
  • Patent number: 9244681
    Abstract: Various aspects of the present invention relate to automated shutdown of a tiered system. In one embodiment, at a host, an instruction is received to execute a command that instructs at least one system at a site and in communication with the host via one or more fiber channels to each execute a script, the script being for automatically shutting down components of the at least one system in an order defined by the script. The command is issued to the at least one system at the site via the one or more fiber channels.
    Type: Grant
    Filed: January 3, 2013
    Date of Patent: January 26, 2016
    Assignee: International Business Machines Corporation
    Inventors: Christopher L. Grimes, Gerard N. Kimbuende, Rex R. Newton, David J. Reich
  • Patent number: 9239610
    Abstract: The present application is directed to systems and methods for managing data in a system for hibernation states. In one implementation, a memory device comprises a controller memory, a main memory, a buffer to the main memory and a controller comprising a processor. The processor is configured to manage data storage in conjunction with hibernation of the memory device. The processor is in communication with the controller memory, the main memory and the buffer, and is configured to read data from the controller memory; write at least a portion of the data read from the controller memory into the buffer prior to the memory device entering a hibernation state; and after writing the at least a portion of the data read from the controller memory into the buffer and prior to the memory device entering the hibernation state, reduce an amount of power provided to the buffer of the to a reduced power level.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: January 19, 2016
    Assignee: SanDisk Technologies Inc.
    Inventors: Yair Baram, Hanan Borukhov, Idan Alrod, Eran Sharon
  • Patent number: 9223365
    Abstract: A system, semiconductor device and method for providing a controlled system reset sequence with lower power consumption without dependency on fuses, PLL's and external XTAL's. A method to simplify a boot sequence by using a ring oscillator that compensates for voltage and temperature variations while also removing the dependency on parallel fuses, PLL's and external XTAL's.
    Type: Grant
    Filed: March 16, 2013
    Date of Patent: December 29, 2015
    Assignee: Intel Corporation
    Inventors: Ivan Herrera Mejia, Vishram Sarurkar, Vijay K. Vuppaladadium
  • Patent number: 9219382
    Abstract: A control apparatus includes: a detection section configured to detect whether a rechargeable battery is in a fully charged state or not, and if the detection section detects that the rechargeable battery is in the fully charged state, an execution control section configured to give an instruction to an execution apparatus to execute a holdable task using electric power supplied from the rechargeable battery.
    Type: Grant
    Filed: February 21, 2012
    Date of Patent: December 22, 2015
    Assignee: SONY CORPORATION
    Inventor: Norifumi Kikkawa
  • Patent number: 9170822
    Abstract: Methods, systems, and apparatuses, including computer programs encoded on a computer storage media, for entering a limited functionality mode on a mobile device. In one aspect, a method includes receiving, at a portable electronic device, a first signal instructing the portable electronic device to enter a limited functionality mode, in which one or more transmission functionalities associated with the portable electronic device are disabled, determining whether the portable electronic device has received a second signal instructing the device to immediately enter the limited functionality mode, in response to receiving the first signal, waiting until one or more tasks that use the transmission functionalities are completed or until the second signal is determined to have been received, and entering the limited functionality mode after waiting until the one or more tasks that use the transmission functionalities are completed or until the second signal is determined to have been received.
    Type: Grant
    Filed: May 10, 2013
    Date of Patent: October 27, 2015
    Assignee: Google Inc.
    Inventor: Jeffrey A. Sharkey
  • Patent number: 9170889
    Abstract: The invention is a method of operating a system having multiple finite state machines and a controller. Each finite state machine enters an offline state upon detection of anomalous operation. The controller detects whether all finite state machines are offline. The controller transmits an online activation event signal to each finite state machine when all are offline. Each finite state machine evaluates entering the online state if current conditions permit. Reentering the online state includes loading a predetermined set of operating parameters. The finite state machines are responsive only to a reset event and an online activation event when in the offline state.
    Type: Grant
    Filed: August 21, 2009
    Date of Patent: October 27, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Gary L. Swoboda
  • Patent number: 9164565
    Abstract: In an embodiment, a processor includes at least one processor core and power control logic having energy usage logic to predict an energy usage of the processor and a voltage regulator coupled to the processor, during a low power period according to a first voltage regulator control mode and a second voltage regulator control mode, and to control the voltage regulator based at least in part on the predicted energy usage. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: October 20, 2015
    Assignee: Intel Corporation
    Inventors: Shaun M. Conrad, Stephen H. Gunther
  • Patent number: 9141167
    Abstract: In an embodiment, a processor includes at least one processor core and power control logic having energy usage logic to predict an energy usage of the processor and a voltage regulator coupled to the processor, during a low power period according to a first voltage regulator control mode and a second voltage regulator control mode, and to control the voltage regulator based at least in part on the predicted energy usage. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: September 22, 2015
    Assignee: Intel Corporation
    Inventors: Shaun M. Conrad, Stephen H. Gunther
  • Patent number: 9116679
    Abstract: A storage device including a communications interface configured to receive data and power, a plurality of disk drives configured to be powered only by the power received by the communications interface, a controller configured to configure the plurality of disk drives as a redundant array of independent disks, a power regulator configured to transmit the received power from the communications interface to the plurality of disk drives, and a peak current reduction circuit configured to reduce peak current usage by the plurality of disk drives.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: August 25, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventors: Musa I. Kakish, Charles A. Neumann
  • Patent number: 9047075
    Abstract: An uninterruptable power supply (UPS) system/method providing power line conditioning and power factor correction (PFC) that incorporates centralized battery backup energy storage architecture is disclosed. The system generally comprises an AC-DC power supply with active PFC (power factor correction) function, a battery transfer switch, an isolated battery charger placed between the utility power source and battery strings, battery strings connecting the battery charger and the battery transfer switch, EMI/Lightning circuitry that provides lighting/line surge protection as well noise suppression functions, and a controller monitoring the quality of the utility power source. Uninterruptable power for data centers is achieved in this context via use of the battery strings, battery transfer switch, battery charger, and controller system configuration. Disclosed methods associated with this system generally permit the UPS to operate in a distributed fashion in support of computing systems within data centers.
    Type: Grant
    Filed: October 8, 2014
    Date of Patent: June 2, 2015
    Inventor: Victor K. J. Lee
  • Patent number: 9047076
    Abstract: An uninterruptable power supply (UPS) system/method providing power line conditioning and power factor correction (PFC) that incorporates centralized battery backup energy storage architecture is disclosed. The system generally comprises an AC-DC power supply with active PFC (power factor correction) function, a battery transfer switch, an isolated battery charger placed between the utility power source and battery strings, battery strings connecting the battery charger and the battery transfer switch, EMI/Lightning circuitry that provides lighting/line surge protection as well noise suppression functions, and a controller monitoring the quality of the utility power source. Uninterruptable power for data centers is achieved in this context via use of the battery strings, battery transfer switch, battery charger, and controller system configuration. Disclosed methods associated with this system generally permit the UPS to operate in a distributed fashion in support of computing systems within data centers.
    Type: Grant
    Filed: August 15, 2014
    Date of Patent: June 2, 2015
    Inventor: Victor K. J. Lee
  • Publication number: 20150149806
    Abstract: The various implementations described herein include systems, methods and/or devices used to enable power sequencing and data hardening in a storage device. In one aspect, the method includes determining whether a power supply voltage provided to the storage device is higher than an over-voltage threshold. The method further includes, in accordance with a determination that the power supply voltage is higher than the over-voltage threshold, performing a power fail operation, the power fail operation including: (1) signaling a power fail condition to a plurality of controllers on the storage device, (2) transferring data held in volatile memory to non-volatile memory, and (3) removing power from the plurality of controllers on the storage device.
    Type: Application
    Filed: December 19, 2013
    Publication date: May 28, 2015
    Applicant: SanDisk Enterprise IP LLC
    Inventors: Gregg S. Lucas, Kenneth B. Delpapa, Lace J. Herman, Robert W. Ellis
  • Patent number: 9041942
    Abstract: An image forming apparatus includes: an applying device configured to generate an output signal and apply the output signal to an image forming device; and a controller configured to generate a control signal to supply to the applying device so as to control a value of the output signal so that the value of the output signal is within a predetermined target range and control the applying device using the control signal in a start-up mode and in a normal mode, the normal mode being subsequent to the start-up mode. In the start-up mode, the controller sets a start control signal value larger than a value of the control signal immediately after a first predetermined time, the start control signal value being the value of the control signal during the first predetermined time, the first predetermined time being from a start timing of the start-up mode.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: May 26, 2015
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventors: Masamitsu Takahashi, Katsumi Inukai
  • Patent number: 9032236
    Abstract: A semiconductor device includes an internal circuit, a power supply control circuit which controls supply of a power supply to the internal circuit upon receipt of a first control signal, and a control signal generation circuit which outputs the first control signal upon receipt of a second control signal. The control signal generation circuit does not deactivate the first control signal when an inactive period of the second control signal is equal to or less than a first period and deactivates the first control signal when the inactive period of the second control signal is more than the first period.
    Type: Grant
    Filed: February 14, 2014
    Date of Patent: May 12, 2015
    Assignee: PS4 Luxco S.A.R.L.
    Inventor: Ryo Hirano
  • Patent number: 9015514
    Abstract: Systems and methods are provided for implementing a persistent battery system shutdown condition when a battery pack voltage level drops below a predetermined minimum acceptable operating voltage threshold that is above a pre-determined permanent failure operating voltage threshold at which the battery pack is permanently disabled. The disclosed systems and methods may be implemented such that shutdown portion of the power-consuming components of the information handling system are not allowed to be restarted until external power has been first provided and applied to at least partially recharge the battery cells of the battery pack to a battery voltage level that is above the minimum acceptable operating voltage threshold and/or when sufficient external power is applied to power the information handling system and at the same time charge the battery cells of the battery pack.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: April 21, 2015
    Assignee: Dell Products LP.
    Inventors: Andrew T. Sultenfuss, Gary J. Verdun, Richard C. Thompson
  • Patent number: 9001351
    Abstract: An image forming apparatus includes first through third control units, with the first for processing input image information and each of the second and third for controlling an operation of an image forming unit by communication with the first. In a first mode, in which power is supplied to the first through third control units, the first and third control units communicate via the second control unit. In a second mode, in which the first control unit does not communicate with the second control unit, the first and third control units communicate via a communication line without communicating via the second control unit. The power consumption of the second mode is lower than that of the first mode. In the second mode, the first and third control units can transmit information for transition from the second mode to the first mode to each other via the communication line.
    Type: Grant
    Filed: January 29, 2014
    Date of Patent: April 7, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hidehiro Wakamiya, Marehiko Hirajima
  • Patent number: 9003208
    Abstract: An apparatus and method provide power to perform functions on a computing device. In one example, the apparatus contains multiple processors that may operate at different power levels to consume different amounts of power. Also, any of the multiple processors may perform different functions. For example, one processor may be a low power processor that may control or operate at least one peripheral device to perform a low capacity function. Control may also switch from the low power processor to a high capacity processor. In one example, the high capacity processor controls the low power processor and further controls the at least one peripheral device through the lower power processor.
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: April 7, 2015
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Gregory H. Parks, Erik Michael Geidl, Andrew John Fuller, Troy Scott Jones
  • Publication number: 20150095706
    Abstract: A method comprises a system comprising a host device coupled to a first remote device actively operating according to a state diagram that the host device and all remote devices follow during operation of the system. The method further comprises powering up a second remote device while the host device and first remote device are actively operating according to the state diagram. The second remote device determines whether to initialize to a standard protocol or to an advanced protocol. Upon determining to initialize to the advanced protocol, the second remote device then waits for a synchronization point sequence.
    Type: Application
    Filed: December 15, 2014
    Publication date: April 2, 2015
    Inventor: Gary L. Swoboda
  • Patent number: 8994710
    Abstract: We describe power control techniques for an document reader with an electrophoretic display. In embodiments the document reader comprises a main processor to display information and at least one secondary processor to detect, say, a user input gesture; a battery to provide power to both processors; and a controllable switch coupled between said battery and said main processor and having a control line coupled to said secondary processor, to switch power from said battery to said main processor while said secondary processor is powered. In embodiments a power consumption measured in months is desired so that rather than put the main processor into a standby mode power to the main processor is switched off entirely but the system is arranged to be able to start-up quickly from this configuration.
    Type: Grant
    Filed: February 16, 2009
    Date of Patent: March 31, 2015
    Assignee: Flexenable Limited
    Inventors: Duncan Barclay, Steven Farmer
  • Patent number: 8990602
    Abstract: An apparatus and method is described herein for providing an early wake scheme before spawning a new thread. An early wake indication is provided an amount of time, which may include an amount of time to perform a demotion from a current power state to a lower power state that is closer to an active power state, before a new thread is to be spawned and executed on a processing element (core or thread). Upon encountering the spawn of the new thread, such as a helper thread, the processing element is further transition from the lower power state to an active power state. And the new thread is executed on the processing element without incurring the latency associated with execution of the new thread waiting for the demotion from the current power state to an active power state after the spawn of the new thread.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: March 24, 2015
    Assignee: Intel Corporation
    Inventors: Jayakrishna Guddeti, Binata Bhattacharyya
  • Patent number: 8990597
    Abstract: In one embodiment, the present invention includes a processor having a core with decode logic to decode an instruction prescribing an identification of a location to be monitored and a timer value, and a timer coupled to the decode logic to perform a count with respect to the timer value. The processor may further include a power management unit coupled to the core to determine a type of a low power state based at least in part on the timer value and cause the processor to enter the low power state responsive to the determination. Other embodiments are described and claimed.
    Type: Grant
    Filed: May 10, 2013
    Date of Patent: March 24, 2015
    Assignee: Intel Corporation
    Inventors: Martin G. Dixon, Scott D. Rodgers, Taraneh Bahrami, Stephen H. Gunther, Prashant Sethi, Per Hammarlund
  • Patent number: 8984306
    Abstract: A method for the equal distribution of electric subnetworks among independent generators regardless of the number and availability of the generators in order to ensure power supply to all the subnetworks.
    Type: Grant
    Filed: October 1, 2009
    Date of Patent: March 17, 2015
    Assignees: Novatec SA
    Inventor: Jean-Jacques Carrillo
  • Publication number: 20150074441
    Abstract: A power control device 10 is a power control device that controls power supply from an outside to a plurality of power consuming devices 50, and includes a power supply control device 20 that obtains consumed power values of the plurality of power consuming devices 50 and predicts consumed power values, and controls power supply to the power consuming devices 50 when a prediction value of a total of the obtained consumed power values based on the prediction exceeds a predetermined power value.
    Type: Application
    Filed: February 7, 2013
    Publication date: March 12, 2015
    Applicant: Sony Corporation
    Inventors: Yoichiro Sako, Yasuhiro Yamada, Akira Tange, Satoshi Higano
  • Patent number: 8976404
    Abstract: A printing apparatus having a printing engine, a first control unit, and a second control unit, in which a normal operation is performed by at least the printing engine and the first control unit, a first power saving operation is performed by at least the first control unit while the printing engine is stopped, and a second power saving operation is performed by only the second control unit, the printing apparatus including: a first storage unit of the first control unit that stores a setting value reflecting a setting change performed while the printing apparatus is operated and an operation value not reflecting the setting change performed while the printing apparatus is operated; a second storage unit of the second control unit that stores the setting value and the operation value.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: March 10, 2015
    Assignee: Seiko Epson Corporation
    Inventor: Yu Kobayashi
  • Patent number: 8964779
    Abstract: An electronic controlling device and method is disclosed. One embodiment provides at least one module performing specific functions within one of a plurality of module modes on reception of a corresponding module mode request. A system control unit is provided to operate the at least module in one of a plurality of module modes by distributing a corresponding system mode request. The at least one module is adapted to translate the distributed system mode request to a module mode request which is configurable.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: February 24, 2015
    Assignee: Infineon Technologies AG
    Inventors: Jens Barrenscheen, Harry Siebert
  • Patent number: 8966297
    Abstract: A method and apparatus for bidirectional provision of inline power over data telecommunications cabling permits power to be received at a local powered device (PD) from remote power sourcing equipment (PSE) via at least one conductor at a first time and power to be provided by the local device to a remote device or another device at a second different time.
    Type: Grant
    Filed: April 22, 2013
    Date of Patent: February 24, 2015
    Assignee: Cisco Technology, Inc.
    Inventors: Daniel Biederman, Kenneth Coley, Frederick R. Schindler
  • Publication number: 20150051009
    Abstract: A measurement device may include one or more piezoelectric elements that output power signals. The device may split each power signal, analyzing a first portion of the signal while supplying a second portion to an energy storage assembly. A processor may dynamically adjust the first and second portions of each power signal to change how much of each power signal is used for signal processing versus energy storage, and may make the adjustments based on detected activities and/or pre-programmed timelines. The device may be used in or on sports equipment, such as a golf club.
    Type: Application
    Filed: November 3, 2014
    Publication date: February 19, 2015
    Applicant: Golf Impact, LLC
    Inventor: Roger Davenport