Power Sequencing Patents (Class 713/330)
  • Patent number: 10838479
    Abstract: A management device includes a processor that stores, in a second memory, power source information indicating first states of power sources of respective first electronic apparatuses included in an electronic apparatus group. The processor instructs, upon receiving a first instruction, the first electronic apparatuses identified by first apparatus information held in a first memory to transition the respective first states. The processor receives a second instruction to add a new electronic apparatus to the electronic apparatus group. The processor suppresses, in a case where any one of the first states is being transitioned, second apparatus information of the new electronic apparatus from being stored in the first memory. The processor stores the second apparatus information in the first memory in a case where transition of all the first states has been completed, and matches a second state of a power source of the new electronic apparatus with the first states.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: November 17, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Kouichi Tsukada, Kazumi Kojima
  • Patent number: 10831518
    Abstract: Machine logic (for example, software) for compressing the image of an instance of a VM/container during time period(s) when the VM/container instance is inactive. A proxy is used to handle requests made to the VM/container instance during periods when it is inactive. A dependency graph is used to determine that a related set of instances of VM/containers so that: (i) when one of the VM/container instances of the related set is deactivated, then the whole set of VM/container instances are deactivated together; and/or (ii) when one of the VM/container instances of the related set is reactivated, then the whole set of VM/container instances are reactivated together.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: November 10, 2020
    Assignee: International Business Machines Corporation
    Inventors: Christopher D. Wyble, Gregory J. Boss, Ton A. Ngo, Simeon D. Monov
  • Patent number: 10798774
    Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment may monitor, in a first bandwidth part, of a plurality of bandwidth parts, associated with a first monitoring periodicity and in a downlink control channel, for a downlink control information (DCI) message. The user equipment may selectively transition, based at least in part on the DCI message, from the first bandwidth part to a second bandwidth part, of the plurality of bandwidth parts, associated with a second monitoring periodicity that is less than the first monitoring periodicity. Numerous other aspects are provided.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: October 6, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Peter Pui Lok Ang, Linhai He, Joseph Binamira Soriaga
  • Patent number: 10740089
    Abstract: Methods, systems, and computer programs encoded on computer storage medium, for determining that an update of the PSU firmware is received for a plurality of PSUs of a data center; determining that an update priority flag indicates unthrottled operation of the data center, and in response: determining that a number of PSUs of the data center is greater than a minimum number of PSUs for the unthrottled operation of the data center, and in response, applying the update to each of the PSUs; determining that the number of PSUs of the data center is less than the minimum number of PSUs for the unthrottled operation of the data center, and in response: adjusting a power capacity and maximum current state of the data center, and after adjusting the power capacity and the maximum current state of the data center, applying the update to each of the PSUs.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: August 11, 2020
    Assignee: Dell Products L.P.
    Inventors: Ravi Shekhar Singh, Vaishnavi Suchindran, Craig Anthony Klein, Venkata Nagesh Babu Doddapaneni
  • Patent number: 10732683
    Abstract: In some embodiments, power may be temporarily removed from a first portion of a computer system (such as a display), and that power redirected to a second portion (such as a processor or System on a Chip), so that extra performance may be obtained from the second portion without exceeding the power budget for the system. If the first portion is a display, the time period of removed power may be short enough that the absence of luminance during that time period will not be noticeable to the human vision system. In a similar embodiment, power may be delivered to the first portion using pulse width modulation, using the time between pulses to redirect power to the other portion.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: August 4, 2020
    Assignee: Intel Corporation
    Inventors: Sachin Bedare, Mallari Hanchate, Praveen Kashyap Ananta Bhat, Govindaraj Gettimalli, Vijayakumar A. Dibbad
  • Patent number: 10699798
    Abstract: The present invention extends to methods, systems, and computer program products for testing storage device power circuitry. A storage device controller includes an embedded test program. The storage device controller executes the test program in response to receiving a test command. In one aspect, the test program issues a plurality of different command patterns to test shared power circuitry of storage device components (e.g., shared by an array of NAND flash memory devices). The test program identifies a command pattern that causes a greatest total current draw. In another aspect, the test program issues a specified command pattern (possibly repeatedly) to shared power circuitry to determine if the shared power circuitry fails.
    Type: Grant
    Filed: December 5, 2016
    Date of Patent: June 30, 2020
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Laura Marie Caulfield, Mark Alan Santaniello, J. Michael Andrewartha, John J. Siegler
  • Patent number: 10656959
    Abstract: A method for shutting down a virtual system including several virtual machines hosted by one or more physical servers includes the steps of: receiving a shutdown command for the virtual system or detecting an event that triggers a process for shutting down of the virtual system; sending a request for data about dependencies in the virtual system; retrieving the requested data; generating a sequence of shutdown actions depending on the retrieved requested data, the sequence including a shutting down of all applications executed by the virtual machines, the shutting down of all virtual machines, and then the shutting down of all virtual machine managers; and executing shutdown actions in the generated sequence in order to shut down the virtual system.
    Type: Grant
    Filed: July 14, 2016
    Date of Patent: May 19, 2020
    Assignee: EATON INTELLIGENT POWER LIMITED
    Inventors: Emilien Kia, Aurelien Begou
  • Patent number: 10591970
    Abstract: An industrial asset management system includes a data acquisition system configured to receive asset data associated with at least one industrial asset and to modify the data acquisition system to enable the continued receipt of asset data associated with the at least one industrial asset in response to a detection of an internal change at the data acquisition system by the data acquisition system and a data processing system communicatively coupled to the data acquisition system and configured to process the asset data received from the data acquisition system and to modify the data processing system for the continued processing of the asset data in response to a detection by the data processing system of an internal change at the data processing system or the data acquisition system.
    Type: Grant
    Filed: May 15, 2017
    Date of Patent: March 17, 2020
    Assignee: ABB Schweiz AG
    Inventors: Karl Eric Harper, Karen J. Smiley, Steven W. Hudnut
  • Patent number: 10592629
    Abstract: When a transition control unit stochastically determines whether to accept one of a plurality of state transitions, using a temperature, an energy change, and a random number, depending on a relative relationship between the energy change and thermal excitation energy, the transition control unit adds an offset to the energy change, controls the offset so as to be larger at a local minimum, at which the energy is locally minimized, than at a solution at which the energy is not minimized, and resets the offset to zero when the energy change value is larger than a threshold.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: March 17, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Satoshi Matsubara, Motomu Takatsu
  • Patent number: 10579763
    Abstract: When stochastically deciding, based on a change in energy and a random number relating to thermal excitation, whether to accept any of a plurality of state transitions according to the relative relationship between the change in energy and thermal excitation energy, a transition control unit adds an offset to the change in energy, performs control so that the offset at a local minimum where energy is locally minimized is larger than an offset when the energy is not minimized, holds transition information (a transition number) indicating a previous state transition, and prohibits, based on a decoding result for the held transition information, a first state transition out of the present state transition candidates.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: March 3, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Satoshi Matsubara, Motomu Takatsu
  • Patent number: 10509703
    Abstract: Improved apparatus and system for the backup and recovery of a computer system with minimized key strokes and steps for a user. The improved apparatus and system includes an external hard drive, power controls, keyboard controller, and flash drive, all of which are referred to as the present invention DittoDriveā„¢, to allow a user to copy the contents of a computer hard drive to a second hard drive and then allow the user to operate the computer from either the first hard drive or the second hard drive.
    Type: Grant
    Filed: October 24, 2018
    Date of Patent: December 17, 2019
    Inventors: Gonen Ravid, Josef Rabinovitz
  • Patent number: 10482970
    Abstract: A communication line is connected to first and second chips, and held at a first signal level. A monitor circuit changes a signal level of the communication line from the first signal to a second signal level while one of the first and second chips uses a current larger than a reference current. When the signal level of the communication line is the second signal level, the other of the first and second chips is controlled to a wait state that does not transfer to an operating state of using a current larger than the reference current.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: November 19, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Noboru Shibata, Hiroshi Sukegawa
  • Patent number: 10481663
    Abstract: Systems and methods for managing the operation of Power Supply Units (PSUs) are described. In some embodiments, a method may include: identifying a mismatch between a first Power Supply Unit (PSU) and a second PSU in an Information Handling System (IHS), disabling the first PSU, determining that a voltage at an input line of the first PSU follows a predetermined pattern while the first PSU receives a secondary bias from the second PSU, and enabling the first PSU.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: November 19, 2019
    Assignee: Dell Products, L.P.
    Inventors: Wayne Kenneth Cook, John Erven Jenne, Kyle E. Cross
  • Patent number: 10467959
    Abstract: Disclosed is an organic light-emitting display device including: a display panel; a drive IC configured to supply a driving signal to the display panel; and a controller configured to operate in one of a first driving scheme, in which, when turned on, a sensing period of sensing characteristics of the display panel is executed, after which a display period of displaying an image on the display panel is executed, and a second driving scheme, in which, when turned on, the display period of displaying the image on the display panel is executed, the controller operating in the second driving scheme when turned on within a preset time after having been turned off.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: November 5, 2019
    Assignee: LG Display Co., Ltd.
    Inventors: JinWoo Park, Seokyu Jang, ChangBok Lee
  • Patent number: 10444817
    Abstract: In one embodiment, a processor includes: a graphics processor to execute a workload; and a power controller coupled to the graphics processor. The power controller may include a voltage ramp circuit to receive a request for the graphics processor to operate at a first performance state having a first operating voltage and a first operating frequency and cause an output voltage of a voltage regulator to increase to the first operating voltage. The voltage ramp circuit may be configured to enable the graphics processor to execute the workload at an interim performance state having an interim operating voltage and an interim operating frequency when the output voltage reaches a minimum operating voltage. Other embodiments are described and claimed.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: October 15, 2019
    Assignee: Intel Corporation
    Inventors: Altug Koker, Abhishek R. Appu, Bhushan M. Borole, Wenyin Fu, Kamal Sinha, Joydeep Ray
  • Patent number: 10430311
    Abstract: A simulation environment benchmarks processors to determine processor performance. A benchmark program is instrumented with a microarchitecture instruction. A first clock cycle indicative of a processor before executing the benchmark program is captured. The benchmark program is executed and a processor return related to the microarchitecture instruction is intercepted. In response to the processor return, a second clock cycle indicative of the processor after executing the benchmark program is captured. The simulation environment determines the performance of the processor from the first clock cycle and the second clock cycle.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: October 1, 2019
    Assignee: International Business Machines Corporation
    Inventors: Sascha Eckmann, Thomas Gardelegen, Wolfgang Gellerich, Bodo Hoppe
  • Patent number: 10352972
    Abstract: A measurement and control system comprises a housing and an electrical power distribution sub-system. The housing includes a plurality of addressable and programmable modules, a module rack that is expandable and having a length, and a main controller configured to communicate with the plurality of addressable and programmable modules. Each of the addressable and programmable module is installed on the module rack in a sequential configuration and is addressable based on a specific physical location of it across the length of the module rack. The main controller communicates with the plurality of addressable and programmable modules by addressing through a communication network. The electrical power distribution sub-system is configured to monitor inputs and signals from the each addressable and programmable module.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: July 16, 2019
    Assignee: SIEMENS INDUSTRY, INC.
    Inventor: Amit Nayak
  • Patent number: 10318212
    Abstract: A control device includes a processor. The processor is configured to receive a write request to write content data. The processor is configured to divide the content data into leading first data and subsequent second data. The processor is configured to write the first data to a first storage resource in a first storage group among a plurality of storage groups having operating rates different from each other. The first storage group has a first operating rate higher than operating rates of any other storage groups. The processor is configured to write the second data to a second storage resource in a second storage group. The second storage group has a second operating rate lower than the first operating rate. The processor is configured to activate, in parallel with the writing of the first data, the second storage resource when the second storage resource is in a non-operating state.
    Type: Grant
    Filed: August 2, 2016
    Date of Patent: June 11, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Masaru Shimmitsu, Mikio Ito, Osamu Kimura
  • Patent number: 10289519
    Abstract: A rack management system and a rack management method thereof are disclosed; wherein the storage management system is used for managing a plurality of chassis. The storage management system includes a rack, a resistor cable, a power supply module, a detection module, and a processing module. The rack has a plurality of storage portions for disposing the plurality of chassis respectively. The resistor cable is disposed in the rack for corresponding to each storage space. The power supply module is used for supplying a power signal to the resistor cable. When the plurality of chassis is disposed in the plurality of storage portions, the detection module detects the resistor cable to generate a plurality of detection signals. The processing module records locations of the plurality of chassis based on the plurality of detection signals.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: May 14, 2019
    Assignee: Wiwynn Corporation
    Inventors: Pei-Ling Yu, Shih-Tang Shen, Bing-Kun Syu
  • Patent number: 10289429
    Abstract: Embodiments of a multiple sign controller are generally described herein. Many embodiments include a multiple sign controller system. In some embodiments, the multiple sign controller can comprise a computer, a single instance of an operating system configured to run on the computer, two or more virtual sign controller instances, one or more physical communication ports coupled to the computer, and two or more virtual ports configured to run on the single instance of the operating system. In many embodiments, a first virtual port of the two or more virtual ports can be associated with a first virtual sign controller instance of the two or more virtual sign controller instances. Other embodiments may be described and claimed.
    Type: Grant
    Filed: January 28, 2016
    Date of Patent: May 14, 2019
    Inventor: Robert Charles Stadjuhar, Jr.
  • Patent number: 10209767
    Abstract: In one embodiment, an integrated circuit includes a power management architecture in which one or more pipelines are actively powered and clocked when data is provided for processing, but which are clock gated and in retention when there is no data to be processed. When data is provided to the pipeline, supply voltage may be actively provided to initial stages of the pipeline and the clocks may be ungated when the voltage is stable enough for operation. Subsequent stages of the pipeline may be sequentially provided power and clocks as the data progresses through the pipeline. Initial stages may be clock gated and power may be deactivated when additional data is not provided for processing. Accordingly, when the pipeline is viewed as a whole, power may be seen as rolling forward ahead of the data processing, and power may be inhibited in a similar rolling fashion.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: February 19, 2019
    Assignee: Apple Inc.
    Inventors: Joseph T. DiBene, II, David A. Hartley, Inder M. Sodhi
  • Patent number: 10185382
    Abstract: Described is an apparatus comprising: first and second processing cores; and a PCU which is operable to: generate a first VID for an off-die regulator external to the apparatus, the first VID resulting in a first power supply for the first processing core; and generate a second VID different from the first VID, the second VID resulting in a second power supply for the second processing core. Described is an apparatus comprising: a plurality of power-gate transistors controllable by a digital bus, the plurality of power-gate transistors operable to provide a first power supply to a processing core, and to receive a second power supply as input; an ADC to receive the first power supply and to generate a digital output representative of the first power supply; and a controller to receive the digital output representative and to generate the digital bus for controlling the plurality of power-gate transistors.
    Type: Grant
    Filed: October 12, 2016
    Date of Patent: January 22, 2019
    Assignee: Intel Corporation
    Inventors: Ramnarayanan Muthukaruppan, Harish K. Krishnamurthy, Mohit Verma, Pradipta Patra, Uday Bhaskar Kadali
  • Patent number: 9929659
    Abstract: A driver circuit for synchronous rectifier electronic switches, such as SR MOSFETs in resonant converters controls a pair of synchronous rectifier electronic switches to apply thereto a drive voltage to switch the synchronous rectifier electronic switches on and off synchronously with a converter current. The driver circuit includes a programming module to produce a first signal indicative of the figure of merit of the synchronous rectifier electronic switches, and, optionally, a current sensing module to produce a second signal indicative of the output current of the synchronous rectifier electronic switches. An output module is included to generate a value for the drive voltage which is a function of the first signal indicative of the figure of merit and, optionally, of the second signal indicative of the output current of the synchronous rectifier electronic switches.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: March 27, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventors: Maurizio Foresta, Alberto Iorio
  • Patent number: 9923372
    Abstract: A system includes energy modules configured to output power to an energy management bus based on load demands. A power storage device is configured to compensate for power transients at the energy management bus. The system also includes control circuitry configured to process sensor data to determine load sharing curves for the energy modules based on load demands, align the energy modules to output power based on the load sharing curves to the energy management bus, and provide power to one or more loads at one or more predetermined voltages.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: March 20, 2018
    Assignee: TOYOTA MOTOR ENGINEERING & MANUFACTURING NORTH AMERICA, INC.
    Inventors: Masanori Ishigaki, Atsushi Iwai
  • Patent number: 9860945
    Abstract: Power consumption in a start-up circuit for a LED-based light bulb may be reduced by digitally switching a transistor of the start-up circuit coupled to the input voltage. When the transistor is digitally switched between on and off, a reduced amount of power is dissipated by the transistor, because it may not enter a saturation region of operation where the resistance of the transistor between drain and source terminals increases. The transistor may be coupled to a voltage regulator for generating one or more output voltages, including a supply voltage for a host controller IC. The transistor may be switched on and off by a digital signal generated by logic circuitry, which may decide to switch the transistor on and off based on a voltage level at an output of the voltage regulator.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: January 2, 2018
    Assignee: PHILIPS LIGHTING HOLDING B.V.
    Inventors: Erik J. Mentze, Karl Thompson
  • Patent number: 9846472
    Abstract: A firmware update method is provided for use in an information processing system powered by a power system. The power system is powered by an external power source and the power system includes a rechargeable battery and a controller. The method includes checking a power status of the rechargeable battery through the controller in response to a firmware update procedure. A power status of the rechargeable battery is determined to be sufficient to perform the firmware update procedure, and an insufficiency of the external power source to power the power system is determined. Power for the firmware update procedure is limited, through the controller, to the rechargeable battery.
    Type: Grant
    Filed: January 6, 2016
    Date of Patent: December 19, 2017
    Assignee: International Business Machines Corporation
    Inventors: Hank C H Chung, Lin C. Hsing
  • Patent number: 9760452
    Abstract: A method for providing backup power to power loads. The method includes a computer processor identifying an indication of a power failure to a computing system. The method further includes identifying a first active power load that is imposed on the computing system by one or more computing devices in the computing system. The method further includes responding to the power failure by activating a first IPU that is connected to the first active power load, identifying a power duration threshold for the first active power load, and determining whether a duration of power stored in the first IPU is less than the identified power duration. The method further includes responding to the determination that the duration of power stored in the first IPU is less than the identified power duration threshold of the first active power load by initiating a shutdown protocol for the first active power load.
    Type: Grant
    Filed: August 6, 2015
    Date of Patent: September 12, 2017
    Assignee: International Business Machines Corporation
    Inventors: Peter W. Kelly, Shankar KM, Mahendra Krishna Mavilla Venkata, Kiruthikalakshmi Periasamy
  • Patent number: 9735563
    Abstract: An apparatus includes a power supply configured to supply power and a first electrical circuit breaker electrically coupled to the power supply. The apparatus includes a first electrical circuit electrically coupled to receive power from the power supply through the first electrical circuit breaker. The apparatus includes a second electrical circuit breaker electrically coupled to the power supply and a second electrical circuit. During operation of the apparatus, in response to detection that at least one of the current and the voltage of the power has exceeded the operating threshold for the first electrical circuit, the power supply and the first electrical circuit breaker are configured to power off, wherein the shutting off of the power supply prevents supplying the power from the power supply to the second electrical circuit breaker that is electrically coupled to the second electrical circuit to receive the power from the power supply.
    Type: Grant
    Filed: April 24, 2014
    Date of Patent: August 15, 2017
    Assignee: Lenovo Enterprise Solutions (Singapore) PTE. LTD.
    Inventors: Wei Tien Chen, George Cheng, Yulianti Darmanto, Peter Cy Huang, JunHom Lin, WJ Tseng
  • Patent number: 9727113
    Abstract: The present application discloses a computing device that can provide a low-power, highly capable computing platform for computational imaging. The computing device can include one or more processing units, for example one or more vector processors and one or more hardware accelerators, an intelligent memory fabric, a peripheral device, and a power management module. The computing device can communicate with external devices, such as one or more image sensors, an accelerometer, a gyroscope, or any other suitable sensor devices.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: August 8, 2017
    Assignee: LINEAR ALGEBRA TECHNOLOGIES LIMITED
    Inventors: Brendan Barry, Richard Richmond, Fergal Connor, David Moloney
  • Patent number: 9722414
    Abstract: A method includes supplying power from a power supply to a first electrical circuit breaker. The method includes detecting whether at least one of a current and a voltage of the power has exceeded an operating threshold for the first electrical circuit. The method includes, in response to detecting that at least one of the current and the voltage of the power has exceeded the operating threshold for the first electrical circuit, shutting off the power supply and the first electrical circuit breaker. The method includes in response to detecting that at least one of the current and the voltage of the power has not exceeded the operating threshold for the first electrical circuit, supplying the power from the power supply to the second electrical circuit breaker that is electrically coupled to the second electrical circuit.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: August 1, 2017
    Assignee: Lenovo Enterprise Solutions (Singapore) PTE. LTD.
    Inventors: Wei Tien Chen, George Cheng, Yulianti Darmanto, Peter C Y Huang, JunHom Lin, W J Tseng
  • Patent number: 9684359
    Abstract: A storage device for connection with a host device via an interface bus, includes a storage unit and a storage controller configured to control access to the storage unit and receive a power disable signal from the host device. The storage controller includes a plurality of processing units, each of which receives an interrupt signal to initiate power disable processing, in response to assertion of the power disable signal.
    Type: Grant
    Filed: August 4, 2015
    Date of Patent: June 20, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shinji Kunishige
  • Patent number: 9575530
    Abstract: A board includes a functional module, and further includes n switch modules, where first ends of the n switch modules are connected to the functional module, and second ends of the n switch modules are connected to n main power interface units respectively, where n is an integer greater than or equal to 2; and a power supply selecting module connected to control ends of the n switch modules, where the power supply selecting module is configured to detect residual power of the n main power interface units, select, from main power interface units with residual power greater than or equal to rated power of the board, a main power interface unit with lowest residual power as a power supply interface unit, and control a switch module connected to the power supply interface unit to be switched on.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: February 21, 2017
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Wenzong Cao, Zhe Li, Pinhua Zhu
  • Patent number: 9444288
    Abstract: If a failure has occurred on the backbone-power-transmission-network side, i.e., the electric-power system, and if the power supply to a power-distributing/transforming substation is stopped, a power-distributing feeder is cut off from the electric-power system. Moreover, a monitor/control apparatus transmits a single-operation-permitting permission signal to a distributed power-source system which is connected to the cut-off power-distributing feeder. Here, the distributed power-source system supplies its power to the power-distributing feeder only during a time-interval in which the system is receiving the permission signal. A general load and an important load, which are connected to the power-distributing feeder, find it possible to continue their activities by taking advantage of this power.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: September 13, 2016
    Assignee: Hitachi, Ltd.
    Inventors: Yasuo Sato, Takafumi Ebara, Masahiro Watanabe
  • Patent number: 9444280
    Abstract: An uninterruptable power supply (UPS) system/method providing power line conditioning and power factor correction (PFC) that incorporates centralized battery backup energy storage architecture is disclosed. The system generally comprises an AC-DC power supply with active PFC (power factor correction) function, a battery transfer switch, an isolated battery charger placed between the utility power source and battery strings, battery strings connecting the battery charger and the battery transfer switch, EMI/Lightning circuitry that provides lighting/line surge protection as well noise suppression functions, and a controller monitoring the quality of the utility power source. Uninterruptable power for data centers is achieved in this context via use of the battery strings, battery transfer switch, battery charger, and controller system configuration. Disclosed methods associated with this system generally permit the UPS to operate in a distributed fashion in support of computing systems within data centers.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: September 13, 2016
    Assignee: LITE-ON, INC.
    Inventor: Victor K. J. Lee
  • Patent number: 9417820
    Abstract: A hybrid drive and associated methods provide low-overhead storage of a hibernation file in the hybrid hard disk drive. During operation, the hybrid drive allocates a portion of solid-state memory in the drive that is large enough to accommodate a hibernation file associated with a host device of the hybrid drive. In addition to the erased memory blocks that are normally present during operation of the hybrid drive, the portion of solid-state memory allocated for accommodating the hibernation file may include over-provisioned memory blocks, blocks used to store a previous hibernation file that has been trimmed, and/or non-dirty blocks.
    Type: Grant
    Filed: December 6, 2012
    Date of Patent: August 16, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Richard M. Ehrlich, Eric R. Dunn, Fernando A. Zayas, Thorsten Schmidt
  • Patent number: 9397567
    Abstract: A method and apparatus for augmenting an external voltage regulator with a shunt integrated voltage regulator is disclosed. In one embodiment, an integrated circuit (IC) includes a load circuit coupled to a supply voltage node. The supply voltage node is electrically coupled to receive a supply voltage from an external voltage regulator. The IC also includes a shunt integrated voltage regulator coupled to the supply voltage node and implemented on the same IC die as the load circuit. If the supply voltage falls below a specified value (e.g., to increased current demand), the integrated voltage regulator may begin supplying current to the load. This may cause the supply voltage to return to within its specified range of the specified value, while allowing the external voltage regulator sufficient time to respond to the increased current demand. Thus, voltage droops on the supply voltage node may be minimized.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: July 19, 2016
    Assignee: Apple Inc.
    Inventors: Shawn Searles, Emerson S Fang
  • Patent number: 9377804
    Abstract: In one embodiment, an apparatus comprises a capacitor and a die. The die comprises a resistor switch coupled between a power line and the capacitor, wherein the resistor switch has an adjustable resistance, and the power line and the capacitor are both external to the die. The die also comprises a circuit configured to receive power from the power line.
    Type: Grant
    Filed: April 10, 2014
    Date of Patent: June 28, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Ryan Michael Coutts, Mikhail Popovich
  • Patent number: 9274899
    Abstract: A mechanism for providing non-volatile memory for suspend-to-RAM in a computer system. A method includes searching for a checkpoint message in a memory upon receipt of notification of restoring of power in a system. The checkpoint message is a confirmation of storing of state of a storage device prior to loss of the power in the system. The method also includes determining whether the checkpoint message indicates that the system reached the power integrity checkpoint. The power integrity checkpoint is a confirmation of the storing of the state of other device prior to the loss of the power in the system. The other device is different from the storage device. The method further includes restoring operating conditions of the system when it is determined that the system has reached the power integrity checkpoint.
    Type: Grant
    Filed: July 11, 2013
    Date of Patent: March 1, 2016
    Assignee: Red Hat, Inc.
    Inventor: Taejun Heo
  • Patent number: 9255581
    Abstract: A fan control system and a method thereof are applicable to a computer device. The system includes a fan, a board management unit, a power control module and a rotation speed switching module. The fan is driven by a control power and a rotation speed control signal. The board management unit provides a fan enabling signal, a rotation speed switching signal and a first fan rotation speed signal in a standby state. The power control module receives the fan enabling signal to determine whether to provide the control power to the fan, and switches between an auxiliary power or a main power served as the control power to the fan. The rotation speed switching module receives the rotation speed switching signal to accordingly switch between the first fan rotation speed signal or a second fan rotation speed signal served as the rotation speed control signal to the fan.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: February 9, 2016
    Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventor: Chia-Hsiang Chen
  • Patent number: 9250896
    Abstract: According to one embodiment, a method includes receiving, at a host, an instruction to execute a command that instructs at least one system at a site and in communication with the host via one or more fiber channels to each execute a script, the script being for automatically shutting down components of the at least one system in an order defined by the script, and issuing the command to the at least one system at the site via the one or more fiber channels.
    Type: Grant
    Filed: October 24, 2013
    Date of Patent: February 2, 2016
    Assignee: International Business Machines Corporation
    Inventors: Christopher L. Grimes, Gerard N. Kimbuende, Rex R. Newton, David J. Reich
  • Patent number: 9244508
    Abstract: An electronic device includes a power input unit through which power from an external power source can be input, a battery connector that is electrically connectable to a battery, a device connector that is electrically connectable to a removable external device, and a power controller that controls supply of power to the external device from the external power source and the battery. When the external device is connected to the connector, the power controller stops supplying power from the power input unit and supplies power from the battery to the external device, before supplying power from the external power source to the external device.
    Type: Grant
    Filed: January 23, 2013
    Date of Patent: January 26, 2016
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventor: Satoshi Horie
  • Patent number: 9244681
    Abstract: Various aspects of the present invention relate to automated shutdown of a tiered system. In one embodiment, at a host, an instruction is received to execute a command that instructs at least one system at a site and in communication with the host via one or more fiber channels to each execute a script, the script being for automatically shutting down components of the at least one system in an order defined by the script. The command is issued to the at least one system at the site via the one or more fiber channels.
    Type: Grant
    Filed: January 3, 2013
    Date of Patent: January 26, 2016
    Assignee: International Business Machines Corporation
    Inventors: Christopher L. Grimes, Gerard N. Kimbuende, Rex R. Newton, David J. Reich
  • Patent number: 9239610
    Abstract: The present application is directed to systems and methods for managing data in a system for hibernation states. In one implementation, a memory device comprises a controller memory, a main memory, a buffer to the main memory and a controller comprising a processor. The processor is configured to manage data storage in conjunction with hibernation of the memory device. The processor is in communication with the controller memory, the main memory and the buffer, and is configured to read data from the controller memory; write at least a portion of the data read from the controller memory into the buffer prior to the memory device entering a hibernation state; and after writing the at least a portion of the data read from the controller memory into the buffer and prior to the memory device entering the hibernation state, reduce an amount of power provided to the buffer of the to a reduced power level.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: January 19, 2016
    Assignee: SanDisk Technologies Inc.
    Inventors: Yair Baram, Hanan Borukhov, Idan Alrod, Eran Sharon
  • Patent number: 9223365
    Abstract: A system, semiconductor device and method for providing a controlled system reset sequence with lower power consumption without dependency on fuses, PLL's and external XTAL's. A method to simplify a boot sequence by using a ring oscillator that compensates for voltage and temperature variations while also removing the dependency on parallel fuses, PLL's and external XTAL's.
    Type: Grant
    Filed: March 16, 2013
    Date of Patent: December 29, 2015
    Assignee: Intel Corporation
    Inventors: Ivan Herrera Mejia, Vishram Sarurkar, Vijay K. Vuppaladadium
  • Patent number: 9219382
    Abstract: A control apparatus includes: a detection section configured to detect whether a rechargeable battery is in a fully charged state or not, and if the detection section detects that the rechargeable battery is in the fully charged state, an execution control section configured to give an instruction to an execution apparatus to execute a holdable task using electric power supplied from the rechargeable battery.
    Type: Grant
    Filed: February 21, 2012
    Date of Patent: December 22, 2015
    Assignee: SONY CORPORATION
    Inventor: Norifumi Kikkawa
  • Patent number: 9170822
    Abstract: Methods, systems, and apparatuses, including computer programs encoded on a computer storage media, for entering a limited functionality mode on a mobile device. In one aspect, a method includes receiving, at a portable electronic device, a first signal instructing the portable electronic device to enter a limited functionality mode, in which one or more transmission functionalities associated with the portable electronic device are disabled, determining whether the portable electronic device has received a second signal instructing the device to immediately enter the limited functionality mode, in response to receiving the first signal, waiting until one or more tasks that use the transmission functionalities are completed or until the second signal is determined to have been received, and entering the limited functionality mode after waiting until the one or more tasks that use the transmission functionalities are completed or until the second signal is determined to have been received.
    Type: Grant
    Filed: May 10, 2013
    Date of Patent: October 27, 2015
    Assignee: Google Inc.
    Inventor: Jeffrey A. Sharkey
  • Patent number: 9170889
    Abstract: The invention is a method of operating a system having multiple finite state machines and a controller. Each finite state machine enters an offline state upon detection of anomalous operation. The controller detects whether all finite state machines are offline. The controller transmits an online activation event signal to each finite state machine when all are offline. Each finite state machine evaluates entering the online state if current conditions permit. Reentering the online state includes loading a predetermined set of operating parameters. The finite state machines are responsive only to a reset event and an online activation event when in the offline state.
    Type: Grant
    Filed: August 21, 2009
    Date of Patent: October 27, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Gary L. Swoboda
  • Patent number: 9164565
    Abstract: In an embodiment, a processor includes at least one processor core and power control logic having energy usage logic to predict an energy usage of the processor and a voltage regulator coupled to the processor, during a low power period according to a first voltage regulator control mode and a second voltage regulator control mode, and to control the voltage regulator based at least in part on the predicted energy usage. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: October 20, 2015
    Assignee: Intel Corporation
    Inventors: Shaun M. Conrad, Stephen H. Gunther
  • Patent number: 9141167
    Abstract: In an embodiment, a processor includes at least one processor core and power control logic having energy usage logic to predict an energy usage of the processor and a voltage regulator coupled to the processor, during a low power period according to a first voltage regulator control mode and a second voltage regulator control mode, and to control the voltage regulator based at least in part on the predicted energy usage. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: September 22, 2015
    Assignee: Intel Corporation
    Inventors: Shaun M. Conrad, Stephen H. Gunther
  • Patent number: 9116679
    Abstract: A storage device including a communications interface configured to receive data and power, a plurality of disk drives configured to be powered only by the power received by the communications interface, a controller configured to configure the plurality of disk drives as a redundant array of independent disks, a power regulator configured to transmit the received power from the communications interface to the plurality of disk drives, and a peak current reduction circuit configured to reduce peak current usage by the plurality of disk drives.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: August 25, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventors: Musa I. Kakish, Charles A. Neumann