Forward Recovery (e.g., Redoing Committed Action) Patents (Class 714/16)
  • Patent number: 9098583
    Abstract: A multi-level business process interface associated with an incomplete Web service can be identified. The interface can be created within a user interface (UI) modeling tooling. The Web service can be associated with a business process. An interface specific metadata associated with the process interface can be determined. Service definitions for one or more existing Web service matching a portion of the interface specific metadata can be searched for semantically based on search depth parameters set by a user. A search result responsive to the searching can be returned. The search result can identify one or more existing Web services from a service registry.
    Type: Grant
    Filed: October 24, 2011
    Date of Patent: August 4, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hungtack Kwan, Shiju Mathai
  • Patent number: 9081735
    Abstract: Systems and methods of recovering a shared information source can involve identifying a first user of a shared information source in response to detection of a data loss with respect to the shared information source. One or more additional users of the shared information source may be identified based on data associated with the first user. Additionally, the shared information source can be recovered based at least in part on data associated with the one or more additional users.
    Type: Grant
    Filed: February 12, 2011
    Date of Patent: July 14, 2015
    Assignee: International Business Machines Corporation
    Inventors: Judith H. Bank, Lisa M. Bradley, Dana L. Price
  • Patent number: 9043773
    Abstract: Techniques for implementing identification and management of unsafe optimizations are disclosed. A method of the disclosure includes receiving, by a managed runtime environment (MRE) executed by a processing device, a notice of misprediction of optimized code, the misprediction occurring during a runtime of the optimized code, determining, by the MRE, whether a local misprediction counter (LMC) associated with a code region of the optimized code causing the misprediction exceeds a local misprediction threshold (LMT) value, and when the LMC exceeds the LMT value, compiling, by the MRE, native code of the optimized code to generate a new version of the optimized code, wherein the code region in the new version of the optimized code is not optimized.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 26, 2015
    Assignee: Intel Corporation
    Inventors: Alejandro M. Vicente, Joseph M. Codina, Christos E. Kotselidis, Carlos Madriles, Raul Martinez
  • Patent number: 9043641
    Abstract: A method for performing error recovery that includes creating, by a processor, a recovery checkpoint. The processor is dynamically switched into a non-recoverable processing mode of operation based on creating the software recovery checkpoint. The non-recoverable processing mode of operation is a mode in which a subset of hardware error recovery resources are powered-down or re-purposed for instruction processing. It is determined, during the non-recoverable processing mode of operation, that a new software recovery checkpoint is required. Based on the determining that a new software recovery checkpoint is required, the processor is dynamically switched into a recoverable processing mode of operation. The recoverable processing mode of operation is a mode in which hardware error recovery resources, including at least one of the hardware error recovery resources in the subset, are purposed for hardware error recovery operations.
    Type: Grant
    Filed: March 5, 2013
    Date of Patent: May 26, 2015
    Assignee: International Business Machines Corporation
    Inventors: Fadi Y. Busaba, Steven R. Carlough, Christopher A. Krygowski, Brian R. Prasky, Chung-Lung K. Shum
  • Patent number: 9032251
    Abstract: A reconnection system re-forms a control tree for an application that is executed in parallel without terminating execution of the application. The reconnection system detects when a node of a control tree has failed and directs the nodes that have not failed to reconnect to effect the re-forming of the control tree without the failed node and without terminating the application. Upon being directed to reconnect, a node identifies new child nodes that are to be its child nodes in the re-formed control tree. The node maintains the existing connection with each of its current child nodes that is also a new child node, terminates the existing connection with each of its current child nodes that is not also a new child node, establishes a new connection with any new child node that is not a current child node, and directs each new child node to reconnect.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: May 12, 2015
    Assignee: Cray Inc.
    Inventor: Marlys Kohnke
  • Patent number: 9021303
    Abstract: A dataset is recovered after a server reboot while clients access the dataset. In response to the reboot, not-yet-completed transactions in a log are parsed to create, for each of the dataset blocks modified by these active transactions, a respective block replay list of the active transactions that modify the block. Once the block replay lists have been created, clients may access specified blocks of the dataset after on-demand recovery of the specified blocks. The on-demand recovery is concurrent with a background recovery task that replays the replay lists. To accelerate log space recovery, the parsing of the log inserts each replay list into a first-in first-out queue serviced by multiple replay threads. The queue can also be used as the cache writeback queue, so that the cache index is used for lookup of the replay list and the recovery state of a given block.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: April 28, 2015
    Assignee: EMC Corporation
    Inventors: Marc A. DeSouter, Pranit Sethi, Morgan Clark, Jean-Pierre Bono, Sairam Veeraswamy, Peter C. Bixby, Philippe Armangau
  • Patent number: 9021299
    Abstract: Techniques are disclosed that include a computer-implemented method, including storing information related to an initial state of a process upon being initialized, wherein execution of the process includes executing at least one execution phase and upon completion of the executing of the execution phase storing information representative of an end state of the execution phase; aborting execution of the process in response to a predetermined event; and resuming execution of the process from one of the saved initial and end states without needing to shut down the process.
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: April 28, 2015
    Assignee: Ab Initio Technology LLC
    Inventors: Bryan Phil Douros, Joseph Skeffington Wholey, III
  • Patent number: 9021302
    Abstract: A load control system includes: a power supply control unit for controlling a power feeding to multiple load devices; and a backup power supply unit for supplying backup power during a power failure. During a power failure, the power supply control unit supplies the power from the backup power supply unit only to a part of load devices selected among the load devices, and the load devices are devoid of communications function for communicating with the power supply control unit.
    Type: Grant
    Filed: September 28, 2010
    Date of Patent: April 28, 2015
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Satoshi Hirata, Shuji Matsuura, Yuji Fujita
  • Patent number: 9015560
    Abstract: An integrated circuit including a first interface, a decoder, and a controller. The first interface is configured to (i) write encoded data in a portion of a flash memory, and (ii) read the encoded data back from the flash memory. The decoder is configured to (i) according to an error correction code, decode the encoded data read back from the flash memory, and (ii) based on the decoded data, determine a number of decoding errors corresponding to the decoded data. The controller is configured to, in response to the number of decoding errors being greater than or equal to a first threshold, cease accessing the portion of the flash memory. The first threshold is less than a number of errors correctable by the error correction code for the portion of the flash memory.
    Type: Grant
    Filed: May 22, 2014
    Date of Patent: April 21, 2015
    Assignee: Marvell International Ltd.
    Inventors: Chen Kuo Huang, Sui-Hung Fred Au, Xueshi Yang, Lau Nguyen
  • Patent number: 9003076
    Abstract: An anomalous component within a processing system is identified. One or more transformed metrics of a processing system being monitored are analyzed, and an anomaly in the processing system is detected. Based on detecting the anomaly, at least one transformed metric is inversely transformed to obtain at least one suspect original metric. Using the at least one suspect original metric, the anomalous component is identified.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: April 7, 2015
    Assignee: International Business Machines Corporation
    Inventor: Alain E. Biem
  • Patent number: 8977897
    Abstract: An internode put requesting unit detects a time-out with respect to a put request issued to the next node in the order of a multiplexing chain and notifies a put/get executing unit of the time-out. The put/get executing unit sends an error to the previous node in the order of the multiplexing chain or a client and instructs a put-failed-data synchronizing unit to synchronize data failed to be put, and the put-failed-data synchronizing unit performs a synchronization process. A primary makes other put requests wait until completion of the synchronization process. Furthermore, when having received the error, the client issues a get request to the tail end of the multiplexing chain.
    Type: Grant
    Filed: September 6, 2012
    Date of Patent: March 10, 2015
    Assignee: Fujitsu Limited
    Inventors: Masahisa Tamura, Yasuo Noguchi, Toshihiro Ozawa, Munenori Maeda, Tatsuo Kumano, Ken Iizawa, Jun Kato
  • Patent number: 8977898
    Abstract: A dataset is concurrently recovered after a server crash while the dataset is actively used for servicing client requests. In response to a reboot, records of not-yet-completed transactions in a transaction log are parsed to create a graph of dependencies between the transactions. Once this graph has been created, clients may access a specified block of the dataset after on-demand recovery of the specified block. The on-demand recovery is concurrent with a background recovery task that replays the not-yet-completed transactions in time order. The on-demand recovery uses the dependency graph to replay any and all transactions that support recovery of the specified block, so that recovery of the specified block includes update of other blocks to be consistent with the recovered block in accordance with the not-yet-completed transactions.
    Type: Grant
    Filed: September 24, 2012
    Date of Patent: March 10, 2015
    Assignee: EMC Corporation
    Inventors: Sairam Veeraswamy, Peter C. Bixby
  • Publication number: 20150052394
    Abstract: A method of operating a nonvolatile memory device comprises applying a read current with a first level to a nonvolatile memory cell comprising a variable resistance material, determining read data based on the applied read current, checking a syndrome corresponding to the read data to determine whether the read data is pass or fail, changing the read current from the first level to a second level, which is different from the first level, according to the determination of whether the read data is pass or fail, and performing a read-retry operation comprising applying the read current of the second level to the nonvolatile memory cell.
    Type: Application
    Filed: May 15, 2014
    Publication date: February 19, 2015
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: JUNG SUNWOO, KWANG-JIN LEE
  • Patent number: 8959395
    Abstract: A system and method for distributed fault detection. In an exemplary method, unplanned application exits and crashes may be detected at a node local level. Further, application hangs may be detected using at least one of a script and a binary at the node local level. Also, node crashes and operating system crashes may be detected using node to node heart-beating.
    Type: Grant
    Filed: April 19, 2013
    Date of Patent: February 17, 2015
    Assignee: Red Hat, Inc.
    Inventor: Allan Havemose
  • Patent number: 8959387
    Abstract: The present disclosure provides techniques for operating a tape drive. A method of operating a tape drive includes monitoring a parameter of the tape drive during a data access operation. The method also includes detecting an access failure. The method further includes selecting a treatment based on the parameter, applying the treatment, and performing a retry.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: February 17, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Donald J. Fasen, Vernon L. Knowles
  • Patent number: 8954797
    Abstract: A computer program product for performing error recovery is configured to perform a method that includes creating, by a processor, a recovery checkpoint. The processor is dynamically switched into a non-recoverable processing mode of operation based on creating the software recovery checkpoint. The non-recoverable processing mode of operation is a mode in which a subset of hardware error recovery resources are powered-down or re-purposed for instruction processing. It is determined, during the non-recoverable processing mode of operation, that a new software recovery checkpoint is required. Based on the determining that a new software recovery checkpoint is required, the processor is dynamically switched into a recoverable processing mode of operation. The recoverable processing mode of operation is a mode in which hardware error recovery resources, including at least one of the hardware error recovery resources in the subset, are purposed for hardware error recovery operations.
    Type: Grant
    Filed: April 16, 2012
    Date of Patent: February 10, 2015
    Assignee: International Business Machines Corporation
    Inventors: Fadi Y. Busaba, Steven R. Carlough, Christopher A. Krygowski, Brian R. Prasky, Chung-Lung K. Shum
  • Patent number: 8949801
    Abstract: In one embodiment, the invention is a method and apparatus for failure recovery for stream processing applications. One embodiment of a method for providing a failure recovery mechanism for a stream processing application includes receiving source code for the stream processing application, wherein the source code defines a fault tolerance policy for each of the components of the stream processing application, and wherein respective fault tolerance policies defined for at least two of the plurality of components are different, generating a sequence of instructions for converting the state(s) of the component(s) into a checkpoint file comprising a sequence of storable bits on a periodic basis, according to a frequency defined in the fault tolerance policy, initiating execution of the stream processing application, and storing the checkpoint file, during execution of the stream processing application, at a location that is accessible after failure recovery.
    Type: Grant
    Filed: May 13, 2009
    Date of Patent: February 3, 2015
    Assignee: International Business Machines Corporation
    Inventors: Henrique Andrade, Bugra Gedik, Gabriela Jacques da Silva, Kun-Lung Wu
  • Patent number: 8938644
    Abstract: A computer-implemented method, apparatus and article of manufacture for performing an automatic error recovery in a database system. Automatic error recovery is performed for a query execution plan, following errors, problems or failures that occur during execution, by automatically or manually deactivating and/or activating components, features or code paths, and then re-submitting the query execution plan for execution in the computer system.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: January 20, 2015
    Assignee: Teradata US, Inc.
    Inventors: Arthur Clark, Douglas P. Brown, Anita Richards, Donald R. Pederson
  • Publication number: 20150019910
    Abstract: A computer-implemented method of handling a current email messaging campaign to be broadcast to increase a deliverability parameter regarding a percentage of the campaign which has been successfully delivered is described. The email messaging campaign comprises a plurality of email messages with the same message content and a plurality of different email addresses to send the message content to.
    Type: Application
    Filed: July 10, 2013
    Publication date: January 15, 2015
    Inventors: Jean-Yves Simon, Charles Wells
  • Patent number: 8930755
    Abstract: A distribution apparatus for distributing content data items via multicast includes a transmitting and receiving unit and an error correction encoding unit. The transmitting and receiving unit receives reception status information regarding a reception status of the content data items in a receiving apparatus that receives the content data items. The error correction encoding unit generates recovery data used by the receiving apparatus to recover a content data item that is not successfully received among the content data items on the basis of reception status information received from the receiving apparatus that receives the content data items distributed via multicast. Subsequently, the transmitting and receiving unit distributes the generated recovery data together with the content data items via multicast.
    Type: Grant
    Filed: December 12, 2011
    Date of Patent: January 6, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventor: Toru Suneya
  • Publication number: 20140380095
    Abstract: Techniques for handling uncorrectable errors occurring during memory accesses reduce the likelihood of mis-correction of errors due to the presence of noise. When an uncorrectable memory error is detected in response to an access to a memory device, a memory controller managing the interface to the memory halts issuing of access requests to the memory device until a predetermined time period has elapsed. In-flight memory requests are marked for retry, and responses to pending request are flushed. A calibration command may be issued after the predetermined time period has elapsed. After the predetermined time period has elapsed and any calibration performed, the requests marked for retry are issued to the memory device.
    Type: Application
    Filed: June 20, 2013
    Publication date: December 25, 2014
    Inventors: John Steven Dodson, Benjiman L. Goodman, Stephen J. Powell, Kenneth L. Wright
  • Publication number: 20140380096
    Abstract: Techniques for handling uncorrectable errors occurring during memory accesses reduce the likelihood of mis-correction of errors due to the presence of noise. When an uncorrectable memory error is detected in response to an access to a memory device, a memory controller managing the interface to the memory halts issuing of access requests to the memory device until a predetermined time period has elapsed. In-flight memory requests are marked for retry, and responses to pending request are flushed. A calibration command may be issued after the predetermined time period has elapsed. After the predetermined time period has elapsed and any calibration performed, the requests marked for retry are issued to the memory device.
    Type: Application
    Filed: September 23, 2013
    Publication date: December 25, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: John Steven Dodson, Benjiman L. Goodman, Stephen J. Powell, Kenneth L. Wright
  • Publication number: 20140365823
    Abstract: An information processing device includes: a nonvolatile memory having a program area storing a program for booting a system, and backup areas each storing a backup program identical in content to the program; a process executing unit that executes the program to perform a boot process of the system; an error detection unit that performs error detection on the program in parallel with the boot process; and a reboot unit that, when the error detection unit detects an error in the program, performs a recovery process to replace the program with one of the backup programs, and reboots the system using the replaced program. In the recovery process, the reboot unit refers to history information indicating a history of replacement of the program with the backup programs, selects the backup program used for the replacement from among the backup programs, and replaces the program with the selected backup program.
    Type: Application
    Filed: June 11, 2012
    Publication date: December 11, 2014
    Applicant: Mitsubishi Electric Corporation
    Inventors: Satoshi Michihata, Kiyoyasu Maruyama
  • Publication number: 20140351637
    Abstract: Two or more ports of a same type are identified in a computer. A separate device driver process is initiated for each of the identified ports. A one-to-one correspondence between each of the ports and each of the device driver processes is established.
    Type: Application
    Filed: August 12, 2014
    Publication date: November 27, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael ADDA, Dan ALONI, Avner BRAVERMAN
  • Patent number: 8898511
    Abstract: Providing homogeneous recovery in a redundant memory system that includes a memory controller, a plurality of memory channels in communication with the memory controller, an error detection code mechanism configured for detecting a failing memory channel, and an error recovery mechanism. The error recovery mechanism is configured for receiving notification of the failing memory channel, for blocking off new operations from starting on the memory channels, for completing any pending operations on the memory channels, for performing a recovery operation on the memory channels and for starting the new operations on at least a first subset of the memory channels. The memory system is capable of operating with the first subset of the memory channels.
    Type: Grant
    Filed: June 24, 2010
    Date of Patent: November 25, 2014
    Assignee: International Business Machines Corporation
    Inventors: Luis A. Lastras-Montano, Patrick J. Meaney, Vesselina K. Papazova, Eldee Stephens, Lisa C. Gower
  • Patent number: 8892954
    Abstract: The subject matter of this specification can be implemented in, among other things, a computer-implemented method for application lifecycle management. The method includes receiving crash reports from a first version of an application at multiple initial computing devices. The first version of the application is from a first group of versions. The method further includes determining that the crash reports include more than a threshold amount of crash reports. The method further includes determining that a second version of the application from a second group of versions corrects a cause of the crash reports. The method further includes providing instructions to the initial computing devices to retrieve updates to the application from the second group of versions rather than the first group of versions.
    Type: Grant
    Filed: January 27, 2012
    Date of Patent: November 18, 2014
    Assignee: Google Inc.
    Inventors: Jessica Lynn Gray, Michael Noth, James Kason Keiger, Siyang Xie
  • Publication number: 20140325271
    Abstract: According to an embodiment, a terminal device includes a memory unit, a managing unit, a manipulation recording unit, and at least one of first and second detecting units. The managing unit generates and deletes a processing unit which executes a transaction for individually manipulating data with respect to data elements and data containers stored in the memory unit. The manipulation recording unit records manipulation information while a transaction is being executed by the processing unit. The first and second detecting units detect the presence or absence of competition. The first detecting unit detects competition during an execution state of a transaction as set by the processing unit. The second detecting unit detects competition during a commit preparation state of a transaction as set by the processing unit. When at least either the first detecting unit or the second detecting unit detects competition, the processing unit aborts the transaction.
    Type: Application
    Filed: March 10, 2014
    Publication date: October 30, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Daisuke AJITOMI, Keisuke MINAMI, Masataka GOTO
  • Patent number: 8862936
    Abstract: Databases of an active node and a standby node of a main memory database management system (MMDBMS) are managed so as to prevent loss of a transaction caused by failure of any one of the active node or the standby node. The MMDBMS is configured to prevent data mismatch between the active node and the standby node when failure of any one of the active node and the standby node occurs. In case of failure of one of the nodes, log information from the other node is obtained to recover the failed node.
    Type: Grant
    Filed: April 26, 2012
    Date of Patent: October 14, 2014
    Assignee: Altibase Corporation
    Inventor: Seung-Won Lee
  • Patent number: 8856261
    Abstract: A system, method and computer program product for supporting system initiated checkpoints in parallel computing systems. The system and method generates selective control signals to perform checkpointing of system related data in presence of messaging activity associated with a user application running at the node. The checkpointing is initiated by the system such that checkpoint data of a plurality of network nodes may be obtained even in the presence of user applications running on highly parallel computers that include ongoing user messaging activity.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: October 7, 2014
    Assignee: International Business Machines Corporation
    Inventors: Dong Chen, Philip Heidelberger
  • Publication number: 20140289557
    Abstract: A method and a system for data migration are described, the method for data migration including: slicing data in an original system to obtain a data slice; importing the data slice into a new system; and redoing, in the new system, respective data corresponding to at least one pre-recorded write request according to a sequence number order of the at least one pre-recorded write request, wherein the at least one pre-recorded write request above is to simultaneously write to both the original system and the new system. In the method and the system, data in an original system can be seamlessly imported to a new system without forbidding writes to the original system, and the data in the new system can be recovered to the latest by a redo technique. Without any awareness of users, the data migration can be achieved in the background.
    Type: Application
    Filed: June 5, 2014
    Publication date: September 25, 2014
    Inventors: Zhihao Zhou, Ming Tian, Li Liu
  • Publication number: 20140281705
    Abstract: A mechanism is described for facilitating dynamic and efficient management of instruction atomicity violations in software programs according to one embodiment. A method of embodiments, as described herein, includes receiving, at a replay logic from a recording system, a recording of a first software thread running a first macro instruction, and a second software thread running a second macro instruction. The first software thread and the second software thread are executed by a first core and a second core, respectively, of a processor at a computing device. The recording system may record interleavings between the first and second macro instructions. The method includes correctly replaying the recording of the interleavings of the first and second macro instructions precisely as they occurred. The correctly replaying may include replaying a local memory state of the first and second macro instructions and a global memory state of the first and second software threads.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Inventors: Nathan D. Dautenhahn, Justin E. Gottschlich, Gilles Pokam, Cristiano L. Pereira, Shiliang Hu, Klaus Danne
  • Patent number: 8825752
    Abstract: Systems and methods which provide an intelligent automated support (IASUP) architecture in which logic is implemented to control support messaging in an automatic, timely, and meaningful fashion to imbibe intelligent automated support functionality are disclosed. Embodiments of an IASUP architecture implement bidirectional communication links between storage systems and IASUP back-end systems providing data collection. The bidirectional communication links supported by IASUP architectures of embodiments facilitate automated storage system rejuvenation functionality whereby an IASUP back-end system provides processing and analysis with respect to storage system data to initiate manipulation or control of one or more components of a storage system.
    Type: Grant
    Filed: May 18, 2012
    Date of Patent: September 2, 2014
    Assignee: NetApp, Inc.
    Inventor: Sreejith Madhavan
  • Patent number: 8788576
    Abstract: Systems and methods for transfer of data including establishing two separate connections, the two separate connections including a high speed connection and a high integrity connection. Blocks of data are exchanged over the high speed connection while the high integrity connection facilitates communication of descriptor data regarding data received over the high speed connection. As such, the data transfer speed of the high speed connection is utilized while communication via the high integrity connection allows for data reliability features not provided by the high speed connection. The systems and methods may include receiver side data handling such that data received chronologically out of order may be ordered at the receiver.
    Type: Grant
    Filed: September 27, 2010
    Date of Patent: July 22, 2014
    Assignee: Z124
    Inventor: Octavian Chincisan
  • Patent number: 8789172
    Abstract: Methods, media, and systems for detecting attack are provided. In some embodiments, the methods include: comparing at least part of a document to a static detection model; determining whether attacking code is included in the document based on the comparison of the document to the static detection model; executing at least part of the document; determining whether attacking code is included in the document based on the execution of the at least part of the document; and if attacking code is determined to be included in the document based on at least one of the comparison of the document to the static detection model and the execution of the at least part of the document, reporting the presence of an attack.
    Type: Grant
    Filed: March 18, 2009
    Date of Patent: July 22, 2014
    Assignee: The Trustees of Columbia University in the City of New York
    Inventors: Salvatore J. Stolfo, Wei-Jen Li, Angelos D. Keromylis, Elli Androulaki
  • Patent number: 8788579
    Abstract: An application instance identifier is employed with various systems and methods in order to provide a requestor with continuous access to a resource when operating in a client clustered environment. A requestor residing on a first client may attempt to access a resource. The first client sends a request to access the resource. The request may be associated with an application instance identifier that identifies the requestor. At some point, the first client fails and the requestor is associated with a second client via a failover mechanism. The second client sends a second request to access the resource on behalf of the requestor. The second request is associated with the requestor's application instance identifier. The application instance identifier is used to identify the second request as belonging to the same requestor as the first request, thereby granting the second request to access the resource while avoiding a conflict situation.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: July 22, 2014
    Assignee: Microsoft Corporation
    Inventors: David M. Kruse, Diaa Fathalla, James T. Pinkerton, Mathew George, Prashanth Prahalad, Thomas E. Jolly
  • Patent number: 8788880
    Abstract: A data storage subsystem is disclosed that implements a solid-state data buffering scheme. Prior to completion of programming in solid-state storage media, data that is formatted for storage in solid-state media is maintained in one or more buffers. The system is able to retry failed programming operations directly from the buffers, rather than reprocessing the data. The relevant programming pipeline may therefore be preserved by skipping over a failed write operation and reprocessing the data at the end of the current pipeline processing cycle.
    Type: Grant
    Filed: August 22, 2012
    Date of Patent: July 22, 2014
    Assignee: Western Digital Technologies, Inc.
    Inventors: Asif F. Gosla, Chiranjeb Mondal
  • Publication number: 20140195850
    Abstract: A system implements a method to non-disruptive restoration of storage services provided by a storage volume of the system. Upon detecting a disruption of storage services at the storage volume, the method freezes the input/output (I/O) operations of applications that are accessing the storage volume. The disrupted storage services are restored. And the configurations of the storage volume are maintained during restoration of the disrupted storage services. Afterward, the frozen I/O operations are activated, allowing the applications to continue their accessing of the storage volume.
    Type: Application
    Filed: October 8, 2013
    Publication date: July 10, 2014
    Applicant: NetApp, Inc.
    Inventors: Manish D. Patel, Boris Teterin
  • Patent number: 8775872
    Abstract: Various embodiments for retaining diagnostic information for data in a computing storage environment are provided. In one such embodiment, a diagnostic component, apart from a volume table of contents (VTOC), associated with an integrated catalog facility (ICF) catalog and with a base data set from data sets via a catalog association record is initialized. The diagnostic component configured to retain base data set-specific diagnostic information retrievable by the computing storage environment to assist in error diagnosis and the ICF catalog is one of the data sets storing information about the data sets for facilitating a retrieval of a name of the base data set and assists with retaining and retrieval of the base data set-specific diagnostic information. The base data set-specific diagnostic information is stored pursuant to at least one event associated with the base data set.
    Type: Grant
    Filed: April 25, 2013
    Date of Patent: July 8, 2014
    Assignee: International Business Machines Corporation
    Inventors: Franklin E. McCune, David C. Reed, Michael R. Scott, Max D. Smith
  • Patent number: 8775886
    Abstract: The self-healing system comprises a self-healing processor and an error mitigation system. The self-healing processor includes a code block associated with the operation of a portion of digital logic. The self-healing processor also includes a dynamic signature analysis circuit. The processor executes the code block. The dynamic signature analysis circuit creates a dynamic signature representing the operation of the portion of digital logic associated with the code block. The error mitigation system receives the dynamic signature from the dynamic signature analysis circuit. The error mitigation system compares the dynamic signature to a static signature to determine if the signatures match. If the signatures do not match, then the digital logic associated with the code block has an error. The error mitigation system retries execution of the code block. The error mitigation system stores log information describing the above events.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: July 8, 2014
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Roger D. Melen, Nader W. Moussa, Makoto Honda, Hideo Ikai, Kozo Kato
  • Publication number: 20140181582
    Abstract: Applications performance for applications that access connections may be improved by providing a method of automatically retrying failed connections. A method for executing a communication interface may include receiving a retry timer length, receiving an indication that an application group is executing, opening position identifiers for the application group, failing to open at least one position identifier, and automatically retrying opening the position identifier after the retry timer length.
    Type: Application
    Filed: December 21, 2012
    Publication date: June 26, 2014
    Applicant: Unisys Corporation
    Inventor: Edward Kujawa
  • Publication number: 20140157048
    Abstract: Disclosed herein are techniques for system recovery. It is determined whether a transaction depends on a change committed before a failure. It is further determined whether a transaction conflicts with a change interrupted by the failure.
    Type: Application
    Filed: November 30, 2012
    Publication date: June 5, 2014
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventor: Goetz Graefe
  • Patent number: 8745445
    Abstract: A process for upgrading a mirrored shared-nothing database system comprises a sequence of short well-defined idempotent steps, and at least one non-idempotent step involving transforming a master catalog. The upgrade process is managed and controlled by a state machine that has a persistent memory running on the master node. In the event of a failure or crash during an idempotent step, the process stops the database in the current state and repeats the step. If a failure or crash occurs during a non-idempotent step, the upgrade process is rolled back to the beginning and repeated.
    Type: Grant
    Filed: February 10, 2012
    Date of Patent: June 3, 2014
    Assignee: Pivotal Software, Inc.
    Inventors: King Lun Choi, Jeffrey Ira Cohen, Caleb E. Welton, Kenneth A. Sell, Milena Bergant
  • Patent number: 8732522
    Abstract: The invention relates to a method for fault identification in a System-on-Chip (SoC) consisting of a number of IP cores, wherein each IP core is a fault containment unit, and where the IP cores communicate with one another by means of messages via a Network-on-Chip, and wherein an excellent IP core provides a TRM (Trusted Resource Monitor), wherein a faulty control message which is sent from one non-privileged IP core to another non-privileged IP core is identified and projected by an (independent) fault container unit, as a result of which this faulty control message cannot cause any failure of the message receiver.
    Type: Grant
    Filed: July 7, 2010
    Date of Patent: May 20, 2014
    Assignee: FTS Computertechnik GmbH
    Inventor: Stefan Poledna
  • Patent number: 8726080
    Abstract: A method including creating a commit-in-progress context from a copy of a data object in a redirect-on-write file system; and begin storing the commit-in-progress context in a persistent storage device. The method further includes, while storing the commit-in-progress context in the persistent storage device: receiving a notification of a pending modification to the first data object, creating an update-in-progress context from a copy of the commit-in-progress context, and begin applying the modification to the update-in-progress context. The method further includes detecting that a connectivity error has occurred between the commit-in-progress context and the storage device, and in response, identifying whether the commit-in-progress context is successfully stored in the storage device.
    Type: Grant
    Filed: August 15, 2011
    Date of Patent: May 13, 2014
    Assignee: International Business Machines Corporation
    Inventors: Janet E. Adkins, Matthew T. Brandyberry, Manoj N. Kumar, Andrew N. Solomon
  • Patent number: 8707107
    Abstract: A computer-implemented method may include monitoring a computing system for evidence of potential data failures within the computing system. The computer-implemented method may also include detecting evidence that indicates a potential data failure while monitoring the computing system and identifying data implicated in the potential data failure based on the detected evidence. The computer-implemented method may further include initiating an action configured to proactively facilitate restoration of at least a portion of the data implicated in the potential data failure prior to determining whether the data implicated in the potential data failure needs to be restored. Various other methods, systems, and computer-readable media are also disclosed.
    Type: Grant
    Filed: December 9, 2011
    Date of Patent: April 22, 2014
    Assignee: Symantec Corporation
    Inventors: Arindam Panna, Nilesh Dhakras
  • Patent number: 8707098
    Abstract: A method of recovering a value in a data storage system includes maintaining a list of entries corresponding to values that have been inserted into the data storage system, determining whether the values are at an At Maximum Redundancy (AMR) state, and if not, the converging the values to the AMR state.
    Type: Grant
    Filed: January 14, 2010
    Date of Patent: April 22, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Eric A. Anderson, Xiaozhou Li, Mehul A. Shah, John J. Wylie
  • Publication number: 20140101483
    Abstract: Systems, circuits, devices and/or methods related to systems and methods for data processing, and more particularly to systems and methods for priority based data processing.
    Type: Application
    Filed: October 4, 2012
    Publication date: April 10, 2014
    Applicant: LSI Corporation
    Inventors: Shaohua Yang, Fan Zhang, Jun Xiao
  • Publication number: 20140089734
    Abstract: Embodiments relate to thread sparing between cores in a processor. An aspect includes determining that a number of recovery attempts made by a first thread on the first core has exceeded a recovery attempt threshold, and sending a request to transfer the first thread. Another aspect includes, selecting a second core from a plurality of cores to receive the first thread from the first core, wherein the second core is selected based on the second core having an idle thread. Another aspect includes transferring a last good architected state of the first thread from the first core to the second core. Another aspect includes loading the last good architected state of the first thread by the idle thread on the second core. Yet another aspect includes resuming execution of the first thread on the second core from the last good architected state of the first thread by the idle thread.
    Type: Application
    Filed: September 27, 2012
    Publication date: March 27, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Fadi Y. Busaba, Steven R. Carlough, Christopher A. Krygowski, Brian R. Prasky, Chung-Lung K. Shum
  • Patent number: 8683262
    Abstract: Certain example embodiments provide a single pass, reverse chronological approach to write-ahead log recovery, enabling space- and time-efficient the recovery of stored data from large write-ahead logs to a transient storage medium. The techniques described herein can in certain instances enable fast and efficient recovery, even in scenarios where at the time of a failure requiring such a recovery the live log is potentially multiple terabytes or larger in size. Certain example embodiments make use of a filtering mechanism (e.g., involving potentially stateful delete, skip, and/or transaction filters), a key/value property (allowing a live set of data, once identified, to be applied in any arbitrary order), etc. A simplified environment with a small closed set of mutative operations allows for the performing of recovery backwards by scanning the log from the most recent written record backwards in time (and, in other words, finishing with the oldest record).
    Type: Grant
    Filed: June 21, 2013
    Date of Patent: March 25, 2014
    Assignee: Terracotta Inc.
    Inventors: Saravanan Subbiah, Chris Dennis, Timothy Wu, Myron Scott
  • Publication number: 20140047269
    Abstract: An operating method for a memory system including a nonvolatile random access memory (NVRAM) and a NAND flash memory includes; performing a normal read operation directed to the target memory cell in response to a read request, determining that a read fail has occurred as a result of the normal read operation, then performing a read retry operation by iterations directed to the target memory cell according to a first read retry scheme until a pass read retry iteration successfully reads the target memory cell, and storing pass information associated with the pass read retry iteration in the NVRAM.
    Type: Application
    Filed: August 7, 2013
    Publication date: February 13, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: BOGEUN KIM