Output Recording (e.g., Signature Or Trace) Patents (Class 714/45)
  • Patent number: 11474711
    Abstract: A circuit device 10 includes a register 30, an access control circuit 20 that controls access to a nonvolatile memory 70 and loads setting data of the circuit device 10 stored in the nonvolatile memory 70 in the register 30, and an error detection circuit 40. The access control circuit 20 performs a refresh operation that reloads the setting data stored in the nonvolatile memory 70 in the register 30. The error detection circuit 40 reads data for comparison that has been reloaded in the register 30 from the register 30, compares the data for comparison that was read with an expected value of the data for comparison, and performs access control error detection based on the comparison result.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: October 18, 2022
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Masahiko Miura, Yuichi Hiwasa, Hironori Kobayashi
  • Patent number: 11474872
    Abstract: Techniques for implementing an infrastructure orchestration service are described. In some examples, a declarative provisioner of the infrastructure orchestration service receives instructions for deployment of a resource. The declarative provisioner identifies that the deployment of the resource is a long-running task stores state information corresponding to the deployment of the resource. In certain embodiments, upon identifying that the deployment of the resource is a long-running task, the declarative provisioner pauses its execution of the long-running task. Responsive to a trigger received from the infrastructure orchestration service, the declarative provisioner resumes execution of the deployment of the resource using the state information and transmits deployment information corresponding to the deployment of the resource to the infrastructure orchestration service.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: October 18, 2022
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Phillip Vassenkov, Nathaniel Martin Glass, Eric Tyler Barsalou, Caleb Dockter
  • Patent number: 11474921
    Abstract: Systems, apparatuses, and methods related log compression are described. In an example, a system log that identifies targeted data may be compiled in a memory resource during an execution of an operation using that memory resource. The system log may be analyzed utilizing a portion of the memory resource that would otherwise be available to be utilized in the execution of the operation. The system log may be compressed during the execution of the operation, the level or timing of such compression may be based on the analysis that occurs contemporaneous to or as a result of executing the operation. In some examples, compressing the system log may include discarding a portion of the system log. Compressing the system log may also include extracting the targeted data from the system log as the system log is being compiled and converting the extracted targeted data to structured data.
    Type: Grant
    Filed: July 13, 2020
    Date of Patent: October 18, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Reshmi Basu, Libo Wang
  • Patent number: 11467896
    Abstract: Aspects pertaining to a crash dump file are described. In an example, the crash dump file may include one or more sections within which crash-related data is stored. A content file is also described which records valid parameters, wherein the valid section parameters pertain to corresponding sections within the crash dump file.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: October 11, 2022
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Prashant Anant Paranjape, Paul E Stolle, Sandhiya Krishnasamy
  • Patent number: 11468304
    Abstract: In one example, a hardware accelerator comprises an event register that stores an event; a hardware execution engine; and a controller configured to: extract, from an instruction, parameters of an operation to be performed by the hardware execution engine, and a synchronization primitive of a plurality of synchronization primitives for the event; and based on the synchronization primitive, perform at least one of: controlling a start time of the operation at the hardware execution engine, or determining whether to access the event register. The synchronization primitives include a set operation to set the event and/or a wait operation to suspend the operation at the hardware execution engine until the event is set. The plurality of synchronization primitive defines different conditions to be satisfied in order to perform the set operation.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: October 11, 2022
    Assignee: Amazon Technologies, Inc.
    Inventor: Ron Diamant
  • Patent number: 11461615
    Abstract: A novel and useful system and method of accessing multi-dimensional data in memory. The invention is applicable to neural network (NN) processing engines adapted to implement artificial neural networks (ANNs). The NN processor is constructed from self-contained computational units organized in a hierarchical architecture. The homogeneity enables simpler management and control of similar computational units, aggregated in multiple levels of hierarchy. Computational units are designed with minimal overhead as possible, where additional features and capabilities are aggregated at higher levels in the hierarchy. On-chip memory provides storage for content inherently required for basic operation at a particular hierarchy and is coupled with the computational resources in an optimal ratio. Lean control provides just enough signaling to manage only the operations required at a particular hierarchical level.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: October 4, 2022
    Inventors: Avi Baum, Or Danon
  • Patent number: 11455224
    Abstract: Described embodiments provide systems and methods for displaying a service graph in association with a time of a detected anomaly. A device may store a plurality of snapshots of a service graph of a plurality of microservices. Each of the snapshots of the service graphs include metrics at a respective time increment from execution of each of the plurality of microservices. The device may detect an anomaly with operation of one or more microservices of the plurality of services. The device may identify a set of snapshots of the service graph within a predetermined time period of a time of the anomaly. The device may display each of the snapshots in the set of snapshots of in sequence corresponding to time increments within the predetermined time period of the time of the anomaly.
    Type: Grant
    Filed: May 16, 2019
    Date of Patent: September 27, 2022
    Assignee: Citrix Systems, Inc
    Inventors: Chiradeep Vittal, Abhishek Chauhan
  • Patent number: 11457029
    Abstract: In one example implementation, a log analysis system can comprise an activity engine to monitor user activity of a computer system, a baseline engine to generate an expected baseline of a log, and an abnormality engine to compare the log to the expected baseline to identify an abnormality, compare the abnormality to a user activity volume based on a correlation between the user activity volume and the log activity, and classify the log.
    Type: Grant
    Filed: December 14, 2013
    Date of Patent: September 27, 2022
    Assignee: Micro Focus LLC
    Inventors: Eran Samuni, Daniel Adrian, Yohay Golan
  • Patent number: 11442902
    Abstract: An operations server synchronizes updates to a cloud-based shared versioned file system. The shared versioned file system includes directories and sub-directories that are divided into shards. The operations server coordinates requests from local filer servers, each running a respective local version of the shared versioned file system, to update a shard in the cloud-based shared versioned file system. The operations server can provide a global lock on the shard to a local filer server before it updates the shard in the cloud-based shared versioned file system. Preferably, shards are sized dynamically based on the number of entries in the directories associated therewith.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: September 13, 2022
    Assignee: Nasuni Corporation
    Inventors: Georgi Damyanov, Yuyan Zhang
  • Patent number: 11442837
    Abstract: Systems and methods for monitoring a robotic process automation (RPA) system are provided. Job execution data for one or more jobs in the RPA system is determined based on logs of the RPA system. The job execution data for the one or more jobs in the RPA system is caused to be displayed in substantially real time.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: September 13, 2022
    Assignee: UiPath, Inc.
    Inventors: Liji J. Kunnath, Remus Rusanu, Arghya Chakrabarty
  • Patent number: 11442831
    Abstract: A system for capturing a trace of an NVME hard disc can include a BMC, a BIOS, a protocol analysis instrument, and a fixture plate comprising a processor and a dial switch. The BIOS is configured to acquire register error information of the PCIe link when an error occurs to a PCIe link where the NVME hard disc is located, and send the register error information to the BMC, and the BMC is configured to send the received information to the fixture plate, and the fixture plate is configured to trigger the protocol analysis instrument to capture a PCIe trace of the NVME hard disc when a current error type corresponding to the dial switch is consistent with the error type of the register error information parsed by a processor of the fixture plate.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: September 13, 2022
    Assignee: ZHENGZHOU YUNHAI INFORMATION TECHNOLOGY CO., LTD.
    Inventor: Yixin Sun
  • Patent number: 11429509
    Abstract: Disclosed techniques relate to automatically instrumenting a web application. In an aspect, a method identifies that a web application includes an event that is triggered by a user interaction. The method associates the event with a tracer that is configured to log tracing information based on an execution of a first set of operations caused by the event and to obtain a first measurement of performance of a first span. The method identifies, in the code, that the execution of a first set of operations causes a request to be made to a server. The method associates the request with the tracer. The tracer is configured to log tracing information based on an execution of a second set of operations caused by the request and to obtain a second measurement of performance of a second span that is a child span of the first span.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: August 30, 2022
    Assignee: Oracle International Corporation
    Inventors: Kevin J. Cirone, Blake T. Sullivan, Dipankar Bajpai
  • Patent number: 11409557
    Abstract: A graphics processing system for operation with a data store, comprising: one or more processing units for processing tasks; a check unit operable to form a signature which is characteristic of an output from processing a task on a processing unit; and a fault detection unit operable to compare signatures formed at the check unit; wherein the graphics processing system is operable to process each task first and second times at the one or more processing units so as to, respectively, generate first and second processed outputs, the graphics processing system being configured to: write out the first processed output to the data store; read back the first processed output from the data store and form at the check unit a first signature which is characteristic of the first processed output as read back from the data store; form at the check unit a second signature which is characteristic of the second processed output; compare the first and second signatures at the fault detection unit; and raise a fault signal i
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: August 9, 2022
    Assignee: Imagination Technologies Limited
    Inventors: Wei Shao, Christopher Wilson, Damien McNamara
  • Patent number: 11399202
    Abstract: A method may comprise collecting data from a core network, an operator network and a customer premise network. KPI values corresponding to one or more KPIs may be determined, based on the collected data. KQI values corresponding to one or more KQIs may be determined, based on the one or more of the determined KPI values. The determined KQI values may be output to an operator. In an embodiment, data collected from the core network may include data collected from one or more analyzer devices and head end probes. Data collected from a customer premise network may include data collected from last mile equipment or customer premise probes.
    Type: Grant
    Filed: April 3, 2020
    Date of Patent: July 26, 2022
    Assignee: Q'ligent Corporation
    Inventors: Ted Korte, Sergey Lobanov, Maxim Uvarov, Anatoly Shishin, Andrey Kochetkov
  • Patent number: 11387995
    Abstract: An apparatus and method are described for aligning corresponding elements in multiple streams of elements. An apparatus is provided comprising both first generation circuitry to generate a first stream comprising first elements and second generation circuitry to generate a second stream comprising second elements. The first generation circuitry is arranged to insert a first element in the first stream to identify each occurrence of a corresponding second element in the second stream. Key generation circuitry is used to generate, for each instance of the first element to be included within the first stream, an associated key value determined from a set of key values, the set of key values being insufficient to allow unique key values to be generated for each instance of the first element. The first generation circuitry is then arranged to indicate within the first stream the associated key value for each instance of the first element.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: July 12, 2022
    Assignee: Arm Limited
    Inventor: Alasdair Grant
  • Patent number: 11379291
    Abstract: A system to facilitate application logging is described. The system includes a processor and a machine readable medium storing instructions that, when executed, cause the processor to record a system state, perform application logging at a first logging rate, record an occurrence of task failures during the logging, determine a predicted queue size threshold value based on the recorded occurrence of task failures, determine whether that the predicted queue size threshold value is less than an actual queue size and perform the application logging at a second logging rate upon a determination that the predicted queue size threshold value is less than an actual queue size, wherein the second logging rate is greater than the first logging rate.
    Type: Grant
    Filed: April 7, 2020
    Date of Patent: July 5, 2022
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Aravind Badiger, Abhilash Kulkarni, Ravindhar Uppada
  • Patent number: 11379475
    Abstract: A computer-implemented method for analyzing spans and traces associated with a microservices-based application executing in a distributed computing environment comprises aggregating a plurality of ingested spans associated with one or more applications executing in the distributed computing environment into a plurality of traces, wherein each of the plurality of ingested spans is associated with a plurality of tags. The method further comprises comparing durations of a set of related traces of the plurality of traces to determine patterns for the plurality of tags and generating a histogram that represents a distribution of the durations of the set of related traces. The method also comprises providing alerts for one or more tags from the plurality of tags associated with traces having a duration above a threshold based on the distribution of the durations.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: July 5, 2022
    Assignee: Splunk Inc.
    Inventors: Gergely Danyi, Steven Flanders, Joseph Ari Ross, Justin Smith, Eric Wohlstadter, Chengyu Yang
  • Patent number: 11379776
    Abstract: A system for validating data includes a digital touch point associated with an organization having an element and a quality assurance (QA) module for monitoring the digital touch point. The system includes a quality control (QC) algorithm associated with the QA module, which is executed against the new element to determine if one or more discrepancies exist between current data for the new element and expected data for the new element. The system includes a tangible error report that captures one or more discrepancies between the current data and the expected data for the new element. The QA module has the ability to modify the request to call to eliminate the one or more discrepancies.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: July 5, 2022
    Assignee: Innovian Corporation
    Inventors: Whitson G. Waldo, IV, Bill Bruno, Adam McArdell, Kevin Wysocki
  • Patent number: 11366732
    Abstract: An application processor includes a central processing unit, a root complex that communicates with at least one external device under control of the central processing unit and generates a state change interrupt when an operation state changes, and an interrupt aggregation and debug unit that performs debugging on at least one component associated with the state change interrupt depending on the state change interrupt.
    Type: Grant
    Filed: November 3, 2020
    Date of Patent: June 21, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jae-Heon Lee
  • Patent number: 11354081
    Abstract: An information processing apparatus includes a collection unit that collects a first history on a monitoring target device, a display unit that displays a history screen including at least a part of the first history collected by the collection unit, a receiving unit that receives an operator's operation to designate information included in the first history, on the history screen displayed by the display unit, and a generation unit that generates a second history in which the information designated by the operator is concealed, from the first history.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: June 7, 2022
    Assignee: FUJIFILM Business Innovation Corp.
    Inventors: Aiko Nozue, Koji Hashimoto, Toru Nakatani, Haruki Matsui, Takeshi Ogura
  • Patent number: 11354386
    Abstract: A method for detecting, identifying, and mitigating advanced persistent threats in a computer network having one or more computers includes a processor in the computer network: receiving a request to access a resource in the computer network; identifying the request as originating from an application executing on the computer network; executing an anomaly operation to determine a behavior of the application is one of anomalous and not anomalous; executing a privilege operation to determine the request is one of permanently allowed and not-permanently allowed; granting access to the resource for both a non-anomalous-behaving application and a permanently allowed request; and generating and displaying, on a graphical user interface of the computer network, and prompt for either an anomalous-behaving application or a not-permanently allowed request.
    Type: Grant
    Filed: April 3, 2020
    Date of Patent: June 7, 2022
    Assignee: Architecture Technology Corporation
    Inventors: Joseph Sirianni, Matthew Donovan
  • Patent number: 11336507
    Abstract: Anomaly detection and filtering based on system logs is provided via receiving, at a first time, a first sequence of log entries from a networked system; generating, based on previously observed log entries including the first sequence of log entries, predicted log entries for a second time; receiving, at the second time, a second sequence of log entries from the networked system; determining whether the second sequence is anomalous based on comparing the second sequence with the predicted log entries; in response to determining that the second sequence is anomalous, determining whether the second sequence is noteworthy based on a function entropy of the first sequence and a sentiment polarity of the second sequence; and in response to determining that the second sequence is noteworthy, generating an anomaly report that includes the second sequence and a root cause.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: May 17, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Prasenjeet Acharjee, Subramanian Karunanithi, Lavan K. Peechara, Bhavadharini Krishnamoorthy, Togis Thomas
  • Patent number: 11307813
    Abstract: An image forming system for forming an image includes a storage unit that stores a log of the image forming system, and a controller to detect an abnormality of the image forming system based on the content of the log stored in the storage unit, and the controller controls to execute a recovery process of the image forming system according to a detection result of the abnormality. In this configuration, the image forming system detects complicated abnormality that occurs according to series of flows.
    Type: Grant
    Filed: February 10, 2020
    Date of Patent: April 19, 2022
    Assignee: KYOCERA DOCUMENT SOLUTIONS INC.
    Inventor: Yusuke Nakagoshi
  • Patent number: 11301354
    Abstract: A system and method for determining enterprise metrics of an enterprise application is described. The system receives a root cause definition that identifies enterprise user metrics and predefined parameters for the enterprise user metrics. The enterprise user metrics identify operation metrics of the enterprise application by users of the enterprise. The system stores the root cause definition in a library of root causes definitions. The system receives a selection of a plan that identifies an operation attribute of the enterprise application. The system identifies a root cause from the library of root causes definitions based on the plan. The system generates a recommendation based on the identified root cause.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: April 12, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Ananthatejas Raghavan, Di Li, Anil Kumar Revuru, Dheepak Ramaswamy, Leanna Holly Robb
  • Patent number: 11301365
    Abstract: A computing system includes persistent storage containing a plurality of groups of software instructions, wherein each respective group is linked with at least one other group. The computing system also includes a software application configured to perform operations, including determining an expected execution map representing expected paths that are expected to be followed between linked groups of software instructions. The operations also include monitoring interactions of a user with the plurality of groups, and based on the monitoring, determining an observed execution map representing observed paths that the user has followed between the linked groups of software instructions. The operations further include determining a disparity map representing a disparity between the expected paths and the observed paths by comparing the expected execution map to the observed execution map, and displaying the expected execution map, the observed execution map, and/or the disparity map.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: April 12, 2022
    Assignee: ServiceNow, Inc.
    Inventors: Vaibhav Kadam, Ankush Agrawal, Ragunath Sigicherla, Amit Jain
  • Patent number: 11295481
    Abstract: A mechanism is described for facilitating fabric-based compression and/or decompression of data at computing devices. A method of embodiments, as described herein, includes compressing contents of a data stream traveling through an internal fabric between a source component and a destination component, wherein the contents are compressed on the internal fabric.
    Type: Grant
    Filed: October 20, 2020
    Date of Patent: April 5, 2022
    Assignee: INTEL CORPORATION
    Inventors: Altug Koker, Vasanth Ranganathan, Joydeep Ray, Abhishek R. Appu
  • Patent number: 11294754
    Abstract: Systems and methods for contextual event sequence analysis of system failure that analyzes heterogeneous system event record logs are disclosed. The disclosure relates to analyzing event sequences for system failure in ICT and other computerized systems and determining their causes and propagation chains.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: April 5, 2022
    Inventors: Jianwu Xu, Hui Zhang, Haifeng Chen, Tanay Kumar Saha
  • Patent number: 11290355
    Abstract: A compressed flow log can be created from flow log entries. Flow log entries include field values for flow log fields. The entries can be compressed based on tuples (e.g., primary tuple, secondary tuple, tertiary tuple, etc.) specified by tuple definitions that specify the flow log fields in tuple content values. A first primary tuple content value can be based on a primary tuple definition and the field values of a first flow log entry included in flow log entries. A first primary tuple symbol can be associated with the first primary tuple content value. The first flow log entry can be used to create a first compressed flow log entry that includes the first primary tuple symbol. The first compressed flow log entry can be included in the compressed flow log, and the compressed flow log can be transmitted to a flow log consumer.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: March 29, 2022
    Assignee: Pensando Systems, Inc.
    Inventors: Pavithra Ramaswamy, Shrey Ajmera
  • Patent number: 11281525
    Abstract: Disclosed is an electronic apparatus including a processor, and a memory configured to store instructions executable by the processor in which the processor is configured to: obtain state data about operations of a plurality of components in the electronic apparatus, identify a state error of a first component among the plurality of components based on the obtained state data, obtain error data about a correlation between the identified state error of the first component and a second component causing the state error among the plurality of components, identify possibility of occurrence of the state error of the first component based on the obtained state data and the obtained error data, and perform an error-related operation for the second component correlating with the state error of the first component.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: March 22, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Kangyoung Won
  • Patent number: 11281509
    Abstract: Techniques for memory management may include: allocating, from an allocation pool, buffers for logs used by processing cores; recording messages in the logs for the processing cores; responsive to filling a first buffer included in a first log used to record messages for a first of the plurality of processing cores, allocating a second buffer of the allocation pool for the first log; adding the second buffer to the first list of buffers for the first log; and adding the first buffer, that is included in the first list for the first log, to the allocation pool, wherein after adding the first buffer to the allocation pool, the first buffer is included in the first list of buffers for the first log and also included in the allocation pool. The buffers may be included in a distributed global memory portion of the same computing module as the processing cores.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: March 22, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Gabriel Hershkovitz, Arieh Don, Michael R. Barber
  • Patent number: 11269708
    Abstract: In various embodiments, techniques can be provided to address debug efficiency for failures found on an operational system. The techniques can utilize a real-time trigger to notify a memory device to dump an error log to timely capture all needed information. In response to detecting one or more error conditions associated with the memory device, a system that interfaces with the memory device can generate a trigger signal to the memory device. In response to identifying the trigger signal, the memory device can dump an error log of the memory device to a memory component in the memory device. The error log can later be retrieved from the memory component for failure analysis.
    Type: Grant
    Filed: August 10, 2020
    Date of Patent: March 8, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Alberto Sassara, Basso Francesco, Crescenzo Attanasio, Massimo Iaculo
  • Patent number: 11249881
    Abstract: Expressly turning tracing on and off at each juncture between code that a developer wants to have traced and other code may reduce trace file size but adds computational cost. Described technologies support selectively tracing a process's execution, with some extra tracing done beyond the code the developer wanted traced, but with significantly reduced computational cost, by reducing the number of trace enablement and disablement operations. A trace controller uses a tracing disablement distance variable whose values indicate the computational distance from trace disablement. A distance variable modifier automatically moves the distance variable closer to a stop-tracing value as the process executes. The amount of extra tracing is balanced against the reduction in trace enablement/disablement operations by tuning thresholds, based on information about routine size and computational cost.
    Type: Grant
    Filed: July 7, 2020
    Date of Patent: February 15, 2022
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Del Myers, Jackson Davis, Thomas Lai, Patrick Nelson, Jordi Mola, Juan Carlos Arevalo Baeza
  • Patent number: 11226858
    Abstract: A system stores logs representing events that occur in the system based on executable instructions executed by the system, for example, by processes executing within the system or by applications. The system analyzes the logs to determine the root cause of the error or event that resulted in generation of the log. The system clusters logs to determine clusters of logs. The system analyzes logs of each cluster to determine a root cause of errors resulting in logs belonging to the cluster. For any new error log that is received, the system determines the cluster to which the error log belongs and takes action based on the root cause associated with the cluster, for example, sending an alert message or performing automatic remediation.
    Type: Grant
    Filed: December 24, 2020
    Date of Patent: January 18, 2022
    Assignee: salesforce.com, inc.
    Inventor: Siddharth Srivastava
  • Patent number: 11200108
    Abstract: A method and technique for data lifecycle management includes storing in a memory from a monitored system one or more metrics. A fault from the monitored system is identified and a first metric from the one or more metrics as being related to the fault is identified. A lifespan is assigned to the first metric, and the first metric is removed from the memory if the lifespan is over.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: December 14, 2021
    Assignee: International Business Machines Corporation
    Inventors: Thierry Supplisson, Eric Thiebaut-George
  • Patent number: 11188409
    Abstract: A method and technique for data lifecycle management includes identifying a fault from a monitored system. A time period window is defined associated with the fault based on a time the fault occurred. One or more metrics that are related to the fault that fall within the time period window are identified from the monitored system and stored in a memory. A lifespan is assigned to the one or more metrics based on the fault, and the one or more metrics are removed from the memory when their associated lifespans are over.
    Type: Grant
    Filed: July 12, 2019
    Date of Patent: November 30, 2021
    Assignee: International Business Machines Corporation
    Inventors: Thierry Supplisson, Eric Thiebaut-George
  • Patent number: 11182246
    Abstract: Systems, methods, and circuitries are disclosed for protecting data throughout read and write operations. In one example a method includes receiving a plurality of data bits; dividing the plurality of data bits into at least two data blocks; generating respective sets of block check bits for each respective data block using a respective first error code; combining the sets of block check bits to generate a set of signature bits for the plurality of data bits; generating a set of cumulative check bits for the plurality of data bits and the set of signature bits using a second error code; and storing, in a memory location, the plurality of data bits, the set of signature bits, and the set of cumulative check bits.
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: November 23, 2021
    Assignee: Infineon Technologies AG
    Inventors: Thomas Kern, Christian Badack, Michael Goessel, Klaus Oberlaender
  • Patent number: 11175991
    Abstract: A control system (10) having a hierarchical distributed architecture, the system (10) comprising: a plurality of nodes (12), each node (12) hosting one or more services (18) and a respective node agent (22); a communications bus providing communication between nodes (12); and a system agent (24) hosted on one of the plurality of nodes (12), the system agent (24) being configured to monitor a lifecycle state of the system (10); wherein each node agent (22) is configured to transmit data relating to a state of its respective node (12) and a respective state of the or each service (18) hosted on its respective node (12) to the system agent (24), thereby enabling the system agent (24) to monitor the lifecycle state of the system (10). A vehicle (46) comprising said control system (10).
    Type: Grant
    Filed: June 13, 2017
    Date of Patent: November 16, 2021
    Assignee: Jaguar Land Rover Limited
    Inventors: Charlotte Kershaw, Christopher Wild, Mark Grant, Miguel Lopez, Francois Loubaresse, Christophe Fava-Rivi
  • Patent number: 11163886
    Abstract: An information handling system embedded controller does not initiate a chipset having secure execution of chipset firmware unless the chipset firmware validates against error correcting checksums inserted into the embedded controller firmware. Comparing checksums calculated from chipset firmware against expected checksum values for the chipset firmware prevents secure chipset initiation failure due to bit errors associated with chipset firmware storage in flash memory.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: November 2, 2021
    Assignee: Dell Products L.P.
    Inventors: Craig Lawrence Chaiken, Chun Yi Yang
  • Patent number: 11140050
    Abstract: Ad hoc private localization of service instances of a global service provided via hybrid cloud computing environment. In-memory and/or container image-based provisioning of a service instance from a public cloud portion to a private cloud portion within a hybrid cloud computing environment is based on context of service usage, pattern of service usage, predicted environmental conditions, and/or subscription-based input.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: October 5, 2021
    Assignee: International Business Machines Corporation
    Inventors: Shailendra Moyal, Akash U. Dhoot, Nitin S. Jadhav, Niteen D. Lakhe
  • Patent number: 11120033
    Abstract: Systems and methods for computer log retrieval are provided. A system can receive a set of query logs, and transform the set of query logs into a query log multivariate time series. The system accesses log multivariate time series of historical logs, and computes and ranks a similarity distance between the query log multivariate time series and each of the log multivariate time series of the historical logs. The system also retrieves a highest ranked set of historical logs as a most similar set of logs compared to the set of query logs.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: September 14, 2021
    Inventors: Jianwu Xu, Haifeng Chen
  • Patent number: 11113136
    Abstract: A processing system includes a plurality of circuits configured to generate a plurality of error signals. The processing system further includes a plurality of error pads and a fault collection circuit configured to receive the plurality of error signals and to generate a respective combined error signal for each of the plurality of error pads. The fault collection circuit includes a combinational logic circuit configured to generate the combined error signal by selectively routing the plurality of error signals to the plurality of error pads as a function of a set of configuring bits.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: September 7, 2021
    Assignee: STMicroelectronics Application GMBH
    Inventor: Roberto Colombo
  • Patent number: 11113385
    Abstract: An application runs in a first security zone of a computer system. Trace information generated from running the application is stored in a first security zone. Filtered trace information is generated by removing specified information from the trace information. The filtered trace information is stored in a particular storage location within the first security zone. An adapter application that is running within the first security zone is executable to access the particular storage location and call a second security zone. The adapter application transmits, from the first security zone to a datastore within the second security zone, the filtered trace information stored in the particular storage location. Communication between the first security zone and the second security zone is one-way from the first security zone to the second security zone.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: September 7, 2021
    Assignee: PayPal, Inc.
    Inventors: Prajakta Dhavali, Binh Nguyen, Vladimir Bacvanski
  • Patent number: 11105850
    Abstract: Systems and methods for secure testing and debugging of electronic devices are described. In one embodiment, the systems and methods may include an electronic device that includes a control switch placed on a device test bus of the electronic device between a debugger external to the device and a debug interface on the device. In some cases, the device may include at least one register placed on the device test bus between the debugger and authentication logic of the electronic device.
    Type: Grant
    Filed: May 24, 2018
    Date of Patent: August 31, 2021
    Assignee: Seagate Technology LLC
    Inventor: Jon Trantham
  • Patent number: 11100584
    Abstract: Systems, devices, and methods for linking orders to develop a consolidated audit trail (CAT) are configured to receive event data for one or more orders based on one or more order characteristics; determine linkages between the one or more orders based on parent relationships of the one or more orders; verify the linkages between the one or more orders based on the event data; and determine order lifecycles based on the linkages between the one or more orders.
    Type: Grant
    Filed: July 10, 2019
    Date of Patent: August 24, 2021
    Assignee: FIDELITY NATIONAL INFORMATION SERVICES, INC.
    Inventors: Neil Palmer, Michael Sherman
  • Patent number: 11099935
    Abstract: The present invention provides an information processing apparatus having a user interface, a non-volatile memory that stores a loading program, and another non-volatile memory that stores a boot program and a notifying program for notifying an error. The information processing apparatus executes the loading program at startup to verify the boot program and activates the notifying program based on a detection of an alteration of the boot program to notify an error via the user interface.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: August 24, 2021
    Assignee: Canon Kabushiki Kaisha
    Inventor: Yosuke Obayashi
  • Patent number: 11093368
    Abstract: Diffing a subject replayable trace against a comparison replayable trace includes identifying a first plurality of functions within a first sequence of instructions recorded in the subject trace, and identifying a second plurality of functions a second sequence of instructions recorded in the comparison trace. A first plurality of groups of the first plurality of functions, and a second plurality of groups of the second plurality of functions are identified. The first and second pluralities of groups are compared, including determining, based on an identity of each group, and on function(s) corresponding to the group, if each first group in the first plurality of groups is at least one of: equal to a second group in the second plurality of groups, a replacement of a second group in the second plurality of groups, deleted from the second plurality of groups, or inserted into the second plurality of groups.
    Type: Grant
    Filed: January 15, 2020
    Date of Patent: August 17, 2021
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventor: Jordi Mola
  • Patent number: 11068378
    Abstract: This disclosure relates to exposing memory cell values prior to execution time(s) corresponding to events that caused the memory cell values to be recorded into a trace. Trace fragments, including a first trace fragment and a second trace fragment, are identified within a trace. Each trace fragment records an uninterrupted consecutive execution of executable instructions on a corresponding thread. The first trace fragment can be ordered prior to the second trace fragment. It is determined that a memory cell value can be exposed, during replay of the second fragment, at a first execution time that is prior to a second execution time corresponding to an event that caused the memory cell value to be recorded into the trace during trace recording. Output data is generated which indicates that the memory cell value can be exposed at the first execution time during replay of the second trace fragment.
    Type: Grant
    Filed: April 11, 2019
    Date of Patent: July 20, 2021
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventor: Jordi Mola
  • Patent number: 11055159
    Abstract: Disclosed is a method that includes obtaining a list of processes in an application centric infrastructure fabric, sorting the list of processes according to an amount of memory increase associated with each respective process in the list of processes to yield a sorted list, selecting a group of processes from the sorted list and collecting a respective live process core for each process in the group of processes without pausing or killing any process in the group of processes. The method includes applying an offline leak detection tool to each process in the group of processes to yield a list of leaked memory addresses for a given process of the group of processes and transmitting a message to the given process with the list of leaked memory addresses, whereby the given process calls a function to release leaked memory associated with the given process as identified in the message.
    Type: Grant
    Filed: April 24, 2019
    Date of Patent: July 6, 2021
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Sivakumar Ganapathy, Ram Regar, Navya Patimalla, Sohayb Aiyub
  • Patent number: 11050667
    Abstract: A method, apparatus, switch, device for packet forwarding and storage medium are disclosed. The method includes: obtaining a packet to be forwarded; detecting whether a first data table contains connection cache information corresponding to the packet; obtaining a first identifier of the connection cache information from the first data table if the first data table contains the connection cache information corresponding to the packet; obtaining connection information corresponding to the connection cache information from a second data table, and determining a second identifier of the connection cache information, wherein the second identifier is a current connection identifier corresponding to the connection cache information and changes when the connection information changes; and forwarding the packet based on the connection cache information if the second identifier is the same as the first identifier.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: June 29, 2021
    Assignees: BEIJING KINGSOFT CLOUD NETWORK TECHNOLOGY CO., LTD., BEIJING KINGSOFT CLOUD TECHNOLOGY CO., LTD.
    Inventor: Bin Dong
  • Patent number: 11029158
    Abstract: A system for tracking and analyzing performance of a movable object and methods of making and using the same. Movable object performance can be tracked by creating a process log for a movable object manager of the movable object, and creating a movement record of the movable object for comparison to the process log. The process log can include, for example, records of application call processes to a movable object interface, protocol call processes transmitted to and from the movable object, and/or metadata. A movable object event can be analyzed by correlating the process log with the movement record. The present systems and methods are particularly suitable for tracking and analysis of unmanned aerial vehicles (UAV).
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: June 8, 2021
    Assignee: SZ DJI TECHNOLOGY CO., LTD.
    Inventors: Arnaud Thiercelin, Dhanushram Balachandran, Robert Schlub, Hai Vo, Di Wu, Andrew Barinov