Abstract: In some implementations, a memory device may detect a first read failure associated with a page type and a memory section of the memory device. The memory device may perform multiple read recovery operations in a first order defined by a first sequence of read recovery operations. The memory device may identify a read recovery operation that results in successful recovery from the first read failure. The memory device may reorder the first sequence of read recovery operations to generate a second sequence of read recovery operations that prioritizes the read recovery operation. The memory device may detect a second read failure associated with the page type and the memory section. The memory device may perform one or more read recovery operations to recover from the second read failure in a second order defined by the second sequence of read recovery operations.

Abstract: A controller optimizes read retry thresholds for a memory device using one or more previous reads and a condition. The controller determines a read level table based on a condition indicative of a state of the memory device and selects an entry among multiple entries in the selected read level table based on a historical read threshold. For the selected entry, the controller: determines fail bits for data associated with multiple read operations on the cells using multiple read retry thresholds; and determines an order of the multiple read retry thresholds based on the fail bits determination.

Abstract: A method, system and computer program product for facilitating access to a resource represented in an image at a later time. A screen capture of an image displayed on a computing device is implemented. Metadata, including the resource location, resource navigation and positional metadata, regarding the source data of the screen capture image is generated. The generated metadata is then embedded into the screen capture image. The screen capture image with the embedded metadata is then transmitted to a different user. By embedding the metadata into the screen capture image, the user receiving the screen capture image will be able to reproduce the state of the source environment when the image was captured using the embedded metadata thereby opening the resource represented in the image.

Abstract: A system and method for rapid data investigation and data integrity analysis is disclosed. A data set is received by a server computer from one or more client computers connected with the server computer via a communications network, and the data set is stored in a distributed storage memory. One or more analytical processes are executed on the data set from the distributed storage memory to generate statistics based on each of the analytical processes, and the statistics are stored in a random access memory, the random access memory being accessible by one or more compute nodes, which generate a graphical representation of at least some statistics stored in the random access memory. The graphical representation of at least some statistics is then formatted for transmission to and display by the one or more client computers.

Abstract: A method, system and computer program product for facilitating access to a resource represented in an image at a later time. A screen capture of an image displayed on a computing device is implemented. Metadata, including the resource location, resource navigation and positional metadata, regarding the source data of the screen capture image is generated. The generated metadata is then embedded into the screen capture image. The screen capture image with the embedded metadata is then transmitted to a different user. By embedding the metadata into the screen capture image, the user receiving the screen capture image will be able to reproduce the state of the source environment when the image was captured using the embedded metadata thereby opening the resource represented in the image.

Abstract: A client may, for example, initiate presentation of the content item in a hybrid stream mode in which both a client stream and a content provider stream are combined to form a resulting hybrid stream for presentation. The client may then, at some point during presentation of the content item, detect that the content provider stream has become unavailable. In response to such a determination, the client may continue to present the content item in a client stream mode, in which the client stream is used for presentation of the content item without use of the content provider stream.

Abstract: A method for adaptively migrating data in solid state memory. The method includes making a first determination that a write limit of a first region of the solid state memory has been reached, and based on the first determination, allocating a second region of the solid state memory, writing a pre-migration marker to each memory location of the second region and receiving a first request to read a data fragment from a first logical address. The method further includes identifying a first memory location in the second region based on the first logical address, making a second determination that a first data fragment at the first memory location comprises a pre-migration marker, and based on the second determination, identifying a second memory location in the first region, based on the first logical address, and writing a second data fragment, retrieved from the second memory location, to the first memory location.

Abstract: A wear leveling method and apparatus and a storage medium are disclosed, the method including: performing error correction on data read from a physical block to obtain corrected data, and counting corrected bits in the corrected data to obtain the number of the corrected bits, where the data as read may be previously written to the physical block in a dynamic wear leveling manner and/or a static wear leveling manner, and the number of the corrected bits is negatively correlated with a residual service life of the physical block; detecting whether the obtained number of the corrected bits is more than a preset bit-number threshold value; and transferring data stored in the physical block, if the number of corrected bits is detected as more than the preset bit-number threshold value.

Abstract: There is disclosed an apparatus including a node with a processor, a communications interface, and a computer readable memory that has other and a space time modules that enable space time region based communication if space time region based criteria are met. There is disclosed a method with steps of: providing an interface; determining if a space time region based criteria is met; and enabling communication over the interface if the space time region based criteria is met. There is disclosed a user interface method having the steps of: providing a view that controls objects rep resenting a spatio temporal information related to a space time based communication rendered on the interface; and displaying information on the user interface in relation to the space time region based communication if a space time region based criteria are met.

Abstract: A method, system and computer program product for facilitating access to a resource represented in an image at a later time. A screen capture of an image displayed on a computing device is implemented. Metadata, including the resource location, resource navigation and positional metadata, regarding the source data of the screen capture image is generated. The generated metadata is then embedded into the screen capture image. The screen capture image with the embedded metadata is then transmitted to a different user. By embedding the metadata into the screen capture image, the user receiving the screen capture image will be able to reproduce the state of the source environment when the image was captured using the embedded metadata thereby opening the resource represented in the image.

Abstract: A decoder includes an interface and circuitry. The interface is configured to receive a code word that was encoded using a Quasi-Cyclic Low Density Parity Check (QC-LDPC) Error Correcting Code (ECC) represented by multiple check equations that are defined over multiple variables. The circuitry is configured to decode the code word by iteratively processing multiple layers that each includes a respective subset of the variables of the code word, and producing per each layer one or more count updates, and to generate a total number of errors corrected over the entire code word by accumulating the count updates.

Abstract: Systems and methods for transmission of data through mesh networks are disclosed. Specifically, various techniques and systems are provided for using performance metrics of nodes in a mesh network to make data transmission decisions. Exemplary embodiments of the present invention include a computer-implemented method. The method comprises receiving, at a network device on a network, performance metrics associated with an additional network device on the network; generating performance metrics associated with the network device; storing the performance metrics associated with the network device and the performance metrics associated with the additional network device; and transmitting the performance metrics associated with the network device and the performance metrics associated with an additional network device, wherein when the performance metrics are received, the performance metrics are used to determine whether data will be transmitted to the network device.

Abstract: There are provided a system, a method and a computer program product for operating a cloud computing infrastructure. In one embodiment, the system and method performs allocation domain modeling and provides a cloud scheduler framework that takes as input desired optimization objectives and the workload constraints and efficiently produces a placement solution that satisfies the constraints while optimizing the objectives in a way that adjusts itself depending on the objectives. As the objectives change, e.g., due to actions from system administrators or due to changes in business policies, the system optimizes itself accordingly and still produces efficient and optimized placement solutions. The system and method constructs an Allocation Domain (AD) that is a particular facet for allocating a logical entity to a physical entity. An AD is created using: variables, functional definitions (functions of variables), and a policy specification that includes a Boolean expression (of the functional definitions).

Abstract: Systems and methods for transmission of data through mesh networks are disclosed. Specifically, various techniques and systems are provided for using performance metrics of nodes in a mesh network to make data transmission decisions. Exemplary embodiments of the present invention include a computer-implemented method. The method comprises receiving, at a network device on a network, performance metrics associated with an additional network device on the network; generating performance metrics associated with the network device; storing the performance metrics associated with the network device and the performance metrics associated with the additional network device; and transmitting the performance metrics associated with the network device and the performance metrics associated with an additional network device, wherein when the performance metrics are received, the performance metrics are used to determine whether data will be transmitted to the network device.

Abstract: A function-monitored guidance system for adjusting at least one system component, the guidance system including a guiding mechanism having at least one adjustment component for guiding adjustment movements of the system component to be adjusted, of which at least one adjustment component includes a sensor device for detecting a load state of the adjustment component, and a monitoring device connected functionally to the adjustment component. The monitoring device provides detection time periods for detecting sensor signals of the at least sensor device, provides a threshold value, with which the number of overshoots thereof by the sensor signals within detection time periods is determined, and determines, from the number of overshoots in each case within the detection time periods, a value for the operating state. A method for monitoring the function of a guidance system for adjusting at least one system component is also disclosed.

Abstract: A method for detecting and cleansing suspect building automation system data is shown and described. The method includes using processing electronics to automatically determine which of a plurality of error detectors and which of a plurality of data cleansers to use with building automation system data. The method further includes using processing electronics to automatically detect errors in the data and cleanse the data using a subset of the error detectors and a subset of the cleansers.

Abstract: A method includes receiving signals processed according to a control law and generating an error signal based on the signals. The method includes determining at least one characteristic of the error signal, and determining whether to disable the control law based on the at least one characteristic.

Abstract: In a system and method of enhancing data reliability, a reference value associated with error count is obtained, and an error count of data stored in a buffer is obtained whenever an event is triggered. An accumulated value associated with error counts is acquired when the recorded error count is greater than an error threshold value. System slowdown is performed when the accumulated value is greater than a predetermined value.

Abstract: A technique includes receiving data indicative of a time varying count of errors, which are attributable to at least one memory device. The technique includes filtering the indicated count and detecting a defect in the memory device(s), where the detecting includes selectively generating an indicator to represent that the memory device(s) is defective based at least in part on a result of the filtering.

Abstract: A data transmission method, device and system to improve reliability of a data link. When the sender side detects erroneous data, the erroneous data is discarded and a data retransmission request is sent to the sender side to ensure correctness of received data and improve reliability of the data link; and, when the sender side detects the erroneous data and a bit error rate is greater than a preset bit error rate threshold, the data link gets into auto recovery, and data transmission is resumed after the recovery succeeds, thereby avoiding an excessively high bit error rate, preventing an excessively high probability of omitted checks (the higher the bit error rate is, the higher probability of omitted checks is), and further improving reliability of the data link.

Abstract: Examples are given for generating or providing a moving read reference (MRR) table for recovering from a read error of non-volatile memory included in a storage device. In some examples, priorities may be adaptively assigned to entries included in the MRR table. The entries may be ordered for use based on the assigned priorities. In other examples, the MRR table may be ordered for use such that entries with a single MRR value for each read reference value may be used first over entries having multiple MRR values for each read reference value. For these other examples, the MRR table may be adaptively reordered based on which entries were successful or unsuccessful in recovering from a read error but may still be arranged to have single MRR value entries used first for use to recover from another read error.

Abstract: An information processing apparatus includes a first parity production section for producing a first error detection code for detecting an error of data. A second parity production section produces a second error detection code for detecting an error of the data from the first error detection code. A first parity checking section detects an error of the retained data as a first error using the retained first error detection code. A second parity checking section detects an error of the retained data as a second error using the retained second error detection code. A control amount outputting section outputs, when an occurrence rate of a first error is equal to or lower than a first threshold value, a control amount for controlling a power supply voltage or a frequency using a second threshold value as a target value for an occurrence rate of a second error.

Abstract: An information management apparatus for managing data includes a rewritable nonvolatile memory, and a memory controller configured to control inputting information into and outputting information from the nonvolatile memory. The memory controller overwrites a data, which includes a first validity check information, a first data body, a second validity check information, a second data body having the same data as the first data body and a third validity check information arranged in this order, in a designated address area in the nonvolatile memory when the memory controller performs a writing control in which the memory controller writes data in the nonvolatile memory.

Abstract: Embodiments of the invention relate to calculation of error rate for data storage which includes determining a completion status of a read operation of data stored in a storage device, the completion status being one of at least partially complete or not complete. The fault monitoring count is incremented based on the completion status being not complete. The fault monitoring count is decreased based on the completion status being at least partially complete. The fault monitoring count being decreased according to a value based on the number of bytes successfully read. The error rate indicator value is being calculated based on an exponential decay rate related to the number of bytes read. The fault monitoring count threshold is monitored every time the fault monitoring count is incremented and the storage device is identified as faulty once the threshold limit is exceeded.

Abstract: According to exemplary embodiments, a system, is provided for bit error rate (BER)-based wear leveling in a solid state drive (SSD). A block-level BER value for a block in the SSD is determined. An adjusted PE cycle count for the block is incremented or decremented based on the block-level BER value. Wear leveling is then performed in the SSD based on the adjusted PE cycle count.

Abstract: A vehicle includes electrical components, current sensors which determine current flowing through the electrical components, and a control system. The control system calculates and records error index values over an interval using the currents. The control system increments a first counter with every sample in the series, increments a second counter whenever a given error index value exceeds a calibrated high threshold, and decrements the second counter whenever the given error index value is less than a calibrated low threshold. A control action, e.g., recording a PASS or FAIL value, executes when either the absolute value of the second counter or the present value of the first counter reaches a corresponding limit or threshold. A method enhances the robustness of a hybrid vehicle torque security diagnostic using the control system. The vehicle and method use a signed X of Y debouncing or error signal processing method as noted above.

Abstract: In a particular embodiment, at a controller coupled to a memory array, a method includes receiving an indication that a first group of data bits read from the memory array includes errors that are uncorrectable by an error correction coding (ECC) engine. A count of the first group of data bits having a particular bit value may be compared to a prior count of data bits having the particular bit value. In response to determining that the count exceeds the prior count, a bit of the first group of data bits that has the particular bit value and that corresponds to a same memory cell as a corrected data bit of a second group of data bits is identified. A value of the identified bit of the first group may be changed to generate an adjusted group of data bits. The adjusted group of data bits may be provided to the ECC engine.

Abstract: Apparatus, and an associated method, for estimating a bit error rate of data communicated to a receiving station of a digital communications system, such as a GSM/EDGE cellular communication system. Soft decision values, indicative of confidence levels that decided values have been correctly decided are compared with threshold values by a comparator. A count is accumulated by a counter whose counted value is representative of decided data values having low levels of confidence that the decided values are correct. The count value is used in the formulation of the BER estimation.

Abstract: Methods and apparatus are disclosed for using error detection techniques, such as Forward Error Correction techniques, to predict the degradation below a certain threshold of an ability to accurately convey information on a communication channel, for example, to predict a failure of the communication channel. In response, transmission and/or reception of information on the channel may be adapted, for example, to prevent the degradation below the threshold, e.g., prevent channel failure. Predicting the degradation may be based, at least in part, on data transmission error information corresponding to one or more blocks of information received on the channel and may include determining an error rate pattern over time. Based on these determinations, the degradation below the threshold may be predicted and the transmission and/or reception adapted. Adapting may include initiating use of a different error encoding scheme and/or using an additional communication channel to convey information.

Abstract: A receiving apparatus is disclosed which includes: an amplification section configured to amplify a received signal including a digital broadcast signal; a mixing section configured to mix the received signal amplified by the amplification section with a selective frequency signal so as to acquire an intermediate frequency signal; a demodulation section configured to demodulate the intermediate frequency signal acquired by the mixing section so as to acquire a demodulated signal of the digital broadcast signal; and a control section configured to control the amplification factor of the amplification section in a manner bringing to a target level the signal level of the intermediate frequency signal acquired by the mixing section, the control section being further configured to set variably the target level in accordance with bit error status of the demodulated signal acquired by the demodulation section from the digital broadcast signal.

Abstract: A method and system of establishing communications between at least two independent software modules in a safety critical system, such as a medical system, is provided. The design comprises providing a media connection between software modules, wherein the software modules employ a communications protocol and participate in a bi-directional master-slave relationship between a master module and a slave module. The design further comprises sending an arbitrary length of data between the master and slave modules, wherein the arbitrary length of data is used by the master module to control and obtain status from the slave module, and sending arbitrary data further enables the slave module to return data and status information to the master module. The design also employs a safety critical communications watchdog between the master and slave modules, wherein the safety critical communications watchdog monitors communications quality between the master and slave modules.

Abstract: A built-in self test circuit includes a pattern generator, an elastic buffer, a symbol detector, and a comparison unit. A pattern generator generates a first test pattern to test a port under test and then a result pattern is gotten and stored in the elastic buffer. The symbol detector detects if a starting symbol exists in the test result pattern. If it exists, a second test pattern is generated to be compared with the test result pattern. As a result, a reliability of data transmission of the port under test is determined.

Abstract: The count data recording device includes: a storage unit including N memory areas; and a data restoring unit that detects a corruption in the count data pieces and restores the corruption, wherein the data writing unit records the count data piece using the memory area included in the range of the minor loop according to the predetermined order and shifts the range of the minor loop backward after recording the count data piece using a last memory area within the minor loop.

Abstract: Apparatus, and an associated method, for estimating a bit error rate of data communicated to a receiving station of a digital communications system, such as a GSM/EDGE cellular communication system. Soft decision values, indicative of confidence levels that decided values have been correctly decided are compared with threshold values by a comparator. A count is accumulated by a counter to whose counted value is representative of decided data values having associated therewith low levels of confidence that the decided values are correct. The count value is used in the formulation of the BER estimation.

Abstract: This disclosure concerns a memory including: a first memory region including memory groups including a plurality of memory cells, addresses being respectively allocated for the memory groups, the memory groups respectively being units of data erase operations; a second memory region temporarily storing therein data read from the first memory region or temporarily storing therein data to be written to the first memory region; a read counter storing therein a data read count for each memory group; an error-correcting circuit calculating an error bit count of the read data; and a controller performing a refresh operation, in which the read data stored in one of the memory groups is temporarily stored in the second memory region and is written back the read data to the same memory group, when the error bit count exceeds a first threshold or when the data read count exceeds a second threshold.

Abstract: A built-in self test circuit includes a pattern generator, an elastic buffer, a symbol detector, and a comparison unit. A pattern generator generates a first test pattern to test a port under test and then a result pattern is gotten and stored in the elastic buffer. The symbol detector detects if a starting symbol exists in the test result pattern. If it exists, a second test pattern is generated to be compared with the test result pattern. As a result, a reliability of data transmission of the port under test is determined.

Abstract: A method for maintaining flow control in a buffer memory coupled to a storage controller is provided. The storage controller includes, first and second counters that are used to monitor when data is read from a buffer memory and when data is transferred from the buffer memory to the host. The method includes, incrementing first and second counter values when data is placed in the buffer memory; decrementing a first counter value when data is read from the buffer memory; and decrementing the second counter value when data is sent to a host. The method further includes, pausing a first channel logic between a transport module and a storage disk when there is no data in the buffer memory; and pausing a second channel logic between a disk and the buffer if there is no space in the buffer memory.

Abstract: A data flow rate policer enforces data flow policies for a number of data flows using a probabilistic policy enforcement mechanism. The policer includes a memory that stores the state of each data flow in a compact data structure. Additionally, the policer includes one or more policing engines that implement the actual data flow policies based on information derived from the data structures. The policing engines may be implemented in hardware to increase performance.

Abstract: A semiconductor manufacturing apparatus includes a first program on a controller and a second program on an interface board between the controller and controlled devices. Both of the programs update their own counters and exchange their counter values with each other, serving as bi-directional software watchdog timers (WDT). If a counter value of the first program on the controller sent to the second program on the interface board is determined to be abnormal by the second program, the second program on the interface board sends commands to the controlled devices to terminate output so that the apparatus is navigated to a safe mode. The first program similarly monitors the counter values of the second program for anomalies. This bi-directional software WDT can be implemented as add-on to software programs that already exist in the controller and the interface board, therefore, this implementation does not incur extra cost of hardware of the apparatus.

Abstract: A method of monitoring network performance is disclosed and includes receiving a session initiation protocol (SIP) response message from one of a plurality of serving-call session control function (S-CSCF) systems at a centralized error monitoring server of an Internet Protocol (IP) Multimedia Subsystem (IMS). The SIP response message includes at least one error code that matches an error monitoring initial filter criterion included in a subscriber profile. The method also includes sending an alert message to a fault management system of the IMS when at least one threshold related to SIP error codes is met or exceeded based on the at least one error code.

Abstract: To facilitate measurement of the jitter tolerance of circuitry such as serializer/deserializer (SERDES) circuitry, test circuitry is provided that can add jitter to a data signal. The jitter added is preferably controllable and variable with respect to such parameters as jitter frequency (i.e., how rapid is the jitter) and/or amplitude (i.e., how large or great is the amount of the jitter).

Abstract: According to embodiments of the present invention, an integrated circuit such as a processor includes a counter to count an actual number of unreliable storage locations in the processor cache, at least one register to store an acceptable number of unreliable storage locations for the cache, a detector to measure a thermal environment of the processor, and circuitry to raise an operating voltage of the processor if the actual number of unreliable storage locations exceeds the acceptable number of unreliable storage locations, and if the thermal environment is acceptable.

Abstract: Described are techniques for use with an error handling policy for a data storage system. Error handling criteria may be specified for controlling behavior of the data storage system upon the occurrence of an internal processing error occurring when performing an ancillary task associated with a data operation received by the data storage system. The error handling criteria may include a threshold counter value, and one or more of: a device, a specific device location or address, and a host. An error may be conditionally returned to the host upon the occurrence of an internal processing error in accordance with the error handling criteria.

Abstract: A method for correcting data signal errors in a meter has been developed. The method includes receiving ordered data signals from the meter. Next, the sequenced of ordered data signals is analyzed to determine whether a data signal is missing. Finally, if a data signal is missing, a predetermined value is added to a sequence counter to compensate for the missing signal.

Abstract: An apparatus and method is disclosed for providing automated testing for an on-chip initialization counter circuit that comprises a plurality of counter flip-flop circuits that are used in the initialization of an integrated circuit. The apparatus comprises a state machine and a state machine counter circuit. The state machine receives signals from the initialization counter circuit and utilizes the signals to create a built-in self test output signal that indicates a current state within the initialization counter circuit. The state machine is capable of testing various operational states of an initialization counter circuit.

Abstract: An increment/decrement circuit for use with a general purpose performance counter (“GPPC”) connected to a bus carrying debug data. In one embodiment, the increment/decrement circuit includes a delay circuit block operable to receive and align the debug data. First and second mask circuits are connected in parallel to the delay circuit block in order to select and assert portions of the aligned debug data for incrementing and decrementing, respectively. An accumulation circuit is connected to the first mask circuit and the second mask circuit for generating an accumulated value based on the outputs of the mask circuits.

Abstract: A method and device for comparing two generic digital signals over a wide range of data rates and for counting the number of bit errors between digital signals under the conditions of noise and jamming. The bit error tester of the invention compares the digital signal sent with the digital signal received back from the unit under test and outputs the error signal. In the preferred arrangement of the invention, a field programmable gate array is used and a switch and LED display are used to introduce and monitor a time delay in the sent signal to ensure that the signals are in time alignment prior to comparison.

Abstract: Training of a link is performed, wherein the link is an interconnect between two devices of a computer system. A built-in self-test (BIST) of the link is performed. A result from the link training is compared to a result from the BIST. A link status of the link is posted, wherein the link status is based at least in part on the result from the link training and the result from the BIST.

Abstract: In one embodiment, the invention is directed to a zeroing circuit for a general purpose performance counter (“GPPC”) connected to a bus carrying debug data. The zeroing circuit comprises logic for zeroing out a specified number of most significant bits (“MSBs”) of a selected portion of the debug data based on a mask generated by a mask generator block. A selection control signal provided to the mask generator block is operable to be decoded to a particular mask.

Abstract: One embodiment of the disclosures made herein is a method of detecting a transmission unit fault condition in a network system. In accordance with such a method, an operation is performed for designating transmission units received at a first counting location of a datapath, during a first duration consisting of a first specified counting interval and a first specified settling interval after the first specified counting interval elapses, as first designated transmission units. An operation is performed for determining a first datapath ingress transmission unit count for the first designated transmission units at a first counting location during the first duration. An operation is performed for determining a first datapath ingress transmission unit count, an operation is performed for determining a first datapath egress transmission unit count for the first designated transmission units at a second counting location of the datapath during the first duration.