Abstract: A plug-in card storage device includes a plug-in card including a memory to store received input data and an error correction circuit to be equipped electrically connectable to the memory and to correct an error in the input data outputted from the memory; a device main body to have the plug-in card implemented therein; and a processor to determine whether or not to activate the error correction circuit, by calculating a reliability index value of the plug-in card based on an error rate of the memory provided in the plug-in card implemented in the device main body, so as to approximate the reliability index value to a reference value.

Abstract: Each of SAS expanders (“expander(s)” hereinafter) has a switch device for switching whether to bypass the expander in each communication path or not. Of the plurality of switch devices, an actual connection destination of a switch device bypassing the expander is a switch device in a upper-level and/or a lower-level of the switch device. Of the plurality of switch devices, an actual connection destination of a switch device that does not bypass an expander is the expander.

Abstract: A system and a method for failover control comprising: maintaining a primary device table entry (DTE) in a first table activated for a first adapter in communication with a first processor node having a first root complex via a first switch assembly and maintaining a secondary DTE in standby for a second adapter in communication with a second processor node having a second root complex via a second switch assembly; maintaining a primary DTE in a second table activated for the second adapter and maintaining a secondary DTE in standby for the first adapter; and upon a failover, updating the secondary DTE in the first table as an active entry for the second adapter and forming a path to enable traffic to route from the second adapter through the second switch assembly over to the first switch assembly and up to the first root complex of the first processor node.

Abstract: A system and a method for handling a system failure are disclosed. The method is adapted for an information handling system having a basic input and output system and a micro-controller. The method includes the following steps: sending, via the micro-controller, a signal; checking, via the micro-controller, whether an acknowledgement is received from the basic input and output system responsive to the signal; and scanning, via the micro-controller, a type of a system failure in response to the acknowledgement being not received.

Abstract: According to one example of the present invention, there is provided an electronic device comprising one or more configurable features. The device comprises an interface for receiving configuration data for configuring a feature of the electronic device and a data store or memory for storing feature configuration data associated with a configurable feature. The device further comprises logic for determining whether the received configuration data is compatible with configuration data stored in the data store. If the logic determines that the received configuration data is compatible the device is configured in accordance with the received configuration data.

Abstract: This storage controller includes a port unit and multiple processing units for inputting and outputting data to and from a storage apparatus. The port unit sorts the data I/O requests given from a host system to the corresponding processing units according to a table pre-defining the storage apparatus or a storage area in the storage apparatus to perform data I/O processing allocated to each of the processing units. The processing unit inputs data in the corresponding storage apparatus or the corresponding storage area according to the data I/O request sorted to itself from the port unit and, upon detecting a blockage of the other processing unit due to a failure, updates the table retained in each of the port units so as to sort the storage apparatuses or the storage areas allocated to the other processing unit to the remaining unblocked processing units.

Abstract: A semiconductor integrated circuit has a central processing unit and a rewritable nonvolatile memory area disposed in an address space of the central processing unit. The nonvolatile memory area has a first nonvolatile memory area and a second nonvolatile memory area, which memorize information depending on the difference of threshold voltages. The first nonvolatile memory area has the maximum variation width of a threshold voltage for memorizing information set larger than that of the second nonvolatile memory area. When the maximum variation width of the threshold voltage for memorizing information is larger, since stress to a memory cell owing to a rewrite operation of memory information becomes larger, it is inferior in a point of guaranteeing the number of times of rewrite operation; however, since a read current becomes larger, a read speed of memory information can be expedited.

Abstract: Provided is a method, system, and program for processing Input/Output (I/O) requests to a storage network including at least one storage device and at least two adaptors, wherein each adaptor is capable of communicating I/O requests to the at least one storage device. An error is detected in a system including a first adaptor, wherein the first adaptor is capable of communicating on the network after the error is detected. In response to detecting the error, a master switch timer is started that is less than a system timeout period if the first adaptor is the master. An error recovery procedure in the system including the first adaptor would be initiated after the system timeout period has expired. An operation is initiated to designate another adaptor in the storage network as the master if the first adaptor is the master in response to detecting an expiration of the master switch timer.

Abstract: Methods and associated structure for rapidly detecting a catastrophic failure of a bus structure within a storage subsystem. Features and aspects hereof associated with SCSI bus storage system configurations coordinate such failure detection with standard monitoring features of the SAF-TE, enclosure monitoring specifications. In particular, standard polling operations of a SAF-TE compliant enclosure may be terminated early so as to preclude queuing additional polling related commands for disk drives or an enclosure of disk drives coupled to a SCSI bus cable or backplane that has experienced a catastrophic failure. Other features and aspects hereof disable all disk drives in a storage system that are coupled to a failed common bus.