Abstract: A method for protecting data in damaged memory cells by dynamically switching memory mode is provided. The method is adapted to an electronic device having a memory, which has a memory controller and at least one memory module, each of which is consisted of a plurality of memory cells, and the memory cells are divided into a plurality of pages. A power-on self test is executed and a mirror memory mode is activated to protect the data in the memory modules. An uncorrectable error of each page of the memory modules is detected by the memory controller when an operating system reads the memory. If the uncorrectable error in one page is detected, the memory module having the page is determined as a damaged memory module, and the mirror memory mode is switched to a spare memory mode, so as to protect the data in the memory modules.

Abstract: A mirroring controller includes a copy controller that selects one memory from among the plurality of memories as a copy source memory and copies data from the copy source memory to at least one copy target memory; and an I/O mirroring controller that copies, when a read request to the copy source memory is issued from an upper layer during copying by the copy controller, data from an area corresponding to the read request to the copy target memory, wherein, when processing corresponding to the read request to the copy source memory from the upper layer results in an error at the copy source memory during the copying by the copy controller, the copy controller controls the copy source memory so as to become unusable, and controls at least one copy target memory so as to act as a memory.

Abstract: Systems, integrated circuits, and methods for protecting data stored in third dimensional vertically stacked memory technology are disclosed. An integrated circuit is configured to perform duplication of data disposed in multi-layered memory that can comprise two-terminal cross-point memory arrays fabricated BEOL on top of a FEOL logic layer that includes active circuitry for performing data operations (e.g., read, write, program, and erase) on the multi-layered memory. For example, the integrated circuit can include a first subset of BEOL memory layers configured to store data, a second subset of the BEOL memory layers configured to store a copy of the data from the first subset of memory layers, a FEOL redundancy circuit coupled to the first subset of the memory layers and the second subset of the memory layers, the redundancy circuit being configured to provide both a portion of the data and a copy of the portion of the data.