Masking Faults In Storage Systems Using Spares And/or By Reconfiguring (epo) Patents (Class 714/E11.084)

  • Patent number: 9021212
    Abstract: In a semiconductor memory computer equipped with a flash memory, use of backed-up data is enabled. The semiconductor memory computer includes an address conversion table for detecting physical addresses of at least two pages storing data by designating a logical address from one of logical addresses to be designated by a reading request. The semiconductor memory computer includes a page status register for detecting one page status allocated to each page, and page statuses to be detected include the at least following four statuses: (1) a latest data storage status, (2) a not latest data storage status, (3) an invalid data storage status, and (4) an unwritten status. By using the address conversion table and the page status register, at least two data s (latest data and past data) can be read for one designated logical address from a host computer.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: April 28, 2015
    Assignee: Hitachi, Ltd.
    Inventor: Nagamasa Mizushima
  • Patent number: 8862858
    Abstract: A computer-implemented method and apparatus manages block mapping. The block mapping maps physical blocks in a block storage device to virtual blocks of a virtual address space. The method involves assigning a generation number from a net of generation numbers to each block mapping entry, where the block mapping entry correlates a physical block with a virtual block. A maximum generation number of the set of generation numbers is increased and a first block mapping entry is marked dirty in response to an update of a correlated first virtual block. A generation number of the first block mapping entry is set to the maximum generation number. Finally, a generation number of a second block mapping entry having a lowest generation number is set to a generation number of the first block mapping entry.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: October 14, 2014
    Assignee: EMC Corporation
    Inventor: Kadir Ozdemir
  • Publication number: 20140101479
    Abstract: A method and controller for implementing storage adapter performance control, and a design structure on which the subject controller circuit resides are provided. The controller includes a performance state machine controlling the use of a performance path and a normal or error recovery path in a storage adapter firmware stack. The performance state machine determines which storage resources are allowed to use the performance path and properly transitions the running of each storage resource to and from the performance path and normal path mode of operation.
    Type: Application
    Filed: October 4, 2012
    Publication date: April 10, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert E. Galbraith, Adrian C. Gerhard, Murali N. Iyer
  • Patent number: 8683141
    Abstract: In a semiconductor memory computer equipped with a flash memory, use of backed-up data is enabled. The semiconductor memory computer includes an address conversion table for detecting physical addresses of at least two pages storing data by designating a logical address from one of logical addresses to be designated by a reading request. The semiconductor memory computer includes a page status register for detecting one page status allocated to each page, and page statuses to be detected include the at least following four statuses: (1) a latest data storage status, (2) a not latest data storage status, (3) an invalid data storage status, and (4) an unwritten status. By using the address conversion table and the page status register, at least two data s (latest data and past data) can be read for one designated logical address from a host computer.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: March 25, 2014
    Assignee: Hitachi, Ltd.
    Inventor: Nagamasa Mizushima
  • Publication number: 20140006846
    Abstract: Technologies are described herein for providing a two-tier failover service. A request to access content by an application associated with an application identifier may be identified. A first record corresponding to the application identifier may be retrieved from a database information table. The first record may include a reference identifier, a database name of a database, and a failover value. A second record corresponding to the reference identifier may be retrieved from a server information table. The second record may include an indication of a first server computer as a primary server computer and an indication of a second server computer as a secondary server computer. A connection specification to either the first server computer or the second server computer may be generated based on the first record and the second record.
    Type: Application
    Filed: June 28, 2012
    Publication date: January 2, 2014
    Applicant: MICROSOFT CORPORATION
    Inventors: Shen Wang, Joseph Milan Filcik, Vijayalakshmi Ramkumar, Steven Greenberg, Chris Seitzinger, Brian Eugene Kihneman
  • Publication number: 20130332768
    Abstract: A storage system comprises a storage device for storing data, a control apparatus which controls the storage device and comprises multiple communication ports, and a switch apparatus which expands the number of storage device couplings and comprises multiple communication ports. Respective multiple communication ports of the control apparatus are coupled to respective multiple communication ports of the switch apparatus, and the switch apparatus is coupled to the storage device. The control apparatus configures at least one communication port of the multiple communication ports of the control apparatus, to a dedicated communication port for outputting only a prescribed command issued when a failure is detected.
    Type: Application
    Filed: June 6, 2012
    Publication date: December 12, 2013
    Applicant: HITACHI, LTD.
    Inventors: Tsutomu Koga, Koji Washiya
  • Publication number: 20130326263
    Abstract: Embodiments include a method and system of dynamically allocatable memory error mitigation. In one embodiment, a system applies an error mitigation mechanism to one of multiple groups of memory units, wherein the one group is in active use during an error test of a second group of memory units. The system deactivates and tests the second group of memory units for errors. In response to detecting an error in a memory unit of the second group, the system applies, to the memory unit of the second group having the error, the error mitigation mechanism for active use. The system then activates the second group of memory units with the error mitigation mechanism applied to the memory unit of the second group having the error.
    Type: Application
    Filed: May 31, 2012
    Publication date: December 5, 2013
    Inventors: Alaa R. Alameldeen, Ilya Wagner, Zeshan A. Chishti, Wei Wu, Christopher B. Wilkerson
  • Publication number: 20130145209
    Abstract: An information processing apparatus that detects a failure of one of a plurality of disk drives included within a data array of the information processing apparatus; transmits an inquiry to another information processing apparatus regarding a presence of a spare disk drive having a same capacity as the one of the plurality of disk drives in which a failure is detected; receives, from the another information processing apparatus, information corresponding to a spare disk drive having the same capacity as the one of the plurality of disk drives in which a failure is detected; and mounts the spare disk drive as a substitute for the one of the plurality of disk drives in which the failure is detected.
    Type: Application
    Filed: October 16, 2012
    Publication date: June 6, 2013
    Applicant: BUFFALO INC.
    Inventor: Buffalo Inc.
  • Publication number: 20130117602
    Abstract: In one embodiment, the memory device includes a memory cell array having at least a first memory cell group, a second memory cell group and a redundancy memory cell group. The first memory cell group includes a plurality of first memory cells associated with a first data line, the second memory cell group includes a plurality of second memory cells associated with a second data line, and the redundancy memory cell group includes a plurality of redundancy memory cells associated with a redundancy data line. A data line selection circuit is configured to provide a data path between an input/output node and one of the first data line, the second data and the redundancy data line.
    Type: Application
    Filed: November 7, 2012
    Publication date: May 9, 2013
    Inventors: Su-a KIM, Young-soo SOHN, Dae-hyun KIM
  • Patent number: 8417896
    Abstract: In a semiconductor memory computer equipped with a flash memory, use of backed-up data is enabled. The semiconductor memory computer includes an address conversion table for detecting physical addresses of at least two pages storing data by designating a logical address from one of logical addresses to be designated by a reading request. The semiconductor memory computer includes a page status register for detecting one page status allocated to each page, and page statuses to be detected include the at least following four statuses: (1) a latest data storage status, (2) a not latest data storage status, (3) an invalid data storage status, and (4) an unwritten status. By using the address conversion table and the page status register, at least two data (latest data and past data) can be read for one designated logical address from a host computer.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: April 9, 2013
    Assignee: Hitachi, Ltd.
    Inventor: Nagamasa Mizushima
  • Publication number: 20130073895
    Abstract: Higher-level redundancy information computation enables a Solid-State Disk (SSD) controller to provide higher-level redundancy capabilities to maintain reliable operation in a context of failures of non-volatile (e.g. flash) memory elements during operation of an SSD implemented in part by the controller. For example, a first computation is an XOR, and a second computation is a weighted-sum. Various amounts of storage are dedicated to storing the higher-level redundancy information, such as amounts equivalent to an integer multiple of flash die (e.g. one, two, or three entire flash die), and such as amounts equivalent to a fraction of a single flash die (e.g. one-half or one-fourth of a single flash die).
    Type: Application
    Filed: November 13, 2012
    Publication date: March 21, 2013
    Applicant: LSI CORPORATION
    Inventor: LSI CORPORATION
  • Publication number: 20130061087
    Abstract: According to the presently disclosed subject matter there is provided inter alia, a method and system which enable to uncover errors which are correctable by a data integrity mechanism in a computer system. The same data is read with the help of two different types of read commands. The first command is a read command which does not implement an inherent ECC and therefore does not correct corrupted data. The second command is a read command which includes an ECC and is adapted to correct errors which are detected in the data which is being read. The data obtained by each of the two read commands is compared, and in cases where a difference is identified between the two data, it is determined that an error has been detected and corrected by the ECC.
    Type: Application
    Filed: September 1, 2011
    Publication date: March 7, 2013
    Applicant: INFINIDAT LTD
    Inventor: Haim KOPYLOVITZ
  • Publication number: 20130055012
    Abstract: A data storage device and a method of managing data in the data storage device to improve data reliability are provided. In the method of managing data, one of control management information about a memory block of nonvolatile memory in which data will be written and control management information about the data are received. A redundant array of independent disks (RAID) parity page ratio is determined according to the control management information. When a data write operation mode is performed, parity data is written in a parity page of the memory block according the RAID parity page ratio. According to some embodiments of the inventive concepts, since a RAID parity page ratio is selectively determined according to control management information, reliability of data is secured or increased.
    Type: Application
    Filed: June 14, 2012
    Publication date: February 28, 2013
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Kangho Roh
  • Publication number: 20130047027
    Abstract: When a primary server executing a task fails in a computer system where a plurality of servers are connected to an external disk device via a network and the servers boot an operation system from the external disk device, task processing is taken over from the primary server to a server that is not executing a task in accordance with the following method. The method for taking over a task includes the steps of detecting that the primary server fails; searching the computer system for a server that has the same hardware configuration as that of the primary server and that is not running a task; enabling the server, searched for as a result of the search, to access the external disk device; and booting the server from the external disk device.
    Type: Application
    Filed: October 5, 2012
    Publication date: February 21, 2013
    Applicant: HITACHI, LTD.
    Inventor: HITACHI, LTD.
  • Publication number: 20130036326
    Abstract: In one embodiment, a computer program product includes a computer readable storage medium having computer readable program code embodied therewith, configured for: validating a replication of copy services between a first storage system and a second storage system, removing a plurality of existing copy relationships between the first storage system and a failed storage system, creating a plurality of copy relationships between the first storage system and the second storage system, and synchronizing a plurality of data between the first storage system and the second storage system. In more embodiments, a system includes logic for performing the above functionality, and a method includes steps for performing the above functionality.
    Type: Application
    Filed: August 3, 2011
    Publication date: February 7, 2013
    Applicant: International Business Machines Corporation
    Inventors: Amy N. Blea, David R. Blea, William D. Olsen, John J. Wolfgang
  • Publication number: 20130007511
    Abstract: A method and apparatus for rebuilding a data set. In accordance with some embodiments, a data storage device is coupled to a host. An error condition associated with a memory of the data storage device is detected. Data stored in a first portion of the memory unaffected by said error condition is transferred to the host. A communication signal is output to the host that indicates that data stored in a second portion of the memory affected by said error condition will not be transferred to the host. The host reconstructs the data stored in the second portion of the memory responsive to the communication signal.
    Type: Application
    Filed: June 30, 2011
    Publication date: January 3, 2013
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Mark Allen Gaertner, Tyler Ki Soo Gordon
  • Publication number: 20120324298
    Abstract: Apparatus, systems, and methods are disclosed, such as those that operate within a memory device to replace one or more selected failing memory cells with one or more repair memory cells and to correct data digits read from other failing memory cells in the memory device using a different method. Additional apparatus, systems, and methods are disclosed.
    Type: Application
    Filed: August 23, 2012
    Publication date: December 20, 2012
    Inventors: Yutaka Ito, Adrian J. Drexler
  • Publication number: 20120324299
    Abstract: A flash storage device performs wear-leveling by tracking data errors that occur when dynamic data is read from a storage block of the flash storage device and moving the dynamic data to an available storage block of the flash storage device. Additionally, the flash storage device identifies a storage block containing static data and moves the static data to the storage block previously containing the dynamic data.
    Type: Application
    Filed: August 28, 2012
    Publication date: December 20, 2012
    Applicant: STEC, INC.
    Inventor: Mark MOSHAYEDI
  • Publication number: 20120317439
    Abstract: Recovery of a failed storage device of a RAID array to a replacement storage device is improved by initiating recovery before failure of the storage device occurs. If failure occurs before completing the transfer of all information from the failed storage device to the replacement storage device, then the RAID controller identifies untransferred information to recreate the failed storage device at the replacement storage device by re-building only the untransferred information with a parity operation using information stored at the array.
    Type: Application
    Filed: June 8, 2011
    Publication date: December 13, 2012
    Inventors: Vishnu Murty K., Deepu Syam Sreedhar M., Nagendra A.S., Sandeep Agarwal, Vaibhav Kumar
  • Publication number: 20120297241
    Abstract: Systems and methods are disclosed herein, including those that operate to monitor a first set of operational parameters associated with a memory vault, to adjust a second set of operational parameters associated with the memory vault, and to perform alerting and reporting operations to a host device.
    Type: Application
    Filed: July 30, 2012
    Publication date: November 22, 2012
    Inventor: Joe M. Jeddeloh
  • Publication number: 20120290873
    Abstract: A method begins by identifying a data slice requiring rebuilding to produce an identified data slice, wherein the identified data slice is one of a plurality of data slices that constitute a data segment. The method continues by retrieving at least m number of data slices, wherein m data slices of the plurality of data slices enable reconstruction of the data segment, and wherein the at least m number of data slices does not include the identified data slice. The method continues by reconstructing the identified data slice from the at least m number of data slices to produce a rebuilt data slice. The method continues by writing the rebuilt data slice to one of a plurality of data slice servers.
    Type: Application
    Filed: July 25, 2012
    Publication date: November 15, 2012
    Applicant: CLEVERSAFE, INC.
    Inventors: VANCE T. THORNTON, JAMIE BELLANCA, DUSTIN M. HENDRICKSON, ZACHARY J. MARK, ILYA VOLVOVSKI
  • Publication number: 20120272097
    Abstract: An exemplary testing device includes a RAID unit including under test disk drives, a replacing unit including a reserve disk drive, a switching unit, a state recognition unit and a control unit. The switching unit includes buttons corresponding to the under test disk drives, respectively. Each of the buttons is switched between a first position in which a corresponding under test disk drive is in connection with the RAID unit and a second position in which the corresponding under test disk drive is disconnected from the RAID unit. The state recognition unit outputs status signals corresponding to the under test disk drives, respectively. The control unit receives the status signals from the state recognition unit and controls the reserve disk drive to successfully begin to work in replacement of the disconnected under test disk drive for rebuilding the RAID unit. The display unit displays a testing result thereon.
    Type: Application
    Filed: June 30, 2011
    Publication date: October 25, 2012
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD.
    Inventors: GUAN WANG, GUO-FENG ZHANG, ZHENG-QUAN PENG
  • Publication number: 20120260125
    Abstract: A multi-disk fault-tolerant system, a method for generating a check block, and a method for recovering a data block are provided. The multi-disk fault-tolerant system includes a disk array and a calculation module connected through a system bus, the disk array is formed by p disks, and a fault-tolerant disk amount of the disk array is q; data in the disk array is arranged according to a form of a matrix M of (m+q)×p, where m is a prime number smaller than or equal to p?q; in the matrix M, a 0th row is virtual data blocks being virtual and having values being 0, a 1st row to an (m?1)th row are data blocks, an mth row to an (m+q?1)th row are check blocks. Therefore, during a procedure of generating the check block and recovering the data block in the multi-disk fault-tolerant system, calculation complexity is lowered.
    Type: Application
    Filed: February 3, 2012
    Publication date: October 11, 2012
    Applicants: University of Electronic Science and Technology of China, CHENGDU HUAWEI SYMANTEC TECHNOLOGIES CO., LTD.
    Inventors: Yulin WANG, Jianye YAO
  • Publication number: 20120246511
    Abstract: A storage system, method and program product, the system comprising: storage devices; and a controller configured to: provide virtual volumes to a host computer; manage logical units on the storage device and storage pools; allocate, in response to receiving a write request to a virtual volume, a storage region of the storage pools; and store data related to the write request in the storage region allocated, wherein the controller is further configured to: allocate first storage region in first storage pool to first virtual volume based on first size of the first storage region or the first virtual volume; allocate a second storage region in a second storage pool to a second virtual volume of the plurality of virtual volumes based on a second size of the second storage region or the second virtual volume.
    Type: Application
    Filed: March 23, 2011
    Publication date: September 27, 2012
    Inventor: Takahito Sato
  • Patent number: 8275958
    Abstract: A storage system 1 includes a first storage apparatus 100 and a second storage apparatus 100 communicatively coupled to an external apparatus 300. The first and second storage apparatuses respectively have first and second storage areas VDEVs selectively accessible from the external apparatus, first and second temporary storage areas 113, and remote copy controllers 1122 configured to control data copy process. The storage system includes a data I/O process authority information storage unit LDK storing data I/O process authority information. Either of the remote copy controllers reads the data I/O process authority information and copies according to the data I/O process authority information, to the other storage apparatus, data stored either in the first storage area and the first temporary storage area, or in the second storage area and the second temporary storage area that are included in the storage apparatus to which the remote copy controller belongs.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: September 25, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Keiichi Kaiya, Toru Suzuki
  • Publication number: 20120239969
    Abstract: Described are embodiments of an invention for blocking write access to memory modules of a solid state drive. The solid state drive includes a controller access module or a memory access module that controls write access to the solid state drive and the memory modules of the solid state drive. Upon determining that a memory module has failed, the failed memory module or the entire solid state memory device is configured to be read only to prevent an errant write of data over critical data. Further, a failed memory module, or solid state device memory having a failed memory module, may be replaced upon failure.
    Type: Application
    Filed: May 31, 2012
    Publication date: September 20, 2012
    Applicant: International Business Machines Corporation
    Inventors: Louie Arthur Dickens, Timothy A. Johnson, Craig Anthony Klein, Gregg Steven Lucas, Daniel James Winarski
  • Publication number: 20120185724
    Abstract: A method for maintaining vital product data (VPD) of each field replaceable unit (FRUs) in a computer system, the computer system including a first FRU and a second FRU operatively coupled with the first FRU. The method includes calculating a parity for the VPD of the second FRU, and upon detecting a failure of the second FRU, regenerating the VPD for the failed second FRU using the parity.
    Type: Application
    Filed: January 18, 2011
    Publication date: July 19, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Douglas M. Boecker, Brent W. Jacobs, Nathan D. Miller, Matthew S. Spinler, Shaun A. Wetzstein
  • Publication number: 20120173920
    Abstract: A method of operating a memory system includes classifying numbers of total error bits into a plurality of ranges, assigning a plurality of data to the plurality of ranges, respectively, counting a number of detected error bits for a memory cell block, and storing a selected one of the plurality of data in at least one spare cell when the number of the detected error bits is within one of the ranges that corresponds to the selected data.
    Type: Application
    Filed: December 30, 2011
    Publication date: July 5, 2012
    Inventor: Seong Hun PARK
  • Publication number: 20120173921
    Abstract: A memory system is provided, including a first memory comprising a plurality of bitcells configured to store data, and a second memory, configured to store an index of the data stored at a corresponding location in the first memory and further configured to store repair information, wherein the repair information indicates a bitcell error at the corresponding location in the first memory.
    Type: Application
    Filed: January 5, 2011
    Publication date: July 5, 2012
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventors: John J. WUU, Donald R. WEISS
  • Publication number: 20120110377
    Abstract: A first and a second physical disk identifier, a physical Logical Block Address (LBA), a data length, and a span identifier are calculated from a data write operation. A first request command frame is created for retrieving the existing data block from the storage array, the first request command frame including at least one of the calculated parameters. At least one second request command frame is created for retrieving the at least one existing parity data block from the storage array, the at least one second request command frame including the calculated at least one second physical disk identifier and at least one of the calculated parameters. At least one new parity data block is calculated utilizing the existing data block, the new data block, and the at least one existing parity data block.
    Type: Application
    Filed: October 28, 2010
    Publication date: May 3, 2012
    Applicant: LSI CORPORATION
    Inventor: Kapil Sundrani
  • Publication number: 20120096309
    Abstract: A system and method of creating an extra redundancy in a RAID system is disclosed. In one embodiment, one or more RAID arrays are created. Each RAID array comprises a plurality of disk drives. Further, a respective dedicated hot spare is created for each RAID array. Furthermore, data is copied from each RAID array to the respective dedicated hot spare using a copyback process based on a predetermined controller usage threshold value.
    Type: Application
    Filed: October 15, 2010
    Publication date: April 19, 2012
    Inventors: Ranjan Kumar, Sunny Koul, Gururaj Shivashankar Morabad
  • Publication number: 20120096306
    Abstract: Various embodiments for disaster recovery (DR) failback in a computing environment by a processor device are provided. Pursuant to execution of a predetermined failback policy, if a storage device is not preexistent in a source storage system operable in the computing environment, and an owner of the storage device is one of a DR storage system and a storage system having previously withdrawn from a replication grid, and the DR storage system has authorization to transfer ownership of the storage device by a replacement operation, an instance of the storage device is replicated to the source storage system to generate a replicated instance of the storage device on the source storage system, and ownership of the storage device is designated as the source storage system for each of the instance and the replicated instance of the storage device.
    Type: Application
    Filed: October 13, 2010
    Publication date: April 19, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Shay H. AKIRAV, Yariv BACHAR, Evgeny BUDILOVSKY, Aviv CARO, Elena DROBCHENKO, Dov N. HEPNER, Aharon LAZAR, Ofer LENEMAN, Itay MAOZ, Gil E. PAZ, Tzafrir Z. TAUB
  • Publication number: 20120096321
    Abstract: A block management method for managing physical blocks of a rewritable non-volatile memory, and a memory controller and a memory storage apparatus using the same are provided. The method includes grouping the physical blocks into at least a data area, a free area, and a replacement area, and grouping the physical blocks of the data area and the free area into a plurality of physical units. The method also includes when one of the physical blocks belonging to of the physical units of the data area becomes a bad physical block, getting a physical block from the replacement area and replacing the bad physical block with the gotten physical block. The method further includes associating a physical unit that contains no valid data in the free area with the replacement area. Thereby, the physical blocks can be effectively managed and the access efficiency can be improved.
    Type: Application
    Filed: December 6, 2010
    Publication date: April 19, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Publication number: 20120089866
    Abstract: Various embodiments for disaster recovery (DR) production takeover in a computing environment by a processor device are provided. If, for a designated storage system operable in the computing environment, a takeover operation may be executed, and a DR storage system has validly replaced the designated storage system using a replacement process, a withdrawal of a DR mode of operation is performed, and ownership of at least one storage device operable in the computing environment is transferred to the DR storage system. The replacement process authorizes the DR storage system to transfer the ownership while withdrawn from the DR mode of operation.
    Type: Application
    Filed: October 11, 2010
    Publication date: April 12, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Shay H. AKIRAV, Yariv BACHAR, Aviv CARO, Dov N. HEPNER, Ofer LENEMAN, Gil E. PAZ, Tzafrir Z. TAUB
  • Publication number: 20120084600
    Abstract: Methods and systems for data reconstruction following drive failures may include: storing data across two or more drives in one or more data stripes, each data stripe including two or more drive extents; detecting a degradation of a drive containing a drive extent associated with a first data stripe; assigning a reconstruction priority to the drive extent associated with the first data stripe; detecting a degradation of a drive containing a drive extent associated with a second data stripe; and assigning a reconstruction priority to the drive extent associated with the second data stripe.
    Type: Application
    Filed: October 1, 2010
    Publication date: April 5, 2012
    Applicant: LSI CORPORATION
    Inventors: Kevin Kidney, Timothy Snider
  • Patent number: 8151060
    Abstract: In a semiconductor memory computer equipped with a flash memory, use of backed-up data is enabled. The semiconductor memory computer includes an address conversion table for detecting physical addresses of at least two pages storing data by designating a logical address from one of logical addresses to be designated by a reading request. The semiconductor memory computer includes a page status register for detecting one page status allocated to each page, and page statuses to be detected include the at least following four statuses: (1) a latest data storage status, (2) a not latest data storage status, (3) an invalid data storage status, and (4) an unwritten status. By using the address conversion table and the page status register, at least two data s (latest data and past data) can be read for one designated logical address from a host computer.
    Type: Grant
    Filed: April 9, 2007
    Date of Patent: April 3, 2012
    Assignee: Hitachi, Ltd.
    Inventor: Nagamasa Mizushima
  • Publication number: 20120079315
    Abstract: A redundant array of independent nodes are networked together. Each node executes an instance of an application that provides object-based storage. The nodes are grouped into a plurality of systems each having multiple nodes. An object recovery method comprises: receiving, by a first system of the plurality of systems from a client application, a read request for an object, the object having been replicated to/from at least one second system among the plurality of systems; if the object of the read request is available in the first system, returning by the first system the object of the read request to the client application; and if the object of the read request is not available in the first system, performing a read from replica process by the first system to access a replica of the object from a second system among the plurality of systems and using the replica of the object to return the object of the read request to the client application.
    Type: Application
    Filed: September 24, 2010
    Publication date: March 29, 2012
    Applicant: HITACHI DATA SYSTEMS CORPORATION
    Inventors: Benjamin ISHERWOOD, Donald P. PANNESE, Richard ROGERS, Vitaly ZOLUTUSKY
  • Publication number: 20120072768
    Abstract: An apparatus, system, method, and machine-readable medium are disclosed. In one embodiment the apparatus includes an address swap cache. The apparatus also includes memory segment swap logic that is capable of detecting a reproducible fault at a first address targeting a memory segment. Once detected, the logic remaps the first address targeting the faulty memory segment with a second address targeting another memory segment. The logic stores the two addresses in an entry in the address swap cache. Then the memory segment swap logic receives a memory transaction that is targeting the first physical address and use the address to perform a lookup process in the address swap cache to determine if an entry exists that has the faulty address. If an entry does exist for that address, the logic then swaps the second address into the memory transaction for the first address.
    Type: Application
    Filed: September 22, 2010
    Publication date: March 22, 2012
    Inventors: Tonia G. Morris, Lawrence D. Blankenbeckler
  • Publication number: 20120072640
    Abstract: A virtual logical unit that stores learning metadata is allocated in a first storage server having a first plurality of clusters, wherein the learning metadata indicates a type of storage device in which selected data of the first plurality of clusters of the first storage server are stored. A copy services command is received to copy the selected data from the first storage server to a second storage server having a second plurality of clusters. The virtual logical unit that stores the learning metadata is copied, from the first storage server to the second storage server, via the copy services command. Selected logical units corresponding to the selected data are copied from the first storage server to the second storage server, and the learning metadata is used to place the selected data in the type of storage device indicated by the learning metadata.
    Type: Application
    Filed: September 21, 2010
    Publication date: March 22, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Joshua James Crawford, Benjamin Jay Donie, Andreas Bernadrus Mattias Koster
  • Publication number: 20120060049
    Abstract: Assuring recovery from failure of a storage server in a distributed column chunk data store of operably coupled storage servers, includes: partitioning a data table into chunks; implementing a distribution scheme with a specified level of redundancy for recovery of one or more failed servers among multiple storage servers; distributing the column chunks according to the distribution scheme; calculating column chunk parity; storing the calculated column chunk parity; managing metadata for the column chunk data store; and updating the metadata for distributing the column chunks among remaining storage servers upon receiving an indication to remove a storage serve.
    Type: Application
    Filed: November 10, 2011
    Publication date: March 8, 2012
    Applicant: Yahoo! Inc.
    Inventor: Radha Krishna Uppala
  • Publication number: 20120054543
    Abstract: In one embodiment, an apparatus includes memory comprising a first portion in which data contained therein is mirrored and a second portion wherein data contained therein is not mirrored, a memory allocator for allocating the first portion of the memory to critical data and allocating the second portion of the memory to non-critical data, and a processor for mirroring the critical data and receiving an indication of a memory error. If the memory error occurs in the first portion of the memory, a mirrored copy of the critical data is used. If the memory error occurs in the second portion of the memory, the memory error is contained so that the apparatus can continue to operate programs using the memory not affected by the memory error.
    Type: Application
    Filed: August 26, 2010
    Publication date: March 1, 2012
    Applicant: CISCO TECHNOLOGY, INC.
    Inventor: Roland Dreier
  • Publication number: 20120054542
    Abstract: The present invention is directed to an archival data storage system. The archival data storage system includes write once and read many (WORM) capability, data redundancy, error correction, and access control. The combination of these capabilities enable the archival storage system to be secure, error proof, and reliable. Additionally, to provide fast data access time, solid state storage devices are used in place of conventional tape drive. Solid state storage devices such as, for example, flash memory devices are fast, versatile and reliable.
    Type: Application
    Filed: October 3, 2011
    Publication date: March 1, 2012
    Applicant: Quantum Corporation
    Inventor: Joe Kent Jurneke
  • Publication number: 20120030506
    Abstract: Systems and methods are disclosed for handling read disturbs based on one or more characteristics of read operations performed on a non-volatile memory (“NVM”). In some embodiments, a control circuitry of a system can generate a variable damage value determined based on one or more characteristics of a read operation. Using the damage value, the control circuitry can update a score associated with the block. If the control circuitry determines that the score exceeds a pre-determined threshold, at least a portion of the block can be relocated to a different memory location in the NVM. In some embodiments, portions of the block may be relocated over a period of time.
    Type: Application
    Filed: July 30, 2010
    Publication date: February 2, 2012
    Applicant: Apple Inc.
    Inventors: Daniel J. Post, Hsiao Thio
  • Publication number: 20120023362
    Abstract: The invention relates to a method and a system for regenerating a failed storage node from one or more storage nodes storing an original file and also reconstructing the said original file. The method involves encoding the file segments using a XOR operation, decoding the encoded file segment using the XOR operation and regenerating the failed node by using the storage nodes which are in active position. The regenerated file segments are further written to a new storage node.
    Type: Application
    Filed: July 18, 2011
    Publication date: January 26, 2012
    Applicant: TATA CONSULTANCY SERVICES LIMITED
    Inventors: Swanand Kadhe, Balaji Janakiram, Mariswamy Girish Chandra, Balamuralidhar Purushothaman
  • Publication number: 20120005524
    Abstract: A semiconductor chip is described having different instances of cache agent logic circuitry for respective cache slices of a distributed cache. The semiconductor chip further includes hash engine logic circuitry comprising: hash logic circuitry to determine, based on an address, that a particular one of the cache slices is to receive a request having the address, and, a first input to receive notice of a failure event for the particular cache slice. The semiconductor chip also includes first circuitry to assign the address to another cache slice of the cache slices in response to the notice.
    Type: Application
    Filed: January 4, 2011
    Publication date: January 5, 2012
    Inventors: Thanunathan Rangarajan, Baskaran Ganesan, Binata Bhattacharayya
  • Publication number: 20110320862
    Abstract: Embedded dynamic random access memory (EDRAM) macro disablement in a cache memory includes isolating an EDRAM macro of a cache memory bank, the cache memory bank being divided into at least three rows of a plurality of EDRAM macros, the EDRAM macro being associated with one of the at least three rows, iteratively testing each line of the EDRAM macro, the testing including attempting at least one write operation at each line of the EDRAM macro, determining if an error occurred during the testing, and disabling write operations for an entire row of EDRAM macros associated with the EDRAM macro based on the determining.
    Type: Application
    Filed: June 24, 2010
    Publication date: December 29, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael Blake, Timothy C. Bronson, Hieu T. Huynh, Pak-kin Mak
  • Publication number: 20110320863
    Abstract: Dynamic re-allocation of cache buffer slots includes moving data out of a reserved buffer slot upon detecting an error in the reserved buffer slot, creating a new buffer slot, and storing the data moved out of the reserved buffer slot in the new buffer slot.
    Type: Application
    Filed: June 24, 2010
    Publication date: December 29, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ekaterina M. Amroladze, Deanna Postles Dunn Berger, Michael Fee, Arthur J. O'Neill, JR., Diana Lynn Orf, Robert J. Sonnelitter, III
  • Publication number: 20110307736
    Abstract: Approaches for recovering nodes and adding new nodes to object stores maintained on one or more solid state devices. At a surviving node, in a cluster of nodes, replicating, to a recovering node in the cluster of nodes, all requests to modify data stored in a first data store thereon that are received by the surviving node. The surviving node performing a bulk copy operation to copy data, stored in the first data store, to a second data store maintained on the recovering node. The surviving node (a) replicates all requests to modify data received by the surviving node and (b) performs a bulk copy operation in parallel.
    Type: Application
    Filed: April 11, 2011
    Publication date: December 15, 2011
    Inventors: Johann GEORGE, Brian W. O'KRAFKA
  • Publication number: 20110289351
    Abstract: Embodiments of the disclosure relate to a distributed storage system comprising of storage nodes storing source data amongst them in a coded, and typically, redundant manner. The data to be stored in the storage nodes may be disseminated from the source across the network in a distributed manner. The system also includes end users who recover the source data by connecting to subsets of the storage nodes. A failed storage node may be repaired by downloading data from subsets of existing nodes. The storage space required in the nodes, and the network bandwidth utilized for repair are minimized.
    Type: Application
    Filed: May 18, 2011
    Publication date: November 24, 2011
    Applicant: INDIAN INSTITUTE OF SCIENCE
    Inventors: K. V. RASHMI, Nihar B. SHAH, P. Vijay KUMAR
  • Publication number: 20110289349
    Abstract: Monitoring and repairing memory includes selecting a first memory bank comprising a plurality of memory cells to analyze. The plurality of memory cells are copied from the first memory bank to a second memory bank, wherein a request to access the first memory bank is redirected to the second memory bank. A determination is made whether the first memory bank comprises an error of the memory cell.
    Type: Application
    Filed: May 24, 2010
    Publication date: November 24, 2011
    Applicant: Cisco Technology, Inc.
    Inventors: Matthias J. Loeser, Daniel V. Singletary, Sanjeev A. Joshi, Shadab Nazar