Abstract: A data processing device and method are provided. The data processing device includes a code storage unit storing an original code to be translated into a machine language code, a code analyzer analyzing the original code stored in the code storage unit, a register allocator allocating a predesignated register for a command included in the original code based on the result of analysis, and a code executor executing a machine language code generated using the allocated register.

Abstract: The present disclosure provides method, system, and computer readable medium for shared execution of software. The present disclosure relates to method, system, and computer readable recording medium for shared execution of software involving identifying the main modules of a specific software by analyzing its control flow, data flow, and modular structure through a static binary analysis and a runtime profiling, i.e. dynamic analysis, separating the modules from the main software body to store them in a secure environment of a smart card, and storing the main body in a user terminal with the identified modules removed and replaced by an interface code, whereby a co-processing the software at the user's end by the smart card in engagement with the user terminal exclusively enables an execution of the software.

Abstract: A method and system to emulate an M-bit instruction set. At least some of the illustrative embodiments are a method comprising fetching at least a portion of an instruction (the instruction from a first instruction set that is not directly executable by a processor), indexing into a table to an index location (the index location based on the at least a portion of the instruction), executing a first series of instructions directly executable by the processor (the first series of instructions pointed to by the table at the index location), and thereby emulating execution of the instruction from the first instruction set.

Abstract: A method and system for a software driver of a graphics controller to work with a display codec. The software driver may be configured to work with different display codecs at different periods of time while using a default configuration. Other embodiments are also described.

Abstract: A system for porting code from a native platform to a non-native platform is provided which utilizes a non-native, platform-specific layer of code and a platform-neutral layer of code. The platform-neutral layer substantially emulates the native platform of ported code and provides a platform-neutral interface to the ported code. Together, the platform-specific layer and the platform-neutral layer provide an execution environment in which the ported code operates as a kernel extension of the non-native platform. The platform-neutral layer of the execution environment is portable to other non-native platforms so that code can be ported to another non-native platform by replacing the platform-specific layer with a customized platform-specific layer, which is adapted to the other non-native platform.

Abstract: A method of dynamic real time translation of first program code written for a first programmable machine into second program code (target code) for running on a second programmable machine employing run time generation of an intermediate representation of the first program code. Upon first encountering a given portion of program code, only the target code necessary to execute that portion of program code under a prevailing set of entry conditions is initially generated and stored. When the same portion of program code is again encountered, a determination is made as to whether intermediate representation corresponding to a second subsequent set of conditions has been generated. If not, the target code necessary to execute the same portion of program code under that second set of conditions is generated.

Abstract: A target computing system 10 is adapted to support a register window architecture, particularly for use when converting non-native subject code 17 instead into target code 21 executed by a target processor 13. A subject register stack data structure (an “SR stack”) 400 in memory has a plurality of frames 410 each containing a set of entries 401 corresponding to a subset of subject registers 502 of one register window 510 in a subject processor 3. The SR stack 400 is accessed by the target code 21 executing on the target processor 13. The SR stack 400 stores a large plurality of such frames 410 and thereby avoids overhead such as modelling automatic spill and fill operations from the windowed register file of the subject architecture. In one embodiment, a target computing system 10 having sixteen general purpose working registers is adapted to support a register window architecture reliant upon a register file containing tens or hundreds of subject registers 502.

Abstract: Emulation systems and method involving invalidating blocks of translated code in emulation of a target system on a host system in are disclosed. One or more blocks of target system code are translated by the host system to produce one or more corresponding blocks of translated code. The host system uses one or more native target system instructions as hints to invalidate or potentially invalidate one or more blocks of translated code. Blocks containing such hints cause the host system to mark some or all of the one or more blocks of translated code as potentially invalid. The potentially invalid blocks may be re-translated immediately. Alternatively, the potentially invalid blocks may be checked to see if the code in these blocks has been modified. If the code has been modified, corresponding blocks of target code may be re-translated.

Abstract: A method and computer program product for assembling and deploying multi-platform flow based applications. An information processing flow that produces a result is assembled, the information processing flow includes components connected by data links, a component includes software code that describes at least one of an input constraint or an output constraint of the component, and at least two of the components are deployable on different computing platforms. The information processing flow is partitioned into sub-flows, such that for each sub-flow every component in the sub-flow is deployable on the same computing platform. The sub-flows are deployed on their respective computing platforms.

Abstract: Mechanisms are disclosed that allow for platform abstraction of a computing platform using a programming framework. The programming framework allows application programs to interact with different platforms in an identical manner by abstracting the platform. The application uses identical instructions to the programming framework across different platforms, with the programming framework modifying the instructions to fit platform specific requirements. The programming framework also emulates platform specific expected application behavior on behalf of the application. The programming framework may also provide an additional layer of security for the platform, limiting the access of the application program.

Abstract: A method of restructuring a source computer program to a target computer program. A defined source computer program has source code. A set of tasks is defined for the source computer program to be performed by the source computer program. For each task, a corresponding set of input data sets is defined. For each input data set, a corresponding set of programs is determined such that each program in the set of programs includes declarations and executable statements, from the source code of the source computer program, required to execute the task in each input data set. Each set of programs is processed to generate a component that executes the respective task, resulting in generation of a set of components. A target computer program is generated from the set of components.

Abstract: A method for performing a jump and translation state change procedure at the same time is disclosed. The method includes: carrying out a series of instruction processing in a first function in a first translation state; and executing a jump instruction which jumps to a target address in a second function and initiates and completes a translation state change to a second translation state at the same time; wherein an address of a next instruction after the jump instruction is stored as a return address in a first register.

Abstract: A method, system, and program product for providing for reuse of a mobile device application in a desktop environment is disclosed. The method includes obtaining an application that is configured for running on a mobile device, and then running the mobile device application on a desktop. A method for deploying an application that includes providing a computer infrastructure that is operable to run the application on a desktop and provide user preferences for the application on the desktop is also disclosed.

Abstract: In one embodiment, after translating a plurality of target instructions from a target memory location into a plurality of host instructions, a write operation to a target memory portion which includes said target memory location is detected. In response to the detecting, a copy of the target instructions is stored in a host memory. In response to an attempt to execute the host instructions, the copy is compared with a plurality of current target instructions presently stored in the target memory location. Further, in response to a mismatch based on the comparison, the host instructions are disabled.

Abstract: A data backup system is provided for backing up data files from a data source and for securing those data files against accidental modification or deletion. The system comprises storage and a data protection component that includes an application programming interface defining a command set. The system can also comprise a backup application that is configured to use the commands of the command set. The data protection component allows applications that use the commands of the command set, such as the backup application, to access the storage of the system. The data protection component prevents operating systems and applications that do not use the commands of the command set from accessing the storage. The data protection function of the data protection component can optionally be disabled to allow open access to the storage.

Abstract: A solution for developing XForms projects can bind an XForms template to a backend simulator, during a development or test stage of a software development. The XForms template can be developed by an interface designer, such as a business analyst. The XForms template can be conveyed to remotely located clients. Data instances associated with the XForms template can be received and routed to the backend simulator for processing. An integration code developer can later integrate the XForms templates to a backend server instead of to the backend simulator. Accordingly, the solution accelerates XForms based development projects by decoupling XForms interface development from XForms system integration development, which are typically handled by different people having different skill sets.

Abstract: Dynamically compiled code is stored for future use by an emulator application. The emulator application may recall the previously compiled code rather than recompile the same code again. Recycling previously compiled code prevents unneeded code compilation, and saves valuable processing time and resources. Previously compiled code can be associated with code identification information. When compiled code is needed, one or more indexes of compiled code identification information is searched. If the appropriate identification information is found, the corresponding code is loaded and executed.

Abstract: A system and method for a symbiotic computer application and system and method for generation and presentation of same. The symbiotic computer application allows end-user devices to access back-end data systems including legacy host data systems having legacy host applications and other alternative data systems not directly compatible with the end-user devices. In some embodiments, the symbiotic computer application is generated by a symbiotic computer application generator to include user interface forms and discrete associations, which relate the user interface forms to the back-end data systems. A symbiotic computer application presentation end-user system allows the end-user device to perform desired functions of the back-end data systems through programs and user interfaces configured for the end-user device.

Abstract: A method and system are provided for creating an enumerated variable via an enumeration assistant interactive tool. A graphical user interface is provided to a programmer. Response to a request to create the enumerated variable received through a graphical user interface, the enumeration assistant determines parameters of the enumerated variable. The enumeration assistant creates development objects for the enumerated variable as a function of the parameters. The enumeration assistant stores the development objects in a program memory.

Abstract: A method, apparatus and computer program product are provided for use in a system that includes one or more processors, and multiple threads that are respectively associated with the one or more processors. One embodiment of the invention is directed to a method that includes the steps of generating one or more test cases, wherein each test case comprises a specified set of instructions in a specified order, and defining a plurality of thread hardware allocations, each corresponding to a different one of the threads. The thread hardware allocation corresponding to a given thread comprises a set of processor hardware resources that are allocated to the given thread for use in executing test cases. The method further includes executing a particular one of the test cases on a first thread hardware allocation, in order to provide a first set of test data, and thereafter executing the particular test case using a second thread hardware allocation, in order to provide a second set of test data.

Abstract: A system for translating software in a first format into a second format includes a memory containing the software in the first format and an emulator coupled to the memory configured to translate the software from the first format to the second format. The system also includes a host engine coupled to the emulator and configured to perform instructions in the second format. The emulator is configured to determine whether a store command in the first format stores information to a memory page that includes instructions and to convert the store instruction to a special store instruction in the event that the target of the store instruction does not contain an instruction.

Abstract: A method and system for a software driver of a graphics controller to work with a display codec. The software driver may be configured to work with different display codecs at different periods of time while using a default configuration. Other embodiments are also described.

Abstract: A method and apparatus for a memory efficient hardware emulator. The emulator comprises a plurality of processor dusters having data within the duster is stored in at least one data array, where the at least one data array comprises a plurality of sub-arrays. The sub-arrays that are not of uniform size (e.g., the size of each sub-array is determined by the probability that a particular sub-array will be accessed by the processor during a future emulation step). For example, at least one first sub-array is equal in depth to instruction memory within a processor (i.e., equal to the number of instructions in an emulation cycle), and the remaining sub-arrays are a fractional depth of the first sub-array.

Abstract: A method for executing a target application on a host processor including the steps of translating each target instruction being to be executed into host instructions, storing the translated host instructions, executing the translated host instructions, responding to an exception during execution of a translated instruction by rolling back to a point in execution at which correct state of a target processor is known, and interpreting each target instruction in order from the point in execution at which correct state of a target processor is known.

Abstract: Subject program code is translated to target code in basic block units at run-time in a process wherein translation of basic blocks is interleaved with execution of those translations. A shared code cache mechanism is added to persistently store subject code translations, such that a translator may reuse translations that were generated and/or optimized by earlier translator instances.

Abstract: A method and apparatus for verifying program code conversion performed by an emulator. A first emulator configured in a same-to-same (X-X) mode converts subject code into target code for execution by a subject processor. Execution of the subject code natively by the subject processor is compared against execution through the first emulator, to verify that program code conversion. Optionally, the first emulator is then used to incrementally validate program code conversion (i.e. optimisation and/or translation) performed by a second emulator, such as a this-to-that (X-Y) mode emulator running on a target processor.

Abstract: Emulation systems and method involving invalidating blocks of translated code in emulation of a target system on a host system in are disclosed. One or more blocks of target system code are translated by the host system to produce one or more corresponding blocks of translated code. The host system uses one or more native target system instructions as hints to invalidate or potentially invalidate one or more blocks of translated code. Blocks containing such hints cause the host system to mark some or all of the one or more blocks of translated code as potentially invalid. The potentially invalid blocks may be re-translated immediately. Alternatively, the potentially invalid blocks may be checked to see if the code in these blocks has been modified. If the code has been modified, corresponding blocks of target code may be re-translated.

Abstract: This invention discloses a system for enabling a first software application, which is designed for execution on a first computer platform, to be executed on an incompatible computer platform in which the software application is not intended to execute.

Abstract: A storage emulator and method thereof are disclosed. The storage emulator allows a host system to access a storage unit connected to a storage system as if the storage unit is directly coupled to the host system. The storage emulator includes a virtual storage emulating module, a storage-managing unit, and a communicating module. The virtual storage emulating module emulates at least one virtual storage unit corresponding to the storage unit on the host system and receives a storage accessing command from the host system. The storage-managing unit identifies the storage accessing command as either a self-sustaining type command or a non-self-sustaining type command. The communicating module communicates with the storage unit of the storage system via the network. If the storage accessing generates a self-sustaining command response in accordance with the storage accessing command and returns the self-sustaining command response to the host system directly.

Abstract: A “virtual type” that, to the reflection system, looks and acts like a fully compiled type—in reality, the “virtual type” does not exist and has been fabricated based on another API such as CodeDOM. Essentially, the “virtual type” allows code to be implemented using a single code path and therefore can remain ignorant that it is dealing with uncompiled source code. A “virtual type” is an object that looks just like a compiled type, provided that it is viewed through a reflection application program interface (API).

Abstract: A system that includes a shared variable scope configured to store at least one shared variable binding, a first interpreter configured to search the shared variable scope to determine a variable binding for a variable, and a second interpreter configured to search the shared variable scope to determine the variable binding for the variable.

Abstract: In a graphical modeling environment, one of a selection of transformation operations is performed on a graphical object by first selecting the graphical object. A user may select a particular transformation operation to be executed on the graphical object from a list of transformation operations displayed to the user. A transformed graphical object derived from the selected graphical object may be then automatically created without retrieving the transformed graphical object from a library or other source.

Abstract: A system and method are disclosed for emulating electronic device functionality. An emulator is defined to operate on a computing platform to simulate functionality of an electronic device. The electronic device and computing platform are separate from each other. A proxy client module is defined to operate in conjunction with the emulator. The proxy client module is defined to transmit an application request from the emulator to the electronic device to be processed by the electronic device. A proxy server module is defined to operate on the electronic device. The proxy server module is defined to receive the application request transmitted from the proxy client module, submit the application request to the electronic device for processing, and transmit results of the application request processing to the proxy client module.

Abstract: A method for executing a target application on a host processor including the steps of translating each target instruction being to be executed into host instructions, storing the translated host instructions, executing the translated host instructions, responding to an exception during execution of a translated instruction by rolling back to a point in execution at which correct state of a target processor is known, and interpreting each target instruction in order from the point in execution at which correct state of a target processor is known.

Abstract: A target graphics document containing graphics data may be used as a starting point to automatically generate one or more test cases as a sequence of test events to re-create the appearance of the target graphics document. The target document may be examined to determine the layers, graphics data within each layer, and the attributes of the graphics data. Based on the determined data, a sequence of input device actions may be generated to create a test document having graphics data based at least in part on the target document. In some cases, the generated input device actions may create a test document containing graphics data identical to that of the target document. In some cases, some user randomness may be applied to the generated input device actions to simulate ‘real-world’ user inaccuracy. In some cases, typical user manipulation of an input device may be applied to simulate ‘real-world’ usage.

Abstract: An apparatus, circuit arrangement and method for emulating a hardware design by time division multiplexing data communicated between an emulator and a runtime assist unit (RTAU), such as a behavior card. Data from the emulator may be received directly at the general purpose registers of the RTAU. A programmable delay may be used in conjunction with a step generator to initiate concurrent cycle processes. Code executed by the RTAU may be coded in assembly, and external interrupts that might otherwise affect the determined processing time of the RTAU task are disabled. The time multiplexing reduces card port, cabling and processing cycle requirements.

Abstract: Techniques for simulation of multi top-level graphical-containers (e.g., frames) in an object-oriented computing environment are disclosed. A Multi Top-level Graphical-Container Simulator (MTGS) can be provided to simulate multi top-level graphical container support for applications that expect to use a plurality of top-level graphical containers (e.g., frames, windows). A MTGS may be implemented as a layer between a GUI-based application and an operating system and/or hardware/device with limited or virtually no graphical support capability. The Multi Top-level Graphical Simulator (MTGS) can effectively isolate the operating systems and/or hardware/device from the GUI-based application, and yet hide this simulation from the operating system and/or hardware/device. MTGS may be implemented in a platform independent programming language (e.g., Java™ programming language using a set of Java™ classes which have been provided in the Java™ Swing development toolkit.

Abstract: An efficient binary translator uses peephole translation rules to directly translate executable code from one instruction set to another. In a preferred embodiment, the translation rules are generated using superoptimization techniques that enable the translator to automatically learn translation rules for translating code from the source to target instruction set architecture.

Abstract: An information processing system includes a first processor that accesses a first memory, a second processor that accesses a second memory, and a data transfer unit for executing data transfer between the first memory and the second memory. The first processor executes functions of translating an instruction out of instructions included in the program except a memory access instruction into an instruction for the second processor and translating the memory access instruction into an instruction sequence containing a call instruction of the program to transfer the access data on the first memory to the second memory via a data transfer unit.

Abstract: A method and system for automatically executing an internationalization test of web applications by recording and utilizing HTTP transmitted and received data in the internationalization test in a multilingual web application. By processing and storing recorded HTTP transmitted and received data in a base language to prepare an HTTP request corresponding to a user specified test object language to a web server, a test is automatically executed while emulating user operations on the web browser in the test object language. This generates corresponding HTTP transmitted and received data in the test object language. By comparing and analyzing the HTTP transmitted and received data in the base language and test object language, a required verification for an internationalization test is automatically conducted and the verification results are stored or recorded for later use in subsequent operations.

Abstract: An adjustable precision exception handling technique is providing for handling exceptions encountered during translation of subject code to target code at varying levels of precision, depending upon the particular type of exception encountered. As an exception signal is detected by the translator, the state of the subject processor is captured at a precision determined to be sufficient for the detected exception.

Abstract: Reference architecture instructions are translated into target architecture operations. In some embodiments, an execution unit of a processor executes a function determined from a collection of operations, the function specifying functionality based on instructions, the collection selected from operations translated from the instructions. In further embodiments, the function is specified as a fused operation. Sequences of operations are optimized by fusing collections of operations; fused operations specify a same observable function as respective collections, but advantageously enable more efficient processing. In some embodiments, a collection comprises multiple register operations. Sequences of operations, in a predicted execution order in some embodiments, form traces. In some embodiments, fusing operations requires setting only final architectural state, such as final flag state; intermediate architectural state is used implicitly in a fused operation.

Abstract: Software managing long names in an application programming interface receives a request to perform a requested operation on one or more fields, the application comprising a first operation operable to perform the requested operation on at least one field type. The software determines whether the field type of any of the fields is incompatible with the first operation. If the field types of the one or more fields are compatible with the first operation, then the software performs the requested operation on the one or more fields using the first operation. If the software determines that the field type of at least one of the fields is incompatible with the first operation, then it converts the request into a call for a second operation operable to perform the requested operation on the one or more fields and performs the requested operation using the second operation.

Abstract: A platform for running embedded software using an inexpensive standard personal computer is disclosed. A particular embodiment includes a compiler assist component and a runtime component. The compiler assist component operates in conjunction with a standard personal computer compiler to compile an embedded system application to run on a conventional personal computer. The runtime component executes on the personal computer and operates in conjunction with the standard operating system drivers to allow an emulated system to communicate with real hardware connected to the personal computer or to virtual hardware that is simulated on the personal computer.

Abstract: Emulating a computer run time environment including: storing translated code in blocks of a translated code cache, each block of the translated code cache designated for storage of translated code for a separate one of the target executable processes, including identifying each block in dependence upon an identifier of the process for which the block is designated as storage; executing by the emulation environment a particular one of the target executable processes, using for target code translation the translated code in the block of the translated code cache designated as storage for the particular process; and upon encountering a context switch by the target operating system to execution of a new target executable process, changing from the block designated for the particular process to using for target code translation the translated code in the block of the translated code cache designated as storage for the new target executable process.

Abstract: In a computer which translates instructions from a target instruction set to a host instruction set, a method for determining validity of a translation of a target instruction linked to an earlier translation including the steps of testing a memory address of a target instruction to be executed against a copy of the memory address of the target instruction from which a translation of the target instruction was made, executing the translation if the addresses compare, and generating an exception if the addresses do not compare.

Abstract: A method and apparatus for sharing data between processors within first and second discrete clusters of processors. The method comprises supplying a first amount of data from a first data array in a first discrete cluster of processors to selector logic. A second amount of data from a second data array in a second discrete cluster of processors is also supplied to the selector logic. The first or second amount of data is then selected using the selector logic, and supplied to a shared input port on a processor in the first discrete cluster of processors. The apparatus comprises selector logic for selecting between input data supplied by a first data array and a second data array. The data arrays are located within different discrete clusters of processors. The selected data is then supplied to a shared input port on a processor.

Abstract: Systems and methods for automatically reverse engineering an input data format using dynamic data flow analysis. Combining input data with a simulated execution of the binary program using the input data and analyzing the use of the data by the program to generate a BNL-like grammar representing the input data format. The input data can be application level protocols, network protocols or formatted files.

Abstract: A method of translating binary code instructions from a source format to a target format for processing by a target processor includes converting a source instruction into a source intermediate data structure having a plurality of members, mapping the members in the source intermediate data structure to corresponding members in a target intermediate data structure according to a template, and converting the target intermediate data structure into a target instruction.

Abstract: A method for detecting computational errors in a digital processor executing a program. Initially, the program is divided into computation segments, and source code for at least one of the segments is compiled to generate two redundant code sections. Comparison code is generated for comparing results produced by execution of the two code sections. Each of the code sections is then executed in a different computational domain to generate respective results. The results of the computation are executed to alter further flow of the program only if the respective results are identical.