Including Graph Or Tree Representation (e.g., Abstract Syntax Tree Or Ast) Patents (Class 717/144)
  • Patent number: 10848505
    Abstract: A cyberattack behavior detection method and related apparatus are provided. The method includes receiving user upload information in a multilayer architecture, and detecting whether a cyberattack is included in the upload information. The upload information is only transmitted to a business logic layer for processing the upload information in response to the cyberattack not being detected.
    Type: Grant
    Filed: July 3, 2018
    Date of Patent: November 24, 2020
    Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Yan Jun He, Fu Cheng Long, Li Qian Cui
  • Patent number: 10810044
    Abstract: Described herein are systems, methods, and software to enhance the allocation of cache resources to virtual nodes. In one implementation, a configuration system in large-scale processing environment is configured to identify a request to initiate a large-scale processing framework (LSPF) cluster, wherein the LSPF cluster comprises a plurality of virtual nodes, and identify host computing resources of a host computing system allocated to each virtual node of the LSPF cluster. The configuration system further allocates cache memory of a cache service to each of the virtual nodes based on the host computing resources, and initiate the LSPF cluster in the computing environment.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: October 20, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Thomas A. Phelan, Ramaswami Kishore
  • Patent number: 10776087
    Abstract: Embodiments are directed to techniques to determine dataflow graph instructions comprising one or more pick/switch instruction pairs and generate a reverse static single assignment graph based on the dataflow graph instructions, the reverse static single assignment graph comprising strongly connected components, each of the strongly connected components associated with at least one of the one or more pick/switch instruction pairs. Embodiments also include traversing the reverse static single assignment graph depth-first, and replace pick/switch instructions associated with strongly connected components having configuration values with compound instructions.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: September 15, 2020
    Assignee: INTEL CORPORATION
    Inventor: Yongzhi Zhang
  • Patent number: 10698669
    Abstract: Methods, apparatus and computer software product for optimization of data transfer between two memories includes determining access to master data stored in one memory and/or to local data stored in another memory such that either or both of the size of total data transferred and the number of data transfers required to transfer the total data can be minimized. The master and/or local accesses are based on, at least in part, respective structures of the master and local data.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: June 30, 2020
    Assignee: Reservoir Labs, Inc.
    Inventors: Richard A. Lethin, Allen K. Leung, Benoit J. Meister, David E. Wohlford
  • Patent number: 10671398
    Abstract: A computer processing system is provided. The computer processing system includes a processor configured to insert a move instruction in an instruction scheduling dependency graph generated for operands of the instruction operating on register pairs to ensure operand readiness for all of the operands used by the instruction operating on register pairs.
    Type: Grant
    Filed: August 2, 2017
    Date of Patent: June 2, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Maarten J. Boersma, Sundeep Chadha, Kurt A. Feiste, Michael J. Genden, Michael K. Kroener, David R. Terry
  • Patent number: 10671399
    Abstract: A computer processing system is provided. The computer processing system includes a processor configured to insert a move instruction in an instruction scheduling dependency graph generated for operands of the instruction operating on register pairs to ensure operand readiness for all of the operands used by the instruction operating on register pairs.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: June 2, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Maarten J. Boersma, Sundeep Chadha, Kurt A. Feiste, Michael J. Genden, Michael K. Kroener, David R. Terry
  • Patent number: 10628743
    Abstract: A robotic system for processing input, such as text data provided through a messaging system, spoken language data provided through a microphone, or any other such input data, which may function to process the input so as to be able to respond or reply to a user based on comprehension of the input sentences. An automated theorem prover (ATP) may operate as an underlying framework for the AI system that understands and responds to spoken or written statements translated into a proper format. An ATP formatter may be used to translate natural language processing (NLP) output from a NLP syntactical sentence parser into the proper format, such that the ATP system may be able to generate and populate an ontology from the NLP output. User queries may be mapped to this ontology in order to facilitate comprehension. If desired, the system may automatically populate the ontology through Internet searching.
    Type: Grant
    Filed: January 24, 2019
    Date of Patent: April 21, 2020
    Inventor: Andrew R. Kalukin
  • Patent number: 10621358
    Abstract: Preliminary program analysis of an executable may be performed. A security vulnerability level of a portion of the executable may be determined based on the preliminary program analysis. The security vulnerability level of the portion may be compared to a security vulnerability threshold. The precision of runtime monitoring of the portion may be tuned based on the comparison.
    Type: Grant
    Filed: January 2, 2019
    Date of Patent: April 14, 2020
    Assignee: International Business Machines Corporation
    Inventors: Paul Ionescu, Iosif V. Onut, Omer Tripp
  • Patent number: 10613843
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for how a build system uses import graphs to maintain a current compilation cache and determine when compilation targets should be recompiled. A request is received to compile a compilation target. A plurality of files are identified that are used to build the compilation target. An import graph that represents import dependencies among the files used the build the compilation target is generated for the compilation target. The import graph is traversed to assign a respective identifier to each node in the import graph. A cache key is generated from data representing import relationships represented by the import graph and data representing contents of files used to build the compilation target. If the cache key is invalid or does not exist, compiling the compilation target.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: April 7, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Pavel Avgustinov, Julian Tibble
  • Patent number: 10606570
    Abstract: According to an aspect of an embodiment, a method may include generating an abstract code graph (ACG). The method may include obtaining an abstract syntax tree (AST). The AST may include a first AST node that may represent a first construct at a first level of abstraction and a second AST node that may represent a second construct. The method may further include generating an ACG, based on the AST. The generating of ACG may include generating a first ACG node based on the first AST node and a second ACG node based on the second AST node. The generating of ACG may also include generating, based on the first ACG node, a third ACG node that represents the first construct at a second level of abstraction. The third ACG node may be connected between the first ACG node and the second ACG node based on the AST.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: March 31, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Hiroaki Yoshida, Mukul R. Prasad
  • Patent number: 10545740
    Abstract: An improved software optimization tool framework is provided that, when executed, creates software agents that attach themselves to all running instances of a user-specified application and/or process, be it in a single machine or across multiple machines (e.g. in a computer cluster). Once the software agents attach, for each attached application and/or process, the tool can be configured to capture the input and output data of specified target sections of code for the specified application or process. In an embodiment, a software programmer may want to optimize a specific target section of code that may comprise a single function or multiple functions or code portions. Based on pre-identified code sections, the tool can write captured input and output data into binary files, along with the target sections of code, and build an optimization framework around the input and output data, including the targeted sections of code.
    Type: Grant
    Filed: October 25, 2017
    Date of Patent: January 28, 2020
    Assignee: Saudi Arabian Oil Company
    Inventor: Mazen Abdulaziz Saleh Al-Hagri
  • Patent number: 10521288
    Abstract: A method, computer program product, and computer system for performing, at a computing device, an analysis of a web application. A response is annotated by the web application with coverage data based upon, at least in part, the analysis, wherein the coverage data indicates which actions have been performed on the web application and which actions have not been performed on the web application according to results of the analysis. The response that includes the coverage data is shared with one or more users.
    Type: Grant
    Filed: November 7, 2012
    Date of Patent: December 31, 2019
    Assignee: International Business Machines Corporation
    Inventors: Ory Segal, Roi Saltzman, Omer Tripp
  • Patent number: 10521206
    Abstract: Implementations of the disclosure provide systems and methods for ensuring that the value for any local function variable is initialized before it is used during the execution of the function. The method comprises identifying, by a processor executing a compiler, a reference to a local variable in a source code. It is determined that there can be a usage of the local variable in an uninitialized state as an operand for an operation. In the source code, a notation is identified that is associated with the local variable for suppressing a warning by the compiler with respect to using the local variable in the uninitialized state as an operand for an operation, In view of the source code, an object code is generated for tracking initialization and usage of the local variable at runtime.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: December 31, 2019
    Assignee: Red Hat, Inc.
    Inventor: Michael Tsirkin
  • Patent number: 10467598
    Abstract: A method for automatically converting note-to-self to action reminders in an electronic device is provided. The method includes receiving an input comprising at least one word from a user of the electronic device, analyzing an anaphora representation or a deictic representation for each of the at least one word, and generating a reminder based on a context from the anaphora representation or the deictic representation.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: November 5, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Lokendra Shastri, Rohini Nookala, Abhanshu Gupta, Kailash Atal, Rajat Tandon, Gladbin David C, Karishma Rajesh Sharma, Sohini Sengupta, Utkarsh Srivastava, Vidushi Chaudhary, Arun Yadav, Vaibhav, Pratik Vasa, Abhay Goel, Anshuka Rangi, Ashwani Kumar, Kapil Khatke, Nishu Bansal
  • Patent number: 10452607
    Abstract: In one implementation, a data transformation tool is configured to allow a user to specify how types of data should be mapped to another type of data in a reusable fashion. In one implementation, the data transformation tool analyzes data selected for input, the desired data output, and determines a list of potential mappings that may be used between the compliant and non-compliant systems. The mappings may be generated through transformational expressions and defined as a data wrapper. Once the definition of the one or more mappings are defined, data transformation tool generates one or more files allowing the execution of the transformation of the input data to the output data during an execution phase, such as runtime.
    Type: Grant
    Filed: January 10, 2017
    Date of Patent: October 22, 2019
    Assignee: Oracle International Corporation
    Inventors: Rodolfo José Cruz, Patricio Barletta, Nicolas Damonte, Juan Allo Ron
  • Patent number: 10394709
    Abstract: A function analysis method applied to a memory device includes analyzing the mapping relationship between at least one API function and at least one normal function, analyzing a calling relationship between the at least one normal function through the correspondence relationship, and developing a two-dimensional array to analyze whether there is a loop in the calling relationship or not. When one of the at least one normal function calls another normal function, whether or not the name of the called normal function is the same as the name of the normal function and names of the normal functions which call the normal function is checked.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: August 27, 2019
    Assignee: Silicon Motion, Inc.
    Inventor: Kuo-Chiang Hsu
  • Patent number: 10346182
    Abstract: Computing device and a method for loading module codes, the module codes required for executing an action, the method comprising: receiving, by the computing device, a request for executing the action, the action being executable using a first module code; acquiring, from the first predetermined index a first module code reference indicating a first module code location and the indication that executing the first module code requires a second module code; acquiring, from a second predetermined index, a second module code reference, the second module code reference indicating a second module code location; based on the first module code reference, acquiring the first module code from the first module code location; based on the second module code reference, acquiring the second module code from the second module code location; executing the action by running the first module code and the second module code.
    Type: Grant
    Filed: November 19, 2015
    Date of Patent: July 9, 2019
    Assignee: YANDEX EUROPE AG
    Inventors: Aleksandr Aleksandrovich Zinchuk, Sergey Sergeevich Konstantinov
  • Patent number: 10338902
    Abstract: A method, system, and computer-readable medium including operations for optimizing computer code is disclosed. A block of mixed intermediate representation (MIR) code is received. A partially-decompiled block of computer code is generated from the MIR code. For each instruction in the block of MIR code, in reverse order, a native expression vector for the instruction is computed. A set of pattern-matching operations is repeated until no transformations occur. A fully-decompiled block of computer code is generated from the partially-decompiled block of computer code, the fully-decompiled block of computer code having a semantic level that is raised. The fully-decompiled block of computer code is provided for deployment on an architecture, the deployment including lowering the semantic of the computer code to a level that corresponds to a CPU or GPU supported by the architecture.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: July 2, 2019
    Assignee: Unity IPR ApS
    Inventor: Benoit Sevigny
  • Patent number: 10310861
    Abstract: An apparatus to facilitate thread scheduling is disclosed. The apparatus includes logic to store barrier usage data based on a magnitude of barrier messages in an application kernel and a scheduler to schedule execution of threads across a plurality of multiprocessors based on the barrier usage data.
    Type: Grant
    Filed: April 1, 2017
    Date of Patent: June 4, 2019
    Assignee: INTEL CORPORATION
    Inventors: Balaji Vembu, Abhishek R. Appu, Joydeep Ray, Altug Koker
  • Patent number: 10223697
    Abstract: Disclosed is an improved approach for implementing enterprise software systems that addresses the above-described problems with existing systems. The present approach provides an effective and efficient way for defining schemas for services, and to define how to map the schema to particular transactional contexts.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: March 5, 2019
    Assignee: Oracle International Corporation
    Inventors: Mark David Lewis, Jianfeng Tai, David Wang, Ying Wang, Re Lai
  • Patent number: 10210336
    Abstract: Preliminary program analysis of an executable may be performed. A security vulnerability level of a portion of the executable may be determined based on the preliminary program analysis. The security vulnerability level of the portion may be compared to a security vulnerability threshold. The precision of runtime monitoring of the portion may be tuned based on the comparison.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: February 19, 2019
    Assignee: International Business Machines Corporation
    Inventors: Paul Ionescu, Iosif V. Onut, Omer Tripp
  • Patent number: 10198250
    Abstract: According to an example, partitioning based migration of systems to container and micro-service based-platforms may include determining, based on an analysis of source code for an application that is to be partitioned, an entity model corresponding to the application, identifying resources associated with the application, and determining a mapping of the identified resources to entities of the entity model. Further, partitioning based migration of systems to container and micro-service based-platforms may include identifying dependencies for each of the mapped resources, generating dependency and control flow metrics for the application, generating affinity values between the mapped resources, generating a resource affinity graph, determining an affinity score between each of the mapped resources, and generating resource clusters that correspond to partitions of the application.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: February 5, 2019
    Assignee: ACCENTURE GLOBAL SOLUTIONS LIMITED
    Inventors: Vibhu Sharma, Sanjay Podder, Kapil Singi
  • Patent number: 10152311
    Abstract: A method for compiling software code comprises scanning call sites within the code to identify a function that is called with at least one constant argument and creating a list of each call site associated with the function and sets of constant arguments passed to the function. If any common subsets of the constant arguments are shared across a plurality of call sites, a size of the function is estimated. selecting any sets of constant arguments that are used only in one call site. The sizes of specialized functions covering sets of constant arguments that are used in only one call site is estimated. The method comprises creating a first set of specialized versions of the function covering one or more sets of constant arguments that are used in only one call site, and if any common subsets of the constant arguments exist, creating a second set of specialized versions of the function.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: December 11, 2018
    Assignee: QUALCOMM Innovation Center, Inc.
    Inventor: Tobias Edler Von Koch
  • Patent number: 10095511
    Abstract: A current Java project is converted to a Maven project, by scanning the the current Java project to identify a structure of the Java project, generating a project template for the Maven project based on the identified structure of the Java project, arranging files associated with the Java project according to a structure of the project template generated for the Maven project, validating dependencies and linkages associated with a plurality of modules of the current Java project based on corresponding module requirements, generating a Project Object Model (POM) file for each of the modules, generating a root POM file for the Maven project that includes the dependencies, executing a build of the Maven project utilizing the POM files and the root POM file to generate artifacts for the Maven project, and deploying the artifacts in a central repository and a testing environment.
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: October 9, 2018
    Assignee: Amdocs Development Limited
    Inventors: Shomi Sengupta, Sunil Suresh Anvekar
  • Patent number: 10083183
    Abstract: Implementations of the present disclosure include methods, systems, and computer-readable storage mediums for providing a SPLAY tree, the SPLAY tree including a data structure having one or more nodes, each node having a node name and a node value, determining that a function of a shared library of an in-memory database system has been called, and determining whether the SPLAY tree includes a node corresponding to the function, wherein: if the SPLAY tree includes a node corresponding to the function, reading a function address of the function from the SPLAY tree, and if the SPLAY tree is absent a node corresponding to the function, reading the function address from a computer-readable file.
    Type: Grant
    Filed: July 19, 2016
    Date of Patent: September 25, 2018
    Assignee: SAP SE
    Inventor: Ahmad Hassan
  • Patent number: 10078505
    Abstract: A method and system for partial connection of iterations during loop unrolling during compilation of a program by a compiler. Unrolled loop iterations of a loop in the program are selectively connected, including redirecting, to the head of the loop, undesirable edges of a control flow from one iteration to a next iteration of the loop. Merges on a path of hot code are removed to increase a scope for optimization of the program. The head of the loop and a start of a replicated loop body of the loop are equivalent points of the control flow. A sequence of blocks on the path of hot code, unpolluted by a control flow of a path of cold code, is extended during the compilation. Information computed by an optimizer about the hot code in a first iteration is used to further optimize a second iteration, and the loop is further unrolled.
    Type: Grant
    Filed: July 20, 2016
    Date of Patent: September 18, 2018
    Assignee: International Business Machines Corporation
    Inventors: Andrew J. Craik, Vijay Sundaresan
  • Patent number: 10042654
    Abstract: A method for distributing sets of regular expressions to a fixed number of state machine engines includes combining, with a processing device, a plurality of regular expressions into a single compound regular expression, creating a single nondeterministic finite automaton (NFA) including a plurality of NFA states based on the compound regular expression, performing an interference analysis for each pair of NFA states to identify all pairs of NFA states that would potentially interfere in an equivalent deterministic finite automaton (DFA), creating an interference graph representing the regular expressions associated with potentially interfering NFA states based on the results of the interference analysis, and performing a graph coloring algorithm on the interference graph to assign a different color to each represented regular expression in the graph.
    Type: Grant
    Filed: June 10, 2014
    Date of Patent: August 7, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Christoph Angerer
  • Patent number: 10025570
    Abstract: In one example, a system for modifying applications to support incremental checkpoints can include logic to generate a dominator tree based on a control flow graph for source code, wherein the control flow graph and the dominator tree comprise a plurality of nodes corresponding to basic blocks of the source code. The processor can select a region based on a leaf node of the dominator tree, the region based on an instruction threshold, and insert a first set of commit instructions into the source code based on entry points into the region and insert a second set of commit instructions into the source code based on exit points from the region. The processor can update the dominator tree to exclude the selected region and compile the source code into an executable application, wherein the first set of commit instructions and the second set of commit instructions enable incremental checkpoints.
    Type: Grant
    Filed: September 28, 2016
    Date of Patent: July 17, 2018
    Assignee: Intel Corporation
    Inventors: Sara S. Baghsorkhi, Christos Margiolas
  • Patent number: 9934270
    Abstract: A source code search comprises a two-pass search. The first pass comprises a topological measure of similarity. The second pass comprises a semantic measure of similarity. The query source code is a user-selected portion of source code. The results may be ranked and output to an I/O device.
    Type: Grant
    Filed: August 21, 2017
    Date of Patent: April 3, 2018
    Assignee: International Business Machines Corporation
    Inventors: Nathan Fontenot, Fionnuala G. Gunter, Michael T. Strosaker, George C. Wilson
  • Patent number: 9904541
    Abstract: Described herein are technologies pertaining to semantic baselining. Correctness conditions of a baseline program are inferred based upon a first static analysis undertaken over the baseline program. The correctness conditions are subsequently inserted into a revision to the baseline program. When a second static analysis is undertaken over the revised program with the correctness conditions inserted therein, warnings inherited from the baseline program are suppressed, while warnings caused by revisions are surfaced to a developer.
    Type: Grant
    Filed: May 9, 2013
    Date of Patent: February 27, 2018
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Manuel Fahndrich, Shuvendu Lahiri, Francesco Logozzo, Sam Blackshear
  • Patent number: 9864518
    Abstract: Embodiments are directed to assigning a home memory location for a function call parameter. A method may include determining whether a caller is configured to allocate a memory location for a parameter passed to a callee. The caller is a module that includes a function call to the callee and the callee is a function. The method may include inserting instructions in the callee to allocate a home memory location for the parameter in response to determining that the caller is not configured to allocate a memory location for the parameter. In addition, the method may include inserting instructions in the callee to set the memory location as a home location for the parameter in response to determining that the caller is configured to allocate a memory location for the parameter.
    Type: Grant
    Filed: November 10, 2014
    Date of Patent: January 9, 2018
    Assignee: International Business Machines Corporation
    Inventors: Michael Karl Gschwind, Ulrich Weigand
  • Patent number: 9841975
    Abstract: A method is provided of performing register allocation for at least one program code module. The method includes constructing a restriction graph for program variables within at least one program instruction, and determining whether the constructed restriction graph is colorable. If it is determined that the constructed restriction graph is not colorable, then the method determines whether at least one alternative form of the at least one program instruction is available, and modifies the at least one program instruction to comprise an alternative form if it is determined that at least one alternative form is available.
    Type: Grant
    Filed: September 18, 2013
    Date of Patent: December 12, 2017
    Assignee: NXP USA, Inc.
    Inventors: Andreea Florina Nicolescu, Rene Catalin Palalau
  • Patent number: 9811235
    Abstract: Disclosed herein is a system and method for optimizing a developer's ability to find and navigate relevant documents, relationships, and other information related to an identifier in the code they are developing. An inline viewport is presented to the user in response to the user selecting an identifier in the code whereby the user is able to see relevant information related to the identifier in a spatially consistent location with the code they are investigating. The developer further has the ability to cascade the viewports such that multiple levels of depth of relationships can be viewed in the viewport.
    Type: Grant
    Filed: September 15, 2015
    Date of Patent: November 7, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Monty Hammontree, Murali Krishna Hosabettu Kamalesha, Brandon Adams, Steven John Clarke, Zachary S Zaiss, David Pugh
  • Patent number: 9798527
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating efficient compiled code. In an example method, a compilation system obtains an un-optimized computational graph comprising a plurality of nodes representing operations and directed edges representing data dependencies. The un-optimized computational graph is analyzed using pattern matching to determine fusable operations that can be fused together into a single fusion operation. The un-optimized computational graph is transformed into an optimized computational graph by replacing the nodes representing the fusable operations in the un-optimized computational graph with a fusion node representing the single fusion operation. The compilation system produces efficient code by translating the fusion node of the optimized computational graph as a call that performs the fused operations.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: October 24, 2017
    Assignee: Google Inc.
    Inventors: Eli Bendersky, Robert Hundt, Mark Heffernan, Jingyue Wu
  • Patent number: 9760282
    Abstract: Embodiments are directed to assigning a home memory location for a function call parameter. A method may include determining whether a caller is configured to allocate a memory location for a parameter passed to a callee. The caller is a module that includes a function call to the callee and the callee is a function. The method may include inserting instructions in the callee to allocate a home memory location for the parameter in response to determining that the caller is not configured to allocate a memory location for the parameter. In addition, the method may include inserting instructions in the callee to set the memory location as a home location for the parameter in response to determining that the caller is configured to allocate a memory location for the parameter.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: September 12, 2017
    Assignee: International Business Machines Corporation
    Inventors: Michael Karl Gschwind, Ulrich Weigand
  • Patent number: 9753838
    Abstract: A method is implemented in a computer infrastructure having computer executable code tangibly embodied on a computer readable storage medium having programming instructions. The programming instructions are operable to receive a tool error output determined by a code inspection tool and select at least one defect classification mapping profile based on the code inspection tool. Additionally, the programming instructions are operable to map the tool error output to one or more output classifications using the selected at least one defect classification mapping profile and generate at least one report based on the one or more output classifications.
    Type: Grant
    Filed: July 21, 2016
    Date of Patent: September 5, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ian E. Baker, Kathryn A. Bassin, Steven Kagan, Susan E. Smith
  • Patent number: 9720664
    Abstract: One or more processors determine whether a first procedure within a first program meets a first criterion. The first criterion is included in a plurality of criteria that are configured for pessimistic aliasing. Responsive to the determination, one or more processors determine whether to flag the first procedure for pessimistic aliasing.
    Type: Grant
    Filed: June 21, 2016
    Date of Patent: August 1, 2017
    Assignee: International Business Machines Corporation
    Inventors: Sean D. Perry, David Tremaine
  • Patent number: 9703537
    Abstract: One or more processors determine whether a first procedure within a first program meets a first criterion. The first criterion is included in a plurality of criteria that are configured for pessimistic aliasing. Responsive to the determination, one or more processors determine whether to flag the first procedure for pessimistic aliasing.
    Type: Grant
    Filed: November 2, 2015
    Date of Patent: July 11, 2017
    Assignee: International Business Machines Corporation
    Inventors: Sean D. Perry, David Tremaine
  • Patent number: 9652208
    Abstract: An embodiment method of global scope basic-block reordering includes profiling an application having a source code decomposable into a plurality of basic-blocks. The profiling yields a global basic-block sequence. The method also includes generating a hierarchical locality model according to the global basic-block sequence. The method also includes generating a target code according to the hierarchical locality model.
    Type: Grant
    Filed: July 29, 2014
    Date of Patent: May 16, 2017
    Assignee: Futurewei Technologies, Inc.
    Inventors: Pengcheng Li, Ziang Hu, Handong Ye
  • Patent number: 9626156
    Abstract: Provided is an application architecture design method in which an information processing device is used, the method including the steps of: inputting information about dependency relations and design aspects, which are design items regarding modules for running functions, virtual machines for running the modules, and physical machines for running the virtual machines; and executing processing of adapting architecture properly by switching the input information about the dependency relations and the design aspects in matrices in a DSM format, and thereby rearranging allocation of the modules, allocation of the virtual machines, and allocation of the physical machines in stages in the DSM format. As a result, an excellent design solution for architecture suitable for a virtualized environment, a cloud environment deriving, or a similar environment can be derived.
    Type: Grant
    Filed: April 19, 2012
    Date of Patent: April 18, 2017
    Assignees: NEC Corporation, Tokyo Metropolitan University, The University of Tokyo
    Inventors: Shigeru Hosono, Koji Kimita, Fumiya Akasaka, Tatsunori Hara, Yoshiki Shimomura, Tamio Arai
  • Patent number: 9607017
    Abstract: Systems and methods for utilizing relation- and query-specific information to specialize DBMS code at runtime based on identifying runtime locally invariant variables. Runtime invariant is often of the form of variables in code that hold values that are constant during a portion of code execution. Micro-specialization is applied to eliminate from the original program unnecessary code such as branching statements that reference local invariant(s) in branch-condition evaluation. The resulting specialized code reduces the code complexity as well as significantly improves the runtime efficiency during code execution.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: March 28, 2017
    Assignee: THE ARIZONA BOARD OF REGENTS ON BEHALF OF THE UNIVERSITY OF ARIZONA
    Inventors: Saumya K. Debray, Richard T. Snodgrass, Rui Zhang
  • Patent number: 9524148
    Abstract: Provided is a multi-module compilation system for generating execution codes for each of modules in a module system. The multi-module compilation system may include a module identifier configured to analyze a program code of the module system and to identify target modules that execute the program code, a module code generator configured to divide the program code into module codes for each of the target modules and to generate the module codes, and a compiler configured to compile the module codes and to generate execution codes for each of the target modules.
    Type: Grant
    Filed: May 4, 2016
    Date of Patent: December 20, 2016
    Assignee: LUXROBO
    Inventors: Seung Bae Son, Sang Hun Oh, Goo Beom Jeoung
  • Patent number: 9495147
    Abstract: Aspects are directed to obtaining context information for a software development task. A method includes finding, in response to designating any one tool component associated with the software development task as a root component, at least one other tool component having an at least one-level link with the root component. Context information is extracted n from the root component and the at least one other tool component. A context set is generated based on the extracted context information.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: November 15, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Zhang Hong Chen, Fa Hua Jin, Xin Peng Liu
  • Patent number: 9489697
    Abstract: Systems and methods for determining a payment to a contributor are provided herein. Methods may include determining the contributor of a portion of software in a collaborative work; tracking the number of times the portion of software is used in a collaborative work; determining a weighting for each contributed portion of software; and calculating the proportional payment to each contributor based on the weighing and an income from the collaborative work.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: November 8, 2016
    Assignee: Microroyalties, LLC
    Inventors: David A. Guerrieri, Mario Antonio Guerrieri
  • Patent number: 9489221
    Abstract: A method for automatically analyzing formulas and adding pattern annotations to quantifiers based on a database of common pattern idioms. The method involves matching base pattern inference for Satisfiability Modulo Theories (SMT) solvers. The method uses a database for fault detection in externally supplied pattern annotated formulas. The method also uses matching code trees to mixed second-order pattern matching.
    Type: Grant
    Filed: June 25, 2008
    Date of Patent: November 8, 2016
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Nikolaj S. Bjorner, Leonardo Mendonca de Moura
  • Patent number: 9424043
    Abstract: Systems and methods for enhancing performance of programs implemented on an integrated circuit (IC) are provided. A forward-flow selector may determine a common branch for adding a data set to and removing a data set from. By selecting a common branch for adding and removing a data set, there will be a pipeline stage for data flowing into the branch. Accordingly, the embodiments described herein enhance throughput by increasing the number of datasets that may enter a branched pipeline without stalling.
    Type: Grant
    Filed: December 27, 2012
    Date of Patent: August 23, 2016
    Assignee: Altera Corporation
    Inventors: John Stuart Freeman, Tomasz S. Czajkowski
  • Patent number: 9411565
    Abstract: A method, executed by a computer, for splitting live register ranges includes identifying one or more H pathways comprising one or more H nodes having high register pressure using a backwards data flow in the graph, identifying an L pathway consisting of two or more L nodes using a depth first search, and inserting register splitting instructions for each symbolic register that is live in both the one or more H pathways and the L pathway. The register splitting instructions are inserted at a starting node of the one or more H pathways. Register merging instructions are inserted at an ending node of the one or more H pathways.
    Type: Grant
    Filed: December 16, 2015
    Date of Patent: August 9, 2016
    Assignee: International Business Machines Corporation
    Inventor: Steven J. Perron
  • Patent number: 9329867
    Abstract: This disclosure describes techniques for allocating registers in a computing system that supports vector physical registers. The techniques for allocating registers may allocate physical registers to vector virtual registers based on priority information that is indicative of a relative importance of allocating respective vector virtual registers as vectors rather than scalars. The techniques for allocating registers may involve allocating physical registers to the vector virtual registers in an order that is determined based on the priority information.
    Type: Grant
    Filed: September 23, 2014
    Date of Patent: May 3, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Sumesh Udayakumaran, Se Jong Oh
  • Patent number: 9274771
    Abstract: Embodiments of the invention provide systems and methods for automatically and adaptively optimizing compilation of application code using a rule-based optimization analyzer (RUBOA) that can command a compiler to apply and adapt optimizations at the code segment level according to gathered performance data. For example, source code can be canonically compiled, and annotations can associate compiled code sections with source code sections. The generated binary can then be executed and monitored to gather performance characteristics. The RUBOA can apply the gathered performance characteristics and annotations to a pre-defined rule set to generate compiler optimizations, each associated with and parametrically tailored to respective source code segments.
    Type: Grant
    Filed: September 22, 2014
    Date of Patent: March 1, 2016
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Spiros Kalogeropulos, Partha Tirumalai
  • Patent number: 9201874
    Abstract: A nominal type framework can be configured to efficiently correlate different nominal types together based on a minimum set of common type shapes or structures. In one implementation, a developer identifies a number of different nominal types of interest (source types), and identifies the minimum set of common type shapes to be accessed by an application program. The minimum set of common type shapes can then be used to create an intermediate type (target type) to which each of the other different source types can be mapped. For example, one or more proxies can be created that map shapes of the one or more source types to corresponding shapes of the created target type. The application program created by the developer, in turn, can access, operate on, or otherwise use the mapped data of each different source type through a single target type.
    Type: Grant
    Filed: February 25, 2008
    Date of Patent: December 1, 2015
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Clemens A. Szyperski, Quetzalcoatl Bradley, Joshua R. Williams, Christopher L. Anderson, Donald F. Box, Jeffrey S. Pinkston, Martin J. Gudgin