Compiling Code Patents (Class 717/140)
  • Patent number: 11226813
    Abstract: A system and method to automatically generate a software service to provide service layer functionalities to legacy computing systems that are inherently incompatible with a Service Oriented Architecture (SOA) consumer environment. A configuration specification defining the characteristics of the software service, including data mapping rules is received. Based on the specification, at least one pattern template for the software service is selected from a library of templates. The pattern templates provide source code patterns usable to build the software service. Source code of the software service is outputted using programming code provided in the at least one design pattern template. The outputted source code is packaged or assembled into a source code package for deployment.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: January 18, 2022
    Assignee: Next Pathway Inc.
    Inventors: Satish Gungabeesoon, Zhe Yang
  • Patent number: 11221832
    Abstract: A method and apparatus are disclosed for enhancing operable functionality of input source code files from a software program by preprocessing input source code files with codeword processing operations to generate a plurality of preprocessed input source code files, identifying candidate code snippets by pruning one or more preprocessed input source code files that do not meet a similarity threshold measure for library functions stored in the system library, and identifying at least a first validated code snippet from the one or more candidate code snippets that matches a first library function stored in the system memory on the basis of at least first and second matching metrics.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: January 11, 2022
    Inventor: Tushar Makkar
  • Patent number: 11210283
    Abstract: Systems, methods, and computer storage media are disclosed. A computer storage medium includes instructions that, when executed, perform actions including maintaining a first view based on a first table of a database. The actions include performing a first transaction within the database. The actions include performing a second transaction within the database, and the second transaction relies on data from the first view. Performing the second transaction includes beginning the second transaction. In response to occurrence of both (i) the first transaction committing a first modification to the first table subsequent to the beginning of the second transaction and (ii) the second transaction causing a modification to the first view based on the first modification, performing the second transaction includes continuing the second transaction based on the data from the first view excluding the modification to the first view and completing the second transaction.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: December 28, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Tengiz Kharatishvili, Wei Xiao, Stefano Stefani
  • Patent number: 11210633
    Abstract: A method including obtaining preset environment data by a client terminal of a mobile group office platform; and performing, by the client terminal, collaborative processing on a preset office event according to the preset environment data. According to the technical solutions of the present disclosure, collaborative processing is actively performed on the preset office event based on changes to environment data, thereby improving the processing efficiency of office events.
    Type: Grant
    Filed: August 13, 2019
    Date of Patent: December 28, 2021
    Assignee: Dingtalk Holding (Cayman) Limited
    Inventor: Hang Chen
  • Patent number: 11204924
    Abstract: The described technology is generally directed towards causing the generation of a content selection graph (or set of graphs) upon receipt of a notification that a new graph or replacement graph is needed with respect to a starting timepoint. For a new graph, a timepoint for that new graph indicates the need for the new graph at a given starting time. For a replacement graph, a notification (subscribed from a monitoring service) can indicate that an existing graph has changed; a replacement graph is generated with a graph identifier of the replacement graph, which then replaces the graph identifier of the existing graph in the mappings of valid graphs to start times. A Redis cache can be used to maintain the various graph sets, including the active graph sets and graph sets that will become active at a future time.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: December 21, 2021
    Assignee: Home Box Office, Inc.
    Inventors: Jonathan David Lutz, Allen Arthur Gay, Dylan Carney
  • Patent number: 11200378
    Abstract: Embodiments for processing language by one or more processors are described. A plurality of document portions are detected. Each of the plurality of document portions includes text in a respective language type. The text of each of the plurality of document portions is converted to a standardized language type. A language processing method is caused to be performed on the plurality of document portions after the converting of the text of each of the plurality of document portions to the standardized language type.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: December 14, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Thomas J. Fleischman, Emily R. Kinser, John E. Drummond, Wayne M. Delia, Sue Hallen
  • Patent number: 11200037
    Abstract: Systems and methods for improving builds of software applications are described herein. In an embodiment, an ontology comprises one or more translation cells comprising context data and software code and a plurality of pearl schema nodes, each of which defining one or more attributes in the ontology. When input data is received at a translation cell, context data in the translation cell is used to translate the input data into canonical data. Context data is then used to translate the canonical data into output data which can be provided to a client computing device.
    Type: Grant
    Filed: March 19, 2020
    Date of Patent: December 14, 2021
    Inventors: Wallace Mann, Andy Narayanan
  • Patent number: 11157611
    Abstract: A computer includes a memory and a processor programmed to execute instructions stored in the memory. The instructions include identifying a function in a binary file, assigning one of a plurality of classifications to the function, and determining that the function requires stack cookie protection based at least in part on the classification assigned to the function.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: October 26, 2021
    Assignee: Blackberry Limited
    Inventors: Adam John Boulton, Benjamin John Godwood
  • Patent number: 11132329
    Abstract: An electronic control device includes: a partially reconfigurable logic circuit in which a calculation unit which is reconfigured and executes calculation and a storage unit which stores calculation target date to be calculated by the calculation unit is configured; and a processing control unit which transmits circuit data for reconfiguring the calculation unit and the calculation target date to the logic circuit. When the processing control unit obtains next calculation target data which is the calculation target date relating to a next calculation unit which is the calculation unit after completion of reconfiguration, transmission of the next calculation target date to the storage unit is started regardless of whether the reconfiguration of the next calculation unit is completed, and upon completion of the reconfiguration, the next calculation unit performs calculation using the next calculation target date.
    Type: Grant
    Filed: March 22, 2018
    Date of Patent: September 28, 2021
    Assignee: HITACHI AUTOMOTIVE SYSTEMS, LTD.
    Inventors: Taisuke Ueta, Satoshi Tsutsumi, Hideki Endo, Hideyuki Sakamoto
  • Patent number: 11126436
    Abstract: Systems and methods for executing compiled code having parallel code fragments is provided. One method includes storing executable code having a plurality of parallel code fragments, each of the plurality of parallel code fragments representing alternative executable paths through a code stream. The method further includes determining a code level supported by a processor executable at a computing system, the processor executable supporting a hosted computing environment. The method also includes translating the executable code into machine-readable code executable by a processor of the computing system. Translating the executable code includes selecting a code fragment from among the plurality of parallel code fragments for execution based on the code level supported by the processor executable. The method includes executing the machine-readable code within the hosted computing environment.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: September 21, 2021
    Assignee: Unisys Corporation
    Inventors: Matthew Miller, David Strong, Anthony Matyok
  • Patent number: 11118936
    Abstract: A method for performing an operation on a flight sensor parameter includes receiving instructions indicating a description of a flight sensor parameter and an operation to be performed on the flight sensor parameter. The method includes generating executable code based on the instructions indicating the description and the operation. The method includes, after generating the executable code, associating the executable code with flight sensor data from one or more sensors. The flight sensor parameter includes a variable of the flight sensor data. The method further includes executing the executable code at a processor using the flight sensor data as an input to generate an output that indicates results of the operation.
    Type: Grant
    Filed: January 15, 2019
    Date of Patent: September 14, 2021
    Assignee: THE BOEING COMPANY
    Inventors: Changzhou Wang, Jun Yuan, Darren Puigh, Greg Jackson
  • Patent number: 11102214
    Abstract: A method includes determining to share access to a directory between a first web services account and a second web services account that lacks access to the directory, wherein the directory is managed by a directory service that executes within a first on-demand configurable pool of shared computing resources, and wherein the second web services account is associated with a second on-demand configurable pool of shared computing resources. The method includes generating a virtual directory for the second web services account, wherein the virtual directory comprises one or more virtual resources that are representations of resources on the directory, and wherein the virtual directory further comprises a reference to the directory. The method further includes receiving an access request to the directory from the second web services account, wherein the access request is received via the reference from the virtual directory to the directory, and then granting the access request.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: August 24, 2021
    Assignee: Amazon Technologies, Inc.
    Inventors: Dinesh Ramesh Kukreja, Keith Littleton Croney, Peter Lopes Pereira
  • Patent number: 11100214
    Abstract: An electronic device and method that are robust against attacks on encryption-related vulnerabilities as detection of an encryption algorithm based on if artificial intelligence technology is enabled are provided. A security enhancement method includes a hooking loading of an executable code into a memory, inputting the executable code into an encryption code identification model that is based on an artificial neural network, determining, by the encryption code identification model, whether the loading of the executable code into the memory is allowed, and when the loading of the executable code is not allowed, blocking the loading of the executable code into the memory.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: August 24, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jaewoo Seo
  • Patent number: 11093370
    Abstract: Devices and methods are provided for providing software developer-driven analysis for the expected impact that a proposed software modification may have on software programs and devices. A device may receive files including a first file including indications of: (i) a feature modified by one or more software modifications, (ii) a sub-feature associated with the feature and modified by the one or more software modifications, and (iii) first information associated with the feature, and a second file including indications of: (i) the feature, (ii) the sub-feature, and (iii) second information associated with the feature. The device may determine a record including indications of: (i) the feature, (ii) the sub-feature, (iii) the first information, and (iv) the second information. The device may determine a test plan including one or more tests performed based on the record. The device may execute at least a portion of the test plan.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: August 17, 2021
    Assignee: Amazon Technologies, Inc.
    Inventors: Sudhakar Sivanantham, Shweta Pednekar, Aaron Tang
  • Patent number: 11080056
    Abstract: Disclosed herein is a processor for deep learning. In one embodiment, the processor comprises: a load and store unit configured to load and store image pixel data and stencil data; a register unit, implementing a banked register file, configured to: load and store a subset of the image pixel data from the load and store unit, and concurrently provide access to image pixel values stored in a register file entry of the banked register file, wherein the subset of the image pixel data comprises the image pixel values stored in the register file entry; and a plurality of arithmetic logic units configured to concurrently perform one or more operations on the image pixel values stored in the register file entry and corresponding stencil data of the stencil data.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: August 3, 2021
    Assignee: Deep Vision, Inc.
    Inventors: Wajahat Qadeer, Rehan Hameed
  • Patent number: 11080638
    Abstract: The analysis technique presenting system includes: a storage apparatus storing a plurality of analysis modules that are divided from the analysis processing into a plurality of steps, a plurality of analysis techniques that combine some of the analysis modules, analysis module information that associates the analysis module with the corresponding model of the mechanism, and analysis technique information that associates a list of the analysis modules belonging to the corresponding analysis technique with the model; an identifying unit identifies, when the analysis technique associated with an input model input is not present in the analysis technique information, the analysis module matching the input model from the analysis module information; a replacing unit replaces the analysis module, which is associated with the model different from the input model with the identified analysis module; and a presenting unit presents the analysis technique including the analysis module replaced.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: August 3, 2021
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Mika Naraki
  • Patent number: 11074339
    Abstract: A method of software article protection and transformation includes: retrieving a software article; identifying control flow addressing associated with the software article; removing at least a portion of the control flow addressing; and saving the at least a portion of the control flow addressing from the software article, wherein removing the at least a portion of the control flow addressing comprises replacing call and return functions with protected execution instructions, wherein the protected execution instructions replace call functions by: identifying, in a lookup table, an entry associated with a current instruction; and pushing a return address associated with the current instruction to a secure return stack; and wherein the protected execution instructions replace return functions by: popping the return address from the secure return stack; encrypting the at least a portion of the control flow addressing; and saving the at least a portion of the control flow addressing to a separate software articl
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: July 27, 2021
    Assignee: Ram Laboratories, Inc.
    Inventors: Brooke Wallace, Dean C. Mumme, Robert McGraw
  • Patent number: 11074154
    Abstract: Method and system are provided for identifying a source file for use in debugging compiled code. The method includes referencing a compiled file for debugging and searching for potential source files of the compiled file from configured repositories. The method obtains the potential source files from the configured repositories and iterates over the obtained potential source files to compile and compare each potential source file to the compiled file. One or more matching source files are identified for use in debugging the compiled file.
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: July 27, 2021
    Assignee: International Business Machines Corporation
    Inventors: Timothy J. Mitchell, Graham C. Charters, Lewis Evans, Adam J. Pilkington
  • Patent number: 11074214
    Abstract: Data processing apparatus comprises processing circuitry to apply processing operations to one or more data items of a linear array comprising a plurality, n, of data items at respective positions in the linear array, the processing circuitry being configured to access an array of n×n storage locations, where n is an integer greater than one, the processing circuitry comprising: instruction decoder circuitry to decode program instructions; and instruction processing circuitry to execute instructions decoded by the instruction decoder circuitry; wherein the instruction decoder circuitry is responsive to an array access instruction, to control the instruction processing circuitry to access, as a linear array, a set of n storage locations arranged in an array direction selected, under control of the array access instruction, from a set of candidate array directions comprising at least a first array direction and a second array direction different to the first array direction.
    Type: Grant
    Filed: August 5, 2019
    Date of Patent: July 27, 2021
    Assignee: Arm Limited
    Inventors: Jelena Milanovic, Lee Evan Eisen, Nigel John Stephens
  • Patent number: 11068247
    Abstract: Algorithms, examples, and related technology for automatic vectorization of a particular class of loops is described. The loops, denoted “CMMSR loops”, operate to find an extremum and also utilize an index denoting the position of the extremum in an array or other multi-element input. CMMSR loops are identified in a language translator by matching a specified template or having a specified set of parsing results, or both. Generated vectorization code includes, for example, code to compute candidates for the extremum, code to select the same instance of the extremum as a scalar execution when the input contains multiple instances, and wind-down code to compute an index expression based on the selected instance of the extremum. Vectorizations may execute on SIMD hardware or other vector processors.
    Type: Grant
    Filed: February 6, 2018
    Date of Patent: July 20, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Amit Sabne, James J Radigan
  • Patent number: 11055075
    Abstract: A user terminal device, which can execute an application created based on a dynamically typed language, such as JavaScript, a server, which provides reference information for compilation, and an application executing control method thereof are provided. The user terminal device includes a communicator configured to communicate with at least one server; a storage configured to store data of a source code of an application; and a processor configured to transmit identification information of the source code of the application to the at least one server, receive reference information for compiling the source code corresponding to the transmitted identification information from the at least one server, and compile the source code of the application into a machine code based on the received reference information.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: July 6, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Sang gyu Lee
  • Patent number: 11042405
    Abstract: Techniques for scheduling and executing functions across a plurality of different Functions-as-a-Service (FaaS) infrastructures are provided. In one set of embodiments, a computer system can determine that a function has been invoked, where the computer system implements a spanning FaaS service platform that is communicatively coupled with the plurality of different FaaS infrastructures. In response, the computer system can retrieve metadata associated with the function, where the metadata includes criteria or policies indicating how the function should be scheduled for execution, and can retrieve information associated with each of the plurality of different FaaS infrastructures, where the information includes capabilities or characteristics of each FaaS infrastructure.
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: June 22, 2021
    Assignee: VMware, Inc.
    Inventors: Berndt Jung, Mark Peek, Xueyang Hu, Ivan Mikushin, Karol Stepniewski
  • Patent number: 11042422
    Abstract: A hybrid binary executable under both native processes and compatibility (e.g., emulated) processes. When the hybrid binary is loaded by a native process, the process executes a native code stream contained in the binary directly on a processor. When the hybrid binary is loaded by a compatibility process, the process executes an emulation-compatible (EC) code stream directly on a processor. When executing in a compatibility process, the EC code stream can interact with a foreign code stream that executes in an emulator. The foreign code stream can be included in the hybrid binary itself, or can be external to the hybrid binary. The hybrid binary format supports folding of code between the native code stream and the EC code stream. The hybrid binary comprises a set of memory transformations which are applied to image data obtained from the binary when the hybrid binary executes under the compatibility process.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: June 22, 2021
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Pavlo Lebedynskiy, Pedro Miguel Sequeira De Justo Teixeira, Darek Josip Mihocka, Jon Robert Berry, Clarence Siu Yeen Dang, Tiansheng Tan, James David Cleary, Yongkang Zhu, Theodore Maxwell Thomas, Ben Niu, Russell Charles Hadley
  • Patent number: 11030354
    Abstract: An automated design system for facilitating intelligent design of electromechanically controlled hydraulic systems. The automated design system utilizes one or more servers and one or more processors for accessing design information related to the hydraulic systems. The design system also includes a display device which provides an interface, an input device and a software program which allow a user to select various design characteristics related to a product design. The automated design system also provides text-based and graphical outputs pertaining to a product design.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: June 8, 2021
    Assignee: Enovation Controls, LLC
    Inventors: Kennon Guglielmo, Eric Peterson, Doug Conyers
  • Patent number: 11017383
    Abstract: A method for identifying a merchant associated with ransomware includes: storing, in a profile database, a plurality of merchant profiles, wherein each merchant profile is related to a merchant and includes at least a merchant identifier; receiving, by a receiving device, an authorization request for a payment transaction, wherein the authorization request includes a specific merchant identifier associated with a merchant involved in the payment transaction, and the payment transaction is initiated by a computing device infected with one or more ransomware application programs; identifying, by a processing device, a specific merchant profile in the profile database where the included merchant identifier corresponds to the specific merchant identifier included in the received authorization request; and updating, by the processing device, the specific merchant profile in the profile database to include an indication that the related merchant is associated with the distribution of the one or more ransomware appl
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: May 25, 2021
    Assignee: MASTERCARD INTERNATIONAL INCORPORATED
    Inventor: Justin X. Howe
  • Patent number: 10970067
    Abstract: A method includes identifying an application to be converted into a set of microservices, analyzing software code of the application to identify a plurality of functions as candidates for combination with one another into the set of microservices, monitoring a running instance of the application to generate a calling-context tree identifying interactions among the plurality of functions, and determining a recommended design for the set of microservices based at least in part on the identified interactions among the plurality of functions. The method also includes modifying the recommended design for the set of microservices responsive to activation of user interface features of a graphical user interface providing a visualization of the generated calling-context tree, and generating the set of microservices based at least in part on the modified design.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: April 6, 2021
    Assignee: Dell Products L.P.
    Inventor: Shubham Gupta
  • Patent number: 10959160
    Abstract: The present disclosure relates to network slice configuration methods and apparatus. One example method includes determining, by a first network device, network slice configuration information, and sending, by the first network device, the network slice configuration information to a second network device, where the network slice configuration information instructs the second network device to perform network slice configuration based on the network slice configuration information.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: March 23, 2021
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Chong Lou, Qinghai Zeng, Jian Zhang
  • Patent number: 10949612
    Abstract: Resolving conflicting changes to structured data files. A method includes for a structured data file which has both a generic structure and dialects built on top of the generic structure, for which conflicting changes have been made, and where an original version of the structured data, a first version of the structured data and a second version of the structured data exist, determining a dialect of the structured data. The method further includes, based on the determined dialect performing at least one of merge or diff operations on the original version of the structured data, the first version of the structured data and the second version of the structured data.
    Type: Grant
    Filed: December 12, 2016
    Date of Patent: March 16, 2021
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: David Charles Kilian, Louisa Rose Millott, Gareth Alun Jones, Andrew Craig Bragdon, Yu Xiao, Arun Mathew Abraham, Kevin J. Blasko, Christopher Lovett, Mark Groves
  • Patent number: 10949447
    Abstract: One or more implementations of the present specification provide a blockchain-based data processing method and device. Block data in a blockchain is synchronized by a data center to a local database of the data center. The data center is connect to the blockchain and a target application. A data usage request sent by the target application is received by the data center. In response to the data usage request, the local database is queried, by the data center, for requested data corresponding to the data usage request. The requested data is returned, by the data center, to the target application.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: March 16, 2021
    Assignee: Advanced New Technologies Co., Ltd.
    Inventor: Jiyuan Wang
  • Patent number: 10942717
    Abstract: A device may receive source code and identify, based on the source code, an abstract syntax tree representing an abstract syntactic structure of the source code. Based on the abstract syntax tree, the device may identify a closure, the closure implementing a function based on at least a portion of the abstract syntax tree. In addition, the device may perform an action based on the closure.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: March 9, 2021
    Assignee: Capital One Services, LLC
    Inventor: Behdad Forghani
  • Patent number: 10923114
    Abstract: Configuring computer memory including parsing digitized speech into a triples of a description logic; determining whether parsed triples are recorded in a general language triple store of the computer memory; determining whether parsed triples are recorded in a jargon triple store of the computer memory; and, if the parsed triples are recorded in neither the general language triple store nor the jargon triple store, recording the parsed triples in the jargon triple store.
    Type: Grant
    Filed: October 10, 2018
    Date of Patent: February 16, 2021
    Assignee: N3, LLC
    Inventor: Shannon L. Copeland
  • Patent number: 10922137
    Abstract: In one example, a central processing unit (CPU) with dynamic thread mapping includes a set of multiple cores each with a set of multiple threads. A set of registers for each of the multiple threads monitors for in-flight memory requests the number of loads from and stores to at least a first memory interface and a second memory interface by each respective thread. The second memory interface has a greater latency than the first memory interface. The CPU further has logic to map and migrate each thread to respective CPU cores where the number of cores accessing only one of the at least first and second memory interfaces is maximized.
    Type: Grant
    Filed: April 27, 2016
    Date of Patent: February 16, 2021
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Qiong Cai, Charles Johnson, Paolo Faraboschi
  • Patent number: 10901711
    Abstract: Methods, systems, and computer readable media for compiling concise expressive design patterns within computer software source code are described. Some implementations can include methods and systems that resolve some problems of implementing design patterns in an OO and/or AO program. The disclosed technique facilitates writing programs that apply design patterns to its structure and behavior, in an easy manner. Some programming language constructs (associated with new keywords, syntax, and semantics) are disclosed that convey the goal of some design patterns in order to allow programmers to implement design patterns simply and concisely. These constructs are added as extensions to a compiler and a compiler-based approach to concise expressive design pattern source code is described.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: January 26, 2021
    Assignee: KING FAHD UNIVERSITY OF PETROLEUM AND MINERALS
    Inventors: Taher Ahmed Ghaleb, Khalid Abdullah Aljasser, Musab A. Alturki
  • Patent number: 10901712
    Abstract: Methods, systems, and computer readable media for compiling concise expressive design patterns within computer software source code are described. Some implementations can include methods and systems that resolve some problems of implementing design patterns in an OO and/or AO program. The disclosed technique facilitates writing programs that apply design patterns to its structure and behavior, in an easy manner. Some programming language constructs (associated with new keywords, syntax, and semantics) are disclosed that convey the goal of some design patterns in order to allow programmers to implement design patterns simply and concisely. These constructs are added as extensions to a compiler and a compiler-based approach to concise expressive design pattern source code is described.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: January 26, 2021
    Assignee: KING FAHD UNIVERSITY OF PETROLEUM AND MINERALS
    Inventors: Taher Ahmed Ghaleb, Khalid Abdullah Aljasser, Musab A. Alturki
  • Patent number: 10877748
    Abstract: Computer software development has produced many advances within computer science and in most aspects of modern society. Even with modern quality control, bug finding, and other code checking applications, computer software is often less than ideal. A developer may write code that is functionally accurate but lacks security, documentation, speed, storage, reusability, or other element that may make a segment of software code less than ideal. Identifying equivalent code and, when found, replacing it with a vetted equivalent promotes the deployment of software that is more robust, secure, usable and reusable, and/or satisfies performance or other objectives.
    Type: Grant
    Filed: October 16, 2019
    Date of Patent: December 29, 2020
    Assignee: PHASE CHANGE SOFTWARE LLC
    Inventors: Steven Bucuvalas, Kevin Selker
  • Patent number: 10846431
    Abstract: A system for detecting breach of merchant systems includes an extraction management system for extracting wildcard data from a dump site at which stolen account data is offered for sale. The system also includes an account breach identifying system for accessing stored transaction data from multiple banks and merging the extracted dump site data with the transaction data to create unique PAN (primary account number) data records (each set of wildcard data corresponds to only a single PAN) and multiple PAN data records (each set of wildcard data corresponds to multiple PANs). The unique and multiple PAN data records are stored and analyzed separately, and reduce the amount of data needed to identify a breached merchant.
    Type: Grant
    Filed: April 16, 2018
    Date of Patent: November 24, 2020
    Assignee: First Data Corporation
    Inventor: Christopher M. Mascaro
  • Patent number: 10838903
    Abstract: An adapter card including a processing unit, an assigned memory and a system bus interface are disclosed. The system bus interface is connectable to at least one system bus of a primary computer system providing a connection to a number of at least one central processing units of the primary computer system, the number of at least one central processing units providing a plurality of processing entities. Configuration data stored in the assigned memory includes data defining all processing entities of all central processing units of the central computer system. The adapter card is operative to perform computations including: obtaining a system object representing a callable unit of a program from a program environment, transforming the system object into a plurality of threads, each thread being executable by one processing entity, assigning each thread to one processing entity, and transmitting each thread to the assigned processing entity for execution.
    Type: Grant
    Filed: February 2, 2018
    Date of Patent: November 17, 2020
    Assignee: Xephor Solutions GmbH
    Inventor: Konstantin Oppl
  • Patent number: 10831475
    Abstract: Assessing portability of source code based on predictions from a learning model trained with historical outputs from a portability analyzer. A request is received as input to assess portability of source code from a source environment to at least one target environment. The learning model is applied to the source code to predict a level of portability of the source code to the at least one target environment. Results from a portability analyzer that are based on the level of portability predicted by the learning model include a confidence measure associated with one or more portions of the source code indicating the ease of portability of the one or more portions of the source code to each of the at least one target environments.
    Type: Grant
    Filed: April 9, 2019
    Date of Patent: November 10, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Andrew Hicks, Miles C. Pedrone, Tynan J. Garrett, Michael Peter Lyons
  • Patent number: 10831458
    Abstract: Application source code that includes notation indicating a latency level between methods is evaluated. Based in part on the latency level, scores for method dependencies are calculated. A set of packages are generated for the methods in accordance with a clustering strategy that is based at least in part on the scores. The set of packages are then deployed to at least one host in accordance with an affinity threshold.
    Type: Grant
    Filed: November 5, 2018
    Date of Patent: November 10, 2020
    Assignee: Amazon Technologies, Inc.
    Inventor: Ronald Widharta Sunarno
  • Patent number: 10810065
    Abstract: Disclosed are systems, methods, and non-transitory computer-readable media for a self-learning and self-healing API platform. The API platform receives messages transmitted between computing systems according to an API designed to facilitate communications between the computing systems. The API includes a message sequence and schema for communications between the computing systems. If the API platform detects an occurrence of a modification trigger associated with the API, the API platform determines a modification to be performed to the API. The modification includes a change to the message sequence and schema of the API. The API platform automatically executes the modification, resulting in a revised API. Accordingly, subsequent messages transmitted between the computing systems are transmitted according to the revised API.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: October 20, 2020
    Assignee: SAP SE
    Inventor: Debashis Banerjee
  • Patent number: 10795653
    Abstract: Examples of the present disclosure provide apparatuses and methods for target architecture determination. An example method comprises receiving an indication of a type of target architecture in a portion of source code and creating compiled code for the type of target architecture based on the indication.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: October 6, 2020
    Assignee: Micron Technology, Inc.
    Inventor: John D. Leidel
  • Patent number: 10789252
    Abstract: Techniques related to efficient evaluation of aggregate functions are disclosed. Computing device(s) may perform a method for aggregating results of performing a multiplication on a first column and a second column of a database table. A first vector stores a subset of values of the first column. A second vector stores a corresponding subset of values of the second column. When it is determined that the first vector has a lower cardinality than the second vector, a third vector stores at least a first distinct value and a second distinct value of the first vector. A first set of one or more values of the second vector is determined, wherein each value of the first set of one or more values corresponds to the first distinct value in the first vector. A first multiplicand is generated based on performing a summation over the first set of one or more values.
    Type: Grant
    Filed: September 12, 2017
    Date of Patent: September 29, 2020
    Assignee: Oracle International Corporation
    Inventors: Shasank K. Chavan, Dennis Lui, Allison L Holloway, Sheldon A. K. Lewis
  • Patent number: 10785346
    Abstract: A thread of a client process may become blocked awaiting a reply to a message sent to a server process. Unblocking the client may include determining by the operating system that a timeout has expired without the server having replied to the message and then sending a request to the server process reply to the message to unblock the client. After sending the request for the server to reply to the message, the operating system may determine that the server has still not replied to the message after a further period has elapsed. If so, one or more actions related to the server process may be triggered. For example, a signal may be sent to the server process or the computer system may be rebooted.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: September 22, 2020
    Assignee: 2236008 Ontario Inc.
    Inventors: Brian John Stecher, Kaushik Thirukonda
  • Patent number: 10776143
    Abstract: A technique for assigning physical resources of a data processing system to a virtual machine (VM) includes reading, by a hypervisor executing on the data processing system, a fold factor attribute for the VM. The fold factor attribute defines an anticipated usage of physical resources of the data processing system by the VM. The technique also includes mapping based on a value of the fold factor attribute, by the hypervisor, allocated virtual processors of the VM to the physical resources to maximize processor core access to local memory for ones of the allocated virtual processors that are anticipated to be utilized.
    Type: Grant
    Filed: June 17, 2014
    Date of Patent: September 15, 2020
    Assignee: International Business Machines Corporation
    Inventors: Peter Joseph Heyrman, Bret Ronald Olszewski, Sergio Reyes
  • Patent number: 10776412
    Abstract: A method comprises defining a machine learning model corresponding to a plurality of layouts for content based on a plurality of target user types, processing the content to identify a theme of the content, generating at least one electronic document for the content based on the theme and at least one of the plurality layouts, analyzing a plurality of interactions of a user with the electronic document, wherein the plurality of interactions include one or more searches performed by the user to retrieve the electronic document, and/or one or more steps taken by the user to consume the content in the electronic document, identifying at least one pattern of the user corresponding to the retrieval and/or consumption of the content, and training the machine learning model based on the at least one pattern by applying one or more machine learning algorithms to data from the plurality of interactions.
    Type: Grant
    Filed: July 11, 2018
    Date of Patent: September 15, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Mainak Roy, Chitrak Gupta, Rathi Babu
  • Patent number: 10740127
    Abstract: A technique for assigning physical resources of a data processing system to a virtual machine (VM) includes reading, by a hypervisor executing on the data processing system, a fold factor attribute for the VM. The fold factor attribute defines an anticipated usage of physical resources of the data processing system by the VM. The technique also includes mapping based on a value of the fold factor attribute, by the hypervisor, allocated virtual processors of the VM to the physical resources to maximize processor core access to local memory for ones of the allocated virtual processors that are anticipated to be utilized.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: August 11, 2020
    Assignee: International Business Machines Corporation
    Inventors: Peter Joseph Heyrman, Bret Ronald Olszewski, Sergio Reyes
  • Patent number: 10732669
    Abstract: Serial peripheral interfaces and methods of operating the same are provided. An apparatus can have a serial peripheral interface (SPI) including a first command state machine (CSM), and a second CSM.
    Type: Grant
    Filed: August 3, 2017
    Date of Patent: August 4, 2020
    Assignee: Micron Technology, Inc.
    Inventor: Paolo E. Mangalindan
  • Patent number: 10721791
    Abstract: A system recommends the refactoring of microservices. The system generates a graph of connected nodes including a first node, which represents a first atomic part of code in a microservice in an application, and a second node, which represents a second atomic part of code in the microservice. The system determines a nodes connection score based on any connections between the first node and the second node. If the nodes connection score satisfies a nodes connection threshold, the system determines a relative code size based on comparing a size associated with the first atomic part of code against a size of the microservice. If the relative code size satisfies a code size threshold, the system outputs a recommendation to disconnect the first atomic part of code from the microservice, create another microservice in the application, and connect the first atomic part of code to the other microservice.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: July 21, 2020
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Roi Gamliel, Amihai Savir, Avitan Gefen
  • Patent number: 10705846
    Abstract: Embodiments are disclosed for inserting profiling instructions into graphics processing unit (GPU) kernels. An example apparatus includes an entry point detector to detect a first entry point address and a second entry point address of an original GPU kernel. An instruction inserter is to create a corresponding instrumented GPU kernel from the original GPU kernel by adding instructions of the original GPU kernel and one or more profiling instructions to the instrumented GPU kernel. The instruction inserter is to insert, at the first entry point address of the instrumented GPU kernel, a first jump instruction to jump to first profiling initialization instructions, the instruction inserter to insert, at the second entry point address of the instrumented GPU kernel, a second jump instruction to jump to second profiling initialization instructions. The instruction inserter is to insert profiling measurement instructions of the profiling instructions into the instrumented GPU kernel.
    Type: Grant
    Filed: August 15, 2018
    Date of Patent: July 7, 2020
    Assignee: Intel Corporation
    Inventors: Konstantin Levit-Gurevich, Orr Goldman
  • Patent number: 10705967
    Abstract: The present disclosure is directed to systems and methods of implementing a neural network using in-memory mathematical operations performed by pipelined SRAM architecture (PISA) circuitry disposed in on-chip processor memory circuitry. A high-level compiler may be provided to compile data representative of a multi-layer neural network model and one or more neural network data inputs from a first high-level programming language to an intermediate domain-specific language (DSL). A low-level compiler may be provided to compile the representative data from the intermediate DSL to multiple instruction sets in accordance with an instruction set architecture (ISA), such that each of the multiple instruction sets corresponds to a single respective layer of the multi-layer neural network model. Each of the multiple instruction sets may be assigned to a respective SRAM array of the PISA circuitry for in-memory execution.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: July 7, 2020
    Assignee: Intel Corporation
    Inventors: Amrita Mathuriya, Sasikanth Manipatruni, Victor Lee, Huseyin Sumbul, Gregory Chen, Raghavan Kumar, Phil Knag, Ram Krishnamurthy, Ian Young, Abhishek Sharma