Including Graph Or Tree Representation (e.g., Abstract Syntax Tree Or Ast) Patents (Class 717/144)
  • Patent number: 7472132
    Abstract: A method, system and computer-usable medium for attributing memory usage are presented. The method includes the steps of creating an object graph of a portion of a memory heap, wherein the object graph includes nodes that represent objects and associated properties of the objects, and wherein the object graph includes connectors that represent relationships between the objects in the memory heap; observing nodes in one or more subgraphs of the object graph, wherein the nodes represent objects that are selected for observation by a pre-determined criteria; searching for characteristic node properties of nodes that are sampled, from the subgraph, for observation; searching for characteristic topological properties of the subgraph that sampled nodes participate in; and applying a set of pre-determined domain-specific pattern matching filters to the node characteristic properties and the topological characteristic properties to attribute memory usage to a proper software component in a system.
    Type: Grant
    Filed: May 4, 2006
    Date of Patent: December 30, 2008
    Assignee: International Business Machines Corporation
    Inventors: Wing Hong Ho, Johannes Christiaan Laffra
  • Patent number: 7472379
    Abstract: A workflow application is represented by a graph comprising a plurality of components, some of which may be processes. At least two of the processes are interpreted according to different respective sets of rules. The sets of rules are implemented in either a plurality of respective navigation engines or in a single engine implementing multiple sets of rules.
    Type: Grant
    Filed: March 7, 2002
    Date of Patent: December 30, 2008
    Assignee: International Business Machines Corporation
    Inventors: Amanda E. Chessell, Vernon M. Green, Catherine S. Griffin, David J. Vines
  • Patent number: 7472382
    Abstract: Inter-procedural strength reduction is provided by a mechanism of the present invention to optimize software program. During a forward pass, the present invention collects information of global variables and analyzes the information to select candidate computations for optimization. During a backward pass, the present invention replaces costly computations with less costly or weaker computations using pre-computed values and inserts store operations of new global variables to pre-compute the costly computations at definition points of the global variables used in the costly computations.
    Type: Grant
    Filed: August 30, 2004
    Date of Patent: December 30, 2008
    Assignee: International Business Machines Corporation
    Inventors: Roch Georges Archambault, Shimin Cui, Raul Esteban Silvera
  • Patent number: 7469403
    Abstract: A static datarace detection method (and apparatus) for multithreaded applications includes inputting a set of input information including a multithreaded context graph (MCG) representation of a multithreaded application, processing the set of input information, and outputting a statement conflict set (SCS). The SCS is a set of statement pairs that may exhibit dataraces. The processing of the set of information includes initializing a synchronization object set for each of a plurality of MCG nodes, performing a nested traversal on the MCG to identify pairs of MCG nodes which are not mutually synchronized, and examining each pair of MCG nodes which are not mutually exclusive to determine if pairs of statements in the nodes represent a datarace by considering objects that can be accessed by the statements.
    Type: Grant
    Filed: January 2, 2002
    Date of Patent: December 23, 2008
    Assignee: International Business Machines Corporation
    Inventors: Jong-Deok Choi, Alexey Loginov, Vivek Sarkar
  • Patent number: 7464375
    Abstract: There is disclosed a method for flattening hierarchically structured flows using a breadth-first approach. At each level of hierarchy of a hierarchically structured source flow, complex nodes are flattened by one level across the entire breadth of the flow. The results of this flattening are placed in a target flow, and any connections that existed in the source flow are re-established in the target flow in such a way that any data input into the target flow will be processed as if it had been input into the source flow. After a processing iteration, if there are still complex nodes remaining in the target flow, the target flow becomes the next source flow, and the process is repeated until the flow has been completely flattened.
    Type: Grant
    Filed: June 24, 2004
    Date of Patent: December 9, 2008
    Assignee: International Business Machines Corporation
    Inventor: Hamzeh Zawawy
  • Patent number: 7461370
    Abstract: A system for processing regular expressions containing one or more sub-expressions. Information regarding one or more regular expressions, each containing one or more sub-expressions, is stored. Data is compared to the stored information regarding expressions in only a single pass through the data. From the comparison, for any stored expression, the location within the data of the beginning and end of each sub-expression, and the end of the regular expression, are determined. From such determination, the presence within the data of any one or more stored regular expressions containing one or more sub-expressions is identified.
    Type: Grant
    Filed: February 7, 2003
    Date of Patent: December 2, 2008
    Assignee: SafeNet, Inc.
    Inventors: Daniel Wyschogrod, Leonid Leibman
  • Patent number: 7458068
    Abstract: A vertical requirements development method is provided for developing requirements for a system to be developed. The system to be developed includes top-level requirements and is representable by a program specification tree made up of multiple layers of individual system elements, with each lower layer of the multiple layers comprising individual system elements having lower level requirements associated therewith compared to an upper layer. The method includes the steps of identifying, based on the top-level requirements, a plurality of system level requirements analyses which, upon satisfaction, comply with the top-level requirements; and for each system level requirements analysis, allocating specification requirements to each of the individual system elements that contribute to the satisfaction of that system level requirements analysis, regardless of the level of the individual system elements that contribute in the program specification tree.
    Type: Grant
    Filed: December 20, 2004
    Date of Patent: November 25, 2008
    Assignee: Raytheon Company
    Inventor: Robert Scott Brown
  • Patent number: 7426721
    Abstract: A virtual machine (e.g. the Java Virtual Machine (JVM)) may include extensions for compiling objects (e.g. Java Objects) into data representation language (e.g. XML) representations of the objects, and for decompiling representations of objects into objects. The virtual machine may supply an API to the compilation/decompilation extensions. The compiler/decompiler API may accept an object as input, and output a data representation language representation of the object and all its referenced objects (the object graph) in a data stream. In addition, the compiler/decompiler API may accept a data stream, which includes a representation of the object and all its referenced objects (the object graph), and output the object (and all the objects in its object graph). In one embodiment, an intermediary format may be used to represent a data representation language document and may be dynamically processed to generate a class instance from the data representation language document.
    Type: Grant
    Filed: September 15, 2000
    Date of Patent: September 16, 2008
    Assignee: Sun Microsystems, Inc.
    Inventors: Thomas E. Saulpaugh, Gregory L. Slaughter, Bernard A. Traversat, Michael J. Duigou, Mohamed M. Abdelaziz
  • Publication number: 20080216062
    Abstract: There is disclosed a method and system for configuring a data dependency graph (DDG) to handle instruction scheduling in computer architectures permitting dynamic by-pass execution, and for performing dynamic by-pass scheduling utilizing such a configured DDG. In accordance with an embodiment of the invention, a heuristic function is used to obtain a ranking of nodes in the DDG after setting delays at all identified by-pass pairs of nodes in the DDG to 0. From among a list of identified by-pass pairs of nodes, a node that is identified as being the least important to schedule early is marked as “bonded” to its successor, and the corresponding delay for that identified node is set to 0. Node rankings are re-computed and the bonded by-pass pair of nodes are scheduled in consecutive execution cycles with a delay of 0 to increase the likelihood that a by-pass can be successfully taken during run-time execution.
    Type: Application
    Filed: May 7, 2008
    Publication date: September 4, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Alexander Vasilevskiy, Marcel Mitran
  • Patent number: 7412697
    Abstract: A high-level language, architecture-independent probe program compiler is disclosed. A base program is executable by one or processors, and has one or more breakpoints. A probe program is associated with each breakpoint and is also indirectly executable by the one or more processors. The probe program is independent of the architecture of the processors, and is generated from source code written in a high-level language. The probe program associated with each breakpoint is executed when the breakpoint is reached during execution of the base program. The compiler may employ an abstract syntax tree to switch between an address space of the probe program and an address space of the base program, by traversing the tree. Some of the nodes of the tree may more simply represent address space-specific objects of the base program. The probe program may be able to pass messages by manipulating the state of the base program.
    Type: Grant
    Filed: June 25, 2003
    Date of Patent: August 12, 2008
    Assignee: International Business Machines Corporation
    Inventors: Richard J. Moore, Thomas R. Zanussi
  • Patent number: 7409679
    Abstract: The present invention is directed to a system and methods for analyzing dependencies. The dependencies that may be analyzed include, for example, dependencies among methods or procedures in software source code, or in system configuration or deployment. A layered system is provided, comprising a back-end layer, abstraction layer and user interface layer are used to derive dependency information from third-party tools, and present the information through uniform interfaces to a user-interface layer. The system maintains a dependency model as a hierarchical graph structure in computer memory, and provides a plurality of user views which may be manipulated actively or passively by the user. Active manipulations are propogated through the back-end layer to modify the system analyzed, and passive manipulations affect the user views without changing the analyzed system. The system provides advantages to users seeking to understand complex systems with many dependencies.
    Type: Grant
    Filed: December 20, 2000
    Date of Patent: August 5, 2008
    Assignee: Headway Research Limited
    Inventors: Christopher Chedgey, Brendan O'Reilly
  • Publication number: 20080178164
    Abstract: Described are a method, system and apparatus for the association of an existing process with a reference process and ontology so that the process may be manipulated to the advantage of the process owner. Specifically, once integrated and associated into the process ontology repository and the process graph repository the invention describes how the processes can be expressed so as to show the relationship between process elements at different levels; permit queries against them; provide a way to find similar process elements based on the ontology; facilitate the creation of transformation plans that express how divergent processes can be converged based on similarities identified by the process analysis; associate processes to canonical workflow elements; and retarget process workflows to different workflow engines based on these associations.
    Type: Application
    Filed: January 22, 2007
    Publication date: July 24, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Aaron B. Brown, Melissa J. Buco, Joseph L. Hellerstein, Christopher Ward
  • Patent number: 7403941
    Abstract: Searching a database involves creating an access structure including a first tree data structure having a root node and at least one child node. Each child node is associated with match data corresponding to a data value of a field of a database record. Leaf child nodes of the first tree data structure include a link to another tree data structure in the access structure. Leaf child nodes of a further tree data structure include a link to a database record. The tree structures are traversed and scores are computed for the paths traversed that reflect the level of matching between the match pattern data of the nodes in a path and a search request to identify a database record that best matches the request.
    Type: Grant
    Filed: April 25, 2005
    Date of Patent: July 22, 2008
    Assignee: Novauris Technologies Ltd.
    Inventors: Mark D. Bedworth, Gary D Cook
  • Publication number: 20080172660
    Abstract: The present invention relates to the field of computer programming. More specifically the invention relates to a method and a data processing system for editing the source code of a computer program. It is an object of the present invention to provide an easy source code editing technique, by which programming errors and type errors can reliably be avoided in cases where changes to the program are supposed not to change the semantics of the program. This object is achieved according to the invention by a method for editing source code, the method comprising the steps of: receiving a modification to the source code, said modification being made by a user, determining whether the modification would change the semantics of the source code, and handling the modification depending on the result of the determining step.
    Type: Application
    Filed: January 16, 2008
    Publication date: July 17, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Andreas Arning, Friedemann Schwenkreis
  • Patent number: 7398520
    Abstract: Intermediate representations of computer code are efficiently generated. More particularly, methods described herein may be used to construct a static single assignment representation of computer code without unnecessary phi-function nodes. Potentially necessary phi-function node assignments may be analyzed to determine whether they directly reach a non-phi use or a necessary phi-use of a corresponding variable. Those that ultimately reach such a use may be determined to be necessary and a pruned static single assignment may be constructed by including those potentially necessary phi-functions determined to be in fact necessary. Also, some phi-function nodes may be determined to be necessary based on their dependency relationship to other phi-functions previously determined to be necessary (e.g., because they directly reach a non-phi use). A phi-function dependency graph may be used to record dependency relationships between phi-function nodes.
    Type: Grant
    Filed: June 7, 2004
    Date of Patent: July 8, 2008
    Assignee: Microsoft Corporation
    Inventors: Vinod K. Grover, Weiping Hu
  • Patent number: 7392512
    Abstract: A method and system automatically converts a Wireless Internet Protocol (WAP) Client Provisioning (CP) objects to Open Mobile Alliance (OMA) Device Management (DM) objects. WAP CP is enabled according to XML (eXtensible Markup Language) and defines a standard way to bootstrap mobile device's connectivity settings and application protocol access parameters using XML. OMA DM is also enabled according to XML and provides similar functionality, but is organized according to a mandated tree structure. The present invention automatically converts vendor specific parameters from WAP CP to OMA DM such that the vendor specific parameters are more easily managed by an OMA DM server and client.
    Type: Grant
    Filed: May 27, 2004
    Date of Patent: June 24, 2008
    Assignee: Microsoft Corporation
    Inventor: Yuhang Zhu
  • Patent number: 7392264
    Abstract: The present invention is directed to providing a higher degree of association between nodes and links in a graph by creating data structures (spiders) that provide views into graphs that transcend the relatively static association of a conventional graph. A spider's variables bind to any number of nodes and links in the graph, enabling all of the bound nodes and links by addressing the spider. By adding constraints on the extent or degree of binding in a spider to a graph, a subset of the graph is identified. The spider can then used to address the subset of the graph as constrained by the spider. A spider can bind to a link in order to identify a parent/child structural subset of the graph. More specifically a spider is a collection of variables that create a template or pattern and bind to the nodes and links in the graph. A spider traverses a graph by binding its variables to various nodes and links in the graph.
    Type: Grant
    Filed: January 31, 2005
    Date of Patent: June 24, 2008
    Assignee: Microsoft Corporation
    Inventors: Robert William Lord, Christopher Allen Suver
  • Patent number: 7379862
    Abstract: A method and apparatus for analyzing and debugging natural language parses is provided. An input sentence is received and parsed by a parsing engine. A table of constituents is retrieved from the parsing engine and a grid tree is drawn representing the input sentence. Nodes of the tree, or connecting points, appear at intersections of the tree “branches.” Once the grid has been drawn, the first syntactically correct parse of the sentence is mapped to the grid in a tree-like manner (the “parse tree”). Input is then received for selecting one of several graphical buttons, for selecting a node that is in the parse tree, for selecting a node that is not in the parse tree, or for selecting options from one of several “pull-down” menus. If a connecting point that is not contained in the parse tree is selected, a group of menu options may be displayed adjacent to the selected connecting point.
    Type: Grant
    Filed: November 19, 1999
    Date of Patent: May 27, 2008
    Assignee: Microsoft Corporation
    Inventors: Su Chin Chang, Hajime Wada
  • Patent number: 7380234
    Abstract: A method for implementing virtual bases with fixed offsets in a class hierarchy graph, having nodes representing object classes and edges representing immediate inheritance therebetween, corresponding to an object oriented program includes determining whether a set N including all nodes is empty. A node x is removed from N, when N is not empty. It is determined whether a set Y is empty, Y including nodes that directly and virtually inherit from x. When Y is empty, return to determining whether N is empty, otherwise a node y is removed from Y. It is determined whether y is duplicated. When y is duplicated, return to determining whether Y is empty, otherwise an edge e, representing that y virtually inherits from x, is replaced with an edge e?, representing that x has a fixed offset with respect to y. Upon replacing e, return to determining whether N is empty.
    Type: Grant
    Filed: March 24, 2004
    Date of Patent: May 27, 2008
    Assignee: International Business Machines Corporation
    Inventors: Joseph Gil, Peter F. Sweeney
  • Publication number: 20080120608
    Abstract: A method and apparatus for generating a statistical tree representing an extensible markup language Schema (XSD) is disclosed. Components of the XSD are prioritized according to predefined rules. A root node representing the XSD is created. Pairs of child nodes are generated from the root node. Each pair comprises at least one genuine node, and each pair of generated child nodes is appended to a parent node which is a genuine node. The path to each of the child nodes from a respective parent genuine node is represented with a binary sequence. At least one genuine node is allocated to a corresponding component of the XSD, the allocation being based on the prioritization of the component. Methods, apparatus and computer program products for generating a statistical tree representing XSD, for encoding an extensible markup language (XML) document utilizing a statistical tree representing XSD, and for decoding an XML document represented by a binary encoded sequence also are disclosed.
    Type: Application
    Filed: November 17, 2006
    Publication date: May 22, 2008
    Inventors: Rohit Shetty, Umesh Kumar Balaraj
  • Patent number: 7376939
    Abstract: Electronic design automation tool specifies an architecture at a system level and its component (which include intellectual property (IP) cores like embedded processors, arithmetic logic units (ALU), multipliers, dividers, embedded memory element, programmable logic cells, etc.); specifies IP-cores and their interface; and understands IP-cores and functions via their interface. Further, techniques are provided for modeling the timing behavior of a function or functional block without drawing a timing diagram; understanding the interface behavior of a function block which captures the timing waveforms; specifying virtual functions which are built using basic functional units and their timing behavior; parsing and creating an internal graphical form for analyzing a specification for compilation; matching the components in the architecture specification and their instantiation to map the computations in the input graph produced from an application; and mapping the specification onto the target's components.
    Type: Grant
    Filed: February 7, 2002
    Date of Patent: May 20, 2008
    Assignee: Xilinx, Inc.
    Inventors: Anshuman Nayak, Malay Haldar, Alok Choudhary, Vikram Saxena, Prithviraj Banerjee
  • Patent number: 7370321
    Abstract: A byte code reader provides verification while optimizing and creating an internal SSA form to allow efficient machine code generation. Many functions are combined in one component honoring the difficult time constraints of just-in-time translation. This reader is engineered for retargeting and thus expedites the implementation of a JIT for any platform. The reader takes two single passes over the byte codes: a first pass that builds a flow graph using any set of rules for node creation, and maps definitions from the byte codes onto the flow graph nodes, and a second pass that translates whatever is in the byte codes into optimized machine code (or a traditional compiler intermediate form) with an embedded SSA graph. Global verification and global optimization are implemented while reading. Two data structures and a main program loop are provided. The data structures are used to allow the creation of a flow graph, and an exception handling (EH) graph.
    Type: Grant
    Filed: November 14, 2002
    Date of Patent: May 6, 2008
    Assignee: Microsoft Corporation
    Inventor: Jim Radigan
  • Publication number: 20080082962
    Abstract: Methods and apparatus, including computer program products, for a user interface for defining a text file transformation. A method of processing a text file includes retrieving the text file, displaying the text file and a tree structure showing processing commands, and performing a set of visual editing operations to extract given portions of the text file while discarding other text, characters or white space, the displayed tree structure updated to include all processing commands representative of the visual editing operations. The method can include previewing the results of and/or debugging the editing operations using the displayed processing commands in the tree structure.
    Type: Application
    Filed: September 29, 2006
    Publication date: April 3, 2008
    Inventors: Alexander Falk, Vladislav Gavrielov
  • Patent number: 7346899
    Abstract: In an embodiment of the present invention, at a Deployer level, an application software component is provided with a tree representation 510 of objects it contains. An object is a leaf node, with the attributes of the object being in nexus between the root and the leaf node. An accessor object 511 has methods to access the tree 510. In one embodiment of the present invention, at an administrator level, a handler object 611 in turn accesses accessor object 511. Handler object 611 may be part of a handler home object 619. Client applications 710 have lookup services 711 to access handler objects like 611, e.g. via a lookup home object 719, and handler home object 619.
    Type: Grant
    Filed: November 3, 2003
    Date of Patent: March 18, 2008
    Assignee: Sun Microsystems, Inc.
    Inventors: Christophe Ebro, Vincent Perrot, Daniel Lutoff
  • Patent number: 7340728
    Abstract: The invention relates to a method, system and apparatus for the direct execution of XML-documents by means of decoration of a XML-document, a document type definition (DTD) or their representation as structure tree, respectively, with textual or graphical flow charts. The structure of the XML-document' is reused for, and integrated with, the code processing the XML document.
    Type: Grant
    Filed: August 1, 2001
    Date of Patent: March 4, 2008
    Assignee: Applied Formal Methods Institute
    Inventor: Philipp W. Kutter
  • Patent number: 7334218
    Abstract: The invention relates to a method for adaptively assigning of a plurality of data management application instances (DM instances) building up a data management application (DM application) to a plurality of data objects (folders, files, data extents or parts of files, or other logical grouped data) organized in a tree structure, the method comprising the steps of: providing sets of separation points for each of the DM instances, each separation point defining at least one sub-section of the tree which is assigned to the corresponding DM instance to perform a data management task, storage of history data being descriptive of the data objects which have been affected by a previous data management task, determining a processing load for past data management tasks of each of the DM instances based on the history data, adapting the separation points in the tree for balancing the processing loads of the DM instances of future data management tasks.
    Type: Grant
    Filed: August 29, 2003
    Date of Patent: February 19, 2008
    Assignee: International Business Machines Corporation
    Inventors: Jens-Peter Akelbein, Ute Schroefel
  • Patent number: 7334223
    Abstract: Method for automatically migrating power builder application to an open architecture is disclosed. The method includes converting to ASCII character format stream, parsing the stream to form constructs, generating a model from the constructs, analyzing the model and building trees in the model in the power builder format. The apparatus of the invention includes a schema of trees, one set, representing trees in the power builder format and another set in the selected open architecture format and a set of mappings defining correspondence between the two sets. Trees in one set are transformed into the other and attached in the model. An Unparser is provided having a class generator which generates classes including a global variable class in the open architecture and the classes are filled with the help of the parser and a model traverser by querying and responses thereto.
    Type: Grant
    Filed: January 18, 2005
    Date of Patent: February 19, 2008
    Assignee: Tata Consultancy Services, Ltd.
    Inventors: Shrawan Kumar, Arun Gajanan Bahulkar, Anita Pramod Nanadikar, Pavan Sabharwal
  • Publication number: 20080028377
    Abstract: A semiconductor device has an arithmetic processing circuit provided with an arithmetic circuit and a control circuit and a memory circuit provided with a ROM and a RAM, where the arithmetic processing circuit and the memory circuit are connected to each other through an address bus and a data bus, a machine language program executed using the arithmetic processing circuit is stored in the ROM, the RAM has a plurality of banks, processing data obtained by executing the machine language program is divided into a plurality of stacks to be written to the plurality of banks, and the arithmetic processing circuit is operated in accordance with the machine language program so that, in the plurality of stacks stored in the plurality of banks, a stack of which data is not used until the machine language program is terminated is omitted and contiguous stacks are written to the same bank.
    Type: Application
    Filed: July 25, 2007
    Publication date: January 31, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroki Dembo, Yoshiyuki Kurokawa, Masami Endo
  • Publication number: 20080010632
    Abstract: Embodiments of the present invention address deficiencies of the art in respect to processing markup language documents and provide a method, system and computer program product for processing large relationship-specifying markup language documents. In an embodiment of the invention, a method can be provided for processing large relationship-specifying markup language documents. The method can include generating an index of nodes each node corresponding to a clause in the markup language document, processing the index in lieu of the markup language document, identifying clauses referenced within the index to be written to a database and extracting the identified clauses from the markup language document and writing the extracted clauses to the database.
    Type: Application
    Filed: June 23, 2006
    Publication date: January 10, 2008
    Applicant: International Business Machines Corporation
    Inventors: Kevin M. Kingsbury, David G. Robinson
  • Patent number: 7316011
    Abstract: An exemplary method includes parsing metadata associated with at least a portion of source code to construct a truncated parse tree; selecting a segment of the truncated parse tree; parsing metadata associated with the selected segment to construct one or more additional parse tree branches; and analyzing the truncated parse tree and the one or more additional parse tree branches. Such an exemplary method optionally includes generating code based, at least in part, on the analyzing and/or optionally includes purging or overwriting memory associated with the one or more additional parse tree branches. Other exemplary methods, devices and/or systems are also disclosed.
    Type: Grant
    Filed: October 10, 2002
    Date of Patent: January 1, 2008
    Assignee: Microsoft Corporation
    Inventors: Sadagopan Rajaram, Devidas Joshi, P. Vasantha Rao
  • Publication number: 20070294678
    Abstract: A method and apparatus is provided for partial evaluation of XML queries for program analysis. An executable version of a first body of instructions that conforms to an XML computer language, such as XSLT, is generated. The executable version may include trace instructions for collecting information about executing the executable version against representative data, such as an XML schema document. This execution causes the generation of an execution graph, which may be optimized by the collected information. Based on the execution graph, a second body of instructions is generated that conforms to a different computer language, such as XQuery. Subsequently, the second body of instructions may be applied against XML documents that conform to the same schema as the representative data. By generating the second body of instructions before source XML documents are received, several optimizations may be made that greatly decrease the time for querying and/or transforming XML documents.
    Type: Application
    Filed: June 20, 2006
    Publication date: December 20, 2007
    Inventor: Anguel Novoselsky
  • Patent number: 7305409
    Abstract: The present invention is directed to providing a higher degree of association between nodes and links in a graph by creating data structures (spiders) that provide views into graphs that transcend the relatively static association of a conventional graph. A spider's variables bind to any number of nodes and links in the graph, enabling all of the bound nodes and links by addressing the spider. By adding constraints on the extent or degree of binding in a spider to a graph, a subset of the graph is identified. The spider can then used to address the subset of the graph as constrained by the spider. A spider can bind to a link in order to identify a parent/child structural subset of the graph. More specifically a spider is a collection of variables that create a template or pattern and bind to the nodes and links in the graph. A spider traverses a graph by binding its variables to various nodes and links in the graph.
    Type: Grant
    Filed: October 14, 2003
    Date of Patent: December 4, 2007
    Assignee: Microsoft Corporation
    Inventors: Robert William Lord, Christopher Allen Suver
  • Patent number: 7305667
    Abstract: Described herein are techniques that allow applications developed in non-object oriented languages, such as C, to interact with DOM trees implemented under different DOM implementations. An application accesses different DOM implementations through a set of function pointers that conform to a set of function signatures. The set of function pointers may be stored in a data structure defined to have member function pointers that point to functions that conform to the set of function signatures. The set of function signatures define a common interface through which applications may interact with a variety of DOM implementations. One or more applications generate the set of function pointers and store them in a data structure. The other applications register the function pointers with an application by, for example, passing a pointer to the data structure to the application.
    Type: Grant
    Filed: June 13, 2002
    Date of Patent: December 4, 2007
    Assignee: Oracle International Corporation
    Inventors: Tomas Saulys, Sheng-Yih Guan, Ian Macky, Bhushan Khaladkar, Deepak Agrawal
  • Publication number: 20070277163
    Abstract: Disclosed herein, a method of automatically verifying software code is provided. The method may include generating a logic representation of the software code, identifying a set of well-defined formula sequences in the logic representation of the software code, and verifying the software code based on the set of well-defined formula sequences. Exemplary embodiments of the verification method verify completeness and consistency of the software code and ensure complete code coverage.
    Type: Application
    Filed: May 24, 2007
    Publication date: November 29, 2007
    Applicant: Syver, LLC
    Inventor: Dimiter R. Avresky
  • Patent number: 7302679
    Abstract: One embodiment disclosed relates to a method of compiling a computer program from a plurality of files of source code. An inline analysis determines which call sites in the plurality of files to make inline. An inline transformation performs the inlining within currently opened files. The transformer dynamically determines the order of inlines independent of the analyzer by taking into account the disk input-output pressure during compilation. The resulting inline order minimizes the input and output of files from and to disk respectively by considering the inline affinity between files and maintains the best run-time performance by preserving the dependences between call sites. During the inline transformation, a determination of which files to open and close is made in dependence on an affinity weighting between the files.
    Type: Grant
    Filed: October 31, 2003
    Date of Patent: November 27, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Dhruva Ranjan Chakrabarti, Shin-Ming Liu
  • Patent number: 7302678
    Abstract: An application system includes a first process configured to execute an application program, wherein the application program is operable to use a set of data structures. The application system also includes a second process configured to interpret a markup language document. A transformation template is configured to specify a symmetric mapping between the markup language document and the set of data structures. A transformation virtual machine runs in association with the first process and is operable to execute the transformation template. The transformation virtual machine is operable to perform a symmetric transformation between the markup language document and the set of data structures to allow the first process and the second process to exchange information.
    Type: Grant
    Filed: September 10, 2003
    Date of Patent: November 27, 2007
    Assignee: SAP Aktiengesellschaft
    Inventors: Karsten K. Bohlmann, Andreas Blumenthal, Stefan O. Bresch, Christian Stork, Christoph H. K. Wedler, Volker Wiechers
  • Publication number: 20070266380
    Abstract: Embodiments of the present invention address deficiencies of the art in respect to XML schema validation and provide a method, system and computer program product for optimized XML schema validation and XML document parsing. In one embodiment, an XML data processing system can include shared memory; an XML co-processing proxy comprising program code enabled to receive at least one of XML document schema validation and XML document parsing requests from client applications, and at least one XML processing element coupled to the shared memory. In particular, the XML processing element can be configured to perform the at least one of the XML schema validation and XML document parsing on XML documents provided by the XML co-processing proxy. The XML processing element further can be configured to place results of XML schema validation or the XML document parsing in the shared memory.
    Type: Application
    Filed: May 9, 2006
    Publication date: November 15, 2007
    Applicant: International Business Machines Corporation
    Inventors: Thomas E. Creamer, Curtis E. Hrischuk
  • Patent number: 7296264
    Abstract: A system and method for code completion, comprising providing a representation of a first program in a first programming language, establishing a location in the first program, associating the location with a representation of the first program, obtaining code completion information relevant to the location in the first program based on the representation of the first program, and wherein the obtaining occurs at the behest of an extensible compiler framework.
    Type: Grant
    Filed: October 3, 2003
    Date of Patent: November 13, 2007
    Assignee: BEA Systems, Inc.
    Inventors: Kevin Zatloukal, Tim A. Wagner
  • Patent number: 7296261
    Abstract: A method for determining changed code in a second program binary relative to a first or baseline program binary, where the second program is a different version of the first program, includes translating, responsive to symbol tables and/or control flow representations, machine addresses of both program binaries to symbols. The first and second program binaries are disassembled using the translated symbols. Differences between the two resulting disassemblies are determined, and a list of the differences is created. Differences between the program binaries can be determined by textually comparing the disassemblies, or alternatively, by determining the differences between the control flow representations of the programs. The list of differences can be presented to a user, or alternatively, can be passed to another process for further processing, such as test coverage analysis, code change analysis, or failure analysis, among other analyses.
    Type: Grant
    Filed: June 4, 2004
    Date of Patent: November 13, 2007
    Assignee: VERITAS Operating Corporation
    Inventors: Emmett Witchel, Christopher D. Metcalf, Andrew E. Ayers
  • Publication number: 20070250823
    Abstract: This invention has as its object to provide an information processing apparatus which can process an event generated upon changing an attribute value at high speed. This invention is directed to an information processing apparatus which parses an XML document and converts it into a DOM tree, and has the following characteristic, feature. Upon reception of an operation instruction by the user (step S312), it is checked if the instruction is an instruction including a change of an attribute value (step S313). If it is determined that the instruction is the instruction including the change of the attribute value, type information of the attribute value is acquired, and an event that describes the type information and the instruction contents is generated (steps S315-S318). An event handler processes the instruction contents in accordance with the type information (step S322).
    Type: Application
    Filed: April 23, 2007
    Publication date: October 25, 2007
    Inventor: Masahiko Kono
  • Patent number: 7281241
    Abstract: A system and method for visualization and debugging of constraint systems and for constraint resolution. The present invention features a systematic, graphical representation that relates generation objects and generation decisions, preferably for example as a simple, two dimensional chart. The representation of relationships between generation entities and generation decisions, and the order in which generation decisions are made, help the user to identify and solve generation problems.
    Type: Grant
    Filed: January 15, 2002
    Date of Patent: October 9, 2007
    Assignee: Cadence Design (Israel) II Ltd.
    Inventors: Eyal Benoudiz, Guy Baruch
  • Patent number: 7280877
    Abstract: A facility control monitor method and a facility control monitor apparatus capable of visually tracing a control logic and easily finding a cause of an operation trouble caused by the control logic. The facility control monitor method monitors control performed by a control device included in a facility having a controllable device, the control device for controlling the controllable device, a setting device for transmitting a setting control value to the control device, and a sensor for transmitting an operation state measurement value of the controllable device to the control device. Processes of control performed by the control device are stored. When an arbitrary date and time is specified by a trace controller (35), predetermined control steps of the specified date and time and after are displayed in a flowchart on a control flow display unit.
    Type: Grant
    Filed: April 8, 2004
    Date of Patent: October 9, 2007
    Assignee: Kajima Corporation
    Inventors: Masaki Shioya, Noriyasu Sagara, Yuji Tsubota
  • Patent number: 7272828
    Abstract: Methods and apparatus for identifying a type of a software object are disclosed. The methods and apparatus encode data associated with the software object based at least in part on the type of the software object and compare the encoded data with a value associated with a target object type to identify the type of the software object.
    Type: Grant
    Filed: November 27, 2002
    Date of Patent: September 18, 2007
    Assignee: Intel Corporation
    Inventors: Gansha Wu, Guei-Yuan Lueh
  • Patent number: 7266766
    Abstract: A method for simplifying the development, testing and maintenance of code objects that may be used, for example, to generate custom web page content. According to the invention, a developer isolates a given task, generates code for the task, and then provides a means by which a page-generating Java servlet can access that code at request time. The code may be generated at any time, and the servlet preferably is generated at translation time, i.e. when a request for the page is first made at a server. In a preferred embodiment, the code for the task is supported within a given method of a Java tagbean.
    Type: Grant
    Filed: September 30, 1999
    Date of Patent: September 4, 2007
    Assignee: International Business Machines Corporation
    Inventors: Christopher Shane Claussen, Matthew Dale McClain
  • Patent number: 7263691
    Abstract: A method for parsing structured data has the steps of: receiving input data in a first computer language; generating a plurality of tokens according to the input data; building a context by using a grammar syntax comprising a set of rules, the context comprising a plurality of context steps in the form of at least one or more chains of context steps, the step of building the context comprising the sub-steps of: detecting if according to the grammar syntax a token is allowable in the context; and if the token is allowable, creating a new context step corresponding to the token, and the further steps for recovering an unallowable token: identifying a suitable context for the unallowable token in which context the token is allowable; and applying the token in the identified suitable context.
    Type: Grant
    Filed: January 30, 2002
    Date of Patent: August 28, 2007
    Assignee: Nokia Corporation
    Inventor: Tuomo Vehkomäki
  • Patent number: 7257808
    Abstract: A system and method to reduce the size of source code in a processing system are described. Multiple subgraph structures are identified within a graph structure constructed for multiple source code instructions in a program. Unifiable variables that are not simultaneously used in the source code instructions are identified within each subgraph structure. Finally, one or more unifiable instructions from a tine of a corresponding subgraph structure are transferred to a handle of the corresponding subgraph structure, each unifiable instruction containing one or more unifiable variables.
    Type: Grant
    Filed: January 3, 2002
    Date of Patent: August 14, 2007
    Assignee: Intel Corporation
    Inventor: Arch D. Robison
  • Patent number: 7243335
    Abstract: A method and system is provided for allowing designers, who are primarily concerned with the look and feel of the program, to modify the dialogs in an application being developed without having to rely on the developers to generate executable code in each iteration. Intelligent defaults for parameters that are either not specified in a resource definition or governed by a common style specification are provided to facilitate switching from one dialog element to another without requiring that all of the parameters be specified again.
    Type: Grant
    Filed: February 17, 2000
    Date of Patent: July 10, 2007
    Assignee: Microsoft Corporation
    Inventors: Felix G. T. I. Andrew, Ian M. Ellison-Taylor, Mark S. Carroll
  • Patent number: 7228530
    Abstract: Comparison indices each for two components incorporated in a source program are used for easy and quantitative evaluation of functional redundancy in the program, effective and accurate extraction of redundant code segments from the program and also effective and accurate extraction of components to be modified simultaneously. A tree T is entered and an initial level of functional redundancy m(P) is set at 0 in a program P expressed by the tree T. The top node of the tree T is selected as a node N. A specific computation is performed for the top node selected as the node N with attribute information including the similarity and the number of children of the node N to obtain a level ?. The level ? is added to the functional redundancy m(P). The specific computation is performed for every node in the tree T, to obtain functional redundancy m(P) including the total of ? for all nodes.
    Type: Grant
    Filed: February 3, 2003
    Date of Patent: June 5, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Takeo Imai
  • Patent number: 7219339
    Abstract: A method of automatically parsing a network device configuration and generating a representation of one or more configuration commands for a network device that uses a command-line interface, using a grammar-based framework, is disclosed. One or more syntax definitions are received for a grammar associated with the command-line interface. The syntax definitions are compiled into a grammar object that represents the grammar. A configuration of the network device is received. The configuration is parsed using the grammar object. One or more configuration values are created and stored based on parsing the configuration. Using the configuration values, operating system version information, and the grammar object, one or more command-line interface commands may be automatically generated for use in configuring the device or other network management purposes. Further, applications may use the parameter values to customize a graphical user interface, perform range checking, etc.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: May 15, 2007
    Assignee: Cisco Technology, Inc.
    Inventors: Dinesh Goyal, Mayank Jain
  • Patent number: 7219340
    Abstract: A changeable pattern and implementation is presented in which types (used in programming environments and virtual machines) may be mutable as controlled by a programmer, and share many of the benefits of value types, without the drawbacks of value types. The changeable pattern provides flexibility for restricting the modifiability of the resultant uses of the values, as well as providing a means for providing notifications upon changes. In one implementation, a single set of changeable types is provided that derive from a common Changeable base class, and any type for which mutability is desired may derive from the Changeable class. Properties associated with the changeable define state that determines cloning and/or changeability characteristics on subsequent uses of the type. True mutability is provided via a status property of next use being set to a changeable reference state such that subsequent uses of the type do not cause a state change.
    Type: Grant
    Filed: October 23, 2003
    Date of Patent: May 15, 2007
    Assignee: Microsoft Corporation
    Inventors: Greg D. Schechter, Joseph S. Beda