Just-in-time Compiling Or Dynamic Compiling (e.g., Compiling Java Bytecode On A Virtual Machine) Patents (Class 717/148)
  • Patent number: 8341610
    Abstract: A method and system for generating problem resolution flowcharts, whereby users do not author flowcharts directly but instead author a dependency matrix of questions and answers related by state or underlying problem cause. After creation of a matrix of questions and answers, a corresponding flowchart is then calculated based on the information in the dependency matrix, and also based on the likelihood of the various problems and their causes. The probabilities of problems and their causes may be estimated or may be calculated from historical data accumulated by use of the flow chart, or some combination of the two. These probabilities are incorporated into the answer cells of the dependency matrix. The resulting flowchart is tested and evaluated, and the results of testing and evaluation are used to make modifications in the matrix of questions and answers.
    Type: Grant
    Filed: March 15, 2007
    Date of Patent: December 25, 2012
    Assignee: International Business Machines Corporation
    Inventors: Alina Beygelzimer, Mark Brodie, Sheng Ma, Jonathan Lenchner, Irina Rish
  • Patent number: 8341609
    Abstract: A computer is programmed to automatically identify multiple sequences of executable code such that each sequence fits within a page of memory. When the executable code comprising several sequences is loaded into the paged memory, each sequence is placed in its own page. The computer is further programmed to prepare a number of structures which identify a corresponding number of instructions that transfer control between sequences. Each structure identifies at least a control transfer instruction in one sequence and a target in another sequence. When loading the sequences into memory, the structures are used to replace destination addresses of control transfers between sequences with new addresses derived from base addresses of pages that have been allocated in memory to hold the sequences.
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: December 25, 2012
    Assignee: Oracle International Corporation
    Inventors: Robert H. Lee, David Unietis, Mark Jungerman
  • Patent number: 8341606
    Abstract: Provided is a method of invoking an inlined method and a Java virtual machine using the method. The method includes, when a first method is invoked, generating a frame comprising information that is needed for execution of the first method, and, when a second method that satisfies a predetermined condition is invoked, executing the second method using the frame.
    Type: Grant
    Filed: January 12, 2007
    Date of Patent: December 25, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Seung-bum Chung
  • Publication number: 20120324429
    Abstract: A JIT (Just-In-Time) compiler performs dual-mode code generation by determining whether an application has opted-in to SIMD (Single Instruction Multiple Data) code generation both at JIT-time and at runtime. The application may select the code generation mode by identifying whether it has opted-in to SIMD code generation. As a result, the underlying implementation guarantees application compatibility by allowing the application to select the code generation mode. Additionally, applications have the ability to select into different code generation modes during concurrent execution.
    Type: Application
    Filed: June 14, 2011
    Publication date: December 20, 2012
    Applicant: MICROSOFT CORPORATION
    Inventors: Sachin Manchanda, Anand Rengasamy, Pratap Lakshman, Srivatsan Kidambi, Ramesha Chandrashekhar
  • Patent number: 8336029
    Abstract: The subject matter of this specification can be embodied in, among other things, a method that includes establishing a connection with one or more virtual machines using a debugger protocol configured to communicate debug commands to applications executed by the one or more virtual machines. The method also includes transmitting a request for a current state of the one or more virtual machines using the connection. Information associated with the current state includes state variables not controlled by an application receiving debug commands. The method includes outputting the current state of the one or more virtual machines for display to a user.
    Type: Grant
    Filed: November 8, 2007
    Date of Patent: December 18, 2012
    Assignee: Google Inc.
    Inventors: Andrew T. McFadden, David P. Bort
  • Patent number: 8336035
    Abstract: Embodiments described herein are directed to allowing a user to extend the functionality of a software code interpretation system. In one embodiment, a computer system receives user-defined conversion rules from a user for converting dynamic language code to continuation-based abstract memory representations. The computer system identifies portions of software code that are to be converted from dynamic language abstract memory representations into continuation-based abstract memory representations, where the identified code portions include undefined, extensible input primitives. The computer system also generates a dynamic, extensible set of output primitives interpretable by a continuation-based code interpretation system using the received conversion rules and converts the identified code portions including the undefined, extensible input primitives from dynamic language abstract memory representations into continuation-based abstract memory representations using the generated set of output primitives.
    Type: Grant
    Filed: December 16, 2008
    Date of Patent: December 18, 2012
    Assignee: Microsoft Corporation
    Inventors: John Robert Lambert, Kenneth D. Wolf, Geoffrey M. Kizer
  • Patent number: 8336036
    Abstract: The present invention is directed to a method and system for translating a high programming level language code such as C, C++, Fortran, Java or the like into a HDL code such as Verilog or VHDL. The system includes: a C-to-C source translator which reads user API from a translation-targeted high level language code marked with the user API, separates the translation-targeted high level language code into a hardware code part and a software code part, and stores the hardware code part and the software code part in separate files; a main compiler which compiles the stored software code part; a translator which translates the stored hardware code part into a HDL code including one or more block modules and one top module; a main core which executes the compiled software code part; and a dedicated hardware which executes the HDL code.
    Type: Grant
    Filed: February 25, 2009
    Date of Patent: December 18, 2012
    Assignee: Korea University Industrial & Academic Collaboration Foundation
    Inventors: Seon Wook Kim, Thi Huong Giang Nguyen
  • Patent number: 8332830
    Abstract: A method for communicating between at least one environment-independent application logic code (AL code) and at least one environment which is a combination of hardware and software. The method includes creating at least one interaction style code (IS code) that is specific to and communicates with the at least one environment, and is provided with an interaction style interface (IS interface) for interfacing an interaction style with said at least one application logic code (AL code). The interaction style interface (IS interface) is independent of and does not specify properties of said at least one environment, and the at least one environment-independent application logic code (AL code) runs unchanged in all environments. The at least one interaction style code (IS code) is operable with all of a graphical user interface, a non-graphical user interface, an HTML-based web browser user interface, and no user interface.
    Type: Grant
    Filed: February 7, 2006
    Date of Patent: December 11, 2012
    Inventors: Ellezer Kantorowitz, Alexander Lyakas
  • Publication number: 20120304160
    Abstract: The present disclosure involves systems and computer-implemented methods for installing software hooks. One process includes identifying a target method and a hook code, where the hook code is to execute instead of at least a portion of the target method, and wherein the target method and the hook code are executed within a managed code environment. A compiled version of the target method and a compiled version of the hook code are located in memory, where the compiled versions of the target method and the hook code are compiled in native code. Then, the compiled version of the target method is modified to direct execution of at least a portion of the compiled version of the target method to the compiled version of the hook code. The non-compiled version of the target method may be originally stored as bytecode. The managed code environment may comprise a managed .NET environment.
    Type: Application
    Filed: May 27, 2011
    Publication date: November 29, 2012
    Applicant: RIDGEWAY INTERNET SECURITY, LLC
    Inventor: Derek A. Soeder
  • Patent number: 8321668
    Abstract: The inventive method for controlling access to data which is used by reference in a program execution system (including processes and aims) during the program execution consists in memorising by the system the totality of references obtainable by said program with the aid of means considered legal, before any operation which can be prohibited if it relates to values which are not legal references, in verifying by the system whether said values are amongst the legal references memorized for the program and in accepting or rejecting the operation, respectively.
    Type: Grant
    Filed: December 16, 2004
    Date of Patent: November 27, 2012
    Assignee: Trusted Logic
    Inventors: Xavier Leroy, Patrice Hameau, Nicolas Regnault, Renaud Marlet
  • Patent number: 8316359
    Abstract: The present invention provides a method and system for optimization of an intermediate representation in a graphical modeling environment. A first intermediate representation is provided. At least one optimization technique is applied to the first intermediate representation. A second intermediate representation is generated responsive to the application of the at least one optimization technique to the first intermediate representation.
    Type: Grant
    Filed: June 2, 2011
    Date of Patent: November 20, 2012
    Assignee: The MathWorks, Inc.
    Inventor: Xiaocang Lin
  • Patent number: 8312438
    Abstract: Methods and apparatus, including computer program products, are provided for debugging using dynamic compilers. The method may include receiving a first indication to grant access to a set of variables and to allow access to be inhibited to a set of remaining variables. The dynamic compiler may be allowed to optimize the set of remaining variables, while the set of granted variables is preserved. A second indication may be provided to acknowledge access to the set of granted variables and allow access to be inhibited to the set of remaining variables. In some variations, the set of granted variables is implemented as a set of live variables and the set of remaining variables is implemented as a set of dead variables. Related apparatus, systems, methods, and articles are also described.
    Type: Grant
    Filed: August 2, 2007
    Date of Patent: November 13, 2012
    Assignee: SAP AG
    Inventor: Mirko Luedde
  • Patent number: 8312439
    Abstract: A method, apparatus, and computer instructions are provided for inlining native functions into compiled Java code. A conversion engine is provided by the present invention for converting the intermediate representation of native functions to the just-in-time (JIT) compiler's intermediate representation. With the converted intermediate representation, an inliner recursively inlines the converted JIT compiler's intermediate representation into the native callsite to remove the need of invoking the native function and subsequent native calls made by the function. The inlining process continues until either a call to an opaque function is encountered or until a JIT compiler intermediate representation growth limits are reached. The inliner also replaces calls to most native functions that are non-inlineable or opaque with calls to synthesized native functions that provide access to native libraries containing implementations of the original non-inlineable calls.
    Type: Grant
    Filed: April 6, 2009
    Date of Patent: November 13, 2012
    Assignee: International Business Machines Corporation
    Inventors: Allan Henry Kielstra, Levon Sassoon Stepanian, Kevin Alexander Stoodley
  • Patent number: 8312441
    Abstract: Embodiments of the invention provide techniques for presenting energy consumption information in an IDE tool. In one embodiment, the IDE tool may be configured to determine energy requirements associated with specific elements of the source code, and to present graphical indications of energy requirements along with those code elements. Such energy requirements may be determined by matching code elements to a stored data structure describing energy requirements for executing various code elements. The stored data may be based on predefined standards, and/or may be based on historical measurements of energy consumption during prior instances of executing code elements on a target computer system. Additionally, developers may specify priority for compiling portions of source code, according to desired energy requirements.
    Type: Grant
    Filed: February 10, 2009
    Date of Patent: November 13, 2012
    Assignee: International Business Machines Corporation
    Inventors: Eric L. Barsness, David L. Darrington, Amanda Peters, John M. Santosuosso
  • Patent number: 8312432
    Abstract: A method of adjusting a control timing accompanying a program correction of a machine language program executed by an information processor includes preparing a first machine language program obtained by compiling a first source program and generating a second intermediate language program from a second source program, the second source program being corrected from the first source program. Then, the method computes a first number of clock cycles, that is a number of clock cycles to execute a first machine language program obtained by compiling the first source program and computes a second number of clock cycles, that is a number of clock cycles to execute a second machine language program obtained by compiling the second source program, using the second intermediate language program, the second intermediate language program including an instruction that is uniquely correlated with a machine language instruction of the second machine language program.
    Type: Grant
    Filed: September 9, 2008
    Date of Patent: November 13, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Kenji Mori
  • Patent number: 8307350
    Abstract: A multi level virtual function table uses a hierarchy of chunks or segments of virtual function tables to identify methods for a particular class. At least one level of indirection pointers may point to individual virtual function table chunks, which may be shared by multiple classes. In some embodiments, fixed size chunks of virtual function tables may be used, other embodiments may use variable sized chunks of virtual function tables. In just in time compiled code, virtual function tables may be limited to sharing across parent and child classes, while in pre-compiled code, more complex sharing may be used.
    Type: Grant
    Filed: January 14, 2009
    Date of Patent: November 6, 2012
    Assignee: Microsoft Corporation
    Inventor: David J. Hiniker
  • Patent number: 8296730
    Abstract: When objects are called by a program written in a strongly-typed language using an interface written in a loosely-typed manner, incompatibilities between the programming languages can cause problems. Extension methods can simplify the interface between objects in an object model and a program written in a strongly-typed programming language by providing method overloads that accept strongly-typed parameters. Extension methods are provided that use method overloads that accept strongly-typed parameters, improving type safety by allowing the compiler to enforce type safety rather than relying on type checking at runtime. Nullable types and object initialization may be used to provide strongly-typed optional parameters. Extension methods can be used to support parameterized properties and to support class indexers, enabling query of collections of in-memory objects.
    Type: Grant
    Filed: March 12, 2008
    Date of Patent: October 23, 2012
    Assignee: Microsoft Corporation
    Inventors: David Andrew Whitechapel, Vladimir Morozov, Phillip Michael Hoff
  • Patent number: 8296745
    Abstract: Method and apparatus for automatically generating intermediate-level interfaces between program methods written in a platform-independent language and program methods written in a native language. A portable stub generator generates stubs in an intermediate, tokenized internal representation. The stub generator is portable across platforms as the stubs it generates are not platform-specific. In addition, the generated stubs are available to the compiler at intermediate compilation stages rather than at the backend compilation stage, and thus may be optimized together with the rest of the platform-independent code, and also may be inlined. The portable stub generator may be directed at virtual machine environments. An exemplary virtual machine environment in which the stub generator may be implemented is the Java™ Virtual Machine (JVM). In JVMs, Java™ is the platform-independent language, and Java™ bytecode the tokenized internal representation.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: October 23, 2012
    Assignee: Oracle America, Inc.
    Inventors: Douglas N. Simon, Bernd J. W. Mathiske
  • Publication number: 20120266147
    Abstract: A method for running multiple copies of the same native code in a Java Virtual Machine is described. In one embodiment, such a method includes providing a class to enable segregating multiple copies of the same native code. The method defines, within the class, a native method configured to dispatch operation of the native code. The method further includes generating first and second instances of the class. Calling the native method in the first instance causes a first copy of the native code to run in a first remote execution container (e.g., a first process). Similarly, calling the native method in the second instance causes a second copy of the native code to run in a second remote execution container (e.g., a second process) separate from the first remote execution container. A corresponding computer program product is also disclosed.
    Type: Application
    Filed: April 14, 2011
    Publication date: October 18, 2012
    Applicant: International Business Machines Corporation
    Inventors: Michael H. Dawson, Graeme Johnson
  • Patent number: 8291393
    Abstract: A computer implemented method for performing inlining in a just-in-time compiler. Compilation of a first code of a program is begun. The first code is one of an interruptible code and a non-interruptible code. A try region is established around a second code of the program to form a wrapped second code. The try region is a boundary between interruptible and non-interruptible code such that a third code that modifies an observable state of the program cannot be moved across the boundary. The second code is, relative to the first code, the other of the interruptible code and the non-interruptible code. The wrapped second code is inlined with the first code during compilation. Compilation of the first code is completed to form a resultant code. The resultant code is stored.
    Type: Grant
    Filed: August 20, 2007
    Date of Patent: October 16, 2012
    Assignee: International Business Machines Corporation
    Inventors: Patrick G. Gallop, Derek Bruce Inglis, Mark Graham Stoodley
  • Patent number: 8291394
    Abstract: A method for detecting transient fault includes translating binary code to an intermediate language code. An instruction of interest in the intermediate language code is identified. Reliability instructions are inserted in the intermediate language code to validate values from the instruction of interest. The intermediate language code is translated to binary code. Other embodiments are described and claimed.
    Type: Grant
    Filed: July 13, 2011
    Date of Patent: October 16, 2012
    Assignee: Intel Corporation
    Inventors: George A. Reis, Robert Cohn, Shubhendu S. Mukherjee
  • Patent number: 8286152
    Abstract: Systems, methods, and computer products for just-in-time compilation for virtual machine environments for fast applications start-up and maximal run-time performance. Exemplary embodiments include a just in time compilation method for a virtual machine environment coupled to a memory, including identifying a program structure for compilation, creating a low optimization compiled version of the program structure that is relocatable in the memory, storing into a persistent cache the low optimization compiled version of the program structure that is relocatable and relocating the low optimization compiled version of the program structure into a virtual machine address space in the memory, wherein relocating the low optimization compiled version of the program structure includes transforming the low optimization compiled version to a compiled version with fixed addresses in the memory that can be executed.
    Type: Grant
    Filed: August 22, 2007
    Date of Patent: October 9, 2012
    Assignee: International Business Machines Corporation
    Inventors: Nikola Grcevski, Derek B. Inglis, Marius Pirvu, Mark G. Stoodley
  • Patent number: 8286147
    Abstract: An information processing system includes a preparation machine with an installed image; an execution machine on which the installed image is virtually installed; and a virtualizer for virtualizing the installed image on the execution machine to produce a virtually installed image by using a hierarchy of selective virtualizers, wherein the virtualizing is selective such that not all operations of the executing software of the installed image at any particular level are virtualized.
    Type: Grant
    Filed: March 16, 2009
    Date of Patent: October 9, 2012
    Assignee: International Business Machines Corporation
    Inventors: Bowen L. Alpern, Joshua S. Auerbach, Vasanth Bala, Thomas V. Frauenhofer, Jobi George, Todd W. Mummert, Michael A. Pigott
  • Patent number: 8281292
    Abstract: A system to enables Rapid Application Development (“RAD”) is provided. The system provides an object model of an ERP application, which enables software developers to customize the ERP applications. The object model provides a base class that is inherited by each object class. The base class provides an invoke function that is implemented by each object class. During compilation, the RAD system compiles each invocation of a function of an object into a call to a dynamic component passing an identifier of the object, an identifier of the function to be invoked, and the parameters to be passed to the function. The RAD system dynamically compiles, assembles, and instantiates object classes as needed. Because objects are bound at runtime, rather than at compile time, when the source code of an object is modified, the entire ERP application does not need to be recompiled into monolithic IL code and the compilation of object classes is deferred until an object of that class is needed during runtime.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: October 2, 2012
    Assignee: Microsoft Corporation
    Inventors: Palle D. Larsen, Esben N. Kristoffersen, Dean McCrae, Mehmet K. Kiziltunc, Stuart Glasson
  • Patent number: 8281291
    Abstract: A system and method are provided to allow demand loading and discarding of Java executable image (JXE) files. The virtual machine allocates an address space for a requested JXE program. The read-only portion of the JXE file is memory mapped from its nonvolatile location to the allocated memory space using read-only mapping and the read/write section of the JXE file are loaded into memory. When a page of the JXE program is needed, a page fault occurs if the read-only portion has not been loaded into memory. The operating system's page fault handler retrieves the needed page(s) from the nonvolatile storage location based upon the mapping data that resulted from the previously performed memory mapping. Because the read-only section of the JXE file is memory mapped using read-only mapping, the operating system's paging process is free to discard previously loaded memory pages that contain read-only portions of the JXE file.
    Type: Grant
    Filed: December 29, 2007
    Date of Patent: October 2, 2012
    Assignee: International Business Machines Corporation
    Inventors: Janet Dmitrovich, Philip Lee Langdale, James Patrick Robbins, William J. Tracey
  • Patent number: 8276131
    Abstract: A method that provides for dynamic loop transfer for a method having a first set of instructions being executed by an interpreter is provided. An execution stack includes slots for storing a value of each local variable known to each subroutine while the subroutine is active.
    Type: Grant
    Filed: August 30, 2007
    Date of Patent: September 25, 2012
    Assignee: International Business Machines Corporation
    Inventors: Kevin J. Langman, Zhong L. Wang
  • Patent number: 8276129
    Abstract: One embodiment of the present invention sets forth a system that allows a software developer to perform shader debugging and performance tuning. The system includes an interception layer between the software application and the application programming interface (API). The interception layer is configured to intercept and store source code versions of the original shaders included in the application. For each object in the frame, the interception layer makes shader source code available to the developer, so that the developer can modify the source code as needed, re-compile only the modified shader source code, and run the application. Consequently, shader debugging and performance tuning may be carried out in a manner that is more efficient and effective relative to prior art approaches.
    Type: Grant
    Filed: August 13, 2007
    Date of Patent: September 25, 2012
    Assignee: NVIDIA Corporation
    Inventors: Jeffrey T. Kiel, Derek M. Cornish
  • Patent number: 8271965
    Abstract: A method and apparatus to guarantee type safety in multithreaded programs, and to guarantee initialization safety in well-behaved multithreaded programs. A plurality of bytecodes representing a program are received and examined to identify bytecodes defining object creation operations and object initialization operations. Upon execution of the plurality of bytecodes, memory barrier operations are performed subsequent to the performance of both the object creation operations and the object initialization operations. This guarantees type safety, and further guarantees initialization safety if the program is well-behaved. Optimization algorithms may also be applied in the compilation of bytecodes to improve performance.
    Type: Grant
    Filed: October 3, 2008
    Date of Patent: September 18, 2012
    Assignee: International Business Machines Corporation
    Inventor: Zhong Liang Wang
  • Publication number: 20120233602
    Abstract: Idle processor cores can be used to compile methods that are likely to be executed by a program based on profile data that is captured during one or more previous executions. Methods that are determined by the profile data to be likely to be used can be compiled eagerly on one or more background threads. Transparency can be achieved by ensuring that module load order is not altered because of the background threads by recording the state of loaded modules after each profiled compilation, persisting that data, and waiting to eagerly compile a method until the method to be compiled and all its dependencies has been loaded by the executing program.
    Type: Application
    Filed: March 10, 2011
    Publication date: September 13, 2012
    Applicant: MICROSOFT CORPORATION
    Inventors: Subramanian Ramaswamy, David Hiniker-Roosa, Feng Yuan, Sedar Gokbulut, Ashok C. Kamath, Jan Kotas, Vance P. Morrison
  • Publication number: 20120233603
    Abstract: An apparatus and method for accelerating Java translation are provided. The apparatus includes a lookup table which stores an lookup table having arrangements of bytecodes and native codes corresponding to the bytecodes, a decoder which generates pointer to the native code corresponding to the feed bytecode in the lookup table, a parameterized bytecode processing unit which detects parameterized bytecode among the feed bytecode, and generating pointer to native code required for constant embedding in the lookup table, a constant embedding unit which embeds constants into the native code with the pointer generated by the parameterized bytecode processing unit, and a native code buffer which stores the native code generated by the decoder or the constant embedding unit.
    Type: Application
    Filed: May 17, 2012
    Publication date: September 13, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyo-jung SONG, Ciji ISEN, Lizy K. JOHN
  • Patent number: 8266582
    Abstract: A method for creating a unified binary file that may be executed on a plurality of hardware platforms. The unified binary file includes hardware independent code and a plurality of hardware dependent binary files for a variety of hardware platforms. When the unified binary file is executed on a supported hardware platform, an appropriate hardware dependent file is identified and installed. A method for preparing a software package supported on a plurality of hardware platforms for distribution. A unified binary file is created for each corresponding file of the software package. Each unified binary file includes installation directory information and dependent file information.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: September 11, 2012
    Assignee: Oracle America, Inc.
    Inventor: Raj Prakash
  • Patent number: 8261248
    Abstract: In one embodiment the present invention includes a first virtual machine that executes a non-dynamic program, that implements a second virtual machine that executes a dynamic program. The dynamic program operates in the structured environment of the non-dynamic programming language via various allowed interaction pathways. In this manner, dynamic programs may be executed in a robust business applications environment.
    Type: Grant
    Filed: November 5, 2007
    Date of Patent: September 4, 2012
    Assignee: SAP AG
    Inventors: Rainer Brendle, Murray Spork
  • Publication number: 20120222022
    Abstract: Mechanisms for instantiating an interface or abstract class in application code are provided. An object-oriented programming language is extended such that interfaces and abstract classes can be instantiated in application code without a concrete class specified. Metadata is defined which maps each interface or abstract class instantiation in the application code to a concrete class to be used either by the compiler at build time, or the virtual machine at runtime. Once the appropriate concrete class is determined from the metadata, the class is instantiated with a conventional class loader. The metadata may be provided, for example, as a separate file, such as a markup language file, defined with a virtual machine switch, as annotations in the application code, or the like.
    Type: Application
    Filed: May 10, 2012
    Publication date: August 30, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Roland Barcia, Kulvir S. Bhogal, Geoffrey M. Hambrick, Robert R. Peterson
  • Publication number: 20120204162
    Abstract: Methods and apparatuses are provided for facilitating execution of kernels requiring runtime compilation. A method may include implementing a driver for a framework for handling kernels requiring runtime compilation. The method may further include receiving, by the driver, code for a kernel requiring at least partial runtime compilation for execution using the framework. The method may additionally include obtaining, by the driver, a compiled executable version of the kernel. The obtained compiled executable version of the kernel may not have been locally compiled. The method may also include causing, by the driver, the compiled executable version of the kernel to be provided for execution. Corresponding apparatuses are also provided.
    Type: Application
    Filed: February 8, 2011
    Publication date: August 9, 2012
    Inventors: Jari Nikara, Eero Aho
  • Patent number: 8239842
    Abstract: Modified compilers and other development tools provide implied line continuation within a sequence of syntax tokens of a programming language grammar which includes multiple semantic contexts and which uses line termination as presumptive statement termination. When source code parsing encounters a line terminator adjacent a context-dependent implicit line continuation token in an associated semantic context, an explicit decision is made whether to imply line continuation. Line continuation may also be implied in response to other specified tokens.
    Type: Grant
    Filed: February 24, 2009
    Date of Patent: August 7, 2012
    Assignee: Microsoft Corporation
    Inventors: Avner Aharoni, Timothy Yat Tim Ng, David N. Schach, Paul Allen Vick, Jr., Lisa Feigenbaum, Sophia Salim, Henricus Johannes Maria Meijer, Jonathan Paul Aneja, Joseph Tyler Whitney
  • Patent number: 8239827
    Abstract: A system and method for compiling part of the bytecode for a software application into native code at install time when the software application is installed on a particular computer are described. According to one embodiment of the method, usage information for the software application may be received. The usage information may indicate how frequently or commonly each of a plurality of features of the software application is used. The usage information may be analyzed to determine a rank ordering of the features. The method may further comprise installing the software application on the particular computer. Installing the software application may comprise compiling one or more bytecode modules of the software application into native code, where the one or more bytecode modules are selected from a plurality of bytecode modules depending upon the rank ordering of the features.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: August 7, 2012
    Assignee: Symantec Operating Corporation
    Inventors: William E. Sobel, Sourabh Satish
  • Patent number: 8234649
    Abstract: Systems and methods are provided for enabling communication between a composite system providing additional functionality not contained in existing legacy systems and other existing systems using different commands, variables, protocols, methods, or instructions, when data may be located on more than one system. In an embodiment, multiple software layers are used to independently manage different aspects of an application. A business logic layer may be used in an embodiment to facilitate reading/writing operations on data that may be stored locally and/or on external systems using different commands, variables, protocols, methods, or instructions. A backend abstraction layer may be used in an embodiment in conjunction with the business logic layer to facilitate communication with the external systems. A user interface layer may be used in an embodiment to manage a user interface, a portal layer to manage a user context, and a process logic layer to manage a workflow.
    Type: Grant
    Filed: August 14, 2009
    Date of Patent: July 31, 2012
    Assignee: SAP AG
    Inventors: Frederik Thormaehlen, Frank Mock, Volker Wiechers, Sebastian Speck, Pia Kinkel, Ruth Groene, Martin Czekalla, Gabor Faludi, Robert Christoph Lorch, Peter Csontos, Bela Tolvaj, Gergely Pap, Csaba Hegedus, Berhard Fuhge, Marton Pinter, Robert Foldvari, Volker Stiehl, Patrick Zimmer
  • Patent number: 8230407
    Abstract: An apparatus and method for accelerating Java translation are provided. The apparatus includes a lookup table which stores an lookup table having arrangements of bytecodes and native codes corresponding to the bytecodes, a decoder which generates pointer to the native code corresponding to the feed bytecode in the lookup table, a parameterized bytecode processing unit which detects parameterized bytecode among the feed bytecode, and generating pointer to native code required for constant embedding in the lookup table, a constant embedding unit which embeds constants into the native code with the pointer generated by the parameterized bytecode processing unit, and a native code buffer which stores the native code generated by the decoder or the constant embedding unit.
    Type: Grant
    Filed: December 28, 2007
    Date of Patent: July 24, 2012
    Assignees: Samsung Electronics Co., Ltd., Board of Regents, The University of Texas System
    Inventors: Hyo-jung Song, Ciji Isen, Lizy K. John
  • Patent number: 8230387
    Abstract: The embodiments of the invention provide a method of organizing assets having artifacts in a repository. The method begins by organizing artifacts of at least one of the assets as internal nodes in a graph based on a context. The method simultaneously organizes the assets as external nodes in the graph based on the context. The internal nodes comprise artifacts having metadata that is updated by an artifact producer and/or an asset producer. Moreover, the external nodes comprise artifacts that are defined and/or updated by roles other than an artifact producer and/or an asset producer.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: July 24, 2012
    Assignee: International Business Machines Corporation
    Inventors: Biplav Srivastava, Karthikeyan Ponnalagu, Nanjangud C. Narendra
  • Patent number: 8230402
    Abstract: A method for testing and debugging of dynamic binary translation wherein a dynamic binary translator allows a target binary to be executed transparently on a host machine having a different computer architecture than the target machine involves selecting a minimum set of target machine states for simulation at run-time. A series of target machine instructions from the target binary is translated into a series of host machine instructions. During translation, a plurality of check points are inserted into the series of host machine instructions. During translation, a plurality of verification points are inserted into the series of host machine instructions. The series of host machine instructions, including the check points and verification points, are executed. Execution of a check point determines a simulated target machine state. Execution of a verification point sends information pertaining to simulated target machine states to an external verifier.
    Type: Grant
    Filed: September 30, 2007
    Date of Patent: July 24, 2012
    Assignee: Oracle America, Inc.
    Inventors: William Y. Chen, Jiwei Lu, Geetha K. Vallabhaneni
  • Publication number: 20120185834
    Abstract: A system and method for efficient compilation and invocation of function type calls in a virtual machine (VM), or other runtime environment, and particularly for use in a system that includes a Java Virtual Machine (JVM). While current techniques in Java for implementing function types using interface calls are neither efficient nor flexible, embodiments of the present invention address this problem by providing a system and method for creating function references (MethodHandles) to a target function, invoking efficiently on such a MethodHandle from a callsite, and reusing the existing generics infrastructure within the Java language to carry the types during javac compile time from the target function to the callsite.
    Type: Application
    Filed: January 14, 2011
    Publication date: July 19, 2012
    Applicant: ORACLE INTERNATIONAL CORPORATION
    Inventor: Fredrik Öhrström
  • Publication number: 20120185700
    Abstract: Disclosed herein are systems, methods, and non-transitory computer-readable storage media for processing just-in-time code at a device that enforces a code signing requirement. The disclosure includes receiving computer code, where a portion of the code includes executable just-in-time code, at a device that enforces a code signing requirement; identifying the unsigned just-in-time executable portion of code; allocating a randomly selected memory region on the device for at least some of the unsigned just-in-time executable portion; and executing the unsigned just-in-time executable portion of code in the randomly selected memory region as if the unsigned just-in-time executable portion of code was signed computer code.
    Type: Application
    Filed: January 18, 2011
    Publication date: July 19, 2012
    Applicant: Apple Inc.
    Inventors: Jacques Anthony Vidrine, Lionel Divyang Desai
  • Publication number: 20120185833
    Abstract: In a virtual machine that uses a just-in-time complier (JITC) as a software execution environment, an idle time of a core to which the JITC is allocated is utilized to generate machine code in advance, thereby reducing a load on an interpreter. Accordingly, code execution performance of the interpreter is improved, and the utilization of a multi-core system that executes applications is increased.
    Type: Application
    Filed: October 12, 2011
    Publication date: July 19, 2012
    Inventors: Hyeong-Seok Oh, Hyung-Kyu Choi, Dong-Heon Jung, Soo-Mook Moon, Kue-Hwan Sihn
  • Patent number: 8225294
    Abstract: One embodiment of the present invention provides a system for generating executable code. During operation, the system receives source code, wherein the source code can include declarations for types and operations, wherein the type declarations may be parameterized, and wherein the source code may specify subtyping relationships between declared types. Next, the system compiles or interprets the source code to produce executable code, wherein the type parameters may be instantiated by different types during execution, and wherein the result of executing operations may depend upon the instantiations of the type parameters. While compiling or interpreting the source code, the system checks the types and operations in the source code to ensure that the executable code generated is type-safe, and hence will not generate type errors during execution.
    Type: Grant
    Filed: April 27, 2006
    Date of Patent: July 17, 2012
    Assignee: Oracle America, Inc.
    Inventors: Sukyoung Ryu, Eric E. Allen, Victor M. Luchangco, Joseph J. Hallett, III, Samuel Y. Tobin-Hochstadt
  • Patent number: 8225327
    Abstract: A method and system for providing access to a shared resource utilizing selective locking are disclosed. According to one embodiment, a method is provided comprising receiving a request to perform a resource access operation on a shared resource, invoking a first routine to perform the resource access operation, detecting a data processing system exception generated in response to invoking the first routine, and invoking a second routine to perform the resource access operation in response to such detecting. In the described embodiment, the first routine comprises a dereference instruction to dereference a pointer to memory associated with the shared resource, the second routine comprises a lock acquisition instruction to acquire a global lock associated with the shared resource prior to a performance of the resource access operation and a lock release instruction to release the global lock once resource access operation has been performed.
    Type: Grant
    Filed: September 15, 2005
    Date of Patent: July 17, 2012
    Assignee: International Business Machines Corporation
    Inventors: David W. Mehaffy, Greg R. Mewhinney, Mysore S. Srinivas
  • Patent number: 8219981
    Abstract: Code handling, such as interpreting language instructions or performing “just-in-time” compilation, is performed using a heterogeneous processing environment that shares a common memory. In a heterogeneous processing environment that includes a plurality of processors, one of the processors is programmed to perform a dedicated code-handling task, such as perform just-in-time compilation or interpretation of interpreted language instructions, such as Java. The other processors request code handling processing that is performed by the dedicated processor. Speed is achieved using a shared memory map so that the dedicated processor can quickly retrieve data provided by one of the other processors.
    Type: Grant
    Filed: July 15, 2008
    Date of Patent: July 10, 2012
    Assignee: International Business Machines Corporation
    Inventors: Maximino Aguilar, Jr., Mark Richard Nutter, James Michael Stafford
  • Patent number: 8219987
    Abstract: Systems and methods of executing an application in an application specific runtime environment are disclosed. The application specific runtime environment is defined by an application environment specification to include a minimal or reduced set of software resources required for execution of the application. The application environment is generated by determining software resource dependencies and is optionally used to provision the application specific runtime environment in real-time in response to a request to execute the application. Use of the application specific runtime environment allows the application to be executed using fewer computing resources, e.g., memory. The application specific runtime environment is optionally disposed within a virtual machine. The virtual machine may be created in response to the request to run the executable application and the virtual machine may be automatically provisioned using an associated application environment specification.
    Type: Grant
    Filed: August 24, 2007
    Date of Patent: July 10, 2012
    Assignee: VMware, Inc.
    Inventors: Stevan Vlaovic, Richard Offer
  • Patent number: 8214812
    Abstract: A method, a system, and a computer-readable medium storing instructions for interpreting a method bytecode. The method bytecode is interpreted by determining whether a called method is a bottleneck method, generating an interpreter loop for the called method if the called method is the bottleneck method, and interpreting a bytecode of the called method using the generated interpreter loop.
    Type: Grant
    Filed: October 18, 2006
    Date of Patent: July 3, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Alexey Romanovskiy
  • Patent number: 8214811
    Abstract: Mechanisms for instantiating an interface or abstract class in application code are provided. An object-oriented programming language is extended such that interfaces and abstract classes can be instantiated in application code without a concrete class specified. Metadata is defined which maps each interface or abstract class instantiation in the application code to a concrete class to be used either by the compiler at build time, or the virtual machine at runtime. Once the appropriate concrete class is determined from the metadata, the class is instantiated with a conventional class loader. The metadata may be provided, for example, as a separate file, such as a markup language file, defined with a virtual machine switch, as annotations in the application code, or the like.
    Type: Grant
    Filed: October 23, 2006
    Date of Patent: July 3, 2012
    Assignee: International Business Machines Corporation
    Inventors: Roland Barcia, Kulvir S. Bhogal, Geoffrey M. Hambrick, Robert R. Peterson
  • Patent number: 8214808
    Abstract: A system and method for speculative assistance to a thread in a heterogeneous processing environment is provided. A first set of instructions is identified in a source code representation (e.g., a source code file) that is suitable for speculative execution. The identified set of instructions are analyzed to determine the processing requirements. Based on the analysis, a processor type is identified that will be used to execute the identified first set of instructions based. The processor type is selected from more than one processor types that are included in the heterogeneous processing environment. The heterogeneous processing environment includes more than one heterogeneous processing cores in a single silicon substrate. The various processing cores can utilize different instruction set architectures (ISAs). An object code representation is then generated for the identified first set of instructions with the object code representation being adapted to execute on the determined type of processor.
    Type: Grant
    Filed: May 7, 2007
    Date of Patent: July 3, 2012
    Assignee: International Business Machines Corporation
    Inventors: Michael Norman Day, Michael Karl Gschwind, John Kevin Patrick O'Brien, Kathryn O'Brien